技术领域technical field
本发明涉及显示器技术领域，尤其涉及一种阵列基板、显示面板、显示装置及制作方法。The present invention relates to the technical field of displays, in particular to an array substrate, a display panel, a display device and a manufacturing method.
背景技术Background technique
裸眼3D显示器凭借其全方位的展现与呼之欲出的震撼感觉，以及不需要佩戴特殊眼镜的优点，成为3D显示研究的主要方向，是新一代显示器件的研究热点。裸眼3D显示器主要包括狭缝光栅式显示器和柱镜光栅式显示器，其原理都是基于光栅的分光原理，通过对光栅形状的设计及光栅到显示器距离的精确控制，使通过显示平面的各像素的光线分别只进入人的左眼或右眼，双眼看到不同的画面，从而产生空间感。由于显示器的像素排布是有序排列的周期结构，同一行像素单元的相邻像素单元之间具有遮光金属形成的数据线，或者同一列像素单元的相邻像素单元之间具有遮光金属形成的扫描线，导致其发出的光强也具有周期性排布结构，这样的光强与显示器前面的周期性光栅结构相互干涉，很容易形成彩色或者黑色莫尔条纹。莫尔条纹的产生会影响3D显示效果，破坏图像的观赏性。Glasses-free 3D display has become the main direction of 3D display research and a research hotspot of the new generation of display devices due to its all-round display and shocking feeling, as well as the advantages of not needing to wear special glasses. Glasses-free 3D displays mainly include slit grating displays and lenticular grating displays, both of which are based on the light-splitting principle of the grating. Through the design of the grating shape and the precise control of the distance from the grating to the display, the pixels of the display plane The light only enters the left eye or the right eye of the person respectively, and the two eyes see different pictures, thus creating a sense of space. Since the pixel arrangement of the display is an ordered periodic structure, there are data lines formed by light-shielding metal between adjacent pixel units in the same row of pixel units, or data lines formed by light-shielding metal between adjacent pixel units in the same row of pixel units. Scanning lines cause the light intensity emitted by them to also have a periodic arrangement structure. Such light intensity interferes with the periodic grating structure in front of the display, and it is easy to form color or black moiré fringes. The generation of moiré fringes will affect the 3D display effect and destroy the appreciation of the image.
图1为现有技术中一种可以消除莫尔条纹的阵列基板的结构示意图，如图1所示，多条扫描线11和多条数据线12绝缘相交限制出多个像素单元10，为消除莫尔条纹，需要同一行像素单元10的任意一个聚焦位置的亮度相同，现有技术在每个像素单元10中周期性的放置遮光的金属伪电极13，金属伪电极13与遮光的数据线12形成周期性排列，使得位于每个像素单元10中或者位于不同像素单元10中的聚焦位置14、15、16的亮度都相同，进而使得像素单元10内部每个聚焦位置的亮度与邻近数据线12的每个聚焦位置的亮度相同，从而所以可以消除莫尔条纹。但是放置金属伪电极13后，会导致阵列基板的开口率明显降低。Fig. 1 is a schematic structural diagram of an array substrate capable of eliminating moiré fringes in the prior art. As shown in Fig. 1, a plurality of scanning lines 11 and a plurality of data lines 12 are insulated and intersect to limit a plurality of pixel units 10, in order to eliminate Moiré fringes require that the brightness of any focal position of the pixel unit 10 in the same row be the same. In the prior art, a light-shielding metal dummy electrode 13 is periodically placed in each pixel unit 10. The metal dummy electrode 13 and the light-shielding data line 12 A periodic arrangement is formed, so that the brightness of the focus positions 14, 15, and 16 located in each pixel unit 10 or in different pixel units 10 are all the same, so that the brightness of each focus position inside the pixel unit 10 is the same as that of the adjacent data line 12 The brightness of each focus position is the same, so moire fringes can be eliminated. However, after the metal dummy electrodes 13 are placed, the aperture ratio of the array substrate will be significantly reduced.
发明内容Contents of the invention
本发明实施例提供一种阵列基板、显示面板、显示装置及制作方法，相比现有技术通过设置金属伪电极的方式消除莫尔条纹的方法，能够提高像素开口率，提升显示亮度。Embodiments of the present invention provide an array substrate, a display panel, a display device, and a manufacturing method. Compared with the prior art method of eliminating moiré fringes by setting metal dummy electrodes, the aperture ratio of pixels can be increased, and the display brightness can be improved.
第一方面，本发明实施例提供了一种阵列基板，包括：In a first aspect, an embodiment of the present invention provides an array substrate, including:
基板；Substrate;
彼此绝缘交叉的多条扫描线和多条数据线；A plurality of scanning lines and a plurality of data lines insulated from each other;
其中，每条扫描线或每条数据线包括多个透明导电部以及多个金属走线部，相邻的透明导电部通过所述金属走线部电连接；Wherein, each scanning line or each data line includes a plurality of transparent conductive parts and a plurality of metal wiring parts, and adjacent transparent conductive parts are electrically connected through the metal wiring parts;
其中，所述阵列基板包括透光区和非透光区，所述扫描线或所述数据线的金属走线部位于所述阵列基板的非透光区。Wherein, the array substrate includes a light-transmitting area and a non-light-transmitting area, and the metal wiring part of the scanning line or the data line is located in the non-light-transmitting area of the array substrate.
第二方面，本发明实施例还提供一种阵列基板的制作方法，包括：In a second aspect, an embodiment of the present invention further provides a method for manufacturing an array substrate, including:
首先，在基板上形成扫描线或数据线的多个金属走线部；Firstly, forming a plurality of metal routing parts of scanning lines or data lines on the substrate;
接着，形成所述扫描线或所述数据线的多个透明导电部；Next, forming a plurality of transparent conductive parts of the scan line or the data line;
其中，每条扫描线或每条数据线包括多个透明导电部以及多个金属走线部，相邻的透明导电部通过所述金属走线部电连接；所述阵列基板包括透光区和非透光区，所述扫描线或所述数据线的金属走线部位于所述阵列基板的非透光区。Wherein, each scanning line or each data line includes a plurality of transparent conductive parts and a plurality of metal routing parts, and adjacent transparent conductive parts are electrically connected through the metal routing parts; the array substrate includes a light-transmitting area and a metal routing part. In the non-transparent area, the metal wiring part of the scan line or the data line is located in the non-transparent area of the array substrate.
第三方面，本发明实施例还提供一种显示面板，包括：In a third aspect, an embodiment of the present invention further provides a display panel, including:
本发明第一方面所述的阵列基板；The array substrate described in the first aspect of the present invention;
与所述阵列基板相对设置的彩膜基板；a color filter substrate disposed opposite to the array substrate;
以及位于所述阵列基板和所述彩膜基板之间的显示功能层。And a display function layer located between the array substrate and the color filter substrate.
第四方面，本发明实施例还提供一种显示装置，包括：In a fourth aspect, an embodiment of the present invention further provides a display device, including:
本发明第三方面所述的显示面板；The display panel described in the third aspect of the present invention;
位于所述显示面板的显示侧上方的狭缝光栅或透镜光栅。A slit grating or a lenticular grating over the display side of the display panel.
本发明实施例提供的技术方案，通过将每条扫描线或每条数据线设置为包括多个透明导电部以及多个金属走线部，相邻的透明导电部通过所述金属走线部电连接，并且所述阵列基板包括透光区和非透光区，所述扫描线或所述数据线的金属走线部位于所述阵列基板的非透光区，能够在不影响像素开口率的情况下，消除莫尔条纹现象。In the technical solution provided by the embodiment of the present invention, each scanning line or each data line is configured to include a plurality of transparent conductive parts and a plurality of metal wiring parts, and adjacent transparent conductive parts are electrically connected through the metal wiring parts. connected, and the array substrate includes a light-transmitting area and a non-light-transmitting area, and the metal wiring part of the scanning line or the data line is located in the non-light-transmitting area of the array substrate, which can be used without affecting the pixel aperture ratio. In this case, the Moiré fringe phenomenon is eliminated.
附图说明Description of drawings
图1为现有技术中一种消除解决莫尔条纹的阵列基板的结构示意图；FIG. 1 is a schematic structural diagram of an array substrate that eliminates moiré fringes in the prior art;
图2为本发明实施例提供的一种阵列基板的俯视图；FIG. 2 is a top view of an array substrate provided by an embodiment of the present invention;
图3为本发明实施例提供的又一种阵列基板的俯视图；FIG. 3 is a top view of another array substrate provided by an embodiment of the present invention;
图4为本发明实施例提供的又一种阵列基板的俯视图；FIG. 4 is a top view of another array substrate provided by an embodiment of the present invention;
图5为本发明实施例提供的又一种阵列基板的俯视图；FIG. 5 is a top view of another array substrate provided by an embodiment of the present invention;
图6为图5中沿AA’的剖面示意图；；Figure 6 is a schematic cross-sectional view along AA' in Figure 5;
图7为本发明实施例提供的又一种阵列基板的俯视示意图；FIG. 7 is a schematic top view of another array substrate provided by an embodiment of the present invention;
图8为图7中沿BB’的剖面示意图；Fig. 8 is a schematic cross-sectional view along BB' in Fig. 7;
图9为本发明实施例提供的又一种阵列基板的俯视示意图；FIG. 9 is a schematic top view of another array substrate provided by an embodiment of the present invention;
图10为图9中沿BB’的剖面示意图；Fig. 10 is a schematic cross-sectional view along BB' in Fig. 9;
图11为本发明实施例提供的又一种阵列基板的剖面示意图；FIG. 11 is a schematic cross-sectional view of another array substrate provided by an embodiment of the present invention;
图12为本发明实施例提供的又一种阵列基板的剖面示意图；12 is a schematic cross-sectional view of another array substrate provided by an embodiment of the present invention;
图13为本发明实施例提供的又一种阵列基板的剖面示意图；13 is a schematic cross-sectional view of another array substrate provided by an embodiment of the present invention;
图14为本发明实施例提供的又一种阵列基板的剖面示意图；FIG. 14 is a schematic cross-sectional view of another array substrate provided by an embodiment of the present invention;
图15为本发明实施例提供的一种显示面板的结构示意图；FIG. 15 is a schematic structural diagram of a display panel provided by an embodiment of the present invention;
图16为本发明实施例提供的一种显示装置的结构示意图。FIG. 16 is a schematic structural diagram of a display device provided by an embodiment of the present invention.
具体实施方式Detailed ways
下面结合附图和实施例对本发明作进一步的详细说明。可以理解的是，此处所描述的具体实施例仅仅用于解释本发明，而非对本发明的限定。另外还需要说明的是，为了便于描述，附图中仅示出了与本发明相关的部分而非全部结构。The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, but not to limit the present invention. In addition, it should be noted that, for the convenience of description, only some structures related to the present invention are shown in the drawings but not all structures.
图2为本发明实施例提供的一种阵列基板的俯视图，如图2所示，所述阵列基板包括：基板20；彼此绝缘交叉的多条扫描线23和多条数据线24；其中，每条扫描线23包括多个透明导电部231以及多个金属走线部232，相邻的透明导电部231通过所述金属走线部232电连接。所述阵列基板包括透光区21和非透光区22，所述扫描线23的金属走线部232位于所述阵列基板的非透光区22。FIG. 2 is a top view of an array substrate provided by an embodiment of the present invention. As shown in FIG. 2 , the array substrate includes: a substrate 20; a plurality of scanning lines 23 and a plurality of data lines 24 that are insulated from each other; The scanning line 23 includes a plurality of transparent conductive parts 231 and a plurality of metal wiring parts 232 , and adjacent transparent conductive parts 231 are electrically connected through the metal wiring parts 232 . The array substrate includes a transparent area 21 and a non-transmissive area 22 , and the metal wiring portion 232 of the scan line 23 is located in the non-transparent area 22 of the array substrate.
本发明实施例提供的阵列基板，通过将扫描线设置为包括多个透明导电部以及多个金属走线部，并将所述扫描线的金属走线部位于所述阵列基板的非透光区，由于透光区中没有遮光的金属材料，因此任意聚焦位置的亮度相同，所以可以避免莫尔条纹的出现，且无需在透光区设置遮光的金属伪电极，从而可以提高像素的开口率以及显示亮度。在上述实施例的基础上，所述扫描线23的透明导电部231至少部分位于所述阵列基板的透光区21，图2示例性的设置扫描线23的透明导电部231部分位于所述阵列基板的透光区21。In the array substrate provided by the embodiment of the present invention, the scanning line is configured to include a plurality of transparent conductive parts and a plurality of metal wiring parts, and the metal wiring part of the scanning line is located in the non-transparent area of the array substrate. , since there is no light-shielding metal material in the light-transmitting area, the brightness of any focus position is the same, so the appearance of Moiré fringes can be avoided, and there is no need to set a light-shielding metal dummy electrode in the light-transmitting area, thereby improving the aperture ratio of the pixel and Display brightness. On the basis of the above-mentioned embodiments, the transparent conductive part 231 of the scanning line 23 is at least partially located in the light-transmitting area 21 of the array substrate, and the transparent conductive part 231 of the scanning line 23 is partially located in the array substrate in FIG. 2 The light-transmitting region 21 of the substrate.
优选的，如图3所示，也可以设置为所述扫描线23的透明导电部231的全部位于所述阵列基板的透光区21。这样设置的好处是，可以增加透光区21的面积，从而提升阵列基板的开口率。Preferably, as shown in FIG. 3 , it may also be set such that all the transparent conductive portions 231 of the scan lines 23 are located in the light-transmitting region 21 of the array substrate. The advantage of such setting is that the area of the light-transmitting region 21 can be increased, thereby increasing the aperture ratio of the array substrate.
图4为本发明实施例提供的又一种阵列基板的俯视图，如图4所示，所述阵列基板包括：基板30；彼此绝缘交叉的多条扫描线33和多条数据线34；其中，每条数据线34括多个透明导电部341以及多个金属走线部342，相邻的透明导电部341通过所述金属走线部342电连接。所述阵列基板包括透光区31和非透光区32，所述数据线34的金属走线部342位于所述阵列基板的非透光区32。FIG. 4 is a top view of another array substrate provided by an embodiment of the present invention. As shown in FIG. 4 , the array substrate includes: a substrate 30; a plurality of scanning lines 33 and a plurality of data lines 34 that are insulated and intersect each other; wherein, Each data line 34 includes a plurality of transparent conductive parts 341 and a plurality of metal wiring parts 342 , and adjacent transparent conductive parts 341 are electrically connected through the metal wiring parts 342 . The array substrate includes a light-transmitting area 31 and a non-light-transmitting area 32 , and the metal routing portion 342 of the data line 34 is located in the non-light-transmitting area 32 of the array substrate.
在上述实施例的基础上，所述数据线的透明导电部至少部分位于所述阵列基板的透光区。优选的，也可以设置为所述数据线的透明导电部的全部位于所述阵列基板的透光区，这样设置可以增加透光区的面积，从而提升阵列基板的开口率。Based on the above embodiments, the transparent conductive part of the data line is at least partially located in the light-transmitting area of the array substrate. Preferably, it can also be set so that all the transparent conductive parts of the data lines are located in the light-transmitting area of the array substrate, so that the area of the light-transmitting area can be increased, thereby increasing the aperture ratio of the array substrate.
在上述各实施例的基础上，所述扫描线的透明导电部或所述数据线的透明导电部的材料为氧化铟锡、石墨烯和氧化铟锌的任意一种。Based on the above embodiments, the material of the transparent conductive part of the scan line or the transparent conductive part of the data line is any one of indium tin oxide, graphene and indium zinc oxide.
由于透明导电部的电阻比金属走线部的电阻大很多倍，用透明导电部作为扫描线和/或数据线的一部分必然导致扫描线或数据线的电阻的增大，所以需要增加每个透明导电部的宽长比W/L，以减小透明导电部的电阻。以扫描线为例具体参见图2，本发明实施例采用下列表1所示的参数设置透明导电部与金属走线部，虽然扫描线由透明导电部与金属走线部组成，采用下列表1所示的参数设置透明导电部与金属走线部形成的扫描线，与现有技术中扫描线全部使用金属材料制作相比，整条扫描线的阻值与现有技术中相近，并没有明显增加。需要说明的是，表1中沿扫描线延伸方向为长L，沿数据线延伸方向为宽W。Since the resistance of the transparent conductive part is many times greater than that of the metal wiring part, using the transparent conductive part as a part of the scan line and/or data line will inevitably lead to an increase in the resistance of the scan line or data line, so it is necessary to increase the resistance of each transparent conductive part. The width-to-length ratio of the conductive part is W/L, so as to reduce the resistance of the transparent conductive part. Taking the scanning line as an example, refer to Figure 2 for details. The embodiment of the present invention adopts the parameters shown in the following table 1 to set the transparent conductive part and the metal wiring part. Although the scanning line is composed of the transparent conductive part and the metal wiring part, the following table 1 is used. The shown parameters set the scanning line formed by the transparent conductive part and the metal wiring part. Compared with the scanning line in the prior art, which is all made of metal materials, the resistance value of the entire scanning line is similar to that in the prior art, and there is no obvious difference. Increase. It should be noted that in Table 1, the length L is along the extending direction of the scan lines, and the width W is along the extending direction of the data lines.
表1Table 1
在上述各实施例的基础上，所述阵列基板还包括像素电极和公共电极，所述像素电极和公共电极可以同层绝缘间隔设置，还可以异层绝缘设置。本发明实施例提供的阵列基板可适用于TN型、IPS型以及FFS型的液晶驱动面板。On the basis of the above-mentioned embodiments, the array substrate further includes a pixel electrode and a common electrode, and the pixel electrode and the common electrode may be arranged on the same layer of insulation and separated from each other, or may be arranged on different layers of insulation. The array substrate provided by the embodiments of the present invention is applicable to TN type, IPS type and FFS type liquid crystal drive panels.
在上述各实施例的基础上，可选的，所述阵列基板还包括金属走线保护部，位于所述金属走线部上方并覆盖所述金属走线部。下面以数据线包括多个透明导电部以及多个金属走线部时为例，进行详细介绍。图5为本发明实施例提供的又一种阵列基板的俯视图，图6为图5中沿AA’的剖面示意图，如图5和图6所示，所述阵列基板包括：基板40；彼此绝缘交叉的多条扫描线43和多条数据线44；其中，每条数据线44包括多个透明导电部441以及多个金属走线部442，相邻的透明导电部441通过所述金属走线部442电连接。所述阵列基板包括透光区41和非透光区42，所述数据线44的金属走线部442位于所述阵列基板的非透光区42。所述阵列基板还包括位于所述金属走线部442上方并覆盖所述金属走线部442的金属走线保护部443。设置金属走线保护部443的好处是可以保护所述金属走线保护部443，避免后续工艺制作过程中蚀刻液、杂质离子渗入等对金属走线部443的损坏。On the basis of the above embodiments, optionally, the array substrate further includes a metal wiring protection part, which is located above the metal wiring part and covers the metal wiring part. The following takes a case where the data line includes multiple transparent conductive parts and multiple metal wiring parts as an example to describe in detail. Figure 5 is a top view of another array substrate provided by an embodiment of the present invention, and Figure 6 is a schematic cross-sectional view along AA' in Figure 5, as shown in Figure 5 and Figure 6, the array substrate includes: a substrate 40; A plurality of scanning lines 43 and a plurality of data lines 44 intersect; wherein, each data line 44 includes a plurality of transparent conductive parts 441 and a plurality of metal wiring parts 442, and adjacent transparent conductive parts 441 pass through the metal wiring Part 442 is electrically connected. The array substrate includes a light-transmitting area 41 and a non-light-transmitting area 42 , and the metal routing portion 442 of the data line 44 is located in the non-light-transmitting area 42 of the array substrate. The array substrate further includes a metal wire protection part 443 located above the metal wire part 442 and covering the metal wire part 442 . The advantage of providing the metal wiring protection part 443 is that it can protect the metal wiring protection part 443 and avoid damage to the metal wiring part 443 caused by etching solution and impurity ion infiltration during the subsequent manufacturing process.
优选的，所述金属走线保护部与所述透明导电部在同一制作工艺中，由同种材料制成，这样可以减少一道制作工艺，进一步提高生产效率，同时，由于金属走线保护部与透明导电部在同一制作工艺中，由同种材料制成，金属走线保护部与透明导电部为一个整体，透明导电部可以通过金属走线保护部与金属走线部电连接在一起，从而增强透明导电部与金属走线部的连接可靠性。Preferably, the metal wiring protection part and the transparent conductive part are made of the same material in the same manufacturing process, which can reduce one manufacturing process and further improve production efficiency. At the same time, because the metal wiring protection part and the transparent conductive part The transparent conductive part is made of the same material in the same manufacturing process, the metal wiring protection part and the transparent conductive part are integrated, and the transparent conductive part can be electrically connected to the metal wiring part through the metal wiring protection part, thereby Enhance the connection reliability between the transparent conductive part and the metal wiring part.
需要说明的是，当所述扫描线包括多个透明导电部以及多个金属走线部时，还可以在所述扫描线的金属走线部上方设置金属走线保护部，所述金属走线保护部覆盖所述金属走线部，本发明实施例在此不作赘述。It should be noted that, when the scan line includes multiple transparent conductive parts and multiple metal wire parts, a metal wire protection part may also be provided above the metal wire parts of the scan line, and the metal wire The protection part covers the metal wiring part, and the embodiment of the present invention will not be described in detail here.
需要说明的是，对于上述实施例中，将每条扫描线和/或每条数据线设置为包括多个透明导电部以及多个金属走线部，相邻的透明导电部通过所述金属走线部电连接；所述阵列基板包括透光区和非透光区，所述扫描线和/或所述数据线的金属走线部位于所述阵列基板的非透光区，上述结构的设置具体有多种实现方式。因为多条扫描线和多条数据线彼此绝缘交叉，所以相邻两条扫描线的透明导电部具有间隙，或者，相邻两条数据线的透明导电部具有间隙，上述间隙位置的设置有多种不同的方式，下面就各优选实施方式进行详细描述。It should be noted that, in the above embodiments, each scan line and/or each data line is configured to include a plurality of transparent conductive parts and a plurality of metal traces, and adjacent transparent conductive parts pass through the metal traces. The line part is electrically connected; the array substrate includes a light-transmitting area and a non-light-transmitting area, and the metal wiring part of the scanning line and/or the data line is located in the non-light-transmitting area of the array substrate. The arrangement of the above structure There are many ways to implement it. Because a plurality of scanning lines and a plurality of data lines are insulated from each other and cross each other, there is a gap between the transparent conductive parts of two adjacent scanning lines, or there is a gap between the transparent conductive parts of two adjacent data lines. Each of the preferred implementations will be described in detail below.
图7为本发明实施例提供的又一种阵列基板的俯视示意图，图8为图7中沿BB’的剖面示意图，如图8和图7所示，所述阵列基板包括：基板50；彼此绝缘交叉的多条扫描线53和多条数据线54；其中，每条数据线54括多个透明导电部541以及多个金属走线部542，相邻的透明导电部541通过所述金属走线部542电连接。所述阵列基板包括非透光区51和透光区52，所述数据线54的金属走线部542位于所述阵列基板的非透光区51。所述阵列基板还包括同层绝缘间隔设置的像素电极55和公共电极56，相邻两条数据线54的透明导电部541的间隙在所述基板50上的正投影与像素电极55的中间区域在所述基板上的正投影至少部分重合。同层绝缘间隔设置的像素电极55和公共电极56能够产生边缘场，可以获得宽视角的显示，但采用该种结构的阵列基板制作的显示面板，由于像素电极55的中间区域处的液晶分子排列杂乱，容易出现黑色畴线，因此将相邻两条数据线54的透明导电部541的间隙设置在黑色畴线的正上方，即相邻两条数据线54的透明导电部541的间隙在所述基板上的正投影与像素电极55的中间区域在所述基板上的正投影至少部分重合，可以防止工艺波动导致部分产品相邻两条数据线的透明导电部的间隙刻缝可见问题。FIG. 7 is a schematic top view of another array substrate provided by an embodiment of the present invention. FIG. 8 is a schematic cross-sectional view along BB' in FIG. 7. As shown in FIG. 8 and FIG. 7, the array substrate includes: a substrate 50; A plurality of scanning lines 53 and a plurality of data lines 54 that are insulated from each other; wherein, each data line 54 includes a plurality of transparent conductive parts 541 and a plurality of metal wiring parts 542, and adjacent transparent conductive parts 541 pass through the metal wiring The line portion 542 is electrically connected. The array substrate includes a non-transparent area 51 and a transparent area 52 , and the metal wiring portion 542 of the data line 54 is located in the non-transparent area 51 of the array substrate. The array substrate also includes a pixel electrode 55 and a common electrode 56 arranged insulated on the same layer at intervals. The orthographic projections on the substrate are at least partially coincident. The pixel electrodes 55 and the common electrodes 56 arranged at intervals in the same insulating layer can generate fringe fields and can obtain a display with a wide viewing angle. disorder, black domain lines are likely to appear, so the gap between the transparent conductive parts 541 of two adjacent data lines 54 is set directly above the black domain lines, that is, the gap between the transparent conductive parts 541 of two adjacent data lines 54 is in the The above-mentioned orthographic projection on the substrate and the orthographic projection of the middle area of the pixel electrode 55 on the substrate at least partially overlap, which can prevent process fluctuations from causing visible gaps in the transparent conductive parts of two adjacent data lines in some products.
图9为本发明实施例提供的又一种阵列基板的俯视示意图，图10为图9中沿BB’的剖面示意图，如图9和图10所示，所述阵列基板包括：基板60；彼此绝缘交叉的多条扫描线63和多条数据线64；其中，每条数据线64括多个透明导电部641以及多个金属走线部642，相邻的透明导电部641通过所述金属走线部642电连接。所述阵列基板包括非透光区61和透光区62，所述数据线64的金属走线部642位于所述阵列基板的非透光区61。与上述实施例不同的是，所述阵列基板还包括同层绝缘间隔设置的像素电极65和公共电极66，相邻两条数据线63的透明导电部641的间隙在所述基板上的正投影与公共电极66的中间区域在所述基板上的正投影至少部分重合。与上述实施例类似，同层绝缘间隔设置的像素电极65和公共电极66可以产生边缘场，以增加显示视角，但公共电极66的中间区域也容易出现黑色畴线，因此还可以将相邻两条数据线63的透明导电部641的间隙设置在公共电极66的中间区域的正上方，也即相邻两条数据线63的透明导电部641的间隙在所述基板上的正投影与公共电极66的中间区域在所述基板上的正投影至少部分重合，本实施例也可以防止工艺波动导致部分产品相邻两条数据线的透明导电部的间隙刻缝可见问题。Figure 9 is a schematic top view of another array substrate provided by an embodiment of the present invention, and Figure 10 is a schematic cross-sectional view along BB' in Figure 9, as shown in Figure 9 and Figure 10, the array substrate includes: a substrate 60; A plurality of scanning lines 63 and a plurality of data lines 64 crossed by insulation; wherein, each data line 64 includes a plurality of transparent conductive parts 641 and a plurality of metal wiring parts 642, and adjacent transparent conductive parts 641 pass through the metal wiring The wire portion 642 is electrically connected. The array substrate includes a non-transparent area 61 and a transparent area 62 , and the metal wiring portion 642 of the data line 64 is located in the non-transparent area 61 of the array substrate. Different from the above-mentioned embodiments, the array substrate further includes pixel electrodes 65 and common electrodes 66 arranged at intervals in the same layer, and the orthographic projection of the gap between the transparent conductive parts 641 of two adjacent data lines 63 on the substrate At least partially coincides with the orthographic projection of the middle region of the common electrode 66 on the substrate. Similar to the above-mentioned embodiments, the pixel electrode 65 and the common electrode 66 arranged at intervals in the same layer of insulation can generate fringe fields to increase the display viewing angle, but black domain lines are also likely to appear in the middle area of the common electrode 66, so it is also possible to connect two adjacent electrodes. The gap of the transparent conductive part 641 of the data line 63 is arranged directly above the middle area of the common electrode 66, that is, the orthographic projection of the gap of the transparent conductive part 641 of two adjacent data lines 63 on the substrate is the same as that of the common electrode. The orthographic projections of the middle area of 66 on the substrate are at least partially overlapped, and this embodiment can also prevent process fluctuations from causing visible gaps in the transparent conductive parts of two adjacent data lines in some products.
图11为本发明实施例提供的又一种阵列基板的剖面示意图，与上述各实施例不同的是，所述阵列基板还包括异层绝缘设置的像素电极75和公共电极76。所述像素电极75具有多个第一刻缝751。由于第一刻缝751处液晶分子排列杂乱，容易出现黑色畴线，因此，设置相邻两条扫描线73的透明导电部731的间隙在所述基板上的正投影，与所述第一刻缝751在所述基板70上的正投影至少部分重合。11 is a schematic cross-sectional view of yet another array substrate provided by an embodiment of the present invention. The difference from the above-mentioned embodiments is that the array substrate further includes pixel electrodes 75 and common electrodes 76 arranged in different layers of insulation. The pixel electrode 75 has a plurality of first slits 751 . Because the arrangement of the liquid crystal molecules at the first slit 751 is chaotic, black domain lines are likely to appear. Therefore, the orthographic projection of the gap between the transparent conductive parts 731 of two adjacent scan lines 73 on the substrate is different from that of the first slit. Orthographic projections of the slits 751 on the substrate 70 are at least partially coincident.
图12为本发明实施例提供的又一种阵列基板的剖面示意图，如图12所示，所述阵列基板还包括异层绝缘设置的像素电极75和公共电极76。所述像素电极75具有多个第一刻缝751。由于像素电极75的中间区域处液晶分子排列杂乱，容易出现黑色畴线，因此，设置相邻两条扫描线73的透明导电部731的间隙在所述基板70上的正投影，与像素电极75的中间区域在所述基板70上的正投影至少部分重合。FIG. 12 is a schematic cross-sectional view of yet another array substrate provided by an embodiment of the present invention. As shown in FIG. 12 , the array substrate further includes a pixel electrode 75 and a common electrode 76 arranged in different insulating layers. The pixel electrode 75 has a plurality of first slits 751 . Because the arrangement of liquid crystal molecules in the middle area of the pixel electrode 75 is chaotic, black domain lines are prone to appear. The orthographic projections of the middle region on the substrate 70 are at least partially coincident.
图13为本发明实施例提供的又一种阵列基板的剖面示意图，如图13所示，所述阵列基板还包括异层绝缘设置的像素电极85和公共电极86。述像素电极85具有多个第一刻缝851，所述公共电极86具有多个第二刻缝861。由于第一刻缝851处液晶分子排列杂乱，容易出现黑色畴线，因此，相邻两条数据线的透明导电部851的间隙在所述基板80上的正投影，与所述第一刻缝851在所述基板80上的正投影至少部分重合。FIG. 13 is a schematic cross-sectional view of another array substrate provided by an embodiment of the present invention. As shown in FIG. 13 , the array substrate further includes a pixel electrode 85 and a common electrode 86 arranged in different layers of insulation. The pixel electrode 85 has a plurality of first slits 851 , and the common electrode 86 has a plurality of second slits 861 . Because the arrangement of liquid crystal molecules at the first slit 851 is chaotic, black domain lines are likely to appear. Therefore, the orthographic projection of the gap between the transparent conductive parts 851 of two adjacent data lines on the substrate 80 is consistent with that of the first slit. Orthographic projections of 851 on the substrate 80 are at least partially coincident.
图14为本发明实施例提供的又一种阵列基板的剖面示意图，如图14所示，所述阵列基板还包括异层绝缘设置的像素电极85和公共电极86。述像素电极85具有多个第一刻缝851，所述公共电极86具有多个第二刻缝861。由于第二刻缝861处液晶分子排列杂乱，容易出现黑色畴线，因此，相邻两条数据线的透明导电部851的间隙在所述基板80上的正投影，与所述第二刻缝861在所述基板80上的正投影至少部分重合。FIG. 14 is a schematic cross-sectional view of another array substrate provided by an embodiment of the present invention. As shown in FIG. 14 , the array substrate further includes a pixel electrode 85 and a common electrode 86 arranged in different layers of insulation. The pixel electrode 85 has a plurality of first slits 851 , and the common electrode 86 has a plurality of second slits 861 . Because the arrangement of liquid crystal molecules at the second slit 861 is chaotic, black domain lines are likely to appear. Therefore, the orthographic projection of the gap between the transparent conductive parts 851 of two adjacent data lines on the substrate 80 is different from that of the second slit. Orthographic projections of 861 on the substrate 80 are at least partially coincident.
需要说明的是，图11-图14示例性的设置公共电极位于所述像素电极上方，而并非对本发明的限制，在其他实施例中，还可以将所述公共电极设置于所述像素电极下方。It should be noted that, Fig. 11-Fig. 14 exemplarily set the common electrode above the pixel electrode, which is not a limitation of the present invention. In other embodiments, the common electrode can also be set below the pixel electrode .
需要说明的是，上述各实施例中图6-图14示例性的以数据线包括多个透明导电部以及多个金属走线部时为例，具体介绍数据线的透明导电部与像素电极、公共电极之间位置的设置方式，类似的，当所述扫描线包括多个透明导电部以及多个金属走线部时，所述阵列基板的像素电极和公共电极可以为同层绝缘设置，相邻两条扫描线的透明导电部的间隙在所述基板上的正投影，与公共电极的中间区域在所述基板上的正投影或像素电极的中间区域在所述基板上的正投影至少部分重合。当所述扫描线包括多个透明导电部以及多个金属走线部时，所述阵列基板的像素电极和公共电极还可以为异层绝缘设置，所述公共电极为面电极，所述像素电极具有多个第一刻缝，相邻两条扫描线的透明导电部的间隙在所述基板上的正投影，与所述第一刻缝在所述基板上的正投影或者与像素电极的中间区域在所述基板上的正投影至少部分重合。当所述扫描线包括多个透明导电部以及多个金属走线部时，所述阵列基板的像素电极和公共电极还可以为异层绝缘设置，所述像素电极具有多个第一刻缝，所述公共电极具有多个第二刻缝，相邻两条扫描线的透明导电部的间隙在所述基板上的正投影，与所述第一刻缝或者所述第二刻缝在所述基板上的正投影至少部分重合。It should be noted that, in the above embodiments, FIGS. 6-14 exemplarily take the case where the data line includes multiple transparent conductive parts and multiple metal wiring parts as an example, and specifically introduce the transparent conductive part of the data line and the pixel electrode, The setting method of the position between the common electrodes is similar. When the scanning line includes a plurality of transparent conductive parts and a plurality of metal wiring parts, the pixel electrode and the common electrode of the array substrate can be insulated on the same layer. The orthographic projection of the gap between the transparent conductive parts adjacent to the two scanning lines on the substrate, and the orthographic projection of the middle area of the common electrode on the substrate or the orthographic projection of the middle area of the pixel electrode on the substrate are at least partially coincide. When the scanning line includes a plurality of transparent conductive parts and a plurality of metal wiring parts, the pixel electrode and the common electrode of the array substrate can also be arranged in different layers, the common electrode is a surface electrode, and the pixel electrode There are a plurality of first slits, the orthographic projection of the gap between the transparent conductive parts of two adjacent scanning lines on the substrate, the orthographic projection of the first slits on the substrate or the middle of the pixel electrode The orthographic projections of the regions on the substrate are at least partially coincident. When the scanning line includes a plurality of transparent conductive parts and a plurality of metal wiring parts, the pixel electrode and the common electrode of the array substrate may also be arranged in a different layer of insulation, the pixel electrode has a plurality of first slits, The common electrode has a plurality of second slits, the orthographic projection of the gap between the transparent conductive parts of two adjacent scanning lines on the substrate, and the first slit or the second slit in the The orthographic projections on the substrate are at least partially coincident.
在上述各实施例的基础上，所述阵列基板还包括位于数据线或扫描线所在膜层，与像素电极或公共电极所在膜层之间的平坦化层。On the basis of the above-mentioned embodiments, the array substrate further includes a planarization layer located between the film layer where the data line or the scan line is located, and the film layer where the pixel electrode or the common electrode is located.
进一步的，所述平坦化层的厚度为2-3um，这样设置的好处是可以减小数据线或扫描线与像素电极或公共电极的寄生电容，避免信号之间的干扰与耦合。Further, the thickness of the planarization layer is 2-3 um, which has the advantage of reducing the parasitic capacitance between the data line or scan line and the pixel electrode or common electrode, and avoiding interference and coupling between signals.
本发明实施例还提供一种阵列基板的制作方法，用于所述方法适用于制备上述各实施例所述的阵列基板，具体的，所述方法包括：An embodiment of the present invention also provides a method for manufacturing an array substrate, which is suitable for preparing the array substrate described in the above embodiments. Specifically, the method includes:
首先，在基板上形成扫描线或数据线的多个金属走线部；Firstly, forming a plurality of metal routing parts of scanning lines or data lines on the substrate;
接着，形成所述扫描线或所述数据线的多个透明导电部；Next, forming a plurality of transparent conductive parts of the scan line or the data line;
其中，每条扫描线或每条数据线包括多个透明导电部以及多个金属走线部，相邻的透明导电部通过所述金属走线部电连接；所述阵列基板包括透光区和非透光区，所述扫描线或所述数据线的金属走线部位于所述阵列基板的非透光区。Wherein, each scanning line or each data line includes a plurality of transparent conductive parts and a plurality of metal routing parts, and adjacent transparent conductive parts are electrically connected through the metal routing parts; the array substrate includes a light-transmitting area and a metal routing part. In the non-transparent area, the metal wiring part of the scan line or the data line is located in the non-transparent area of the array substrate.
在上述各实施例的基础上，所述制作方法还包括：On the basis of the above-mentioned embodiments, the manufacturing method further includes:
在形成多个透明导电部的同时形成多个金属走线保护部，所述金属走线保护部覆盖所述金属走线部。A plurality of metal wire protection parts are formed while forming a plurality of transparent conductive parts, and the metal wire protection parts cover the metal wire parts.
在上述实施例的基础上，可选的，所述扫描线或所述数据线的透明导电部至少部分位于所述阵列基板的透光区。On the basis of the above embodiments, optionally, the transparent conductive part of the scan line or the data line is at least partially located in the light-transmitting area of the array substrate.
进一步的，所述扫描线的透明导电部或所述数据线的透明导电部的材料为氧化铟锡、石墨烯和氧化铟锌的任意一种。Further, the material of the transparent conductive part of the scan line or the transparent conductive part of the data line is any one of indium tin oxide, graphene and indium zinc oxide.
在上述实施例的基础上，在制作完多条扫描线和多条数据线后，形成于所述多条扫描线和多条数据线绝缘的公共电极和像素电极。本发明实施例对于公共电极和像素电极的制作顺序不作限制，可以先制作公共电极，再制作像素电极；也可以先制作像素电极再制作公共电极。所述公共电极与像素电极可以是同层绝缘间隔设置，还可以是异层绝缘设置。On the basis of the above embodiments, after the multiple scan lines and the multiple data lines are manufactured, the common electrode and the pixel electrode that are insulated from the multiple scan lines and the multiple data lines are formed. The embodiment of the present invention does not limit the manufacturing sequence of the common electrode and the pixel electrode, the common electrode can be fabricated first, and then the pixel electrode can be fabricated; or the pixel electrode can be fabricated first and then the common electrode can be fabricated. The common electrode and the pixel electrode may be insulated in the same layer and separated from each other, or may be insulated in different layers.
当所述公共电极与像素电极同层绝缘间隔设置时，相邻两条扫描线的透明导电部的间隙在所述基板上的正投影或相邻两条数据线的透明导电部的间隙在所述基板上的正投影，与公共电极的中间区域在所述基板上的正投影或像素电极的中间区域在所述基板上的正投影至少部分重合。When the common electrode and the pixel electrode are insulated and spaced apart on the same layer, the orthographic projection of the gap between the transparent conductive parts of two adjacent scanning lines on the substrate or the gap between the transparent conductive parts of two adjacent data lines The orthographic projection on the substrate at least partially coincides with the orthographic projection of the middle region of the common electrode on the substrate or the orthographic projection of the middle region of the pixel electrode on the substrate.
当所述公共电极与像素电极异层绝缘设置，所述公共电极可以是面电极，所述像素电极具有多个第一刻缝，相邻两条扫描线的透明导电部的间隙在所述基板上的正投影或相邻两条数据线的透明导电部的间隙在所述基板上的正投影，与所述第一刻缝在所述基板上的正投影或者与像素电极的中间区域在所述基板上的正投影至少部分重合。When the common electrode is insulated from the pixel electrode in different layers, the common electrode may be a surface electrode, the pixel electrode has a plurality of first slits, and the gap between the transparent conductive parts of two adjacent scanning lines is in the substrate. The orthographic projection on the substrate or the orthographic projection of the gap between the transparent conductive parts of two adjacent data lines on the substrate, and the orthographic projection of the first slit on the substrate or the middle area of the pixel electrode in the The orthographic projections on the substrate are at least partially coincident.
当所述公共电极与像素电极异层绝缘设置，所述像素电极可以具有多个第一刻缝，所述公共电极具有多个第二刻缝。相邻两条扫描线的透明导电部的间隙在所述基板上的正投影或相邻两条数据线的透明导电部的间隙在所述基板上的正投影，与所述第一刻缝或者所述第二刻缝在所述基板上的正投影至少部分重合。When the common electrode and the pixel electrode are insulated from each other, the pixel electrode may have a plurality of first slits, and the common electrode may have a plurality of second slits. The orthographic projection of the gap between the transparent conductive parts of two adjacent scanning lines on the substrate or the orthographic projection of the gap of the transparent conductive parts of two adjacent data lines on the substrate is related to the first slit or Orthographic projections of the second slits on the substrate are at least partially coincident.
在上述各实施例的基础上，在制作完多条扫描线和多条数据线后，制作公共电极或像素电极之前，所述方法还包括在数据线或扫描线所在膜层，与像素电极或公共电极所在膜层之间形成平坦化层。优选所述平坦化层的厚度为2-3um，这样设置的好处是可以减小数据线或扫描线与像素电极或公共电极的寄生电容，避免信号之间的干扰与耦合。On the basis of the above-mentioned embodiments, after making a plurality of scanning lines and a plurality of data lines, before making a common electrode or a pixel electrode, the method further includes forming the film layer where the data line or the scanning line is located, and the pixel electrode or A planarization layer is formed between the film layers where the common electrodes are located. Preferably, the thickness of the planarization layer is 2-3um. The advantage of such setting is that the parasitic capacitance between the data line or scanning line and the pixel electrode or common electrode can be reduced, and the interference and coupling between signals can be avoided.
本发明实施例还提供一种显示面板，图15为本发明实施例提供的一种显示面板的结构示意图，如图15所示，所述显示面板包括：阵列基板91，与所述阵列基板91相对设置的彩膜基板92，以及位于所述阵列基板91和所述彩膜基板92之间的显示功能层93。其中所述阵列基板91为上述各实施例所述的阵列基板。由于所述显示面板采用了上述各实施例所述的阵列基板，其技术原理和产生的技术效果与上述阵列基板类似，因此具备与上述阵列基板同样的有益效果，这里不再赘述。An embodiment of the present invention also provides a display panel. FIG. 15 is a schematic structural diagram of a display panel provided by an embodiment of the present invention. As shown in FIG. 15 , the display panel includes: an array substrate 91, and the array substrate 91 The oppositely arranged color filter substrate 92 and the display function layer 93 located between the array substrate 91 and the color filter substrate 92 . The array substrate 91 is the array substrate described in the above-mentioned embodiments. Since the display panel adopts the array substrate described in the above-mentioned embodiments, its technical principles and technical effects are similar to those of the above-mentioned array substrate, so it has the same beneficial effect as the above-mentioned array substrate, which will not be repeated here.
在上述实施例的基础上，所述彩膜基板上还设置有黑矩阵，所述黑矩阵在所述阵列基板上的真投影与所述阵列基板上的非透光区重合。On the basis of the above embodiments, a black matrix is further arranged on the color filter substrate, and the true projection of the black matrix on the array substrate coincides with the non-transmissive area on the array substrate.
本发明实施例还提供一种显示装置，图16为本发明实施例提供的一种显示装置的结构示意图，如图16所示，所述显示装置包括显示面板101和位于所述显示面板的显示侧上方的狭缝光栅102或透镜光栅103。其中所述显示面板101为上述实施例中所述的显示面板，所述狭缝光栅102或透镜光栅103用于分光，使进入人的双眼看到不同的画面，从而产生空间感。需要说明的是，本发明实施例提供显示装置还可以包括其他用于支持显示装置正常工作的电路及器件。The embodiment of the present invention also provides a display device. FIG. 16 is a schematic structural diagram of a display device provided by the embodiment of the present invention. As shown in FIG. 16 , the display device includes a display panel 101 and a display located on the display panel. Slit grating 102 or lens grating 103 on the side. The display panel 101 is the display panel described in the above embodiments, and the slit grating 102 or the lens grating 103 is used for splitting light, so that people's eyes can see different pictures, thereby creating a sense of space. It should be noted that the display device provided in the embodiment of the present invention may further include other circuits and devices for supporting the normal operation of the display device.
注意，上述仅为本发明的较佳实施例及所运用技术原理。本领域技术人员会理解，本发明不限于这里所述的特定实施例，对本领域技术人员来说能够进行各种明显的变化、重新调整和替代而不会脱离本发明的保护范围。因此，虽然通过以上实施例对本发明进行了较为详细的说明，但是本发明不仅仅限于以上实施例，在不脱离本发明构思的情况下，还可以包括更多其他等效实施例，而本发明的范围由所附的权利要求范围决定。Note that the above are only preferred embodiments of the present invention and applied technical principles. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and can also include more other equivalent embodiments without departing from the concept of the present invention, and the present invention The scope is determined by the scope of the appended claims.
| Application Number | Priority Date | Filing Date | Title |
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| CN201510374357.0ACN104898337B (en) | 2015-06-30 | 2015-06-30 | Array substrate, display panel, display device and manufacturing method |
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| CN201510374357.0ACN104898337B (en) | 2015-06-30 | 2015-06-30 | Array substrate, display panel, display device and manufacturing method |
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