A kind of second-order filter ETC sensor-based system controlled from gainTechnical field
The present invention relates to electronic applications, specifically refer to a kind of second-order filter ETC sensor-based system controlled from gain.
Background technology
Toll on the road and bridge's mainly money transaction of current China, exists a lot of not enough: as low in vehicle pass-through rate, error probability is large, manages extremely inconvenient.In financial management, many irremediable leaks can be produced, thus cause the loss of charge fund; At vehicle pass-through management aspect, owing to lacking the necessary precautionary measures, make to rush truck and significantly rise.And ETC system adopts the equipment and technology of a series of advanced person, as TV monitor system, roadblock control system, computing machine financial management system etc., improve vehicle pass-through rate to greatest extent, owing to adopting computer management account, overcome the variety of problems that manual toll collection exists, transport by road potential can be given full play to.Improve highway, the magnitude of traffic flow of bridge and economic and social benefit.Various not Auto Fare Collection Parking System has been applied on more domestic highways at present, and achieves certain effect.
But the sensing device of existing ETC system is when the voltage of input signal changes, the information handled by it there will be the existing picture of distortion, brings very large impact to the identification of ETC system on information of vehicles.
Summary of the invention
The object of the invention is to overcome the sensing device of existing ETC system when the voltage of input signal changes, the information handled by it there will be the defect of the existing picture of distortion, provides a kind of second-order filter ETC sensor-based system controlled from gain.
Object of the present invention is achieved through the following technical solutions: a kind of second-order filter ETC sensor-based system controlled from gain, primarily of signal acquisition module, the pulse-detecting circuit be connected with signal acquisition module, the change-over circuit be connected with pulse-detecting circuit, the phase-locked loop circuit be simultaneously connected with change-over circuit with pulse-detecting circuit, the second-order filter circuit be connected with phase-locked loop circuit, the signal evaluation circuit be all connected with second-order filter circuit and two-stage amplifying circuit form, and are also provided with from gain control circuit between change-over circuit and signal evaluation circuit, described from gain control circuit by field effect transistor Q1, triode VT7, P pole is connected with the source electrode of field effect transistor Q1, N pole is the diode D4 of ground connection after polar capacitor C9 then, one end is connected with the N pole of diode D4, the resistance R22 that the other end is connected with the grid of field effect transistor Q1, positive pole is connected with the N pole of diode D4, the polar capacitor C11 of minus earth, positive pole is connected with the N pole of diode D4, the polar capacitor C12 that negative pole is then connected with the base stage of triode VT7, and negative pole is connected with the N pole of diode D4, the polar capacitor C10 that positive pole is then connected with signal evaluation circuit after potentiometer R24 through resistance R23 in turn forms, the source electrode of described field effect transistor Q1 is connected with change-over circuit, drain be connected with change-over circuit while ground connection, grid be then connected with the N pole of diode D4, grounded emitter, the collector of triode VT7 are connected with the grid of field effect transistor Q1, base stage is then connected with the sliding end of potentiometer R24.
Further, described pulse-detecting circuit is by detection chip M1, triode VT1, one end is connected with the base stage of triode VT1, the resistance R1 that the other end is then connected with the VCC pin of detection chip M1, one end is connected with the emitter of triode VT1, the resistance R2 that the other end is connected with DIS pin with the THRE pin of detection chip M1 simultaneously, positive pole is connected with the RESET pin of detection chip M1 after resistance R3, the polar capacitor C1 that negative pole is then connected with phase-locked loop circuit, and positive pole is connected with the CONT pin of detection chip M1, the polar capacitor C2 that negative pole is connected with phase-locked loop circuit forms, the VCC pin of described detection chip M1 is connected with signal acquisition module, GND pin ground connection, OUT pin are all connected with change-over circuit with RESET pin, TRI pin is connected with the positive pole of polar capacitor C1, the grounded collector of triode VT1.
Described change-over circuit is by conversion chip M2, triode VT2, triode VT3, N pole is connected with the VCC pin of conversion chip M2 after resistance R4, the diode D1 that P pole is then connected with the OUT pin of detection chip M1, positive pole is connected with the RE pin of conversion chip M2, the polar capacitor C3 that negative pole is connected with phase-locked loop circuit, one end is connected with the negative pole of polar capacitor C3, the resistance R5 that the other end is then connected with the HTR pin of conversion chip M2, one end is connected with the VCC pin of conversion chip M2, the resistance R6 that the other end is then connected with the OUT pin of conversion chip M2, one end is connected with the VCC pin of conversion chip M2, the inductance L 1 that the other end is connected with the collector of triode VT3, P pole is connected with the emitter of triode VT3, N pole is the diode D3 of ground connection after polar capacitor C4 then, and P pole is connected with the base stage of triode VT2, the thyristor D2 that N pole is then connected with the N pole of diode D3 after resistance R7 forms, its VCC pin of described conversion chip M2 is simultaneously with the RESET pin of detection chip M1 and the P pole of diode D4 is connected, TR pin is connected with the N pole of diode D1, RE pin is all connected with the P pole of diode D1 with DIS pin, CON pin is connected with the N pole of diode D3, GND pin ground connection, the collector of triode VT2 is connected with the HTR pin of conversion chip M2, grounded emitter, and the base stage of triode VT3 is connected with the OUT pin of conversion chip M2, emitter is connected with the source electrode of field effect transistor Q1.
Described phase-locked loop circuit is by triode VT4, triode VT5, triode VT6, negative pole is connected with the negative pole of polar capacitor C1 after resistance R8, the polar capacitor C5 that positive pole is then connected with the negative pole of polar capacitor C1 after resistance R9, negative pole is connected with the negative pole of polar capacitor C2 after resistance R10, the polar capacitor C6 that positive pole is connected with the emitter of triode VT6, one end is connected with the negative pole of polar capacitor C2, the resistance R11 that the other end is then connected with the collector of triode VT5, one end is connected with the negative pole of polar capacitor C3, the resistance R12 that the other end is then connected with the collector of triode VT6, one end is connected with the negative pole of polar capacitor C3, the resistance R13 that the other end is then connected with the collector of triode VT6 after resistance R14 forms, the collector of described triode VT4 is connected with the negative pole of polar capacitor C5, its emitter is then connected with the emitter of triode VT5, base stage is connected with the negative pole of polar capacitor C6, the base stage of triode VT5 is connected with the positive pole of polar capacitor C5, emitter is connected with the collector of triode VT6, and the base stage of triode VT6 is simultaneously with the tie point of resistance R13 and resistance R14 and second-order filter circuit is connected, collector is then connected with second-order filter circuit.
Described second-order filter circuit is by operational amplifier U, positive terminal is connected with the collector of triode VT6, end of oppisite phase is then in turn through not gate K1 that resistance R16 is connected with the negative pole of operational amplifier U after resistance R18, be connected with the base stage of triode VT6 and signal evaluation circuit while of positive pole, negative pole is the polar capacitor C7 of ground connection after resistance R19 and resistance R20 then, positive terminal is connected with the positive pole of polar capacitor C7 after resistance R15, the not gate K2 that end of oppisite phase is then connected with the negative pole of polar capacitor C7 after resistance R17, be serially connected in the resistance R21 between the negative pole of operational amplifier U and output terminal, and form with the polar capacitor C8 that resistance R21 is in parallel, the end of oppisite phase of the positive terminal of described not gate K2 also Sheffer stroke gate K1 is connected, the positive pole of polar capacitor C7 is also connected with the tie point of resistance R18 with resistance R16, and the positive pole of operational amplifier U is connected with the tie point of resistance R20 with resistance R19, output terminal is connected with the two poles of the earth amplifying circuit.
Described signal evaluation circuit is by analyzing and processing chip M3, triode VT8, the resistance R25 that one end is connected with the base stage of triode VT8, the other end is connected with the FX pin of analyzing and processing chip M3, the polar capacitor C13 that negative pole is connected with the BE pin of analyzing and processing chip M3, positive pole is then connected with the emitter of triode VT8 after resistance R26, positive pole is connected with the two poles of the earth amplifying circuit, the polar capacitor C14 of minus earth, and the resistance R27 that one end is connected with the positive pole of polar capacitor C13, the other end is connected with the positive pole of polar capacitor C14 forms; The ET pin of described analyzing and processing chip M3 is connected with the positive pole of polar capacitor C7, FU pin is connected with the positive pole of polar capacitor C14, BN pin is connected with the two poles of the earth amplifying circuit, the grounded collector of triode VT8.
Described the two poles of the earth amplifying circuit is by operational amplifier U1, operational amplifier U2, the polar capacitor C15 that negative pole is connected with the output terminal of operational amplifier U, positive pole is then connected with the positive pole of operational amplifier U1, the resistance R28 that one end is connected with the output terminal of operational amplifier U1, the other end is then connected with the positive pole of operational amplifier U2, and the polar capacitor C16 be serially connected between the positive pole of operational amplifier U2 and output stage forms; The negative pole of described operational amplifier U1 is connected with the BN pin of analyzing and processing chip M3, and the negative pole of operational amplifier U2 is connected with the positive pole of polar capacitor C14.
The present invention comparatively prior art compares and has the following advantages and beneficial effect:
(1) the present invention is provided with from gain control circuit, and it can adjust automatically when the voltage of input signal changes, and avoids the signal after processing to occur the existing picture of distortion.
(2) of the present inventionly start fast and structure is simple from gain control circuit.
Accompanying drawing explanation
Fig. 1 is one-piece construction schematic diagram of the present invention.
In above accompanying drawing, the title of Reference numeral is respectively:
1-pulse-detecting circuit, 2-change-over circuit, 3-phase-locked loop circuit, 4-second-order filter circuit, 5-from gain control circuit, 6-signal evaluation circuit, 7-two-stage amplifying circuit.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
Embodiment
As shown in Figure 1, a kind of second-order filter ETC sensor-based system controlled from gain of the present invention, primarily of signal acquisition module, the pulse-detecting circuit 1 be connected with signal acquisition module, the change-over circuit 2 be connected with pulse-detecting circuit 1, the phase-locked loop circuit 3 be simultaneously connected with change-over circuit 2 with pulse-detecting circuit 1, the second-order filter circuit 4 be connected with phase-locked loop circuit 3, the signal evaluation circuit 6 be all connected with second-order filter circuit 4 and two-stage amplifying circuit 7 form.In order to realize object of the present invention, be also provided with from gain control circuit 5 between change-over circuit 2 and signal evaluation circuit 6.This signal acquisition module adopts model to be C2000KAI4 acquisition module, and it has good overcurrent, overvoltage, anti-reverse defencive function.
Wherein, be emphasis of the present invention from gain control circuit 5, it is by field effect transistor Q1, triode VT7, diode D4, resistance R22, resistance R23, resistance R24, polar capacitor C9, polar capacitor C10, polar capacitor C11, and polar capacitor C12 forms.The P pole of diode D4 is connected with the source electrode of field effect transistor Q1, N pole then ground connection after polar capacitor C9, one end of resistance R22 is connected with the N pole of diode D4, the other end is connected with the grid of field effect transistor Q1, the positive pole of polar capacitor C11 is connected with the N pole of diode D4, minus earth, the positive pole of polar capacitor C12 is connected with the N pole of diode D4, negative pole is then connected with the base stage of triode VT7, and the negative pole of polar capacitor C10 is connected with the N pole of diode D4, positive pole is then connected with signal evaluation circuit 6 after potentiometer R24 through resistance R23 in turn.Simultaneously, the source electrode of field effect transistor Q1 is connected with change-over circuit 2, drain be connected with change-over circuit 2 while ground connection, grid be then connected with the N pole of diode D4, grounded emitter, the collector of triode VT7 are connected with the grid of field effect transistor Q1, base stage is then connected with the sliding end of potentiometer R24.Automatically can adjust when the voltage of input signal changes from gain control circuit 5, avoid the signal after processing to occur the existing picture of distortion.
Simultaneously, pulse-detecting circuit 1 is by detection chip M1, triode VT1, one end is connected with the base stage of triode VT1, the resistance R1 that the other end is then connected with the VCC pin of detection chip M1, one end is connected with the emitter of triode VT1, the resistance R2 that the other end is connected with DIS pin with the THRE pin of detection chip M1 simultaneously, positive pole is connected with the RESET pin of detection chip M1 after resistance R3, the polar capacitor C1 that negative pole is then connected with phase-locked loop circuit 3, and positive pole is connected with the CONT pin of detection chip M1, the polar capacitor C2 that negative pole is connected with phase-locked loop circuit 3 forms, the VCC pin of described detection chip M1 is connected with signal acquisition module, GND pin ground connection, OUT pin are all connected with change-over circuit 2 with RESET pin, TRI pin is connected with the positive pole of polar capacitor C1, the grounded collector of triode VT1.When signal acquisition module receives the signals of vehicles that antenna transmission comes, it can be transferred to this pulse-detecting circuit 1, and whether pulse-detecting circuit 1 can detect received vehicle pulse signal has mistake, and corrects, and the signal making it export is more accurate.In order to ensure implementation result, described detection chip M1 adopts NE555 integrated chip.
Change-over circuit 2 is by conversion chip M2, triode VT2, triode VT3, N pole is connected with the VCC pin of conversion chip M2 after resistance R4, the diode D1 that P pole is then connected with the OUT pin of detection chip M1, positive pole is connected with the RE pin of conversion chip M2, the polar capacitor C3 that negative pole is connected with phase-locked loop circuit 3, one end is connected with the negative pole of polar capacitor C3, the resistance R5 that the other end is then connected with the HTR pin of conversion chip M2, one end is connected with the VCC pin of conversion chip M2, the resistance R6 that the other end is then connected with the OUT pin of conversion chip M2, one end is connected with the VCC pin of conversion chip M2, the inductance L 1 that the other end is connected with the collector of triode VT3, P pole is connected with the emitter of triode VT3, N pole is the diode D3 of ground connection after polar capacitor C4 then, and P pole is connected with the base stage of triode VT2, the thyristor D2 that N pole is then connected with the N pole of diode D3 after resistance R7 forms, its VCC pin of described conversion chip M2 is simultaneously with the RESET pin of detection chip M1 and the P pole of diode D4 is connected, TR pin is connected with the N pole of diode D1, RE pin is all connected with the P pole of diode D1 with DIS pin, CON pin is connected with the N pole of diode D3, GND pin ground connection, the collector of triode VT2 is connected with the HTR pin of conversion chip M2, grounded emitter, and the base stage of triode VT3 is connected with the OUT pin of conversion chip M2, emitter is connected with the source electrode of field effect transistor Q1.In order to better implement the present invention, conversion chip M2 is preferably NE555 integrated chip, and its precision is high, cheap.
Phase-locked loop circuit 3 is by triode VT4, triode VT5, triode VT6, negative pole is connected with the negative pole of polar capacitor C1 after resistance R8, the polar capacitor C5 that positive pole is then connected with the negative pole of polar capacitor C1 after resistance R9, negative pole is connected with the negative pole of polar capacitor C2 after resistance R10, the polar capacitor C6 that positive pole is connected with the emitter of triode VT6, one end is connected with the negative pole of polar capacitor C2, the resistance R11 that the other end is then connected with the collector of triode VT5, one end is connected with the negative pole of polar capacitor C3, the resistance R12 that the other end is then connected with the collector of triode VT6, one end is connected with the negative pole of polar capacitor C3, the resistance R13 that the other end is then connected with the collector of triode VT6 after resistance R14 forms, the collector of described triode VT4 is connected with the negative pole of polar capacitor C5, its emitter is then connected with the emitter of triode VT5, base stage is connected with the negative pole of polar capacitor C6, the base stage of triode VT5 is connected with the positive pole of polar capacitor C5, emitter is connected with the collector of triode VT6, and the base stage of triode VT6 is simultaneously with the tie point of resistance R13 and resistance R14 and second-order filter circuit 4 is connected, collector is then connected with second-order filter circuit 4.By the effect of phase-locked loop circuit 3, can make the frequency range of sensor-based system processing signals more extensively, more stable.
Second-order filter circuit 4 is by operational amplifier U, positive terminal is connected with the collector of triode VT6, end of oppisite phase is then in turn through not gate K1 that resistance R16 is connected with the negative pole of operational amplifier U after resistance R18, be connected with the base stage of triode VT6 and signal evaluation circuit 6 while of positive pole, negative pole is the polar capacitor C7 of ground connection after resistance R19 and resistance R20 then, positive terminal is connected with the positive pole of polar capacitor C7 after resistance R15, the not gate K2 that end of oppisite phase is then connected with the negative pole of polar capacitor C7 after resistance R17, be serially connected in the resistance R21 between the negative pole of operational amplifier U and output terminal, and form with the polar capacitor C8 that resistance R21 is in parallel, the end of oppisite phase of the positive terminal of described not gate K2 also Sheffer stroke gate K1 is connected, the positive pole of polar capacitor C7 is also connected with the tie point of resistance R18 with resistance R16, and the positive pole of operational amplifier U is connected with the tie point of resistance R20 with resistance R19, output terminal is connected with the two poles of the earth amplifying circuit.Second-order filter circuit 4, by the effect of not gate K1 and not gate K2, can be avoided waveform input signal amplitude different and cause the distorted signals after process, improve the stability of sensor-based system.
Signal evaluation circuit 6 pairs of signals of vehicles carry out analysis and arrangement, it is by analyzing and processing chip M3, triode VT8, one end is connected with the base stage of triode VT8, the resistance R25 that the other end is connected with the FX pin of analyzing and processing chip M3, negative pole is connected with the BE pin of analyzing and processing chip M3, the polar capacitor C13 that positive pole is then connected with the emitter of triode VT8 after resistance R26, positive pole is connected with the two poles of the earth amplifying circuit, the polar capacitor C14 of minus earth, and one end is connected with the positive pole of polar capacitor C13, the resistance R27 that the other end is connected with the positive pole of polar capacitor C14 forms, the ET pin of described analyzing and processing chip M3 is connected with the positive pole of polar capacitor C7, FU pin is connected with the positive pole of polar capacitor C14, BN pin is connected with the two poles of the earth amplifying circuit, the grounded collector of triode VT8.In order to better implement the present invention, this analyzing and processing chip M3 is preferably LM358 integrated chip, and its precision is high, reaction velocity is fast.
In addition, in order to amplify signals of vehicles, so that background processing system processes signal, in system, be provided with the two poles of the earth amplifying circuit.It is by operational amplifier U1, operational amplifier U2, the polar capacitor C15 that negative pole is connected with the output terminal of operational amplifier U, positive pole is then connected with the positive pole of operational amplifier U1, the resistance R28 that one end is connected with the output terminal of operational amplifier U1, the other end is then connected with the positive pole of operational amplifier U2, and the polar capacitor C16 be serially connected between the positive pole of operational amplifier U2 and output stage forms; The negative pole of described operational amplifier U1 is connected with the BN pin of analyzing and processing chip M3, and the negative pole of operational amplifier U2 is connected with the positive pole of polar capacitor C14.
As mentioned above, just the present invention can well be realized.