A kind of clock signal output intent and circuitTechnical field
The application is related to chip anti-interference process technical field, more specifically to a kind of clock signal output intentAnd circuit.
Background technology
Electromagnetic interference (Electromagnetic Interference, EMI) be it is a kind of can by cause it is unexpected respond orWork actual effect is so as to influence the energy of electric/electronic performance completely, and it includes Conduction Interference and radiation interference.Conduction InterferenceRefer to another electric network is arrived in the signal coupling (interference) on one electric network by conducting medium.Radiation interference refers to interferenceIts signal coupling (interference) is arrived another electric network by source by space.EMI is by radiation field or induced voltage and electricityMiscarriage life.High clock frequency and short side rate in current high-speed digital system also result in system and EMI problems occur.
Pass through the design of rational circuitry, shielding, ground connection, filtering, isolation, separation and orientation, circuit in the prior artImpedance level control, cable designs and noise elimination etc. are to solve the problems, such as EMI, but these schemes are all that text is done on external circuitChapter, the high clock frequency from high-speed digital system is solved on source does not cause the problem of EMI occurs in system, and increasesThe cost of peripheral circuit, makes complex circuit designs.
The content of the invention
In view of this, the application provides a kind of clock signal output intent and circuit, for solving using in the prior artTraditional technical scheme solve the problems, such as during EMI it is caused increase peripheral circuit cost, make complex circuit designs and not fromOn source solve high-speed digital system in high clock frequency cause the problem of EMI occurs in system, this application discloses it is a kind of whenClock signal output method and circuit.
To achieve these goals, it is proposed that scheme it is as follows：
A kind of clock signal output intent, including：
Pll parameter, reference clock and triangular signal are obtained, the pll parameter includes integer part and decimalPart；
Spread spectrum, the decimal of the pll parameter made are carried out to the fractional part of the pll parameter according to triangular signalPart is in triangular wave change；
The carry that the fractional part of the phaselocked loop obtained after spread spectrum is superimposed with the integer part of the phaselocked loop；
The fractional part of phaselocked loop after spread spectrum and the integer part after being superimposed is superimposed, obtain frequency parameter；
Frequency multiplication is carried out to the reference clock according to the frequency parameter, clock signal is exported.
It is preferred that, in above-mentioned clock signal output intent, the fractional part to the pll parameter carries out spread spectrum, bagInclude：
Spread spectrum is carried out to the fractional part of the pll parameter using upward modulated triangular wave.
It is preferred that, in above-mentioned clock signal output intent, the fractional part to the pll parameter carries out spread spectrum, bagInclude：
Spread spectrum is carried out to the fractional part of the pll parameter using downward modulation triangular wave.
It is preferred that, in above-mentioned clock signal output intent, the fractional part to the pll parameter carries out spread spectrum, bagInclude：
Spread spectrum is carried out to the fractional part of the pll parameter using central modulation triangular wave.
It is preferred that, in above-mentioned clock signal output intent, the fractional part to the pll parameter carries out spread spectrum, bagInclude：
Spread spectrum is carried out to the fractional part of the pll parameter using any modulated triangular wave.
A kind of clock signal output circuit, including：
Triangular signal generator, for exporting triangular signal；
First adder, triangular signal and pll parameter for obtaining triangular signal generator outputFractional part, and spread spectrum is carried out to the fractional part of the pll parameter according to the triangular signal, obtain after spread spectrumThe fractional part and carry of pll parameter；
Second adder, will for obtaining the integer part of pll parameter and the carry of first adder outputThe carry and the integer part of the pll parameter are overlapped, the integer part of the pll parameter after being superimposed；
Phaselocked loop, for obtain the pll parameter after the spread spectrum fractional part and superposition after obtained integer partIt is overlapped, obtains frequency parameter, frequency multiplication is carried out to the reference clock got according to frequency parameter, clock signal is exported.
It is preferred that, in above-mentioned clock signal output circuit, the triangular signal generator is for exporting upward modulationThe triangular signal generator of triangular wave.
It is preferred that, in above-mentioned clock signal output circuit, the triangular signal generator is for exporting downward modulationThe triangular signal generator of triangular wave.
It is preferred that, in above-mentioned clock signal output circuit, the triangular signal generator is for output center modulationThe triangular signal generator of triangular wave.
It is preferred that, in above-mentioned clock signal output circuit, the triangular signal generator is for exporting any modulationThe triangular signal generator of triangular wave.
It can be seen from above-mentioned technical scheme that, in clock signal output intent disclosed in the present application, by using triangleThe fractional part that ripple signal carries out the pll parameter after spread spectrum, spread spectrum to the fractional part of the pll parameter is no longer oneThe value of individual fixation, but a value changed in triangular linear, so that the frequency for causing phaselocked loop to export is not just a list yetOne value, but near former single value small linear change value, may be bigger than single value, it is also possible to small (by triangular waveType determine), therefore, the output of the energy of the clock signal of output is not also just in single frequency, but uniform distributionOnto the frequency of a small scope, then the energy value of each frequency is just very low, therefore reduce EMI interference.
Brief description of the drawings
In order to illustrate more clearly of the embodiment of the present application or technical scheme of the prior art, below by embodiment or existingThe accompanying drawing used required in technology description is briefly described, it should be apparent that, drawings in the following description are only this ShenSome embodiments please, for those of ordinary skill in the art, on the premise of not paying creative work, can be with rootOther accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is a kind of flow chart of clock signal output intent disclosed in the embodiment of the present application；
Fig. 2 is the oscillogram of upward modulated triangular wave；
Fig. 3 is the design sketch of the clock signal modulated using upward modulated triangular wave；
Fig. 4 is the oscillogram of downward modulation triangular wave；
Fig. 5 is the design sketch of the clock signal gone out using downward modulation triangular modulation；
The oscillogram of modulated triangular wave centered on Fig. 6；
Fig. 7 is the design sketch of the clock signal gone out using central modulation triangular modulation；
Fig. 8 is the design sketch for changing the clock signal after modulation range using central modulation triangular wave；
Fig. 9 is the oscillogram of any modulated triangular wave；
Figure 10 is the design sketch of the clock signal modulated using any modulated triangular wave；
Figure 11 is a kind of structure chart of clock signal output circuit disclosed in the embodiment of the present application.
Embodiment
Be directed to using traditional technical scheme in the prior art solves the problems, such as during EMI it is caused increase peripheral circuit intoThis, makes complex circuit designs and the high clock frequency from high-speed digital system is solved on source does not cause system to occurThe problem of EMI, this application discloses a kind of clock signal output intent and circuit.
Below in conjunction with the accompanying drawing in the embodiment of the present application, the technical scheme in the embodiment of the present application is carried out clear, completeSite preparation is described, it is clear that described embodiment is only some embodiments of the present application, rather than whole embodiments.It is based onEmbodiment in the application, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not madeEmbodiment, belongs to the scope of the application protection.
Fig. 1 is a kind of flow chart of clock signal output intent disclosed in the embodiment of the present application.
Referring to Fig. 1, clock signal output intent disclosed in the present application comprises the following steps：
Step S101：Obtain pll parameter, reference clock and triangular signal；
Step S102：Spread spectrum, the pll parameter made are carried out to the fractional part of pll parameter according to triangular signalFractional part in triangular wave change；
Step S103：The integer part that the fractional part of phaselocked loop is carried out into the carry and phaselocked loop obtained after spread spectrum is foldedPlus；
Step S104：The fractional part of phaselocked loop after spread spectrum and the integer part after being superimposed is superimposed, obtain frequency multiplicationParameter；
Step S105：Frequency multiplication is carried out to the reference clock according to frequency parameter, clock signal is exported.
The principle to the reduction EMI interference of the application above method is illustrated below：
Applicant it has been investigated that, that limited by EMI is peak emission amount (peak in specific frequencyEmission), rather than in the average peak amount of whole frequency spectrum, therefore in the application above method, believe by using triangular waveNumber no longer it is one solid to the fractional part that the fractional part of the pll parameter carries out the pll parameter after spread spectrum, spread spectrumFixed value, but a value changed in triangular linear, so that the frequency for causing phaselocked loop to export is not just one single yetValue, but near former single value small linear change value, may be bigger than single value, it is also possible to small (by the class of triangular waveType is determined), therefore, the output of the energy of the clock signal of output is evenly distributed to one also just not in single frequencyIn the frequency of individual small scope, then the energy value of each frequency is just very low, therefore reduce EMI interference.
It is understood that the difference according to user's request, the triangular wave disclosed in the above embodiments of the present applicationType can be polytype, and for example, with reference to Fig. 2, the type of the triangular wave in the above embodiments of the present application can be institute in Fig. 2The upward modulated triangular wave shown, i.e. spread spectrum is carried out to the fractional part of the pll parameter using upward modulated triangular wave, itsModulation effect is as shown in figure 3, wherein k is the frequency of output clock signal before modulation, and n and m value are all can be in the defeated of permissionGo out what is arbitrarily taken in the range of clock signal, k is not more than n, i.e. the minimum value n of the frequency of the clock signal of the output after modulation is notLess than the frequency k of the clock signal exported before modulation.Referring to Fig. 4, the type of the triangular wave in the above embodiments of the present applicationCan be the downward modulation triangular wave shown in Fig. 4, i.e. using fractional part of the downward modulation triangular wave to the pll parameterDivide and carry out spread spectrum, its modulation effect as shown in figure 5, wherein k is the preceding frequency for exporting clock signal of modulation, n and m value are allCan arbitrarily it be taken in the range of the output clock signal of permission, k is not less than m, i.e. the frequency of the clock signal of the output after modulationThe maximum m of rate is not more than the frequency k of the clock signal exported before modulation.Referring to Fig. 6, in the above embodiments of the present applicationThe type of triangular wave can be again the central modulation triangular wave shown in Fig. 6, i.e. using central modulation triangular wave to the lock phaseThe fractional part of ring parameter carries out spread spectrum, its modulation effect as shown in fig. 7, wherein k is the frequency of output clock signal before modulation,N and m value is all that can arbitrarily be taken in the range of the output clock signal of permission, k=(n+m)/2, i.e. the output after modulationThe average value of frequency of clock signal be equal to the frequency of clock signal exported before modulation.Referring to Fig. 8, modulation centered on itTriangular wave changes the design sketch after modulation range, and when scope becomes big when n and m values change, then amplitude diminishes, so thatEMI value drop it is lower, but caused result is that to export the rocking of clock (jitter) bigger, therefore in actual applicationUser can integrate EMI value and the suitable n and m of clock jitter selection value, to reach optimum efficiency.Certainly, described threeAngle ripple signal can also be any modulated triangular wave as shown in Figure 9, and its modulation effect as shown in Figure 10, modulates preceding output clockThe frequency f=k of signal.So-called any modulation refers to the frequency f scopes after modulation：n<f<M, wherein n and m value are all canArbitrarily taken with the scope in permission, therefore the scope of any control output clock signal frequency can be needed according to user, fromAnd preferably can more accurately control EMI value.Also it is exactly that any modulation can be utilized when back-end chip coilingTo avoid the difficulty of some coilings., can be around not going down when coiling if the maximum such as modulated upwards is excessive, can be withMaximum is reduced so that coiling is smoothed out by arbitrarily modulating.
Of course, it should be understood that in the application above method, the triangular signal is most representational oneClass waveform signal, exhibition can also be carried out in addition to the triangular wave using other ripples to the fractional part of the pll parameterFrequently, such as sine wave, cosine wave.
Figure 11 is a kind of structure chart of clock signal output circuit disclosed in the embodiment of the present application.
It is understood that corresponding to the above method, disclosed herein as well is a kind of clock corresponding with the above methodSignal output apparatus, both can mutually use for reference, and referring to Figure 11, the circuit includes：
Triangular signal generator 1, for exporting triangular signal；
First adder 2, triangular signal and pll parameter for obtaining the triangular signal generator outputFractional part FRAC, and spread spectrum is carried out to the fractional part FRAC of the pll parameter according to the triangular signal, obtainedThe fractional part frac_sum and carry carry of pll parameter after to spread spectrum；
Second adder 3, for obtaining the integer part INT of pll parameter and entering for the output of the first adder 2Position carry, the carry carry and the pll parameter integer part INT is overlapped, the lock phase after being superimposedThe integer part int_sum of ring parameter；
Phaselocked loop 4 (PLL), for obtain and by the fractional part frac_sum of the pll parameter after the spread spectrum andThe integer part int_sum obtained after superposition is overlapped, and obtains frequency parameter, according to frequency parameter to get reference whenClock Refernce clock carry out frequency multiplication, export clock signal.
Corresponding with the above method, the triangular signal generator 1 can be for exporting upward modulated triangular waveTriangular signal generator or for export downward modulation triangular wave triangular signal generator or for output center modulationThe triangular signal generator of triangular wave or the triangular signal generator for exporting any modulated triangular wave.
Certainly, the triangular signal generator can also use sine wave signal generator, cosine wave signal generatorDeng replacement.
In addition it should also be noted that, occurring using method disclosed in the above embodiments of the present application or the clock signal of circuitDevice and for the clock-signal generator electric equipment within the scope of the disclosure of the present application.
Finally, in addition it is also necessary to explanation, herein, such as first and second or the like relational terms be used merely to byOne entity or operation make a distinction with another entity or operation, and not necessarily require or imply these entities or operationBetween there is any this actual relation or order.Moreover, term " comprising ", "comprising" or its any other variant meaningCovering including for nonexcludability, so that process, method, article or equipment including a series of key elements not only include thatA little key elements, but also other key elements including being not expressly set out, or also include be this process, method, article orThe intrinsic key element of equipment.In the absence of more restrictions, the key element limited by sentence "including a ...", is not arrangedExcept also there is other identical element in the process including the key element, method, article or equipment.
The embodiment of each in this specification is described by the way of progressive, and what each embodiment was stressed is and otherBetween the difference of embodiment, each embodiment identical similar portion mutually referring to.
The foregoing description of the disclosed embodiments, enables professional and technical personnel in the field to realize or use the application.A variety of modifications to these embodiments will be apparent for those skilled in the art, as defined hereinGeneral Principle can in other embodiments be realized in the case where not departing from spirit herein or scope.Therefore, the applicationThe embodiments shown herein is not intended to be limited to, and is to fit to and principles disclosed herein and features of novelty phase oneThe most wide scope caused.