OFDM symbol sync bit searching methodTechnical field
The present invention relates to the communications field, particularly relate to the OFDM(OFDM of second generation European terrestrial digital TV (DVB-T2)) sign synchronization position search method.
Background technology
OFDM technology is widely used in Modern Communication System.As the second generation terrestrial digital TV standard in Europe, DVB-T2(" Digital Video Broadcasting (DVB); Frame structure channel coding and modulation for a second generation digital terrestrial television broadcasting system (DVB-T2); " ETSI EN302755), inherit the OFDM technology of first generation standard DVB-T, the elementary cell of its data is called T2 frame.Be illustrated in figure 1 the structure chart of T2 frame, every frame comprises P1 leading symbol, P2 leading symbol and data symbol following closely.The P1 sign synchronization of DVB-T2 system is the first step of DVB-T2 system synchronization.The every frame of P1 symbol occurs once, and at the initial position of every frame, it indicates the beginning of each T2 frame or each FEF frame.P1 sign synchronization mainly can complete:
(1) whether what receiver was determined rapidly to receive is DVB-T2 signal;
(2) confirm that present frame is T2 frame or FEF frame;
(3) signaling message S1, S2 decoding, obtains, as parameters such as FFT length, possibility GI combinations, facilitating subsequent module to receive process;
(4) detect and compensate initial carrier frequency deviation.
Be illustrated in figure 2 the pie graph of P1 symbol, P1 symbol comprises three parts: part A, is the OFDM symbol of 1K; C part, by front 542 sampled points of part A through frequency displacement fsHobtain; Part B, is obtained through frequency displacement by rear 482 sampled points of part A.P1 symbol lengths is fixed, not by FFT length or GI effect length.And due to the design feature of P1 symbol self, namely the front end C part of P1 symbol and rear end part B are obtained by the part A frequency displacement of P1 symbol respectively, and this Data duplication through frequency displacement, even if can make P1 symbol also be easy to be detected under large frequency deviation.
As shown in Figure 3, be usual receiver schematic diagram.It comprises P1 symbol detection (P1_DET), FFT window adjusting device, and FFT, P1 symbol confirms (P1_VALID) and P1 symbol substitution device (P1_DEC).Wherein, P1_DET calculates the correlation peak of input P1 symbol; If correlation peak is greater than predetermined threshold, namely show the existence of P1 symbol, in predetermined scope, then search for the position of maximum correlation peaks, this position is P1 sign synchronization position.Further, according to obtained maximum correlation peaks, estimate fractional frequency deviation, line frequency of going forward side by side compensates.According to P1 sign synchronization position, determine the initial of FFT window, then carry out FFT conversion.Due to P1 symbol carry information in multiple subcarrier, P1_VALID identifies whether incoming symbol meets distribution of carriers.Distributed and desirable CDS(Carrier-Distribution Sequence by the subcarrier of the signal that will receive, distribution of carriers sequence) do correlation computations, if the correlation obtained is greater than predetermined threshold, show really there is P1 symbol.Meanwhile, according to the subcarrier sequence of input signal and the relative position of desirable subcarrier sequence, the integer carrier frequency deviation in input signal is calculated.After frequency compensation being carried out to the signal after FFT with this frequency departure, send into P1_DEC and carry out decoding, finally obtain signaling message S1 and S2 entrained by P1 symbol.
The correlation peak method of above-mentioned P1 symbol detection, can resist various serious interference and noise, but its shortcoming is: the error of sync bit is very large.J.G.Doblado(" Coarse time synchronization for DVB-T2; " IEE Elec.letters, Vol.46, No.11, and M.Rotoloni May2010), (" On correlation-based synchronization for DVB-T2; " IEEE Comm.Letters, vol.14, No.3, pp.248-250, Mar.2010) propose respectively to know clearly to improve the method for synchronous error, but at severe jamming channel, when particularly two footpath channel disturbance are 0dB, still there is very large synchronous error.
On the other hand, as can be seen from the structure of P1 symbol, P1 symbol does not adopt common Cyclic Prefix resist technology, and when there being synchronous error, FFT, from the position of mistake, has the signal of synchronous error length to be all noise (acyclic signal).When synchronous error is larger, too much noise makes the error rate of S1 and S2 decoding high.Its consequence is, P1 symbol pull-in time is extended, and increases the system acquires time.
How to solve P1 sign synchronization time error large time, the problem of system acquires overlong time, remaining one has problem to be solved.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of error performance of the P1 of improvement symbol substitution thus improves the OFDM symbol sync bit searching method of system acquires performance.
For solving the problems of the technologies described above, OFDM symbol sync bit searching method of the present invention, comprises the following steps:
1) P1 symbol detection, according to the correlation result (related operation is a kind of known computing of the industry, adopts P1 correlator to carry out) of input signal, detect correlation, obtain the sync bit of P1 symbol, this sync bit is thick sync bit; Its concrete operations adopt: to input signal and f thereofsHfrequency shift signal carries out related operation, the P1 symbol correlation obtained is detected, when P1 symbol correlation is greater than predetermined threshold TH_det, the search of P1 symbol correlation peak is carried out again according to predetermined hunting zone, search for the peak obtained, the i.e. sync bit of corresponding P1 symbol, this sync bit is thick sync bit;
2) P1 symbol confirms, according to the sync bit of the P1 symbol that P1 symbol detection obtains, by the distribution of the subcarrier of the Received signal strength of correspondence and desirable CDS(Carrier-Distribution Sequence, distribution of carriers sequence) do correlation computations, if the correlation peak obtained and P1 symbol confirm that correlation peak is greater than predetermined threshold TH_valid, then show that this sync bit is reliable, simultaneously, according to the subcarrier sequence of input signal and the relative position of desirable subcarrier sequence, calculate the integer carrier frequency deviation in input signal, and enter next step P1 symbol substitution, if be less than predetermined threshold TH_valid, then show that this sync bit is false, return P1 symbol detection, re-start P1 symbol detection,
3) P1 symbol substitution, the integer frequency deviation using P1 symbol to confirm to estimate is carried out frequency departure compensation to input signal and is carried out P1 symbol substitution, and with S1 decoding correlation peak and S2 decoding correlation peak, each self-corresponding predetermined threshold TH1 and predetermined threshold TH2 compares with it respectively; If be all greater than each self-corresponding predetermined threshold, then show that decoding is reliable, complete P1 and catch; Otherwise, then carrying out the search of zigzag sync bit with step-size in search Srch_Stp, the next sync bit of search P1 symbol, carries out integer frequency estimation of deviation, carries out P1 symbol substitution again, so circulate after carrying out integer frequency deviation compensation; If to the scheduled time, S1 decoding correlation peak and S2 decoding correlation peak still cannot be detected by predetermined threshold, then return P1 symbol detection, re-start P1 symbol detection, and namely sync bit search Timeout mechanism, prevents endless loop;
Wherein, predetermined threshold TH_det span: 0.002-0.03, the span of predetermined hunting zone: 1-8192, predetermined threshold TH_valid span: 1-128, the span of S1 decoding correlation: the span of 0-64, S2 decoding correlation: 0-256, the span of predetermined threshold TH1: 1-64, the span of predetermined threshold TH2: 1-256, step-size in search Srch_Stp span: 0-256.
The described method of further improvement, P1 symbol substitution, when the correlation peak of S2 decoding is first greater than its corresponding predetermined threshold TH2, but when S1 decoding correlation peak is less than or equal to its corresponding predetermined threshold TH1, show that synchronous error has converged in smaller scope, at this moment, current sync position is re-set as the center of zigzag search, and step-size in search is diminished, if adjusted the center of zigzag search, and use little step length searching, then no longer adjust the center of zigzag search, current location is set to central point and carries out sync bit search, the next sync bit of search P1 symbol is carried out according to the step-length after diminishing, carry out integer frequency estimation of deviation, P1 symbol substitution is carried out again after carrying out integer frequency deviation compensation, circulation like this, if to the scheduled time, S1 decoding correlation peak and S2 decoding correlation peak still cannot be detected by predetermined threshold, then return P1 symbol detection, re-start P1 symbol detection, and namely sync bit search Timeout mechanism, prevents endless loop.
P1 symbol carries out sync bit search after confirming, in preset range, carry out P1 symbol according to certain intervals and confirm that correlation peak calculates, maximum is chosen in these correlation peaks, the position that maximum correlation peaks is corresponding, is accurate sync bit, enters next step integer frequency deviation compensation and P1 symbol substitution, the span of described preset range is 1-8192, and described certain hour interval span is 0-256.
Wherein, P1 symbol confirms that employing carries out sync bit search, point centered by current sync position, with step-length Val_Srch_Stp, calculate left, in, the P1 symbol of right three sync bits confirms correlation peak, and wherein step-length Val_Srch_Stp span is 0-256;
In three correlation peaks of left, middle and right sync bit, choose maximum, if central point is maximum, then show that this sync bit is optimum position, search completes, and enters next step integer frequency deviation compensation and P1 symbol substitution;
If the right sync bit is maximum, then ahead one starboard step, and try to achieve the correlation peak of new sync bit; Meanwhile, central point becomes left side point, and the right point becomes central point, and new correlation peak becomes the right point, namely from 4 points, casts out Far Left point; And return and choose maximum;
If left side sync bit is maximum, then further left, and try to achieve the correlation peak of new sync bit; Meanwhile, central point becomes the right point, and left side point becomes central point, and new correlation peak becomes left side point, namely from 4 points, casts out rightmost point; And return and choose maximum; So repeatedly, until central point is maximum correlation peaks, sync bit is now optimal synchronisation position, enters next step integer frequency deviation compensation and P1 symbol substitution.
P1 symbol confirms that sync bit search is carried out in employing, take Val_Srch_Stp1 as step-length, carry out first time search, after first time has searched for, with a less step-length Val_Srch_Stp2, carry out second time search, after second time has been searched for, again with a less step-length Val_Srch_Stp3, carry out third time search, circulation like this, until kth time has been searched for, here step-size in search meets Val_Srch_Stp1>Val_Srch_Stp2> ... Val_Srch_Stpk, sync bit is now optimal synchronisation position, enter next step integer frequency deviation compensation and P1 symbol substitution, wherein k span is 1-64.
Wherein, peak noise can be adopted than the correlation peak replacing P1 symbol to confirm;
Concrete computational process is:
A) calculating noise, carries out absolute value correlation side lobes and adds up and be averaged;
B) use correlation peak divided by noise, obtain peak noise ratio.
Because sync bit error is large, when especially two footpath channel disturbance are 0dB, constrain the performance of P1 symbol detection greatly.Method of the present invention, adopts the method for sync bit search to improve synchronous error, reduces the error rate of P1 symbol substitution, thus reduce P1 symbol pull-in time and system acquires time.
Accompanying drawing explanation
Below in conjunction with accompanying drawing and embodiment, the present invention is further detailed explanation:
Fig. 1 is T2 frame structure schematic diagram;
Fig. 2 is that P1 symbol forms schematic diagram figure;
Fig. 3 is a kind of receiver structure schematic diagram.
Fig. 4 is first embodiment of the invention process chart.
Fig. 5 is second embodiment of the invention process chart.
Fig. 6 is third embodiment of the invention process chart.
Fig. 7 is fourth embodiment of the invention process chart.
Fig. 8 is fifth embodiment of the invention process chart.
Fig. 9 is that synchronous error and P1 symbol confirm link correlation relation schematic diagram.
Embodiment
As shown in Figure 4, the embodiment of the present invention first embodiment flow chart, comprising: 1) P1 symbol detection, and according to the correlation result of input signal, detect correlation, obtain the sync bit of P1 symbol, this sync bit is thick sync bit; Its concrete operations adopt: to input signal and f thereofsHfrequency shift signal carries out related operation, the P1 symbol correlation obtained is detected, when P1 symbol correlation is greater than predetermined threshold TH_det, the search of P1 symbol correlation peak is carried out again according to predetermined hunting zone, search for the peak obtained, the i.e. sync bit of corresponding P1 symbol, this sync bit is thick sync bit;
2) P1 symbol confirms, according to the sync bit of the P1 symbol that P1 symbol detection obtains, by the distribution of the subcarrier of the Received signal strength of correspondence and desirable CDS(Carrier-Distribution Sequence, distribution of carriers sequence) do correlation computations, if the correlation peak obtained and P1 symbol confirm that correlation peak is greater than predetermined threshold TH_valid, then show that this sync bit is reliable, simultaneously, according to the subcarrier sequence of input signal and the relative position of desirable subcarrier sequence, calculate the integer carrier frequency deviation in input signal, and enter next step P1 symbol substitution, if be less than predetermined threshold TH_valid, then show that this sync bit is false, return P1 symbol detection, re-start P1 symbol detection,
3) P1 symbol substitution, the integer frequency deviation using P1 symbol to confirm to estimate is carried out frequency departure compensation to input signal and is carried out P1 symbol substitution, and with S1 decoding correlation peak and S2 decoding correlation peak, each self-corresponding predetermined threshold TH1 and predetermined threshold TH2 compares with it respectively; If be all greater than each self-corresponding predetermined threshold, then show that decoding is reliable, complete P1 and catch; Otherwise, then carrying out the search of zigzag sync bit with step-size in search Srch_Stp, the next sync bit of search P1 symbol, carries out integer frequency estimation of deviation, carries out P1 symbol substitution again, so circulate after carrying out integer frequency deviation compensation; If to the scheduled time, S1 decoding correlation peak and S2 decoding correlation peak still cannot be detected by predetermined threshold, then return P1 symbol detection, re-start P1 symbol detection, and namely sync bit search Timeout mechanism, prevents endless loop;
Wherein, predetermined threshold TH_det span: 0.002-0.03, it is preferably: 0.002,0.016 or 0.03; The span of predetermined hunting zone: 1-8192, it is preferably: 1,4096 or 8192; Predetermined threshold TH_valid span: 1-128, it is preferably: 1,64 or 128; The span of S1 decoding correlation: 0-64, it is preferably: 0,32 or 64; The span of S2 decoding correlation: 0-256, it is preferably: 0,128 or 256; The span of predetermined threshold TH1: 1-64, it is preferably: 1,32 or 64; The span of predetermined threshold TH2: 1-256, it is preferably: 1,128 or 256; Step-size in search Srch_Stp span: 0-256 is preferably it: 0,128 or 256; .
As shown in Figure 5, the embodiment of the present invention second embodiment flow chart, itself and the first embodiment same section repeat no more, its main distinction is P1 symbol substitution, when the correlation peak of S2 decoding is first greater than its corresponding predetermined threshold TH2, but when S1 decoding correlation peak is less than or equal to its corresponding predetermined threshold TH1, show that synchronous error has converged in smaller scope, at this moment, current sync position is re-set as the center of zigzag search, and step-size in search is diminished, if adjusted the center of zigzag search, and use little step length searching, then no longer adjust the center of zigzag search, current location is set to central point and carries out sync bit search, the next sync bit of search P1 symbol is carried out according to the step-length after diminishing, carry out integer frequency estimation of deviation, P1 symbol substitution is carried out again after carrying out integer frequency deviation compensation, circulation like this, if to the scheduled time, S1 decoding correlation peak and S2 decoding correlation peak still cannot be detected by predetermined threshold, then return P1 symbol detection, re-start P1 symbol detection, and namely sync bit search Timeout mechanism, prevents endless loop.
As shown in Figure 9, P1 symbol confirms the relation of correlation peak and synchronous error, as can be drawn from Figure 9, synchronous error is less, P1 symbol confirms that correlation peak is larger, so calculate according to certain intervals the correlation peak that P1 symbol confirms link, the position that search maximum correlation peaks obtains, be accurate sync bit;
As shown in Figure 6, the embodiment of the present invention the 3rd embodiment flow chart, carries out P1 symbol detection to input signal, on the basis of the thick sync bit of P1 symbol, does the search of certain intervals, obtains the sync bit of P1 symbol; Its concrete operations adopt: to input signal and f thereofsHfrequency shift signal carries out related operation, the P1 symbol correlation obtained is detected, when P1 symbol correlation is greater than predetermined threshold TH_det, then carries out the search of P1 symbol correlation peak according to predetermined hunting zone, search for the peak obtained, i.e. the sync bit of corresponding P1 symbol; Wherein, predetermined threshold TH_det span: 0.002-0.03, it is preferably: 0.002,0.016 or 0.03; The span of predetermined hunting zone: 1-8192, it is preferably: 1,4096 or 8192.
P1 symbol confirms, according to the sync bit of the P1 symbol that P1 symbol detection obtains, by the distribution of the subcarrier of the Received signal strength of correspondence and desirable CDS(Carrier-Distribution Sequence, distribution of carriers sequence) do correlation computations, if the correlation peak obtained and P1 symbol confirm that correlation peak is greater than predetermined threshold TH_valid, then show that this sync bit is reliable, simultaneously, according to the subcarrier sequence of input signal and the relative position of desirable subcarrier sequence, calculate the integer carrier frequency deviation in input signal, and enter next step sync bit search, if be less than predetermined threshold TH_valid, then show that this sync bit is false, return P1 symbol detection, re-start P1 symbol detection, wherein, predetermined threshold TH_valid span: 1-128, it is preferably: 1,64 or 128,
P1 symbol carries out sync bit search after confirming, in preset range, carry out P1 symbol according to certain intervals and confirm that correlation peak calculates, maximum is chosen in these correlation peaks, the position that maximum correlation peaks is corresponding, is accurate sync bit, enters next step integer frequency deviation compensation and P1 symbol substitution, the span of described preset range is 1-8192, and it is preferably: 1,4096 or 8192; Described certain hour interval span is 0-256, and it is preferably: 0,128 or 256;
As shown in Figure 7, the embodiment of the present invention the 4th embodiment flow chart, carries out P1 symbol detection to input signal, on the basis of the thick sync bit of P1 symbol, does zigzag search, obtains the sync bit of P1 symbol; Its concrete operations adopt: to input signal and f thereofsHfrequency shift signal carries out related operation, the P1 symbol correlation obtained is detected, when P1 symbol correlation peak is greater than predetermined threshold TH_det, then carries out the search of P1 symbol correlation peak according to predetermined hunting zone, search for the peak obtained, i.e. the sync bit of corresponding P1 symbol; Wherein, predetermined threshold TH_det span: 0.002-0.03, it is preferably: 0.002,0.016 or 0.03; The span of predetermined hunting zone: 1-8192, it is preferably: 1,4096 or 8192.
P1 symbol confirms, according to the sync bit of the P1 symbol that P1 symbol detection obtains, by the distribution of the subcarrier of the Received signal strength of correspondence and desirable CDS(Carrier-Distribution Sequence, distribution of carriers sequence) do correlation computations, if the correlation peak obtained and P1 symbol confirm that correlation peak is greater than predetermined threshold TH_valid, then show that this sync bit is reliable, simultaneously, according to the subcarrier sequence of input signal and the relative position of desirable subcarrier sequence, calculate the integer carrier frequency deviation in input signal, and enter next step sync bit search, if be less than predetermined threshold TH_valid, then show that this sync bit is false, return P1 symbol detection, re-start P1 symbol detection, wherein, predetermined threshold TH_valid span: 1-128, it is preferably: 1,64 or 128,
P1 symbol carries out sync bit search, point centered by current sync position after confirming, take Val_Srch_Stp as step-length, the P1 symbol calculating three sync bits in left, middle and right confirms correlation peak, wherein step-length Val_Srch_Stp span is 0-256, and it is preferably: 0,128 or 256;
In three correlation peaks of left, middle and right sync bit, choose maximum, if central point is maximum, then show that this sync bit is optimum position, search completes, and enters next step integer frequency deviation compensation and P1 symbol substitution;
If the right sync bit is maximum, then ahead one starboard step, and try to achieve the correlation peak of new sync bit; Meanwhile, central point becomes left side point, and the right point becomes central point, and new correlation peak becomes the right point, namely from 4 points, casts out Far Left point; And return and choose maximum;
If left side sync bit is maximum, then further left, and try to achieve the correlation peak of new sync bit; Meanwhile, central point becomes the right point, and left side point becomes central point, and new correlation peak becomes left side point, namely from 4 points, casts out rightmost point; And return and choose maximum; So repeatedly, until central point is maximum correlation peaks, sync bit is now optimal synchronisation position, enters next step integer frequency deviation compensation and P1 symbol substitution.
As shown in Figure 8, the embodiment of the present invention the 5th embodiment flow chart, itself and the 4th embodiment same section repeat no more, its main distinction is: during sync bit search, take Val_Srch_Stp1 as step-length, carries out first time search, after primary search completes, with a less step-length Val_Srch_Stp2, carry out second time search, after second time has been searched for, again with a less step-length Val_Srch_Stp3, carry out third time search, so circulate, until kth time has been searched for.Step-length in Fig. 8, meet (Val_Srch_Stp1>Val_Srch_Stp2> ... Val_Srch_Stpk), sync bit is now optimal synchronisation position, enter next step integer frequency deviation compensation and P1 symbol substitution, wherein k span is 1-64, and it is preferably: 1,64 or 128.
In the various embodiments described above, peak noise ratio (PNR:Peak-Noise-Ratio) can also be adopted to replace P1 symbol to confirm the correlation peak of link.Concrete computational process is: A) calculating noise.Correlation side lobes is carried out absolute value add up and be averaged; B) use correlation peak divided by noise, obtain PNR.
Below through the specific embodiment and the embodiment to invention has been detailed description, but these are not construed as limiting the invention.Without departing from the principles of the present invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.