技术领域:Technical field:
本发明属于半导体薄膜晶体管制备技术领域，涉及一种基于水溶液薄膜晶体管的制备方法，特别是一种以氧化铟锌(InZnO)为沟道层和以超薄氧化钇(Y2O3)为高k介电层的基于水溶液方法的绿色环保型薄膜晶体管的制备工艺。The invention belongs to the technical field of semiconductor thin film transistor preparation, and relates to a method for preparing thin film transistors based on aqueous solution, in particular to a method using indium zinc oxide (InZnO) as the channel layer and ultrathin yttrium oxide (Y2 O3 ) as the high The preparation process of the green environment-friendly thin film transistor based on the aqueous solution method of the k dielectric layer.
背景技术：Background technique:
目前，薄膜晶体管(Thin Film Transistor，TFT)在有源矩阵驱动液晶显示器件(Active Matrix Liquid Crystal Display,AMLCD)中发挥了重要作用。从低温非晶硅TFT到高温多晶硅TFT，其技术越来越成熟，应用对象也从只能驱动LCD(Liquid Crystal Display)发展到既可以驱动LCD又可以驱动OLED(Organic Light EmittingDisplay)、甚至电子纸；随着半导体工艺水平不断提高，像素尺寸不断减小，显示屏的分辨率也越来越高，TFT作为驱动像素的开关应用于液晶显示器(TFT-LCD)等显示器件中,其中栅介电材料禁带宽度的大小决定漏电流的大小，而它的相对介电常数则决定器件亚阈值摆幅的大小(即能耗大小)；随着大规模集成电路的发展，作为硅基集成电路核心器件的金属氧化物半导体晶体管的特征尺寸一直不断减小，其减小规律遵循摩尔定律；现有的光刻尺寸已达到28nm，CMOS栅极等效氧化物厚度降到1nm以下，栅氧化层的厚度接近原子间距(IEEEElectron Device Lett.2004,25(6):408-410),随着等效氧化物厚度的减小而引起隧道效应，研究表明二氧化硅(SiO2)厚度由3.5nm减至1.5nm时栅极漏电流由10-12A/cm2增大到10A/cm2(IEEEElectron Device Lett.1997,18(5):209-211)；较大的漏电流会引起高功耗及相应的散热问题，这对于器件集成度、可靠性和寿命都造成不利的影响，因此急需研发出新的高介电材料取代传统SiO2，现有技术中，在MOS集成电路工艺中广泛采用高介电常数(高k)栅介电来增大电容密度和减少栅极漏电流，高k材料因其大的介电常数，在与SiO2具有相同等效栅氧化层厚度(EOT)的情况下，其实际厚度比SiO2大的多，从而解决了SiO2因接近物理厚度极限而产生的量子遂穿效应。Currently, thin film transistors (Thin Film Transistor, TFT) play an important role in active matrix liquid crystal display devices (Active Matrix Liquid Crystal Display, AMLCD). From low-temperature amorphous silicon TFT to high-temperature polysilicon TFT, its technology is becoming more and more mature, and its application objects have also developed from only driving LCD (Liquid Crystal Display) to driving both LCD and OLED (Organic Light Emitting Display), and even electronic paper ; With the continuous improvement of the semiconductor process level, the pixel size is continuously reduced, and the resolution of the display screen is getting higher and higher. TFT is used as a switch for driving pixels in liquid crystal displays (TFT-LCD) and other display devices. The size of the material band gap determines the size of the leakage current, and its relative permittivity determines the size of the subthreshold swing of the device (that is, the energy consumption); with the development of large-scale integrated circuits, as the core of silicon-based integrated circuits The characteristic size of metal-oxide-semiconductor transistors of devices has been continuously reduced, and the reduction law follows Moore's law; the existing lithography size has reached 28nm, and the equivalent oxide thickness of the CMOS gate has dropped below 1nm. The thickness is close to the atomic distance (IEEE Electron Device Lett.2004,25(6):408-410), and the tunneling effect is caused by the decrease of the equivalent oxide thickness. Studies have shown that the thickness of silicon dioxide (SiO2 ) decreases from 3.5nm The gate leakage current increases from 10-12 A/cm2 to 10A/cm2 at 1.5nm (IEEE Electron Device Lett.1997,18(5):209-211); larger leakage current will cause high power consumption And the corresponding heat dissipation problem, which will have a negative impact on the integration, reliability and life of the device. Therefore, it is urgent to develop a new high dielectric material to replace the traditional SiO2 . In the prior art, it is widely used in the MOS integrated circuit process High dielectric constant (high-k) gate dielectric to increase capacitance density and reduce gate leakage current. Due to its large dielectric constant, high-k materials have the same equivalent gate oxide thickness (EOT) as SiO2 In this case, its actual thickness is much larger than that of SiO2 , thus solving the quantum tunneling effect of SiO2 due to its proximity to the physical thickness limit.
目前已成为研究热点的新型高k介电材料包括ATO(AdvancedMaterial,24,2945,2012)、Al2O3(Nature,489,128,2012),ZrO2(Advanced Material,23,971,2011)、WO3(Applied Physics Letters,102,052905,2013)和Ta2O5(Applied Physics Letters,101,261112,2012)等，TFT器件是薄膜型结构，其栅介电层的介电常数、致密性和厚度对晶体管的性能影响很大，在众多SiO2栅介电替代品中，氧化锆(Y2O3)用作高k介电材料具有很好的可靠性，它具有较大的介电常数(14-18)，较宽的带隙(5.5-6.0eV)，对电子和空穴有着比较合适的通道势垒高度(大于1eV)，与Si表面有很好的晶格匹配，可与传统的CMOS工艺相兼容；因此，Y2O3被期望能够替代传统栅介电材料，成为新一代TFT高k栅介电材料的有力候选者；而且，考虑到将来微电子器件发展的新方向—打印电子器件，利用化学溶液技术制备薄膜将是一个很好的选择，化学溶液技术在超细粉末、薄膜涂层、纤维等材料的制备工艺中受到广泛应用，它具有其独特的优点：其反应中各组分的混合在分子间进行，因而产物的粒径小、均匀性高；反应过程易于控制，可得到一些用其他方法难以得到的产物，另外反应在低温下进行，避免了高温杂相的出现，使得产物的纯度高。New high-k dielectric materials that have become research hotspots include ATO (Advanced Material, 24, 2945, 2012), Al2 O3 (Nature, 489, 128, 2012), ZrO2 (Advanced Material, 23, 971, 2011), WO3 ( Applied Physics Letters, 102, 052905, 2013) and Ta2 O5 (Applied Physics Letters, 101, 261112, 2012), etc., TFT devices are thin-film structures, and the dielectric constant, compactness and thickness of the gate dielectric layer have a great influence on The performance of the transistor has a great influence. Among many SiO2 gate dielectric substitutes, zirconia (Y2 O3 ) has good reliability as a high-k dielectric material, and it has a large dielectric constant (14 -18), wide band gap (5.5-6.0eV), has a relatively suitable channel barrier height (greater than 1eV) for electrons and holes, and has a good lattice match with the Si surface, which can be compared with traditional CMOS Therefore, Y2 O3 is expected to replace traditional gate dielectric materials and become a strong candidate for a new generation of TFT high-k gate dielectric materials; moreover, considering the new direction of future development of microelectronic devices—printed electronics Devices, using chemical solution technology to prepare thin films will be a good choice. Chemical solution technology is widely used in the preparation of ultrafine powder, film coating, fiber and other materials. It has its unique advantages: each reaction in its reaction The components are mixed intermolecularly, so the particle size of the product is small and the uniformity is high; the reaction process is easy to control, and some products that are difficult to obtain by other methods can be obtained. In addition, the reaction is carried out at low temperature, avoiding the appearance of high-temperature impurity phases , so that the purity of the product is high.
目前采用化学溶液技术制备薄膜时多采用有机系溶液作为前驱体，该方法不仅增加实验成本，其废液破坏自然环境，不利于可持续、绿色环保的宗旨；寻找一种全水性化学溶液法制备薄膜晶体管的新思路，在整个器件的制备过程中，只有金属的硝酸盐和去离子水作为反应源，采用去离子水替代传统的有机溶液(乙二醇甲醚等)作为溶剂，形成新型的水性溶液，水性溶液相比于常规有机溶液具有无毒、环保、廉价等优点，是本行业中急待解决的技术任务；此外由于水性溶液中溶质阳离子与水分子间为静电结合，相比于有机溶液中共价键结合方式具有更弱的结合能，因此采用水性溶液方法旋涂制备的薄膜具有更低的分解温度，所以利用水性溶液制备可靠性高、重复性好、低温分解的薄膜晶体管正成为工业界和科研界深入研究的技术课题。At present, when using chemical solution technology to prepare thin films, organic solutions are mostly used as precursors. This method not only increases the cost of experiments, but also destroys the natural environment, which is not conducive to the purpose of sustainability and environmental protection; looking for a fully aqueous chemical solution method to prepare The new idea of thin-film transistors, in the whole device preparation process, only metal nitrate and deionized water are used as reaction sources, and deionized water is used instead of traditional organic solutions (ethylene glycol methyl ether, etc.) as solvents to form a new type Aqueous solution, compared with conventional organic solutions, aqueous solution has the advantages of non-toxicity, environmental protection, and low cost, and is an urgent technical task to be solved in this industry; in addition, due to the electrostatic combination between solute cations and water molecules in aqueous solution, compared Covalent bonding in organic solutions has weaker binding energy, so films prepared by spin coating with aqueous solutions have lower decomposition temperatures, so the use of aqueous solutions to prepare thin film transistors with high reliability, good repeatability, and low temperature decomposition is positive. It has become a technical topic for in-depth research in the industry and scientific research circles.
目前，采用非晶氧化物铟锌氧(IZO)、铟镓锌氧(IGZO)、氧化铟(In2O3)材料作为薄膜晶体管沟道层的制备和应用技术已有公开文献，日、韩等国做了大量研究；IZO凭借其高迁移率、非晶态、高透过率(可见光>80％)成为半导体沟道层材料的有力候选者；通过相关专利、文献的查阅可知，利用水性溶液方法制备TFT沟道层未见报道，基于水性Y2O3高k介电层的全水性TFT器件更是无人涉足；考虑到未来“柔性显示器件”对薄膜制备工艺过程中低温的要求，确保TFT制备过程中温度低于300oC，上述工艺制备的IZO/Y2O3结构的TFT器件不仅具有较高的载流子迁移率，而且具有高透明度的特点(在可见光波段透过率大于80％)，其TFT作为AMLCD的像素开关，将大大提高有源矩阵的开口率，提高亮度，同时降低功耗；另外其全溶液制备工艺不依赖昂贵的真空镀膜设备，使得制作成本进一步降低，这些优点使其在未来的透明电子显示器件领域有很广阔的潜在市场。At present, the preparation and application technology of using amorphous oxide indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), and indium oxide (In2 O3 ) materials as the channel layer of thin film transistors has been published. A lot of research has been done in other countries; IZO has become a strong candidate for semiconductor channel layer materials due to its high mobility, amorphous state, and high transmittance (visible light>80%); The preparation of the TFT channel layer by the solution method has not been reported, and the all-aqueous TFT device based on the aqueous Y2 O3 high-k dielectric layer has not been involved; considering the low temperature requirements of the future "flexible display device" in the thin film preparation process To ensure that the temperature in the TFT preparation process is lower than 300oC, the TFT device with the IZO/Y2 O3 structure prepared by the above process not only has high carrier mobility, but also has the characteristics of high transparency (the transmittance in the visible light band is greater than 80%), its TFT is used as the pixel switch of AMLCD, which will greatly increase the aperture ratio of the active matrix, increase the brightness, and reduce power consumption; in addition, its full solution preparation process does not rely on expensive vacuum coating equipment, which further reduces the production cost. These advantages make it have a very broad potential market in the field of transparent electronic display devices in the future.
发明内容：Invention content:
本发明的目的在于克服现有技术存在的缺点，寻求设计和提供一种以超薄氧化钇(Y2O3)为高k介电层和以IZO为沟道层的全水性薄膜晶体管的制备方法，先选用低阻硅作为衬底和栅电极，分别采用水性溶液和低温热退火相结合的方法制备超薄Y2O3(<20nm)栅介电层和高透过率、高迁移率的IZO半导体沟道层，从而制备高性能的薄膜晶体管，并使其电学性能满足显示器对薄膜晶体管(TFT)的要求。The purpose of the present invention is to overcome the shortcoming that prior art exists, seek to design and provide a kind of with ultra-thin yttrium oxide (Y2 O3 ) as high-k dielectric layer and with IZO as the preparation of channel layer all-aqueous thin film transistor method, first choose low-resistance silicon as the substrate and gate electrode, and prepare ultra-thin Y2 O3 (<20nm) gate dielectric layer and high transmittance and high mobility by combining aqueous solution and low temperature thermal annealing respectively The IZO semiconductor channel layer is used to prepare high-performance thin-film transistors and make their electrical properties meet the requirements of displays for thin-film transistors (TFTs).
为了实现上述目的，本发明的具体工艺包括以下步骤：In order to achieve the above object, the concrete process of the present invention comprises the following steps:
(1)、Y2O3前驱体溶液的制备：将硝酸钇Y(NO3)3·H2O溶于去离子水中，在20-90℃下磁力搅拌1-24小时形成澄清透明的Y2O3前驱体溶液，其中Y2O3前驱体溶液浓度为0.01-0.5mol/L；(1) Preparation of Y2 O3 precursor solution: Dissolve yttrium nitrate Y(NO3 )3 ·H2 O in deionized water, stir magnetically at 20-90°C for 1-24 hours to form clear and transparent Y2 O3 precursor solution, wherein the concentration of Y2 O3 precursor solution is 0.01-0.5mol/L;
(2)、Y2O3薄膜样品的制备：采用常规的等离子体清洗方法清洗低阻硅衬底表面，在清洗后的低阻硅衬底上采用常规的旋涂技术旋涂步骤(1)配制的前驱体溶液，先在400-600转/分下匀胶4-8秒，再在2000-5000转/分下匀胶15-30秒，旋涂次数为1-3次，每次旋涂厚度5-10nm；将旋涂后的薄膜放到烤胶台上进行控温100-200℃的烘焙，固化实验样品；再将烘焙后的样品进行300℃低温退火1-3小时，实现脱羟基和金属氧化物致密化，即得到Y2O3薄膜样品；(2), preparation of Y2 O3 film samples: adopt conventional plasma cleaning method to clean the surface of low-resistance silicon substrate, and adopt conventional spin-coating technology spin-coating step (1) on the cleaned low-resistance silicon substrate For the prepared precursor solution, first mix the glue at 400-600 rpm for 4-8 seconds, then at 2000-5000 rpm for 15-30 seconds, spin coating times 1-3 times, each spin The thickness of the coating is 5-10nm; put the spin-coated film on the baking table for baking at a temperature of 100-200°C to cure the experimental sample; then anneal the baked sample at a low temperature of 300°C for 1-3 hours to achieve Densification of hydroxyl groups and metal oxides to obtain Y2 O3 thin film samples;
(3)、IZO沟道层的制备：将硝酸锌Zn(NO3)2和硝酸铟In(NO3)3分别溶于去离子水中，在室温下搅拌1-24小时形成澄清透明的浓度为0.01-0.5mol/L的IZO水性溶液，水性溶液中In3+:Zn2+为1～9:1；在步骤(2)得到的Y2O3薄膜样品表面利用旋涂技术旋涂IZO水性溶液，先在400-600转/分下匀胶4-8秒，再在2000-5000转/分下匀胶15-30秒，旋涂次数为1-3次，每次旋涂厚度为5-10nm；将旋涂后的薄膜放到120-150℃烤胶台进行固化处理后放入马弗炉中进行200-300℃低温退火处理1-5小时，制备得到IZO沟道层；(3) Preparation of IZO channel layer: Dissolve zinc nitrate Zn(NO3 )2 and indium nitrate In(NO3 )3 in deionized water respectively, stir at room temperature for 1-24 hours to form a clear and transparent concentration of 0.01-0.5mol/L IZO aqueous solution, In3+ : Zn2+ in the aqueous solution is 1 ~ 9:1; the surface of the Y2 O3 film sample obtained in step (2) is spin-coated with IZO water-based Solution, firstly mix the glue at 400-600 rpm for 4-8 seconds, then at 2000-5000 rpm for 15-30 seconds, the number of spin coatings is 1-3 times, and the thickness of each spin coating is 5 -10nm; the spin-coated film is placed in a 120-150°C baking table for curing treatment, and then placed in a muffle furnace for 200-300°C low-temperature annealing treatment for 1-5 hours to prepare an IZO channel layer;
(4)、源、漏电极的制备：利用常规的真空热蒸发技术使用掩膜版在IZO沟道层上制备金属源和漏电极，即得到基于超薄Y2O3高k介电层的基于水溶液薄膜晶体管。(4) Preparation of source and drain electrodes: Utilize conventional vacuum thermal evaporation technology to use a mask to prepare metal source and drain electrodes on the IZO channel layer, that is, to obtain ultra-thin Y2 O3 high-k dielectric layer. Aqueous-based thin-film transistors.
本发明的步骤(1)中涉及的去离子水电阻率>18MΩ·cm。The resistivity of the deionized water involved in the step (1) of the present invention is >18MΩ·cm.
本发明的步骤(2)中涉及的等离子体清洗法采用氧气或氩气作为清洗气体，其功率为20-60Watt，清洗时间为20-200s，工作气体的通入量为20-50SCCM。The plasma cleaning method involved in the step (2) of the present invention uses oxygen or argon as cleaning gas, its power is 20-60Watt, the cleaning time is 20-200s, and the input volume of working gas is 20-50SCCM.
本发明步骤(4)制备的薄膜晶体管的电极沟道长宽比为1:4～20，热蒸发电流为30-50A；源、漏电极为Al，Au或Ni金属电极，电极厚度为50-200nm。The electrode channel aspect ratio of the thin film transistor prepared by step (4) of the present invention is 1:4～20, and the thermal evaporation current is 30-50A; The source and drain electrodes are Al, Au or Ni metal electrodes, and the electrode thickness is 50-200nm .
本发明与现有技术相比，有以下优点：一是薄膜晶体管中的半导体沟道层及高k介电层均利用化学溶液方法制备完成，化学溶液方法成本低廉，其制备过程不需要高真空环境，在空气中即可进行；反应在低温下即可进行，降低成本的同时避免高温杂相的出现；二是采用等离子体清洗衬底表面，增加旋涂时前驱体溶液在衬底的附着力，使得旋涂后的薄膜样品表面更加均一和平整；三是采用水性溶液方法和低温热退火相结合的方式得到新型栅介电材料Y2O3，避免传统化学溶液方法成膜工艺对于高温(>500℃)的需求，使得制备的Y2O3介电层可以制备在塑料衬底上，为柔性、透明显示器件的应用奠定重要基础；四是制得的Y2O3高k栅介电层的物理厚度小于20nm，同时具有的低漏电流很好地满足微电子集成化对于器件尺寸的需求；Y2O3薄膜本身具有的高透过率(可见光波段接近90％)，符合透明电子器件对材料自身的要求；制得的Y2O3薄膜为非晶态，可大面积均匀制备介电层；五是薄膜晶体管中绝缘层及沟道层均利用水性溶液方法制备，利用去离子水作为溶剂相比传统有机溶剂具有无毒、绿色环保等优点；同时，水性溶液对环境湿度要求不高，因此进一步降低制备成本；最后，由于去离子水没有腐蚀性，当旋涂到Y2O3栅介电层上时，不会侵蚀Y2O3表面，因此利于形成更加清晰的界面，这对于薄膜晶体管表现高性能电学性能至关重要；六是利用水性溶液制备IZO半导体薄膜本身具有的高透过率(可见光波段大于80％)，符合透明电子器件的要求；同时低温(<300℃)制备的优点与平板显示技术要求的低温制造技术相兼容；其总体实施方案成本低，工艺简单，原理可靠，产品性能好，制备环境友好，应用前景广阔，为大面积制备高性能的薄膜晶体管提供可行性方案。Compared with the prior art, the present invention has the following advantages: First, the semiconductor channel layer and the high-k dielectric layer in the thin film transistor are all prepared by the chemical solution method, the chemical solution method has low cost, and the preparation process does not require high vacuum The environment can be carried out in the air; the reaction can be carried out at low temperature, which reduces the cost and avoids the appearance of high-temperature impurity phases; the second is to use plasma to clean the surface of the substrate to increase the adhesion of the precursor solution on the substrate during spin coating. Focus on making the surface of the spin-coated thin film sample more uniform and flat; the third is to use a combination of aqueous solution method and low-temperature thermal annealing to obtain a new gate dielectric material Y2 O3 , avoiding the traditional chemical solution method film formation process for high temperature (>500°C), the prepared Y2 O3 dielectric layer can be prepared on a plastic substrate, laying an important foundation for the application of flexible and transparent display devices; the fourth is the prepared Y2 O3 high-k gate The physical thickness of the dielectric layer is less than 20nm, and at the same time, the low leakage current satisfies the requirements of microelectronics integration for device size; the Y2 O3 film itself has a high transmittance (approximately 90% in the visible light band), which meets The requirements of transparent electronic devices on the material itself; the Y2 O3 thin film is amorphous, and the dielectric layer can be uniformly prepared in a large area; fifth, the insulating layer and the channel layer in the thin film transistor are prepared by the aqueous solution method, using Compared with traditional organic solvents, deionized water has the advantages of non-toxicity and environmental protection; at the same time, the aqueous solution does not require high environmental humidity, so the preparation cost is further reduced; finally, because deionized water is not corrosive, when spin-coated to When the Y2 O3 gate dielectric layer is on the Y2 O3 surface, it will not erode the Y 2 O 3 surface, so it is conducive to the formation of a clearer interface, which is very important for the high-performance electrical properties of thin-film transistors; the sixth is to use aqueous solution to prepare IZO semiconductor thin films Its high transmittance (more than 80% in the visible light band) meets the requirements of transparent electronic devices; at the same time, the advantages of low temperature (<300°C) preparation are compatible with the low temperature manufacturing technology required by flat panel display technology; its overall implementation cost is low , the process is simple, the principle is reliable, the product performance is good, the preparation environment is friendly, and the application prospect is broad, which provides a feasible solution for the large-area preparation of high-performance thin film transistors.
附图说明：Description of drawings:
图1为本发明制备的基于Y2O3高k介电层的全水性IZO薄膜晶体管的结构原理示意图。Fig. 1 is a schematic diagram of the structure and principle of the all-aqueous IZO thin film transistor based on the Y2 O3 high-k dielectric layer prepared by the present invention.
图2为本发明制备的水性Y2O3高k介电层的漏电流测试曲线图。Fig. 2 is a leakage current test curve of the water-based Y2 O3 high-k dielectric layer prepared in the present invention.
图3为本发明制备的水性Y2O3高k介电层的电容测试曲线图。Fig. 3 is a capacitance test curve of the water-based Y2 O3 high-k dielectric layer prepared in the present invention.
图4为本发明制备的全水性IZO/Y2O3薄膜晶体管的输出特性曲线图，其中栅极偏压VGS＝1.5V。Fig. 4 is an output characteristic curve of the all-aqueous IZO/Y2 O3 thin film transistor prepared in the present invention, wherein the gate bias VGS =1.5V.
图5为本发明制备的全水性IZO/Y2O3薄膜晶体管的转移特性曲线图，其中源漏电压VDS＝1.0V。Fig. 5 is a transfer characteristic curve of the all-aqueous IZO/Y2 O3 thin film transistor prepared in the present invention, wherein the source-drain voltage VDS =1.0V.
具体实施方式：Detailed ways:
下面通过具体实施例并结合附图进一步说明本发明。The present invention will be further described below through specific embodiments in conjunction with the accompanying drawings.
实施例：Example:
本实施例中的硝酸钇、硝酸锌和硝酸铟粉末均购于阿拉丁公司，纯度大于98％；其底栅结构以超薄氧化钇(Y2O3)为高k介电层和以氧化铟锌(IZO)薄膜为沟道层的基于水溶液薄膜晶体管的制备过程为：The powdersof yttrium nitrate, zinc nitrate and indium nitrate in this example are all purchased from Aladdin Company, and the purity is greater than 98%. The bottom gate structure uses ultra-thin yttrium oxide (Y2O3 ) as the high-k dielectric layer and oxide The preparation process of an aqueous solution-based thin-film transistor with an indium-zinc (IZO) film as the channel layer is as follows:
(1)采用水性溶液方法旋涂制备超薄Y2O3高k介电薄膜：(1) Preparation of ultra-thin Y2 O3 high-k dielectric film by spin coating with aqueous solution method:
步骤1：选用商业购买的单面抛光低阻硅作为衬底(ρ＜0.0015Ω·cm)和栅电极，低阻硅衬底依次用氢氟酸、丙酮、酒精超声波清洗衬底各10分钟，用去离子水反复冲洗后，高纯氮气吹干；Step 1: Select commercially purchased single-sided polished low-resistance silicon as the substrate (ρ<0.0015Ω·cm) and the gate electrode, and the low-resistance silicon substrate is ultrasonically cleaned with hydrofluoric acid, acetone, and alcohol for 10 minutes each. After repeated washing with deionized water, blow dry with high-purity nitrogen;
步骤2：将硝酸钇按照0.2M溶于该混合溶液中，称量去离子水10mL，称取乙酰丙酮锆为0.76g，混合后在磁力搅拌的作用下室温搅拌5.5小时形成澄清、透明的Y2O3前驱体液体；Step 2: Dissolve yttrium nitrate at 0.2M in the mixed solution, weigh 10mL of deionized water, weigh 0.76g of zirconium acetylacetonate, mix and stir at room temperature for 5.5 hours under the action of magnetic stirring to form a clear and transparent Y2 O3 precursor liquid;
步骤3：将洁净的低阻硅衬底放入等离子体清洗腔内,待腔室抽取至0.5Pa后通入纯度为99.99％的氧气，控制其功率为30Watt，清洗时间为120s，工作时氧气的通入量为30SCCM；Step 3: Put the clean low-resistance silicon substrate into the plasma cleaning chamber, and after the chamber is pumped to 0.5Pa, introduce oxygen with a purity of 99.99%, control its power to 30Watt, and clean it for 120s. The throughput is 30SCCM;
步骤4：制备Y2O3样品:将步骤2中配制的前驱体溶液旋涂在清洗过的低阻硅衬底上，旋涂次数为1～5次，旋涂前驱体溶液时匀胶机的参数设置为：先在500转/分匀胶5秒，然后在5000转/分匀胶25秒；旋涂结束后，将样品放到烤胶台上150oC烘焙10min，将固化处理后的Y2O3样品放入马弗炉中低温退火处理，退火温度为300℃，退火时间为1小时，得到Y2O3样品；Step 4: Prepare Y2 O3 samples: spin-coat the precursor solution prepared in step 2 on the cleaned low-resistance silicon substrate, and the number of spin coatings is 1 to 5 times. The parameters are set as follows: 5 seconds at 500 rpm, and then 25 seconds at 5000 rpm; after the spin coating, put the sample on the baking table at 150oC and bake for 10 minutes, and the cured YThe 2 O3 sample was placed in a muffle furnace for low-temperature annealing treatment, the annealing temperature was 300°C, and the annealing time was 1 hour to obtain a Y2 O3 sample;
(2)利用水性溶液方法旋涂制备IZO沟道层：(2) Prepare the IZO channel layer by spin coating with aqueous solution method:
步骤1：将硝酸铟和硝酸锌粉末分别溶于去离子水中，In3+:Zn2+＝7:3，金属阳离子总浓度为0.2M；在该实验中，量取去离子水10mL，分别称取硝酸铟0.42g和硝酸锌0.18g，混合后在磁力搅拌的作用下室温搅拌5.5小时形成澄清透明的IZO水性溶液；Step 1: Dissolve indium nitrate and zinc nitrate powders in deionized water respectively, In3+ :Zn2+ =7:3, the total concentration of metal cations is 0.2M; in this experiment, measure 10mL of deionized water, respectively Weigh 0.42 g of indium nitrate and 0.18 g of zinc nitrate, mix and stir at room temperature for 5.5 hours under the action of magnetic stirring to form a clear and transparent IZO aqueous solution;
步骤2：制备In2O3沟道层:将步骤1中配制的硝酸铟水性溶液旋涂在处理过的Y2O3样品上，旋涂时匀胶机的参数设置为：先在500转/分匀胶5秒，然后在3000转/分匀胶25秒，旋涂结束后，将样品放入马弗炉中低温退火处理，退火温度为分别为230℃，退火时间4小时；Step 2: prepare In2 O3 channel layer: the indium nitrate aqueous solution prepared in step 1 is spin-coated on the Y2 O3 sample that has been processed, and the parameter setting of glue homogenizer during spin coating is: first at 500 rpm Homogenize the glue for 5 seconds, then homogenize the glue at 3000 rpm for 25 seconds. After the spin coating is completed, put the sample into the muffle furnace for low-temperature annealing treatment. The annealing temperature is 230°C, and the annealing time is 4 hours;
(3)采用真空热蒸发法制备源、漏金属电极：(3) Preparation of source and drain metal electrodes by vacuum thermal evaporation method:
通过热蒸发的方式，在IZO沟道层上用宽长比为1000μm/250μm的掩膜版制备100nm厚的金属Al作为源、漏电极，热蒸发电流为40A，制备得到Al/IZO/Y2O3/Si结构的薄膜晶体管；By thermal evaporation, a 100nm-thick metal Al was prepared on the IZO channel layer with a mask plate with a width-length ratio of 1000μm/250μm as the source and drain electrodes, and the thermal evaporation current was 40A, and the Al/IZO/Y2 Thin film transistor with O3 /Si structure;
(4)对制成的Al/IZO/Y2O3/Si结构(图1)的薄膜晶体管测试；制备的水性Y2O3介电层的漏电流测试及电容测试曲线分别如图2和图3所示；制得的薄膜晶体管输出特性曲线如图4所示；制备的薄膜晶体管对应的转移特性曲线如图5所示；图2、图4、图5曲线由吉时利2634B半导体参数测试仪得到；图3曲线由安捷伦4155C测试得到。(4) Test the thin film transistor of the Al/IZO/Y2 O3 /Si structure (Fig. 1); the leakage current test and capacitance test curves of the prepared water-based Y2 O3 dielectric layer are shown in Fig. 2 and As shown in Figure 3; the output characteristic curve of the thin film transistor made is shown in Figure 4; the transfer characteristic curve corresponding to the thin film transistor prepared is shown in Figure 5; The tester is obtained; the curve in Figure 3 is obtained by the test of Agilent 4155C.
| Application Number | Priority Date | Filing Date | Title |
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| CN201410505093.3ACN104201112A (en) | 2014-09-28 | 2014-09-28 | Preparation method for water solution thin film transistor |
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| CN201410505093.3ACN104201112A (en) | 2014-09-28 | 2014-09-28 | Preparation method for water solution thin film transistor |
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| CN201410505093.3APendingCN104201112A (en) | 2014-09-28 | 2014-09-28 | Preparation method for water solution thin film transistor |
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