Movatterモバイル変換


[0]ホーム

URL:


CN104134991B - A kind of three-port DC bus Voltage stabilizing module towards direct-current grid - Google Patents

A kind of three-port DC bus Voltage stabilizing module towards direct-current grid
Download PDF

Info

Publication number
CN104134991B
CN104134991BCN201410417518.5ACN201410417518ACN104134991BCN 104134991 BCN104134991 BCN 104134991BCN 201410417518 ACN201410417518 ACN 201410417518ACN 104134991 BCN104134991 BCN 104134991B
Authority
CN
China
Prior art keywords
power switch
full
switch pipe
signal
bridge topology
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201410417518.5A
Other languages
Chinese (zh)
Other versions
CN104134991A (en
Inventor
张涛
刘宝龙
陈世明
查亚兵
黄卓
雷洪涛
张彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National University of Defense Technology
Original Assignee
National University of Defense Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National University of Defense TechnologyfiledCriticalNational University of Defense Technology
Priority to CN201410417518.5ApriorityCriticalpatent/CN104134991B/en
Publication of CN104134991ApublicationCriticalpatent/CN104134991A/en
Application grantedgrantedCritical
Publication of CN104134991BpublicationCriticalpatent/CN104134991B/en
Expired - Fee Relatedlegal-statusCriticalCurrent
Anticipated expirationlegal-statusCritical

Links

Classifications

Landscapes

Abstract

Translated fromChinese

本发明公开了一种面向直流微电网的三端口直流母线稳压模块,由电力电子变换单元、信号处理单元和信号调理单元组成,电力电子变换单元由4个全桥拓扑、2个电容、高频变压器组成;4个全桥拓扑均由功率开关管搭建而成,2个电容为铝电解电容或钽电解电容;高频变压器由初级绕组、次级绕组和磁芯组成;信号处理单元由数字信号处理器、4个驱动芯片组成,数字信号处理器内装有信号处理软件,为具有模数转换功能、定时器、Flash存储器、4个以上PWM发生器的微处理器;本发明体积小,功率密度高,能维持直流微电网中直流母线电压的稳定,实现公用交流电网与直流微电网之间的电气隔离,且能实现微电网并网和孤岛模式之间的无缝切换。

The invention discloses a three-port DC bus bar voltage stabilizing module for DC microgrid, which is composed of a power electronic conversion unit, a signal processing unit and a signal conditioning unit. The power electronic conversion unit consists of 4 full-bridge topologies, 2 capacitors, high Composed of high-frequency transformers; 4 full-bridge topologies are built by power switch tubes, and 2 capacitors are aluminum electrolytic capacitors or tantalum electrolytic capacitors; high-frequency transformers are composed of primary windings, secondary windings and magnetic cores; signal processing units are composed of digital Signal processor, 4 driving chips are formed, and signal processing software is housed in the digital signal processor, is the microprocessor with analog-to-digital conversion function, timer, Flash memory, more than 4 PWM generators; The present invention is small in volume, power With high density, it can maintain the stability of the DC bus voltage in the DC microgrid, realize the electrical isolation between the public AC grid and the DC microgrid, and can realize the seamless switching between the grid-connected microgrid and the island mode.

Description

Translated fromChinese
一种面向直流微电网的三端口直流母线稳压模块A three-port DC bus voltage stabilization module for DC microgrid

技术领域technical field

本发明涉及电力电子领域,特别涉及到三端口直流母线稳压模块。The invention relates to the field of power electronics, in particular to a three-port direct current bus voltage stabilizing module.

背景技术Background technique

与传统交流微电网相比,直流微电网中自身多种微型电源与直流母线的连接方式更为简便,不必考虑交流微网中输出电压的频率和相位等问题。对直流微电网的控制只决定于直流母线电压,对交流微电网的控制更大程度上取决于电网电流,因此直流微电网更容易实现分布式电源间的协同控制。当公用交流电网发生故障时,直流微电网能快速地与公用交流电网分离,并能够通过自身的分布式电源维持本系统正常运行。Compared with the traditional AC microgrid, the connection of various micro power sources and the DC bus in the DC microgrid is more convenient, and there is no need to consider the frequency and phase of the output voltage in the AC microgrid. The control of the DC microgrid is only determined by the DC bus voltage, and the control of the AC microgrid depends on the grid current to a greater extent. Therefore, the DC microgrid is easier to realize the coordinated control among distributed power sources. When the public AC grid fails, the DC microgrid can quickly separate from the public AC grid, and can maintain the normal operation of the system through its own distributed power supply.

由于微电网中存在电压等级不同的储能装置和分布式电源,直流微电网稳定运行的关键是要保持供电电源端和负荷端能量的平衡,而控制直流微电网能量平衡的关键是对直流母线电压的调整和电能质量的管理。目前,在直流微电网主要有并网和孤岛两种运行模式,在并网模式主要是通过公用交流电网整流来稳定直流母线上的电压,而在孤岛模式下通过储能装置来稳定直流母线电压。因此需要一个三端口模块,即一个端口为公用交流电网整流之后的直流电源装置接口,一个端口为储能装置接口,另外一个端口为直流微电网中直流母线的接口。Since there are energy storage devices and distributed power sources with different voltage levels in the microgrid, the key to the stable operation of the DC microgrid is to maintain the energy balance between the power supply end and the load end, and the key to controlling the energy balance of the DC microgrid is to control the DC bus. Voltage adjustment and power quality management. At present, there are mainly two operating modes in the DC microgrid: grid-connected and islanded. In the grid-connected mode, the voltage on the DC bus is mainly stabilized through the rectification of the public AC grid, while in the island mode, the DC bus voltage is stabilized by energy storage devices. . Therefore, a three-port module is required, that is, one port is the interface of the DC power supply device after the rectification of the public AC grid, one port is the interface of the energy storage device, and the other port is the interface of the DC bus in the DC microgrid.

目前,没有公开技术文件涉及满足上述功能的三端口模块。At present, there is no published technical document related to a three-port module satisfying the above-mentioned functions.

发明内容Contents of the invention

本发明要解决的技术问题是提供一种体积小,功率密度高的面向直流微电网的三端口直流母线稳压模块,该模块一方面能够维持直流微电网中直流母线电压的稳定,一方面能够实现公用交流电网与直流微电网之间的电气隔离,有利于公用交流电网的安全,且能够实现微电网并网和孤岛模式(微电网脱离大电网之后,能够为本身的至少小部分负载提供电能的一种自治运行模式)之间的无缝切换。The technical problem to be solved by the present invention is to provide a three-port DC busbar voltage stabilization module for DC microgrids with small volume and high power density. Realize the electrical isolation between the public AC grid and the DC micro grid, which is conducive to the safety of the public AC grid, and can realize the grid connection and island mode of the micro grid (after the micro grid is separated from the large grid, it can provide electric energy for at least a small part of its load An autonomous mode of operation) seamless switching between.

为了实现上述目的,本发明采用如下技术方案:In order to achieve the above object, the present invention adopts the following technical solutions:

本发明使用时通过电网接口即火线L、零线N与公用交流电网相连,通过储能装置正极BAT+、储能装置负极BAT-与储能装置相连,通过直流母线的正端LINE+、直流母线的负端LINE与直流微电网中的直流母线相连。When the present invention is in use, it is connected to the public AC power grid through the grid interface, that is, the live wire L and the neutral wire N, and is connected to the energy storage device through the positive pole BAT+ of the energy storage device and the negative pole BAT- of the energy storage device. The negative terminal LINE is connected to the DC bus in the DC microgrid.

本发明由电力电子变换单元、信号处理单元和信号调理单元组成。电力电子变换单元由第一全桥拓扑、第一电容、第二电容、第二全桥拓扑、第三全桥拓扑、高频变压器、第四全桥拓扑组成。第一全桥拓扑与公用交流电网和第一电容相连,将公用交流电网传来的交流信号转换为整流信号,并将整流信号输出给第一电容。第一电容与第一全桥拓扑、第二全桥拓扑相连,将第一全桥拓扑传来的整流信号变为稳定的第一直流电压信号,并将第一直流电压信号输出给第二全桥拓扑。第二全桥拓扑与第一电容和高频变压器相连,将第一直流电压信号转换为第一交流电压方波信号,并将第一交流电压方波信号传输给高频变压器。第三全桥拓扑与储能装置、高频变压器相连,将储能装置提供的第二直流电压信号转换为第二交流电压方波信号,并将第二交流电压方波信号输到给高频变压器。高频变压器与第二全桥拓扑、第三全桥拓扑和第四全桥拓扑相连,将第一交流电压方波信号耦合到第四全桥拓扑的输入端,将第二交流电压方波信号也耦合到第四全桥拓扑的输入端。第四全桥拓扑与高频变压器和第二电容相连,将第一交流电压方波信号变为第三直流电压信号输出到直流母线,并将第二交流电压方波信号转换为第四直流电压信号输出给直流母线。第二电容与第四全桥拓扑和直流母线相连,起到滤去第三直流信号中的纹波成分的作用。信号调理单元与公用交流电网、储能装置、第一电容、直流母线和信号处理单元相连,将公用交流电网传递过来的交流电压信号和交流电流信号分别调理成电网电压信号和电网电流信号送至信号处理单元;将第一电容提供的第一直流电压信号调理成第一电容电压送至信号处理单元;将储能装置传递过来的第二直流电压信号调理成储能装置电压信号送至信号处理单元;将流过储能装置的第二直流电流信号调理成储能装置电流信号送至信号处理单元;将直流母线提供的第三直流电压信号调理成直流母线电压信号送至信号处理单元;将流过直流母线的第三直流电流信号调理成直流母线电流信号送至信号处理单元。信号处理单元和第一全桥拓扑、第二全桥拓扑、第三全桥拓扑、第四全桥拓扑和信号调理单元相连,对信号调理单元传递过来的电网电压信号、电网电流信号、储能装置电压信号、储能装置电流信号、第一电容电压信号、直流母线电压信号、直流母线电流信号进行处理,将处理之后的结果转换为驱动脉冲信号送至第一全桥拓扑、第二全桥拓扑、第三全桥拓扑和第四全桥拓扑的脉冲输入端。The invention is composed of a power electronic conversion unit, a signal processing unit and a signal conditioning unit. The power electronic conversion unit is composed of a first full-bridge topology, a first capacitor, a second capacitor, a second full-bridge topology, a third full-bridge topology, a high-frequency transformer, and a fourth full-bridge topology. The first full bridge topology is connected to the public AC grid and the first capacitor, converts the AC signal from the public AC grid into a rectified signal, and outputs the rectified signal to the first capacitor. The first capacitor is connected to the first full-bridge topology and the second full-bridge topology, and converts the rectified signal from the first full-bridge topology into a stable first DC voltage signal, and outputs the first DC voltage signal to the second full-bridge topology. bridge topology. The second full bridge topology is connected with the first capacitor and the high frequency transformer, converts the first DC voltage signal into a first AC voltage square wave signal, and transmits the first AC voltage square wave signal to the high frequency transformer. The third full-bridge topology is connected with the energy storage device and the high-frequency transformer, converts the second DC voltage signal provided by the energy storage device into a second AC voltage square wave signal, and outputs the second AC voltage square wave signal to the high frequency transformer. The high-frequency transformer is connected with the second full-bridge topology, the third full-bridge topology and the fourth full-bridge topology, couples the first AC voltage square wave signal to the input end of the fourth full-bridge topology, and couples the second AC voltage square wave signal Also coupled to the input of the fourth full bridge topology. The fourth full-bridge topology is connected with the high-frequency transformer and the second capacitor, and converts the first AC voltage square wave signal into a third DC voltage signal and outputs it to the DC bus, and converts the second AC voltage square wave signal into a fourth DC voltage The signal is output to the DC bus. The second capacitor is connected to the fourth full-bridge topology and the DC bus to filter out ripple components in the third DC signal. The signal conditioning unit is connected with the public AC grid, energy storage device, first capacitor, DC bus and signal processing unit, and adjusts the AC voltage signal and AC current signal transmitted from the public AC grid into grid voltage signal and grid current signal respectively and sends them to Signal processing unit; conditioning the first DC voltage signal provided by the first capacitor into the first capacitor voltage and sending it to the signal processing unit; conditioning the second DC voltage signal delivered by the energy storage device into a voltage signal of the energy storage device and sending it to the signal processing unit unit; conditioning the second DC current signal flowing through the energy storage device into a current signal of the energy storage device and sending it to the signal processing unit; conditioning the third DC voltage signal provided by the DC bus into a DC bus voltage signal and sending it to the signal processing unit; The third DC current signal flowing through the DC bus is conditioned into a DC bus current signal and sent to the signal processing unit. The signal processing unit is connected to the first full-bridge topology, the second full-bridge topology, the third full-bridge topology, and the fourth full-bridge topology and the signal conditioning unit, and the grid voltage signal, grid current signal, and energy storage The device voltage signal, the energy storage device current signal, the first capacitor voltage signal, the DC bus voltage signal, and the DC bus current signal are processed, and the processed results are converted into driving pulse signals and sent to the first full-bridge topology and the second full-bridge topology, the pulse input of the third full-bridge topology and the fourth full-bridge topology.

以下所述第一至第十二功率开关管为场效应晶体管或绝缘栅双极型晶体管IGBT(insulatedgatebipolartransistor)。The first to twelfth power switch tubes described below are field effect transistors or insulated gate bipolar transistors (IGBTs).

若功率开关管选用IGBT功率开关管,则功率开关管的第一端为IGBT的门极,功率开关管第二端为IGBT的集电极,功率开关管第三端为IGBT的发射极。若选择场效应晶体管为功率开关管,则功率开关管的第一端为场效应晶体管的栅极,功率开关管第二端为场效应晶体管的漏极,功率开关管第三端为场效应晶体管的源极。If the power switch tube is an IGBT power switch tube, the first end of the power switch tube is the gate of the IGBT, the second end of the power switch tube is the collector of the IGBT, and the third end of the power switch tube is the emitter of the IGBT. If the field effect transistor is selected as the power switch tube, the first end of the power switch tube is the gate of the field effect transistor, the second end of the power switch tube is the drain of the field effect transistor, and the third end of the power switch tube is the field effect transistor. source.

第一全桥拓扑由四个功率开关管组成,第一功率开关管的第二端与第二功率开关管的第二端相连,第一功率开关管的第三端连接到第三功率开关管的第二端。第二功率开关管的第二端既与第一功率开关管的第二端相连,又连接到第一电容的正极,第二功率开关管的第三端连接到第四功率开关管的第二端,并连接到公用交流电网的零线。第三功率开关管的第二端连接到第一功率开关管的第三端,并连接到公用交流电网的火线。第三功率开关管的第三端连接到第四功率开关管的第三端。第四功率开关管的第二端连接到第二功率开关管的第三端,第四功率开关管的第三端既与第三功率开关管的第三端相连,又连接到第一电容的负极。第一全桥拓扑中的功率开关管的第一端与功率开关管的第一端均为第一全桥拓扑脉冲输入端的正端,第一全桥拓扑中的功率开关管的第一端与功率开关管的第一端均为第一全桥拓扑形脉冲输入端的负端。第一全桥拓扑的脉冲输入端与信号处理单元相连。The first full bridge topology consists of four power switch tubes, the second end of the first power switch tube is connected to the second end of the second power switch tube, and the third end of the first power switch tube is connected to the third power switch tube the second end of . The second end of the second power switch tube is not only connected to the second end of the first power switch tube, but also connected to the positive pole of the first capacitor, and the third end of the second power switch tube is connected to the second end of the fourth power switch tube. terminal and connected to the neutral of the public AC grid. The second end of the third power switch tube is connected to the third end of the first power switch tube, and connected to the live wire of the public AC grid. The third terminal of the third power switch tube is connected to the third terminal of the fourth power switch tube. The second end of the fourth power switch tube is connected to the third end of the second power switch tube, and the third end of the fourth power switch tube is connected to the third end of the third power switch tube and connected to the first capacitor negative electrode. Both the first end of the power switch tube in the first full-bridge topology and the first end of the power switch tube are positive terminals of the pulse input end of the first full-bridge topology, and the first end of the power switch tube in the first full-bridge topology is connected to the first end of the power switch tube. The first ends of the power switch tubes are all negative ends of the first full-bridge topological pulse input end. The pulse input of the first full bridge topology is connected to the signal processing unit.

第一电容为铝电解电容或钽电解电容。选择该电容时应该依据第一全桥拓扑输出的整流信号中的电压信号幅值的大小及其纹波峰-峰值的大小和频率来选取。第一电容的电容值其中V1为整流信号的电压信号平均值、Vr1为整流电压信号纹波的大小、fr1为整流电压信号纹波频率的大小、P为第一全桥拓扑的额定功率(在数值上等于直流微电网中负载的最大功率和分布式电源的最大功率之和)。第一电容的耐压值应为1.2V1The first capacitor is an aluminum electrolytic capacitor or a tantalum electrolytic capacitor. The capacitor should be selected according to the amplitude of the voltage signal in the rectified signal output by the first full-bridge topology, the peak-to-peak value of the ripple, and the frequency. Capacitance value of the first capacitor Among them, V1 is the average value of the voltage signal of the rectified signal, Vr1 is the magnitude of the ripple of the rectified voltage signal, fr1 is the magnitude of the ripple frequency of the rectified voltage signal, and P is the rated power of the first full-bridge topology (in numerical value equal to The sum of the maximum power of the load in the DC microgrid and the maximum power of the distributed power supply). The withstand voltage value of the first capacitor should be 1.2V1 .

高频变压器是一个三端口器件,由初级绕组、次级绕组和磁芯组成,其初级绕组由初级第一绕组和初级第二绕组构成。高频变压器的初级第一绕组、初级第二绕组和次级绕组的匝数应根据本发明的最大功率P1、高频变压器的工作频率fs以及高频变压器输出电压和输入电压的大小来确定。The high-frequency transformer is a three-port device consisting of a primary winding, a secondary winding and a magnetic core, and its primary winding is composed of a primary first winding and a primary second winding. The number of turns of the primary first winding, the primary second winding and the secondary winding of the high-frequency transformer should be determined according to the maximum power P1 of the present invention, the operating frequency fs of the high-frequency transformer, and the output voltage and input voltage of the high-frequency transformer. Sure.

高频变压器初级第一绕组的匝数其中V2是高频变压器初级第一绕组的输入电压,fs为高频变压器的工作频率,BW是磁芯工作密度,Ae为磁芯有效工作面积,BW与Ae是两个与功率相关的参数,具体值通过查看选定磁芯生产厂家的数据手册确定。次级绕组匝数其中V3是高频变压器次级绕组两端的电压。初级第二绕组的匝数其中V4是高频变压器初级第二绕组的输入电压。高频变压器中所使用的磁芯采用ETD型的锰锌铁氧体磁芯。The number of turns of the primary primary winding of a high frequency transformer Among them, V2 is the input voltage of the first primary winding of the high-frequency transformer, fs is the operating frequency of the high-frequency transformer, BW is the working density of the magnetic core, Ae is the effective working area of the magnetic core, and BW and Ae are two For parameters related to power, the specific value is determined by checking the data sheet of the selected magnetic core manufacturer. Number of turns of secondary winding whereV3 is the voltage across the secondary winding of the high frequency transformer. Number of turns of the primary secondary winding WhereV4 is the input voltage of the primary secondary winding of the high frequency transformer. The magnetic core used in the high frequency transformer adopts the ETD type manganese zinc ferrite magnetic core.

第二全桥拓扑由四个功率开关管组成,第五功率开关管的第二端与第一电容的正极、第六功率开关管的第二端相连,第五功率开关管的第三端与第七功率开关管的第二端相连,并连接到高频变压器的初级第一绕组的同名端。第六功率开关管的第二端连接到第五功率开关管的第二端,第六功率开关管的第三端与第八功率开关管的第二端相连,并连接到高频变压器的初级第一绕组的异名端。第七功率开关管的第二端连接到第五功率开关管的第三端,第七功率开关管的第三端连接到第一电容的负极,并与第八功率开关管的第三端相连。第八功率开关管的第二端连接到第六功率开关管的第三端,第八功率开关管的第三端连接到第七功率开关管的第三端。第二全桥拓扑中的功率开关管的第一端与功率开关管的第一端均为第二全桥拓扑脉冲输入端的正端,第二全桥拓扑中的功率开关管的第一端与功率开关管的第一端均为第二全桥拓扑形脉冲输入端的负端。第二全桥拓扑的脉冲输入端与信号处理单元相连。The second full-bridge topology is composed of four power switch tubes, the second end of the fifth power switch tube is connected to the positive pole of the first capacitor and the second end of the sixth power switch tube, and the third end of the fifth power switch tube is connected to the second end of the sixth power switch tube. The second end of the seventh power switch tube is connected to the same name end of the primary first winding of the high frequency transformer. The second end of the sixth power switch tube is connected to the second end of the fifth power switch tube, the third end of the sixth power switch tube is connected to the second end of the eighth power switch tube, and connected to the primary of the high frequency transformer The opposite end of the first winding. The second end of the seventh power switch tube is connected to the third end of the fifth power switch tube, the third end of the seventh power switch tube is connected to the negative pole of the first capacitor, and connected to the third end of the eighth power switch tube . The second terminal of the eighth power switch tube is connected to the third terminal of the sixth power switch tube, and the third terminal of the eighth power switch tube is connected to the third terminal of the seventh power switch tube. Both the first end of the power switch tube in the second full bridge topology and the first end of the power switch tube are positive terminals of the pulse input end of the second full bridge topology, and the first end of the power switch tube in the second full bridge topology is connected to the first end of the power switch tube. The first ends of the power switch tubes are all negative ends of the second full-bridge topological pulse input end. The pulse input of the second full bridge topology is connected to the signal processing unit.

第三全桥拓扑由四个功率开关管组成,其连接方式是:第九功率开关管的第二端与储能装置的正极、第十功率开关管的第二端相连,第九功率开关管的第三端连接到第十一功率开关管的第二端,并均连接到高频变压器的初级第二绕组的同名端。第十功率开关管的第二端连接到第九功率开关管的第二端,第十功率开关管的第三端连接到第十二功率开关管的第二端,并连接到高频变压器的初级第二绕组的异名端。第十一功率开关管的第二端连接到第九功率开关管的第三端,第十一功率开关管的第三端与储能装置的负极、第十二功率开关管的第三端相连。第十二功率开关管的第二端连接到第十功率开关管的第三端,第十二功率开关管的第三端连接到第十一功率开关管的第三端。第三全桥拓扑中的功率开关管的第一端与功率开关管的第一端均为第三全桥拓扑脉冲输入端的正端,第三全桥拓扑中的功率开关管的第一端与功率开关管的第一端均为第三全桥拓扑形脉冲输入端的负端。第三全桥拓扑的脉冲输入端与信号处理单元相连。The third full-bridge topology is composed of four power switch tubes. The connection method is as follows: the second end of the ninth power switch tube is connected to the positive pole of the energy storage device and the second end of the tenth power switch tube, and the ninth power switch tube The third end of the power switch is connected to the second end of the eleventh power switch tube, and both are connected to the same-named end of the primary second winding of the high-frequency transformer. The second end of the tenth power switch tube is connected to the second end of the ninth power switch tube, the third end of the tenth power switch tube is connected to the second end of the twelfth power switch tube, and connected to the high frequency transformer The opposite side of the primary secondary winding. The second end of the eleventh power switch tube is connected to the third end of the ninth power switch tube, the third end of the eleventh power switch tube is connected to the negative pole of the energy storage device, and the third end of the twelfth power switch tube . The second end of the twelfth power switch tube is connected to the third end of the tenth power switch tube, and the third end of the twelfth power switch tube is connected to the third end of the eleventh power switch tube. The first end of the power switch tube in the third full-bridge topology and the first end of the power switch tube are both positive terminals of the pulse input end of the third full-bridge topology, and the first end of the power switch tube in the third full-bridge topology is connected to the first end of the power switch tube. The first ends of the power switch tubes are all negative ends of the pulse input end of the third full-bridge topology. The pulse input end of the third full bridge topology is connected to the signal processing unit.

第四全桥拓扑由四个功率开关管组成,第十三功率开关管的第二端与直流母线的正端、第十四功率开关管的第二端相连,第十三功率开关管的第三端与第十五功率开关管的第二端相连,且连接到高频变压器的次级绕组的同名端。第十四功率开关管的第二端连接到第十三功率开关管的第二端,第十四功率开关管的第三端连接到第十六功率开关管的第二端,且连接到高频变压器的次级绕组的异名端。第十五功率开关管的第二端连接到第十三功率开关管的第三端,第十五功率开关管的第三端连接到第十六功率开关管的第三端。第十六功率开关管的第二端连接到第十四功率开关管的第三端,第十六功率开关管的第三端与第十五功率开关管的第三端、直流母线的负端相连。第四全桥拓扑中的功率开关管的第一端与功率开关管的第一端均为第四全桥拓扑脉冲输入端的正端,第四全桥拓扑中的功率开关管的第一端与功率开关管的第一端均为第四全桥拓扑形脉冲输入端的负端。第四全桥拓扑的脉冲输入端与信号处理单元相连。The fourth full-bridge topology is composed of four power switch tubes, the second end of the thirteenth power switch tube is connected to the positive end of the DC bus and the second end of the fourteenth power switch tube, and the second end of the thirteenth power switch tube is The three terminals are connected to the second terminal of the fifteenth power switch tube, and connected to the terminal with the same name of the secondary winding of the high frequency transformer. The second end of the fourteenth power switch tube is connected to the second end of the thirteenth power switch tube, the third end of the fourteenth power switch tube is connected to the second end of the sixteenth power switch tube, and connected to the high The opposite end of the secondary winding of the frequency transformer. The second end of the fifteenth power switch tube is connected to the third end of the thirteenth power switch tube, and the third end of the fifteenth power switch tube is connected to the third end of the sixteenth power switch tube. The second end of the sixteenth power switch tube is connected to the third end of the fourteenth power switch tube, the third end of the sixteenth power switch tube is connected to the third end of the fifteenth power switch tube, and the negative end of the DC bus connected. The first end of the power switch tube in the fourth full-bridge topology and the first end of the power switch tube are both positive terminals of the pulse input end of the fourth full-bridge topology, and the first end of the power switch tube in the fourth full-bridge topology is connected to the The first ends of the power switch tubes are all negative ends of the pulse input ends of the fourth full-bridge topology. The pulse input end of the fourth full bridge topology is connected to the signal processing unit.

第二电容为铝电解电容或钽电解电容。第二电容值大小与直流母线电压和第三全桥拓扑的输出电流有关。第二电容的电容值第二电容的耐压值为1.2V,其中V为直流母线电压的峰值大小,Vr2为电压纹波的大小,fr2为纹波的频率,I为第三全桥拓扑的输出电流。The second capacitor is an aluminum electrolytic capacitor or a tantalum electrolytic capacitor. The value of the second capacitance is related to the DC bus voltage and the output current of the third full bridge topology. Capacitance value of the second capacitor The withstand voltage value of the second capacitor is 1.2V, where V is the peak value of the DC bus voltage, Vr2 is the magnitude of the voltage ripple, fr2 is the frequency of the ripple, and I is the output current of the third full-bridge topology.

信号处理单元由数字信号处理器、四个驱动芯片组成。数字信号处理器选用具有模数转换功能、定时器、Flash存储器、四个以上PWM发生器(即第一PWM发生器、第二PWM发生器、第三PWM发生器、第四PWM发生器)的微处理器,如TI(德州仪器)公司的TMS320F28xx系列、Microchip(微芯)的DSPICFJ16GS504等。数字信号处理器的Flash存储器存有正弦函数表和固定数值D,D=50%。PWM发生器均具有超前移相控制寄存器、滞后移相控制寄存器、启停控制寄存器。第一PWM发生器与第一驱动芯片相连,根据从正弦函数表获得的正弦函数值向第一驱动芯片输出正弦脉冲即第一脉冲信号;第二PWM发生器与第二驱动芯片相连,根据固定数值D向第二驱动芯片输出第二脉冲信号;第三PWM发生器与第三驱动芯片相连,根据固定数值D向第三驱动芯片输出第三脉冲信号;第四PWM发生器与第四驱动芯片相连,根据固定数值D向第四驱动芯片输出第四脉冲信号。The signal processing unit is composed of a digital signal processor and four driver chips. The digital signal processor selects a digital signal processor with an analog-to-digital conversion function, a timer, a Flash memory, and more than four PWM generators (that is, the first PWM generator, the second PWM generator, the third PWM generator, and the fourth PWM generator). Microprocessors, such as TMS320F28xx series of TI (Texas Instruments), DSPICFJ16GS504 of Microchip, etc. The Flash memory of the digital signal processor has a sine function table and a fixed value D, D = 50%. The PWM generators all have advanced phase-shift control registers, lag phase-shift control registers, and start-stop control registers. The first PWM generator is connected with the first driver chip, and outputs the sinusoidal pulse that is the first pulse signal to the first driver chip according to the sine function value obtained from the sine function table; the second PWM generator is connected with the second driver chip, according to the fixed The value D outputs the second pulse signal to the second driver chip; the third PWM generator is connected to the third driver chip, and outputs the third pulse signal to the third driver chip according to the fixed value D; the fourth PWM generator and the fourth driver chip connected, and output the fourth pulse signal to the fourth driver chip according to the fixed value D.

驱动芯片包括第一驱动芯片、第二驱片、第三驱动芯片和第四驱动芯片。驱动芯片的输出电压、输出电流与驱动芯片所连接的功率开关管门极阈值电压和所需的驱动电流相关,在选取驱动芯片时其输出电压、应大于或等于所连接功率开关管的门极阈值电压;其输出的电流值应大于或等于所连接功率开关管的门极阈值电流。第一驱动芯片与第一PWM发生器和第一全桥拓扑相连,将第一PWM发生器传递过来的第一脉冲信号转换成第一正驱动信号和第一负驱动信号,并将第一正驱动信号传递到第一全桥拓扑脉冲输入端的正端,将第一负驱动信号传递到第一全桥拓扑脉冲输入端的负端。第二驱动芯片与第二PWM发生器和第二全桥拓扑相连,将第二PWM发生器传递过来的第二脉冲信号转换成第二正驱动信号和第二负驱动信号,并将第二正驱动信号传递到第二全桥拓扑脉冲输入端的正端,将第二负驱动信号传递到第二全桥拓扑脉冲输入端的负端。第三驱动芯片与第三PWM发生器和第三全桥拓扑相连,将第三PWM发生器传递过来的第三脉冲信号转换成第三正驱动信号和第三负驱动信号,将第三正驱动信号传递给第三全桥拓扑脉冲输入端的正端,将第三负驱动信号传递给第三全桥拓扑脉冲输入端的负端。第四驱动芯片与第四PWM发生器和第四全桥拓扑相连,将第四PWM发生器传递过来的第四脉冲信号转换成第四正驱动信号和第四负驱动信号,并将第四正驱动信号传递到第四全桥拓扑脉冲输入端的正端,将第四负驱动信号传递到第四全桥拓扑脉冲输入端的负端。The driving chip includes a first driving chip, a second driving chip, a third driving chip and a fourth driving chip. The output voltage and output current of the driver chip are related to the gate threshold voltage of the power switch tube connected to the driver chip and the required drive current. When selecting the driver chip, its output voltage should be greater than or equal to the gate of the connected power switch tube. Threshold voltage; the output current value should be greater than or equal to the gate threshold current of the connected power switch tube. The first drive chip is connected with the first PWM generator and the first full-bridge topology, converts the first pulse signal delivered by the first PWM generator into a first positive drive signal and a first negative drive signal, and converts the first positive drive signal The drive signal is transmitted to the positive terminal of the first full-bridge topology pulse input terminal, and the first negative drive signal is transmitted to the negative terminal of the first full-bridge topology pulse input terminal. The second drive chip is connected with the second PWM generator and the second full-bridge topology, converts the second pulse signal delivered by the second PWM generator into a second positive drive signal and a second negative drive signal, and converts the second positive drive signal The driving signal is transmitted to the positive terminal of the pulse input terminal of the second full-bridge topology, and the second negative driving signal is transmitted to the negative terminal of the pulse input terminal of the second full-bridge topology. The third drive chip is connected with the third PWM generator and the third full-bridge topology, converts the third pulse signal delivered by the third PWM generator into a third positive drive signal and a third negative drive signal, and drives the third positive drive The signal is transmitted to the positive terminal of the pulse input terminal of the third full-bridge topology, and the third negative driving signal is transmitted to the negative terminal of the pulse input terminal of the third full-bridge topology. The fourth drive chip is connected with the fourth PWM generator and the fourth full-bridge topology, converts the fourth pulse signal delivered by the fourth PWM generator into a fourth positive drive signal and a fourth negative drive signal, and converts the fourth positive drive signal The driving signal is transmitted to the positive terminal of the pulse input terminal of the fourth full-bridge topology, and the fourth negative driving signal is transmitted to the negative terminal of the pulse input terminal of the fourth full-bridge topology.

数字信号处理器内装有信号处理软件,信号处理软件的流程为:The digital signal processor is equipped with signal processing software, and the flow of the signal processing software is:

第一步,初始化并判定本发明模块的工作模式:The first step is to initialize and determine the working mode of the module of the present invention:

1.1初始化数字信号处理器的工作频率fg,通过将从正弦函数表获得的正弦函数值赋值给第一PWM发生器的占空比控制寄存器,将第一PWM发生器设定为正弦脉冲即第一脉冲信号输出;通过将固定数值D赋值给第二PWM发生器、第三PWM发生器和第四PWM发生器的占空比控制寄存器,分别将第二PWM发生器设定为固定占空比的第二脉冲信号输出,第三PWM发生器设定为固定占空比的第三脉冲信号输出,第四PWM发生器设定为固定占空比的第四脉冲信号输出。将数值fs赋值给第二PWM发生器、第三PWM发生器和第四PWM发生器的频率控制寄存器,使第二PWM发生器、第三PWM发生器和第四PWM发生器产生脉冲的频率为fs。将固定数值S赋值给定时器,将定时时长设定为TS,其中Ts=S/fg。fg是数字信号处理器的工作频率,S大于1.2Y,Y为信号处理软件流程单次循环所需执行的语句的条数。1.1 Initialize the working frequency fg of the digital signal processor, assign the value of the sine function obtained from the sine function table to the duty ratio control register of the first PWM generator, and set the first PWM generator as a sine pulse, that is, the first PWM generator A pulse signal output; by assigning a fixed value D to the duty cycle control registers of the second PWM generator, the third PWM generator and the fourth PWM generator, the second PWM generator is set to a fixed duty cycle respectively The second pulse signal output, the third PWM generator is set to output the third pulse signal with a fixed duty ratio, and the fourth PWM generator is set to output a fourth pulse signal with a fixed duty ratio. Assign the value fs to the frequency control registers of the second PWM generator, the third PWM generator and the fourth PWM generator, so that the second PWM generator, the third PWM generator and the fourth PWM generator generate the pulse frequency is fs . Assign a fixed value S to the timer, and set the timing duration as TS , where Ts =S/fg . fg is the working frequency of the digital signal processor, S is greater than 1.2Y, and Y is the number of statements to be executed in a single cycle of the signal processing software flow.

1.2初始化定时器为0,定时器开始计时。1.2 Initialize the timer to 0, and the timer starts counting.

1.3数字信号处理器读取由信号调理单元传递过来的电网电压信号、电网电流信号、储能装置电压信号、储能装置电流信号、第一电容电压信号、直流母线电压信号、直流母线电流信号。1.3 The digital signal processor reads the grid voltage signal, grid current signal, energy storage device voltage signal, energy storage device current signal, first capacitor voltage signal, DC bus voltage signal, and DC bus current signal transmitted by the signal conditioning unit.

1.4判断Vmin<Vgrid<Vmax是否成立,其中Vmax为公用电网所允许工作的最大值,Vmin为公用电网所允许工作的最小值,若成立,则本模块工作于并网模式,跳转至第二步。若不成立,则本模块工作于孤岛模式,跳转至第五步。1.4 Judging whether Vmin < Vgrid < Vmax is true, where Vmax is the maximum value allowed by the public grid, and Vmin is the minimum value allowed by the public grid. If it is true, the module works in grid-connected mode. Skip to step two. If not, the module works in the island mode and skips to the fifth step.

第二步,面向直流微电网的三端口直流母线稳压模块工作于并网模式:In the second step, the three-port DC bus voltage stabilization module for DC microgrid works in grid-connected mode:

2.1根据pt=VlineIline-VgridIgrid计算本发明在并网模式下传递能量的大小pt2.1 According to pt =Vline Iline -Vgrid Igrid calculate the size pt of the energy transfer in the grid-connected mode of the present invention.

2.2根据得到第二脉冲信号的移相角度其中L是高频变压器的自身漏感,是一个固定的参数。2.2 According to Get the phase shift angle of the second pulse signal Among them, L is the self-leakage inductance of the high-frequency transformer, which is a fixed parameter.

2.3判断是否成立,若成立,跳转至第三步,若不成立则跳转至第四步。2.3 Judgment Whether it is true, if true, go to the third step, if not, go to the fourth step.

第三步,面向直流微电网的三端口直流母线稳压模块工作于并网馈能模式:In the third step, the three-port DC bus voltage stabilization module for the DC microgrid works in the grid-connected energy feeding mode:

3.1将第二脉冲的移相角度赋值给第二PWM发生器超前移相控制寄存器。3.1 Change the phase shift angle of the second pulse Assigned to the second PWM generator lead phase shift control register.

3.2将1赋值给第一PWM发生器、第二PWM发生器和第四PWM发生器的启停控制寄存器,使第一PWM发生器、第二PWM发生器和第四PWM发生器开始工作。3.2 Assign 1 to the start-stop control registers of the first PWM generator, the second PWM generator and the fourth PWM generator, so that the first PWM generator, the second PWM generator and the fourth PWM generator start working.

3.3判断定时器是否大于TS,若大于则跳转至1.2步,若小于或等于则跳转至3.4步。3.3 Determine whether the timer is greater than TS , if it is greater, jump to step 1.2, if it is less than or equal to it, jump to step 3.4.

3.4定时器继续计时,跳转至3.3。3.4 The timer continues to count, skip to 3.3.

第四步,面向直流微电网的三端口直流母线稳压模块工作在并网下公用电网供能模式。In the fourth step, the three-port DC bus voltage stabilization module for the DC microgrid works in the grid-connected public grid energy supply mode.

4.1将移相角度赋值给第二PWM发生器滞后移相控制寄存器,并将固定移相角赋值给第一PWM发生器的滞后移相控制器。4.1 Change the phase shift angle Assign a value to the second PWM generator hysteresis phase shift control register, and set the fixed phase shift angle Assigned to the hysteretic phase-shift controller of the first PWM generator.

4.2将1赋值给第一PWM发生器、第二PWM发生器和第四PWM发生器的启停控制寄存器,使第一PWM发生器、第二PWM发生器和第四PWM发生器开始工作。4.2 Assign 1 to the start-stop control registers of the first PWM generator, the second PWM generator and the fourth PWM generator, so that the first PWM generator, the second PWM generator and the fourth PWM generator start working.

4.3判断定时器是否大于TS,若大于则跳转至1.2步,若小于或等于则跳转至4.4步。4.3 Judging whether the timer is greater than TS , if it is greater than, then jump to step 1.2, if it is less than or equal to, then jump to step 4.4.

4.4定时器继续计时,跳转至4.3。4.4 The timer continues timing, skip to 4.3.

第五步,面向直流微电网的三端口直流母线稳压模块工作在孤岛模式:In the fifth step, the three-port DC bus regulator module for DC microgrid works in island mode:

5.1根据Pt'=VlineIline-VstorageIstorage计算本发明在孤岛模式下传递能量的大小Pt'。5.1 According to Pt '=Vline Iline -Vstorage Istorage , calculate the size Pt ' of the energy transfer in the island mode of the present invention.

5.2根据得到移相角度5.2 According to get phase shift angle

5.3判断是否成立,若成立,则跳转至第六步;若不成立则跳转至第七步。5.3 Judgment Whether it is true, if true, go to step 6; if not, go to step 7.

第六步,面向直流微电网的三端口直流母线稳压模块工作于孤岛下储能装置供能模式In the sixth step, the three-port DC bus voltage stabilization module for the DC microgrid works in the energy supply mode of the energy storage device under the island

6.1将第三脉冲信号的移相角度赋值给第三PWM发生器超前移相控制寄存器。6.1 Change the phase shift angle of the third pulse signal Assign a value to the third PWM generator leading phase shift control register.

6.2将1赋值给第三PWM发生器、第四PWM发生器的启停控制寄存器,使第三PWM发生器和第四PWM发生器开始工作。6.2 Assign 1 to the start-stop control registers of the third PWM generator and the fourth PWM generator, so that the third PWM generator and the fourth PWM generator start working.

6.3判断定时器是否大于TS,若大于则跳转至1.2步,若小于或等于则跳转至6.4步。6.3 Determine whether the timer is greater than TS , if it is greater, skip to step 1.2, and if it is less than or equal to it, skip to step 6.4.

6.4定时器继续计时,跳转至6.3;6.4 The timer continues to count, jump to 6.3;

第七步,面向直流微电网的三端口直流母线稳压模块工作于孤岛下储能装置储能模式:In the seventh step, the three-port DC bus voltage stabilization module for the DC microgrid works in the energy storage mode of the energy storage device under the island:

7.1将第三脉冲信号的移相角度赋值给第三PWM发生器滞后移相控制寄存器。7.1 Change the phase shift angle of the third pulse signal Assigned to the third PWM generator hysteresis phase shift control register.

7.2将1赋值给第三PWM发生器、第四PWM发生器的启停控制寄存器,使第三PWM发生器和第四PWM发生器开始工作。7.2 Assign 1 to the start-stop control registers of the third PWM generator and the fourth PWM generator, so that the third PWM generator and the fourth PWM generator start working.

7.3判断定时器是否大于TS,若大于则跳转至1.2步,若小于或等于则跳转至7.4步。7.3 Determine whether the timer is greater than TS , if it is greater, jump to step 1.2, if it is less than or equal to it, jump to step 7.4.

7.4定时器继续计时之后跳转至7.3。7.4 Jump to 7.3 after the timer continues to count.

信号处理软件流程为一个死循环,在面向直流微电网三端口稳压模块正常工作时,会一直重复地执行上述流程。The signal processing software process is an endless loop. When the three-port voltage regulator module for DC microgrid is working normally, the above process will be executed repeatedly.

信号调理单元是一个7输入、7输出的商用单元,由1路交流电压检测电路、1路交流电流检测电路、3路直流电压检测电路和2路直流电流检测电路组成。在选用的信号调理单元时,应注意信号调理单元输入电压、电流和输出电压、电流的范围。输入电压的范围应满足:所允许输入的交流电压范围应大于交流信号的峰值,所允许输入的直流电压范围应大于第一直流电压信号、第二直流电压信号、第三直流电压信号的最大值输入电流的范围应满足:所允许输入的交流电流应大于交流电流的峰值,所允许输入的直流电流应大于第二直流电流信号、第三直流电流信号的最大值。输出电压和电流应小于所连接的模-数转换模块(数字信号处理器自带)所允许的输入的电压和电流值。The signal conditioning unit is a commercial unit with 7 inputs and 7 outputs, consisting of 1 AC voltage detection circuit, 1 AC current detection circuit, 3 DC voltage detection circuits and 2 DC current detection circuits. When selecting a signal conditioning unit, attention should be paid to the range of input voltage, current and output voltage and current of the signal conditioning unit. The range of input voltage should meet: the allowable input AC voltage range should be greater than the peak value of the AC signal, and the allowable input DC voltage range should be greater than the maximum value of the first DC voltage signal, the second DC voltage signal, and the third DC voltage signal The range of the input current should satisfy: the allowable input AC current should be greater than the peak value of the AC current, and the allowable input DC current should be greater than the maximum value of the second DC current signal and the third DC current signal. The output voltage and current should be less than the allowable input voltage and current value of the connected analog-to-digital conversion module (included with the digital signal processor).

本发明的工作过程是:Working process of the present invention is:

第一步,信号处理单元中的数字信号处理器读取由信号调理单元传递过来的电网电压信号、电网电流信号、储能装置电压信号、储能装置电流信号、第一电容电压信号、直流母线电压信号、直流母线电流信号。In the first step, the digital signal processor in the signal processing unit reads the grid voltage signal, grid current signal, energy storage device voltage signal, energy storage device current signal, first capacitor voltage signal, DC bus Voltage signal, DC bus current signal.

第二步,初始化定时器为0,定时器开始计时。数字信号处理器中的信号处理软件首先依据Vmin<Vgrid<Vmax是否成立,来判断本模块的工作模式。当Vmin<Vgrid<Vmax成立时,本发明模块运行在并网模式下,执行第三步;当Vmin<Vgrid<Vmax不成立时,本发明模块运行在孤岛模式下,执行第四步。The second step is to initialize the timer to 0, and the timer starts counting. The signal processing software in the digital signal processor first judges the working mode of the module according to whether Vmin < Vgrid < Vmax holds true. When Vmin < Vgrid < Vmax is established, the module of the present invention operates in the grid-connected mode and executes the third step; when Vmin < Vgrid < Vmax does not hold, the module of the present invention operates in the island mode and executes the third step four steps.

第三步,本发明运行于并网模式,根据计算式(1)In the third step, the present invention operates in grid-connected mode, according to calculation formula (1)

计算得到第二脉冲的移相角并判断移相角的正负,若执行3.1步;若执行3.2步。Calculate the phase shift angle of the second pulse And judge the phase shift angle positive or negative, if Execute step 3.1; if Execute step 3.2.

3.1本发明运行于并网馈能模式:3.1 The present invention operates in grid-connected energy feeding mode:

信号处理软件将第二脉冲的移相角度赋值给第二PWM发生器超前移相控制寄存器。将1赋值给第一PWM发生器、第二PWM发生器和第四PWM发生器的启停控制寄存器,使第一PWM发生器、第二PWM发生器和第四PWM发生器开始工作。The signal processing software converts the phase shift angle of the second pulse to Assigned to the second PWM generator lead phase shift control register. 1 is assigned to the start-stop control registers of the first PWM generator, the second PWM generator and the fourth PWM generator, so that the first PWM generator, the second PWM generator and the fourth PWM generator start to work.

第一PWM发生器产生固定占空比的第一脉冲信号,第一驱动芯片将第一PWM发生器传递过来的第一脉冲信号转换成第一正驱动信号和第一负驱动信号,并将第一正驱动信号传递到第一全桥拓扑脉冲输入端的正端,将第一负驱动信号传递到第一全桥拓扑脉冲输入端的负端。第一全桥拓扑工作在整流状态,将公用交流电网传递过来的交流信号转换为整流信号,并将由公用交流电网传递过来的能量传递给第一电容。第一电容将整流信号转换成第一直流电压信号。The first PWM generator generates a first pulse signal with a fixed duty ratio, and the first driver chip converts the first pulse signal delivered by the first PWM generator into a first positive drive signal and a first negative drive signal, and converts the first pulse signal into a first positive drive signal and a first negative drive signal. A positive drive signal is transmitted to the positive terminal of the first full-bridge topology pulse input terminal, and a first negative drive signal is transmitted to the negative terminal of the first full-bridge topology pulse input terminal. The first full-bridge topology works in a rectification state, converts the AC signal transmitted by the public AC grid into a rectified signal, and transmits the energy transmitted by the public AC grid to the first capacitor. The first capacitor converts the rectified signal into a first DC voltage signal.

第二PWM发生器产生固定占空比的第二脉冲信号,第二驱动芯片与第二PWM发生器和第二全桥拓扑相连,将第二PWM发生器传递过来的第二脉冲信号转换成第二正驱动信号和第二负驱动信号,并将第二驱动信号传递到第二全桥拓扑脉冲输入端的正端,将第二负驱动信号传递到第二全桥拓扑脉冲输入端的负端。第二全桥拓扑将第一直流信号转换为频率为fs的第一交流电压方波信号。The second PWM generator generates a second pulse signal with a fixed duty ratio, and the second driver chip is connected to the second PWM generator and the second full-bridge topology, and converts the second pulse signal delivered by the second PWM generator into a first Two positive drive signals and a second negative drive signal, and the second drive signal is delivered to the positive terminal of the second full-bridge topology pulse input terminal, and the second negative drive signal is delivered to the negative terminal of the second full-bridge topology pulse input terminal. The second full-bridge topology converts the first DC signal into a first AC voltage square wave signal with a frequency fs .

第四PWM发生器产生固定占空比的第四脉冲信号,第四驱动芯片与第四PWM发生器和第四全桥拓扑相连,将第四PWM发生器传递过来的第四脉冲信号转换成第四正驱动信号和第四负驱动信号,并将第四正驱动信号传递到第四全桥拓扑脉冲输入端的正端,将第四正驱动信号传递到第四全桥拓扑脉冲输入端的负端。第四全桥拓扑将高频变压器耦合过来的第一交流方波电压信号转换成第三直流电压信号。The fourth PWM generator generates a fourth pulse signal with a fixed duty ratio, and the fourth driver chip is connected to the fourth PWM generator and the fourth full-bridge topology, and converts the fourth pulse signal delivered by the fourth PWM generator into a fourth pulse signal Four positive drive signals and a fourth negative drive signal, and the fourth positive drive signal is delivered to the positive terminal of the fourth full-bridge topology pulse input terminal, and the fourth positive drive signal is delivered to the negative terminal of the fourth full-bridge topology pulse input terminal. The fourth full-bridge topology converts the first AC square-wave voltage signal coupled by the high-frequency transformer into a third DC voltage signal.

由于将移相角赋值给第二PWM发生器的超前移相控制寄存器,因而第二PWM发生器输出的第二脉冲信号的相位超前于第四PWM发生器输出的第四相位脉冲信号度,使第二全桥拓扑将第一全桥拓扑传递过来的能量通过高频变压器传递给第四全桥拓扑,第四全桥拓扑将能量送至直流母线上,转第五步。因而本发明实现了公用交流电网向直流微电网输送能量的过程,补充了直流微电网中能量的不足,从而维持直流母线电压的稳定。Since the phase shift angle Assigned to the advanced phase shift control register of the second PWM generator, so the phase of the second pulse signal output by the second PWM generator is ahead of the fourth phase pulse signal output by the fourth PWM generator degree, so that the second full-bridge topology transfers the energy transferred from the first full-bridge topology to the fourth full-bridge topology through the high-frequency transformer, and the fourth full-bridge topology sends the energy to the DC bus, and then go to the fifth step. Therefore, the present invention realizes the process of transmitting energy from the public AC grid to the DC microgrid, supplements the energy shortage in the DC microgrid, and maintains the stability of the DC bus voltage.

3.2本发明运行于并网下公用电网供能模式:3.2 The present invention operates in the grid-connected public grid energy supply mode:

信号处理软件将移相角度赋值给第二PWM发生器滞后移相控制寄存器,并将固定移相角赋值给第一PWM发生器的滞后移相控制器。将1赋值给第一PWM发生器、第二PWM发生器和第四PWM发生器的启停控制寄存器。使第一PWM发生器、第二PWM发生器和第四PWM发生器开始工作。The signal processing software will phase shift the angle Assign a value to the second PWM generator hysteresis phase shift control register, and set the fixed phase shift angle Assigned to the hysteretic phase-shift controller of the first PWM generator. Assign 1 to the start-stop control registers of the first PWM generator, the second PWM generator and the fourth PWM generator. Make the first PWM generator, the second PWM generator and the fourth PWM generator work.

第一PWM发生器产生固定占空比的第一脉冲信号,第一驱动芯片将第一PWM发生器传递过来的第一脉冲信号转换成第一正驱动信号和第一负驱动信号,并将第一正驱动信号传递到第一全桥拓扑脉冲输入端的正端M1+,将第一负驱动信号传递到第一全桥拓扑脉冲输入端的负端M1-。由于此时将固定移相角赋值给第一PWM发生器的滞后移相控制器,因而第一全桥拓扑工作在逆变状态,将第一电容提供的第一直流电压信号转换成交流电压信号,并将由第二全桥拓扑传递过来的能量传递给公用交流电网。The first PWM generator generates a first pulse signal with a fixed duty ratio, and the first driver chip converts the first pulse signal delivered by the first PWM generator into a first positive drive signal and a first negative drive signal, and converts the first pulse signal into a first positive drive signal and a first negative drive signal. A positive drive signal is transmitted to the positive terminal M1+ of the first full-bridge topology pulse input terminal, and a first negative drive signal is transmitted to the negative terminal M1- of the first full-bridge topology pulse input terminal. Since the phase shift angle will be fixed at this time Assigned to the hysteresis phase-shift controller of the first PWM generator, so the first full-bridge topology works in the inverter state, converting the first DC voltage signal provided by the first capacitor into an AC voltage signal, which will be converted by the second full-bridge topology The transferred energy is transferred to the utility AC grid.

第二PWM发生器产生固定占空比的第二脉冲信号,第二驱动芯片与第二PWM发生器和第二全桥拓扑相连,将第二PWM发生器传递过来的第二脉冲信号转换成第二正驱动信号和第二负驱动信号,并将第二驱动信号传递到第二全桥拓扑脉冲输入端的正端,将第二负驱动信号传递到第二全桥拓扑脉冲输入端的负端。第二全桥拓扑第一直流信号转换为频率为fs的第一交流电压方波信号。The second PWM generator generates a second pulse signal with a fixed duty ratio, and the second driver chip is connected to the second PWM generator and the second full-bridge topology, and converts the second pulse signal delivered by the second PWM generator into a first Two positive drive signals and a second negative drive signal, and the second drive signal is delivered to the positive terminal of the second full-bridge topology pulse input terminal, and the second negative drive signal is delivered to the negative terminal of the second full-bridge topology pulse input terminal. The second full-bridge topology converts the first DC signal into a first AC voltage square wave signal with frequency fs .

第四PWM发生器产生固定占空比的第四脉冲信号,第四驱动芯片与第四PWM发生器和第四全桥拓扑相连,将第四PWM发生器传递过来的第四脉冲信号转换成第四正驱动信号和第四负驱动信号,并将第四正驱动信号传递到第四全桥拓扑脉冲输入端的正端,将第四正驱动信号传递到第四全桥拓扑脉冲输入端的负端。第四全桥拓扑将高频变压器耦合过来的第一交流方波电压信号转换成第三直流电压信号。The fourth PWM generator generates a fourth pulse signal with a fixed duty ratio, and the fourth driver chip is connected to the fourth PWM generator and the fourth full-bridge topology, and converts the fourth pulse signal delivered by the fourth PWM generator into a fourth pulse signal Four positive drive signals and a fourth negative drive signal, and the fourth positive drive signal is delivered to the positive terminal of the fourth full-bridge topology pulse input terminal, and the fourth positive drive signal is delivered to the negative terminal of the fourth full-bridge topology pulse input terminal. The fourth full-bridge topology converts the first AC square-wave voltage signal coupled by the high-frequency transformer into a third DC voltage signal.

由于信号处理软件将移相角赋值给第二PWM发生器的滞后移相控制寄存器,因而第二PWM发生器输出的脉冲信号的相位滞后于第四PWM发生器输出的相位脉冲信号度,使第四全桥拓扑将直流母线传递过来的能量送至高频变压器。高频变压器将能量传递给第二全桥拓扑,转第五步。因而本发明模块实现了直流微电网中的剩余能量馈送到交流电网的过程,从而保证了直流微电网中直流母线的稳定。Since the signal processing software will shift the phase angle Assigned to the hysteresis phase-shift control register of the second PWM generator, so the phase of the pulse signal output by the second PWM generator lags behind the phase pulse signal output by the fourth PWM generator degree, so that the fourth full-bridge topology sends the energy transferred from the DC bus to the high-frequency transformer. The high-frequency transformer transfers energy to the second full-bridge topology, go to step 5. Therefore, the module of the present invention realizes the process of feeding the residual energy in the DC microgrid to the AC grid, thereby ensuring the stability of the DC bus in the DC microgrid.

第四步.本发明运行于孤岛模式,信号处理软件根据式(2)The 4th step. The present invention operates in island mode, and signal processing software is according to formula (2)

计算得到第三脉冲的移相角并判断移相角的正负。若执行4.1步,若执行4.2步。Calculate the phase shift angle of the third pulse And judge the phase shift angle positive or negative. like Execute step 4.1, if Execute step 4.2.

4.1本发明运行于孤岛下储能装置供能模式:4.1 The present invention operates in the energy supply mode of the energy storage device under the island:

信号处理软件将第三脉冲信号的移相角度赋值给第三PWM发生器超前移相控制寄存器。将1赋值给第三PWM发生器、第四PWM发生器的启停控制寄存器,使第三PWM发生器和第四PWM发生器开始工作。The signal processing software converts the phase shift angle of the third pulse signal Assign a value to the third PWM generator leading phase shift control register. 1 is assigned to the start-stop control registers of the third PWM generator and the fourth PWM generator, so that the third PWM generator and the fourth PWM generator start to work.

第三PWM发生器产生固定占空比的第三脉冲信号。第三驱动芯片与第三PWM发生器和第三全桥拓扑相连,将第三PWM发生器传递过来的第三脉冲信号转换成第三正驱动信号和第三负驱动信号,将第三正驱动信号传递给第三全桥拓扑脉冲输入端的正端,将第三负驱动信号传递给第三全桥拓扑脉冲输入端的负端。第三全桥拓扑将储能装置提供的第二直流电压信号转换为频率为fs的第二交流方波信号。高频变压器将第三全桥拓扑传递过来的第二交流电压方波信号耦合到第四全桥拓扑。The third PWM generator generates a third pulse signal with a fixed duty ratio. The third drive chip is connected with the third PWM generator and the third full-bridge topology, converts the third pulse signal delivered by the third PWM generator into a third positive drive signal and a third negative drive signal, and drives the third positive drive The signal is transmitted to the positive terminal of the pulse input terminal of the third full-bridge topology, and the third negative driving signal is transmitted to the negative terminal of the pulse input terminal of the third full-bridge topology. The third full-bridge topology converts the second DC voltage signal provided by the energy storage device into a second AC square wave signal with a frequency fs . The high-frequency transformer couples the second AC voltage square wave signal transferred from the third full-bridge topology to the fourth full-bridge topology.

第四PWM发生器产生固定占空比的第四脉冲信号,第四驱动芯片与第四PWM发生器和第四全桥拓扑相连,将第四PWM发生器传递过来的第四脉冲信号转换成第四正驱动信号和第四负驱动信号,并将第四正驱动信号传递到第四全桥拓扑脉冲输入端的正端,将第四正驱动信号传递到第四全桥拓扑脉冲输入端的负端。第四全桥拓扑将变压器耦合过来的第二交流方波信号转换成第四直流电压信号。The fourth PWM generator generates a fourth pulse signal with a fixed duty ratio, and the fourth driver chip is connected to the fourth PWM generator and the fourth full-bridge topology, and converts the fourth pulse signal delivered by the fourth PWM generator into a fourth pulse signal Four positive drive signals and a fourth negative drive signal, and the fourth positive drive signal is delivered to the positive terminal of the fourth full-bridge topology pulse input terminal, and the fourth positive drive signal is delivered to the negative terminal of the fourth full-bridge topology pulse input terminal. The fourth full-bridge topology converts the second AC square wave signal coupled by the transformer into a fourth DC voltage signal.

由于信号处理软件将移相角度赋值给第三PWM发生器超前移相控制寄存器,使第三PWM发生器输出的脉冲信号的相位超前于第四PWM发生器输出脉冲信号的相位度,从而使得第三全桥拓扑将储能装置提供的能量经由高频变压器传送到第四全桥拓扑。全桥拓扑将高频变压器传送过来的能量输送到直流母线上,转第五步。因而本发明实现储能装置向直流微电网提供能量的过程,补充了直流微电网中能量的不足,从而维持直流母线电压的稳定。Since the signal processing software will phase shift the angle Assign a value to the third PWM generator advance phase shift control register, so that the phase of the pulse signal output by the third PWM generator is ahead of the phase of the output pulse signal of the fourth PWM generator degree, so that the third full-bridge topology transfers the energy provided by the energy storage device to the fourth full-bridge topology via the high-frequency transformer. The full-bridge topology transmits the energy transmitted by the high-frequency transformer to the DC bus, and then go to step 5. Therefore, the present invention realizes the process of the energy storage device providing energy to the DC microgrid, supplements the energy shortage in the DC microgrid, and maintains the stability of the DC bus voltage.

4.2本发明运行于孤岛下储能装置储能模式4.2 The present invention operates in the energy storage mode of the energy storage device under the isolated island

信号处理软件将第三脉冲信号的移相角度赋值给第三PWM发生器超前移相控制寄存器。将1赋值给第三PWM发生器、第四PWM发生器的启停控制寄存器,使第三PWM发生器和第四PWM发生器开始工作。The signal processing software converts the phase shift angle of the third pulse signal Assign a value to the third PWM generator leading phase shift control register. 1 is assigned to the start-stop control registers of the third PWM generator and the fourth PWM generator, so that the third PWM generator and the fourth PWM generator start to work.

第四PWM发生器产生固定占空比的第四脉冲信号,第四驱动芯片与第四PWM发生器和第四全桥拓扑相连,将第四PWM发生器传递过来的第四脉冲信号转换成第四正驱动信号和第四负驱动信号,并将第四正驱动信号传递到第四全桥拓扑脉冲输入端的正端,将第四正驱动信号传递到第四全桥拓扑脉冲输入端的负端。第四全桥拓扑将直流母线传递过来的第四直流电压信号转换为第二交流电压方波信号。The fourth PWM generator generates a fourth pulse signal with a fixed duty ratio, and the fourth driver chip is connected to the fourth PWM generator and the fourth full-bridge topology, and converts the fourth pulse signal delivered by the fourth PWM generator into a fourth pulse signal Four positive drive signals and a fourth negative drive signal, and the fourth positive drive signal is delivered to the positive terminal of the fourth full-bridge topology pulse input terminal, and the fourth positive drive signal is delivered to the negative terminal of the fourth full-bridge topology pulse input terminal. The fourth full-bridge topology converts the fourth DC voltage signal transmitted by the DC bus into a second AC voltage square wave signal.

第三PWM发生器产生固定占空比的第三脉冲信号。第三驱动芯片与第三PWM发生器和第三全桥拓扑相连,将第三PWM发生器传递过来的第三脉冲信号转换成第三正驱动信号和第三负驱动信号,将第三正驱动信号传递给第三全桥拓扑脉冲输入端的正端,将第三负驱动信号传递给第三全桥拓扑脉冲输入端的负端。第三全桥拓扑高频变压器耦合过来的第二交流电压方波信号转换成第二直流电压信号提供给储能装置。The third PWM generator generates a third pulse signal with a fixed duty ratio. The third drive chip is connected with the third PWM generator and the third full-bridge topology, converts the third pulse signal delivered by the third PWM generator into a third positive drive signal and a third negative drive signal, and drives the third positive drive The signal is transmitted to the positive terminal of the pulse input terminal of the third full-bridge topology, and the third negative driving signal is transmitted to the negative terminal of the pulse input terminal of the third full-bridge topology. The second AC voltage square wave signal coupled by the third full-bridge topology high-frequency transformer is converted into a second DC voltage signal and provided to the energy storage device.

由于此时信号处理软件将移相角度赋值给第三PWM发生器滞后移相控制寄存器,使第三PWM发生器输出的第三脉冲信号的相位滞后于第四PWM发生器输出的第四脉冲信号的相位度,从而使得第四全桥拓扑将直流微电网中的剩余能量经由第四全桥拓扑传送到高频变压器。高频变压器将全桥拓扑传送过来的能量输送给第三全桥拓扑,转第五步。第三全桥拓扑将由高频变压器传送过来的能量输送给储能装置.因而本发明模块实现直流微电网向储能装置提供能量的过程,吸收了直流微电网中的剩余能量,从而维持直流母线电压的稳定。Since the signal processing software will shift the phase angle Assign a value to the third PWM generator hysteresis phase-shift control register, so that the phase of the third pulse signal output by the third PWM generator lags behind the phase of the fourth pulse signal output by the fourth PWM generator degree, so that the fourth full-bridge topology transfers the remaining energy in the DC microgrid to the high-frequency transformer via the fourth full-bridge topology. The high-frequency transformer transmits the energy transmitted by the full-bridge topology to the third full-bridge topology, and then go to the fifth step. The third full-bridge topology transmits the energy transmitted by the high-frequency transformer to the energy storage device. Therefore, the module of the present invention realizes the process of the DC microgrid supplying energy to the energy storage device, absorbs the remaining energy in the DC microgrid, and maintains the DC bus voltage stability.

第五步,the fifth step,

信号处理软件判断定时器是否大于Ts,若大于,则跳转至第二步,若小于或等于Ts,定时器继续计时,转第五步。The signal processing software judges whether the timer is greater than Ts , if greater, jumps to the second step, if less than or equal to Ts , the timer continues to count, and goes to the fifth step.

用本发明可以达到以下技术效果:Can reach following technical effect with the present invention:

1.本发明体积小,实现了大电网与直流母线之间的电气隔离。1. The invention has a small volume and realizes the electrical isolation between the large power grid and the DC bus.

在本发明由于第一全桥拓扑、第二全桥拓扑、第三全桥拓扑和第四全桥拓扑,使得高频变压器工作频率非常高,根据变压器感生电势E=4.44fsm(N示匝数,φm主磁通密度最大值)可知在相同的感生电势情况下,频率越高,匝数和主磁通密度越小,也就意味着变压器所需铁芯的体积随之减小,因而本发明体积小。高频变压器实现了本发明模块所连接的大电网与直流母线之间的电气隔离,减少了直流微电网对大电网的冲击。In the present invention, due to the first full-bridge topology, the second full-bridge topology, the third full-bridge topology and the fourth full-bridge topology, the operating frequency of the high-frequency transformer is very high, according to the transformer induced potential E=4.44fsm ( N indicates the number of turns, φm the maximum value of the main magnetic flux density), it can be seen that under the same induced potential, the higher the frequency, the smaller the number of turns and the main magnetic flux density, which means that the volume of the iron core required by the transformer varies with The reduction, so the volume of the present invention is small. The high-frequency transformer realizes electrical isolation between the large power grid connected to the module of the present invention and the DC bus, and reduces the impact of the DC micro-grid on the large power grid.

2.控制简单,能够实现直流微电网并网和孤岛模式之间的无缝切换。2. The control is simple, and it can realize the seamless switching between DC microgrid grid connection and island mode.

本发明通过高频变压器将所连接的用交流电网和储能装置融合在一起。直流微电网在进行模式的切换时,本发明只需根据不同全桥拓扑驱动脉冲之间的相位关系就能控制其本身的功率开关器件来实现运行模式的切换,相比现有的技术方案切换的快速性依赖于地理位置上不同的两套设备之间通信网络的响应速度和稳定,本发明动态响应能力快,能实现直流微电网并网和孤岛模式之间的无缝切换。The invention integrates the connected AC power grid and the energy storage device through the high-frequency transformer. When the DC microgrid is switching modes, the present invention only needs to control its own power switching devices according to the phase relationship between driving pulses of different full-bridge topologies to realize the switching of operating modes. The quickness of the method depends on the response speed and stability of the communication network between two sets of equipment in different geographical locations. The present invention has fast dynamic response capability and can realize seamless switching between grid-connected DC microgrid and island mode.

附图说明Description of drawings

图1是本发明的使用场景示意图。FIG. 1 is a schematic diagram of a usage scenario of the present invention.

图2是信号处理软件流程图。Figure 2 is a flow chart of the signal processing software.

图3是本发明总体逻辑结构图。Fig. 3 is an overall logical structure diagram of the present invention.

图4是本发明中电力电子变换单元内部连接图;电力电子变换单元由第一全桥拓扑100、第二全桥拓扑200、第三全桥拓扑300、高频变压器400、第一电容、第二电容和第四全桥拓扑500组成。Fig. 4 is an internal connection diagram of the power electronic conversion unit in the present invention; the power electronic conversion unit consists of a first full bridge topology 100, a second full bridge topology 200, a third full bridge topology 300, a high frequency transformer 400, a first capacitor, a second full bridge topology The second capacitor and the fourth full bridge topology 500 are composed.

具体实施方式detailed description

本发明可应用于如图1所示的直流微电网中。直流微电网是指由分布式电源14、储能装置12、直流负载15、能量转换装置(本发明131,第一变流装置132,第二变流装置133组成)组成的能够实现自我控制、保护和管理的自治系统,既可以与公用交流电网11并网运行,也可以孤立运行,直流负载15通过变流装置133连接在直流母线16上。分布式电源14通过变流装置132连接在直流母线16上。当直流微电网与公用交流电网11并网运行时,公用交流电网11通过本发明131向直流母线16提供能量以维持直流母线16上电压稳定。当直流微电网孤立运行时,如果分布式电源14通过第一变流装置132传递到直流上的能量大于直流母线16通过第二变流装置133传递给直流负载15所需的能量时,直流母线16通过本发明131向储能装置12提供能量以维持直流母线16上直流电压的稳定。当直流微电网孤立运行时,如果分布式电源14通过变流装置132传递到直流上的能量小于直流母线16通过变流装置133传递给直流负载15所需的能量时,储能装置12通过本发明131向直流母线16提供能量以维持直流母线16上直流电压的稳定。The present invention can be applied to a DC microgrid as shown in FIG. 1 . The DC microgrid refers to a self-controlling, The autonomous system for protection and management can operate in parallel with the public AC grid 11 or in isolation. The DC load 15 is connected to the DC bus 16 through the converter 133 . The distributed power source 14 is connected to the DC bus 16 through the converter device 132 . When the DC microgrid and the public AC grid 11 are running in parallel, the public AC grid 11 provides energy to the DC bus 16 through the present invention 131 to maintain the voltage stability on the DC bus 16 . When the DC microgrid operates in isolation, if the energy transferred by the distributed power source 14 to the DC through the first converter 132 is greater than the energy required by the DC bus 16 to be transferred to the DC load 15 through the second converter 133, the DC bus 16 provides energy to the energy storage device 12 through the present invention 131 to maintain the stability of the DC voltage on the DC bus 16 . When the DC microgrid operates in isolation, if the energy transferred by the distributed power supply 14 to the DC through the converter device 132 is less than the energy required by the DC bus 16 to be transferred to the DC load 15 through the converter device 133, the energy storage device 12 will Invention 131 provides energy to the DC bus 16 to maintain the stability of the DC voltage on the DC bus 16 .

第一步,初始化并判定本发明模块的工作模式:The first step is to initialize and determine the working mode of the module of the present invention:

1.1初始化数字信号处理器的工作频率fg,通过将从正弦函数表获得的正弦函数值赋值给第一PWM发生器的占空比控制寄存器,将第一PWM发生器设定为正弦脉冲即第一脉冲信号输出;通过将固定数值D赋值给第二PWM发生器、第三PWM发生器和第四PWM发生器的占空比控制寄存器,分别将第二PWM发生器设定为固定占空比的第二脉冲信号输出,第三PWM发生器设定为固定占空比的第三脉冲信号输出,第四PWM发生器设定为固定占空比的第四脉冲信号输出。将数值fs赋值给第二PWM发生器、第三PWM发生器和第四PWM发生器的频率控制寄存器,使第二PWM发生器、第三PWM发生器和第四PWM发生器产生脉冲的频率为fs。将固定数值S赋值给定时器,将定时时长设定为Ts,其中Ts=S/fg。fg是数字信号处理器的工作频率,S大于1.2Y,Y为信号处理软件流程单次循环所需执行的语句的条数。1.1 Initialize the working frequency fg of the digital signal processor, assign the value of the sine function obtained from the sine function table to the duty ratio control register of the first PWM generator, and set the first PWM generator as a sine pulse, that is, the first PWM generator A pulse signal output; by assigning a fixed value D to the duty cycle control registers of the second PWM generator, the third PWM generator and the fourth PWM generator, the second PWM generator is set to a fixed duty cycle respectively The second pulse signal output, the third PWM generator is set to output the third pulse signal with a fixed duty ratio, and the fourth PWM generator is set to output a fourth pulse signal with a fixed duty ratio. Assign the value fs to the frequency control registers of the second PWM generator, the third PWM generator and the fourth PWM generator, so that the second PWM generator, the third PWM generator and the fourth PWM generator generate the pulse frequency is fs . Assign a fixed value S to the timer, and set the timing duration as Ts , where Ts =S/fg . fg is the working frequency of the digital signal processor, S is greater than 1.2Y, and Y is the number of statements to be executed in a single cycle of the signal processing software flow.

1.2初始化定时器为0,定时器开始计时。1.2 Initialize the timer to 0, and the timer starts counting.

1.3数字信号处理器读取由信号调理单元700传递过来的电网电压信号Vgrid、电网电流信号Igrid、储能装置电压信号Vstorage、储能装置电流信号Istorage、第一电容电压信号VC、直流母线电压信号Vline、直流母线电流信号Iline1.3 The digital signal processor reads the grid voltage signal Vgrid , the grid current signal Igrid , the energy storage device voltage signal Vstorage , the energy storage device current signal Istorage , and the first capacitor voltage signal VC delivered by the signal conditioning unit 700 , the DC bus voltage signal Vline , and the DC bus current signal Iline .

1.4判断Vmin<Vgrid<Vmax是否成立,其中Vmax为公用电网所允许工作的最大值,Vmin为公用电网所允许工作的最小值,若成立,则本模块工作于并网模式,跳转至第二步。若不成立,则本模块工作于孤岛模式,跳转至第五步。1.4 Judging whether Vmin < Vgrid < Vmax is true, where Vmax is the maximum value allowed by the public grid, and Vmin is the minimum value allowed by the public grid. If it is true, the module works in grid-connected mode. Skip to step two. If not, the module works in the island mode and skips to the fifth step.

第二步,面向直流微电网的三端口直流母线稳压模块工作于并网模式:In the second step, the three-port DC bus voltage stabilization module for DC microgrid works in grid-connected mode:

2.1根据pt=VlineIline-VgridIgrid计算本发明在并网模式下传递能量的大小pt2.1 According to pt =Vline Iline -Vgrid Igrid calculate the size pt of the energy transfer in the grid-connected mode of the present invention.

2.2根据得到第二脉冲信号的移相角度其中L是高频变压器400的自身漏感,是一个固定的参数。2.2 According to Get the phase shift angle of the second pulse signal Wherein L is the leakage inductance of the high frequency transformer 400 itself, which is a fixed parameter.

2.3判断是否成立,若成立,跳转至第三步,若不成立则跳转至第四步。2.3 Judgment Whether it is true, if true, go to the third step, if not, go to the fourth step.

第三步,面向直流微电网的三端口直流母线稳压模块工作于并网馈能模式:In the third step, the three-port DC bus voltage stabilization module for the DC microgrid works in the grid-connected energy feeding mode:

3.1将第二脉冲的移相角度赋值给第二PWM发生器超前移相控制寄存器。3.1 Change the phase shift angle of the second pulse Assigned to the second PWM generator lead phase shift control register.

3.2将1赋值给第一PWM发生器、第二PWM发生器和第四PWM发生器的启停控制寄存器,使第一PWM发生器、第二PWM发生器和第四PWM发生器开始工作。3.2 Assign 1 to the start-stop control registers of the first PWM generator, the second PWM generator and the fourth PWM generator, so that the first PWM generator, the second PWM generator and the fourth PWM generator start working.

3.3判断定时器是否大于Ts,若大于则跳转至1.2步,若小于或等于则跳转至3.4步。3.3 Determine whether the timer is greater than Ts , if it is greater than, jump to step 1.2, if it is less than or equal to, jump to step 3.4.

3.4定时器继续计时,跳转至3.3。3.4 The timer continues to count, skip to 3.3.

第四步,面向直流微电网的三端口直流母线稳压模块工作在并网下公用电网供能模式。In the fourth step, the three-port DC bus voltage stabilization module for the DC microgrid works in the grid-connected public grid energy supply mode.

4.1将移相角度赋值给第二PWM发生器滞后移相控制寄存器,并将固定移相角赋值给第一PWM发生器的滞后移相控制器。4.1 Change the phase shift angle Assign a value to the second PWM generator hysteresis phase shift control register, and set the fixed phase shift angle Assigned to the hysteretic phase-shift controller of the first PWM generator.

4.2将1赋值给第一PWM发生器、第二PWM发生器和第四PWM发生器的启停控制寄存器,使第一PWM发生器、第二PWM发生器和第四PWM发生器开始工作。4.2 Assign 1 to the start-stop control registers of the first PWM generator, the second PWM generator and the fourth PWM generator, so that the first PWM generator, the second PWM generator and the fourth PWM generator start working.

4.3判断定时器是否大于Ts,若大于则跳转至1.2步,若小于或等于则转至4.4步。4.3 Determine whether the timer is greater than Ts , if it is greater than, go to step 1.2, if it is less than or equal to it, go to step 4.4.

4.4定时器继续计时,跳转至4.3。4.4 The timer continues timing, skip to 4.3.

第五步,面向直流微电网的三端口直流母线稳压模块工作在孤岛模式:In the fifth step, the three-port DC bus regulator module for DC microgrid works in island mode:

5.1根据Pt'=VlineIline-VstorageIstorage计算本发明在孤岛模式下传递能量的大小Pt'。5.1 According to Pt '=Vline Iline -Vstorage Istorage , calculate the size Pt ' of the energy transfer in the island mode of the present invention.

5.2根据得到移相角度5.2 According to get phase shift angle

5.3判断是否成立,若成立,则跳转至第六步;若不成立则跳转至第七步。5.3 Judgment Whether it is true, if true, go to step 6; if not, go to step 7.

第六步,面向直流微电网的三端口直流母线稳压模块工作于孤岛下储能装置供能模式In the sixth step, the three-port DC bus voltage stabilization module for the DC microgrid works in the energy supply mode of the energy storage device under the island

6.1将第三脉冲信号的移相角度赋值给第三PWM发生器超前移相控制寄存器。6.1 Change the phase shift angle of the third pulse signal Assign a value to the third PWM generator leading phase shift control register.

6.2将1赋值给第三PWM发生器、第四PWM发生器的启停控制寄存器,使第三PWM发生器和第四PWM发生器开始工作。6.2 Assign 1 to the start-stop control registers of the third PWM generator and the fourth PWM generator, so that the third PWM generator and the fourth PWM generator start working.

6.3判断定时器是否大于Ts,若大于则跳转至1.2步,若小于或等于则跳转至6.4步。6.3 Determine whether the timer is greater than Ts , if it is greater than, jump to step 1.2, if it is less than or equal to, jump to step 6.4.

6.4定时器继续计时,跳转至6.3;6.4 The timer continues to count, jump to 6.3;

第七步,面向直流微电网的三端口直流母线稳压模块工作于孤岛下储能装置储能模式:In the seventh step, the three-port DC bus voltage stabilization module for the DC microgrid works in the energy storage mode of the energy storage device under the island:

7.1将第三脉冲信号的移相角度赋值给第三PWM发生器滞后移相控制寄存器。7.1 Change the phase shift angle of the third pulse signal Assigned to the third PWM generator hysteresis phase shift control register.

7.2将1赋值给第三PWM发生器、第四PWM发生器的启停控制寄存器,使第三PWM发生器和第四PWM发生器开始工作。7.2 Assign 1 to the start-stop control registers of the third PWM generator and the fourth PWM generator, so that the third PWM generator and the fourth PWM generator start working.

7.3判断定时器是否大于Ts,若大于则跳转至1.2步,若小于或等于则跳转至7.4步。7.3 Judging whether the timer is greater than Ts , if greater, then jump to step 1.2, if less than or equal to, then jump to step 7.4.

7.4定时器继续计时之后跳转至7.3。7.4 Jump to 7.3 after the timer continues to count.

信号处理软件流程为一个死循环,在面向直流微电网三端口稳压模块正常工作时,会一直重复地执行上述流程。The signal processing software process is an endless loop. When the three-port voltage regulator module for DC microgrid is working normally, the above process will be executed repeatedly.

图3是本发明总体逻辑结构图。本发明面向直流微电网的直流母线稳压模块由第一拓扑100,第一电容,第一全桥拓扑200、第二全桥拓扑300、高频变压器400、第三全桥拓扑500、第二电容、信号处理单元600和信号调理单元700组成。Fig. 3 is an overall logical structure diagram of the present invention. The DC bus voltage stabilizing module for DC microgrid of the present invention consists of a first topology 100, a first capacitor, a first full bridge topology 200, a second full bridge topology 300, a high frequency transformer 400, a third full bridge topology 500, a second The capacitor, the signal processing unit 600 and the signal conditioning unit 700 are composed.

第一全桥拓扑100由四个功率开关管组成,第一功率开关管S1的第二端与第二功率开关管S2的第二端相连,第一功率开关管S1的第三端连接到第三功率开关管S3的第二端。第二功率开关管S2的第二端既与第一功率开关管S1的第二端相连,又连接到第一电容的正极,第二功率开关管S2的第三端连接到第四功率开关管S4的第二端,并连接到公用交流电网的零线N。第三功率开关管S3的第二端连接到第一功率开关管S1的第三端,并连接到公用交流电网的火线L。第三功率开关管S3的第三端连接到第四功率开关管S4的第三端。第四功率开关管S4的第二端连接到第二功率开关管S2的第三端,第四功率开关管S4的第三端既与第三功率开关管S3的第三端相连,又连接到第一电容的负极。第一全桥拓扑100中的功率开关管S1的第一端与功率开关管S4的第一端均为第一全桥拓扑100脉冲输入端的正端M1+,第一全桥拓扑100中的功率开关管S2的第一端与功率开关管S3的第一端均为第一全桥拓扑100形脉冲输入端的负端M1-。第一全桥拓扑100的脉冲输入端与信号处理单元600相连。The first full bridge topology 100 is composed of four power switch tubes, the second end of the first power switch tube S1 is connected to the second end of the second power switch tube S2, and the third end of the first power switch tube S1 is connected to the second end of the second power switch tube S1. The second terminal of the three power switch tube S3. The second terminal of the second power switch tube S2 is not only connected to the second terminal of the first power switch tube S1, but also connected to the positive pole of the first capacitor, and the third terminal of the second power switch tube S2 is connected to the fourth power switch tube The second end of S4, and connected to the neutral line N of the public AC grid. The second end of the third power switch tube S3 is connected to the third end of the first power switch tube S1 and connected to the live line L of the public AC grid. The third end of the third power switch S3 is connected to the third end of the fourth power switch S4. The second end of the fourth power switch tube S4 is connected to the third end of the second power switch tube S2, and the third end of the fourth power switch tube S4 is not only connected to the third end of the third power switch tube S3, but also connected to The negative terminal of the first capacitor. The first end of the power switch tube S1 in the first full-bridge topology 100 and the first end of the power switch tube S4 are both the positive terminal M1+ of the pulse input end of the first full-bridge topology 100, and the power switch in the first full-bridge topology 100 Both the first terminal of the tube S2 and the first terminal of the power switch tube S3 are the negative terminal M1 − of the pulse input terminal of the first full-bridge topology 100 . The pulse input terminal of the first full bridge topology 100 is connected to the signal processing unit 600 .

第二全桥拓扑200由四个功率开关管组成,第五功率开关管S5的第二端与第一电容的正极、第六功率开关管S6的第二端相连,第五功率开关管S5的第三端与第七功率开关管S7的第二端相连,并连接到高频变压器400的初级第一绕组的同名端。第六功率开关管S6的第二端连接到第五功率开关管S5的第二端,第六功率开关管S6的第三端与第八功率开关管S8的第二端相连,并连接到高频变压器400的初级第一绕组的异名端。第七功率开关管S7的第二端连接到第五功率开关管S5的第三端,第七功率开关管S7的第三端连接到第一电容的负极,并与第八功率开关管S8的第三端相连。第八功率开关管S8的第二端连接到第六功率开关管S6的第三端,第八功率开关管S8的第三端连接到第七功率开关管S7的第三端。第二全桥拓扑200中的功率开关管S5的第一端与功率开关管S8的第一端均为第二全桥拓扑200脉冲输入端的正端M2+,第二全桥拓扑200中的功率开关管S6的第一端与功率开关管S7的第一端均为第二全桥拓扑200形脉冲输入端的负端M2-。第二全桥拓扑200的脉冲输入端与信号处理单元600相连。The second full-bridge topology 200 is composed of four power switch tubes, the second end of the fifth power switch tube S5 is connected to the positive pole of the first capacitor and the second end of the sixth power switch tube S6, and the second end of the fifth power switch tube S5 The third terminal is connected to the second terminal of the seventh power switch tube S7 and connected to the terminal with the same name of the primary first winding of the high frequency transformer 400 . The second end of the sixth power switch tube S6 is connected to the second end of the fifth power switch tube S5, the third end of the sixth power switch tube S6 is connected to the second end of the eighth power switch tube S8, and connected to the high The opposite end of the primary first winding of the frequency transformer 400. The second end of the seventh power switch tube S7 is connected to the third end of the fifth power switch tube S5, the third end of the seventh power switch tube S7 is connected to the negative pole of the first capacitor, and connected to the eighth power switch tube S8 The third end is connected. The second end of the eighth power switch S8 is connected to the third end of the sixth power switch S6, and the third end of the eighth power switch S8 is connected to the third end of the seventh power switch S7. The first end of the power switch tube S5 in the second full bridge topology 200 and the first end of the power switch tube S8 are both the positive terminal M2+ of the pulse input end of the second full bridge topology 200, and the power switch in the second full bridge topology 200 Both the first terminal of the tube S6 and the first terminal of the power switch tube S7 are the negative terminal M2 − of the pulse input terminal of the second full bridge topology 200 . The pulse input terminal of the second full bridge topology 200 is connected to the signal processing unit 600 .

第三全桥拓扑300由四个功率开关管组成,其连接方式是:第九功率开关管S9的第二端与储能装置的正极BAT+、第十功率开关管S10的第二端相连,第九功率开关管S9的第三端连接到第十一功率开关管S11的第二端,并均连接到高频变压器400的初级第二绕组的同名端。第十功率开关管S10的第二端连接到第九功率开关管S9的第二端,第十功率开关管S10的第三端连接到第十二功率开关管S12的第二端,并连接到高频变压器400的初级第二绕组的异名端。第十一功率开关管S11的第二端连接到第九功率开关管S9的第三端,第十一功率开关管S11的第三端与储能装置的负极BAT-、第十二功率开关管S12的第三端相连。第十二功率开关管S12的第二端连接到第十功率开关管S10的第三端,第十二功率开关管S12的第三端连接到第十一功率开关管S11的第三端。第三全桥拓扑300中的功率开关管S9的第一端与功率开关管S12的第一端均为第三全桥拓扑300脉冲输入端的正端M3+,第三全桥拓扑300中的功率开关管S10的第一端与功率开关管S11的第一端均为第三全桥拓扑300形脉冲输入端的负端M3-。第三全桥拓扑300的脉冲输入端与信号处理单元600相连。The third full-bridge topology 300 is composed of four power switch tubes, and its connection mode is as follows: the second end of the ninth power switch tube S9 is connected to the positive pole BAT+ of the energy storage device, and the second end of the tenth power switch tube S10 is connected. The third terminal of the ninth power switch tube S9 is connected to the second terminal of the eleventh power switch tube S11 , and both are connected to the terminal with the same name of the primary second winding of the high frequency transformer 400 . The second end of the tenth power switch tube S10 is connected to the second end of the ninth power switch tube S9, the third end of the tenth power switch tube S10 is connected to the second end of the twelfth power switch tube S12, and connected to The opposite end of the primary secondary winding of the high frequency transformer 400 . The second end of the eleventh power switch tube S11 is connected to the third end of the ninth power switch tube S9, the third end of the eleventh power switch tube S11 is connected to the negative pole BAT- of the energy storage device, and the twelfth power switch tube The third terminal of S12 is connected. The second end of the twelfth power switch S12 is connected to the third end of the tenth power switch S10 , and the third end of the twelfth power switch S12 is connected to the third end of the eleventh power switch S11 . The first end of the power switch tube S9 in the third full-bridge topology 300 and the first end of the power switch tube S12 are both the positive terminal M3+ of the pulse input end of the third full-bridge topology 300 , and the power switch in the third full-bridge topology 300 Both the first terminal of the tube S10 and the first terminal of the power switch tube S11 are the negative terminal M3 − of the pulse input terminal of the third full-bridge topology 300 . The pulse input end of the third full bridge topology 300 is connected to the signal processing unit 600 .

第四全桥拓扑500由四个功率开关管组成,第十三功率开关管S13的第二端与直流母线的正端LINE+、第十四功率开关管S14的第二端相连,第十三功率开关管S13的第三端与第十五功率开关管S15的第二端相连,且连接到高频变压器400的次级绕组的同名端。第十四功率开关管S14的第二端连接到第十三功率开关管S13的第二端,第十四功率开关管S14的第三端连接到第十六功率开关管S16的第二端,且连接到高频变压器400的次级绕组的异名端。第十五功率开关管S15的第二端连接到第十三功率开关管S13的第三端,第十五功率开关管S15的第三端连接到第十六功率开关管S16的第三端。第十六功率开关管S16的第二端连接到第十四功率开关管S14的第三端,第十六功率开关管S16的第三端与第十五功率开关管S15的第三端、直流母线的负端LINE-相连。第四全桥拓扑500中的功率开关管S13的第一端与功率开关管S16的第一端均为第四全桥拓扑500脉冲输入端的正端M4+,第四全桥拓扑500中的功率开关管S14的第一端与功率开关管S15的第一端均为第四全桥拓扑500形脉冲输入端的负端M4-。第四全桥拓扑500的脉冲输入端与信号处理单元600相连。The fourth full-bridge topology 500 is composed of four power switch tubes. The second terminal of the thirteenth power switch tube S13 is connected to the positive terminal LINE+ of the DC bus and the second terminal of the fourteenth power switch tube S14. The third terminal of the switch tube S13 is connected to the second terminal of the fifteenth power switch tube S15 , and is connected to the terminal with the same name of the secondary winding of the high frequency transformer 400 . The second end of the fourteenth power switch tube S14 is connected to the second end of the thirteenth power switch tube S13, the third end of the fourteenth power switch tube S14 is connected to the second end of the sixteenth power switch tube S16, And connected to the opposite terminal of the secondary winding of the high frequency transformer 400 . The second end of the fifteenth power switch S15 is connected to the third end of the thirteenth power switch S13 , and the third end of the fifteenth power switch S15 is connected to the third end of the sixteenth power switch S16 . The second end of the sixteenth power switch tube S16 is connected to the third end of the fourteenth power switch tube S14, and the third end of the sixteenth power switch tube S16 is connected to the third end of the fifteenth power switch tube S15. The negative terminal LINE- of the busbar is connected. The first end of the power switch tube S13 in the fourth full-bridge topology 500 and the first end of the power switch tube S16 are both the positive terminal M4+ of the pulse input end of the fourth full-bridge topology 500, and the power switch in the fourth full-bridge topology 500 Both the first terminal of the tube S14 and the first terminal of the power switch tube S15 are the negative terminal M4- of the pulse input terminal of the fourth full-bridge topology 500 . The pulse input end of the fourth full bridge topology 500 is connected to the signal processing unit 600 .

Claims (9)

1. the three-port DC bus Voltage stabilizing module towards direct-current grid, by live wire L, zero line N is connected with utility alternating current net (11), by energy storage device positive pole BAT+, energy storage device negative pole BAT-is connected with energy storage device (12), by the anode LINE+ of DC bus, the negative terminal LINE-of DC bus is connected with the DC bus (16) in direct-current grid, it is characterized in that three-port DC bus Voltage stabilizing module towards direct-current grid is by Technics of Power Electronic Conversion unit, signal processing unit (600) and signal condition unit (700) composition, Technics of Power Electronic Conversion unit is made up of the first full-bridge topology (100), the first electric capacity, the second electric capacity, the second full-bridge topology (200), the 3rd full-bridge topology (300), high frequency transformer (400), the 4th full-bridge topology (500), first full-bridge topology (100) is connected with the first electric capacity with utility alternating current net (11), the AC signal that utility alternating current net (11) transmits is converted to rectified signal, and rectified signal is exported to the first electric capacity, first electric capacity is connected with the first full-bridge topology (100), the second full-bridge topology (200), the rectified signal that first full-bridge topology (100) transmits is become the first stable d. c. voltage signal, and the first d. c. voltage signal is exported to the second full-bridge topology (200), second full-bridge topology (200) is connected with high frequency transformer (400) with the first electric capacity, first d. c. voltage signal is converted to the first alternating voltage square-wave signal, and the first alternating voltage square-wave signal is transferred to high frequency transformer (400), 3rd full-bridge topology (300) is connected with energy storage device (12), high frequency transformer (400), the second d. c. voltage signal that energy storage device (12) provides is converted to the second alternating voltage square-wave signal, and the second alternating voltage square-wave signal is passed to high frequency transformer (400), high frequency transformer (400) is connected with the 4th full-bridge topology (500) with the second full-bridge topology (200), the 3rd full-bridge topology (300), first alternating voltage square-wave signal is coupled to the input of the 4th full-bridge topology (500), the second alternating voltage square-wave signal is also coupled to the input of the 4th full-bridge topology (500), 4th full-bridge topology (500) is connected with the second electric capacity with high frequency transformer (400), first alternating voltage square-wave signal is become the 3rd d. c. voltage signal and outputs to DC bus, and the second alternating voltage square-wave signal is converted to the 4th d. c. voltage signal exports to DC bus, second electric capacity is connected with DC bus (16) with the 4th full-bridge topology (500), signal condition unit (700) is connected with signal processing unit (600) with utility alternating current net (11), energy storage device (12), the first electric capacity, DC bus (16), by the ac voltage signal (V that utility alternating current net (11) passes overaC) and ac current signal (IaC) nurse one's health into mains voltage signal (V respectivelygrid) and power network current signal (Igrid) deliver to signal processing unit (600), the first d. c. voltage signal (V that first electric capacity is provideddC1) nurse one's health into the first capacitance voltage (Vc) deliver to signal processing unit (600), the second d. c. voltage signal (V that energy storage device (12) is passed overdC2) nurse one's health into energy storage device voltage signal (Vstorage) deliver to signal processing unit (600), the second DC current signal (I of energy storage device (12) will be flow throughdC2) nurse one's health into energy storage device current signal (Istorage) deliver to signal processing unit (600), the 3rd d. c. voltage signal (V that DC bus (16) is provideddC3) nurse one's health into DC bus-bar voltage signal (Vline) deliver to signal processing unit (600), the 3rd DC current signal (I of DC bus (16) will be flow throughdC3) nurse one's health into DC bus current signal (Iline) deliver to signal processing unit (600), signal processing unit (600) is connected with signal condition unit (700), to the mains voltage signal (V that signal condition unit (700) passes over the first full-bridge topology (100), the second full-bridge topology (200), the 3rd full-bridge topology (300), the 4th full-bridge topology (500)grid), power network current signal (Igrid), energy storage device voltage signal (Vstorage), energy storage device current signal (Istorage), the first capacitance voltage signal (Vc), DC bus-bar voltage signal (Vline), DC bus current signal (Iline) process, be the pulse input end that drive pulse signal delivers to the first full-bridge topology (100), the second full-bridge topology (200), the 3rd full-bridge topology (300) and the 4th full-bridge topology (500) by the results conversion after process,
First full-bridge topology (100) is made up of four power switch pipes, second end of the first power switch pipe (S1) is connected with the second end of the second power switch pipe (S2), and the three-terminal link of the first power switch pipe (S1) is to the second end of the 3rd power switch pipe (S3); Second end of the second power switch pipe (S2) was both connected with the second end of the first power switch pipe (S1), be connected to again the positive pole of the first electric capacity, the three-terminal link of the second power switch pipe (S2) to the second end of the 4th power switch pipe (S4), and is connected to the zero line N of utility alternating current net; Second end of the 3rd power switch pipe (S3) is connected to the 3rd end of the first power switch pipe (S1), and is connected to the live wire L of utility alternating current net; The three-terminal link of the 3rd power switch pipe (S3) is to the 3rd end of the 4th power switch pipe (S4); Second end of the 4th power switch pipe (S4) is connected to the 3rd end of the second power switch pipe (S2), 3rd end of the 4th power switch pipe (S4) was both connected with the 3rd end of the 3rd power switch pipe (S3), was connected to again the negative pole of the first electric capacity; The first end of the first power switch pipe (S1) in the first full-bridge topology (100) and the first end of the 4th power switch pipe (S4) are the anode M1+ of the first full-bridge topology (100) pulse input end, and the first end of the second power switch pipe (S2) in the first full-bridge topology (100) and the first end of the 3rd power switch pipe (S3) are the negative terminal M1-of the first full-bridge topology (100) pulse input end; The pulse input end of the first full-bridge topology (100) is connected with signal processing unit (600);
Second full-bridge topology (200) is made up of four power switch pipes, second end of the 5th power switch pipe (S5) is connected with the second end of the positive pole of the first electric capacity, the 6th power switch pipe (S6), 3rd end of the 5th power switch pipe (S5) is connected with the second end of the 7th power switch pipe (S7), and is connected to the Same Name of Ends of elementary first winding of high frequency transformer (400); Second end of the 6th power switch pipe (S6) is connected to the second end of the 5th power switch pipe (S5), 3rd end of the 6th power switch pipe (S6) is connected with the second end of the 8th power switch pipe (S8), and is connected to the different name end of elementary first winding of high frequency transformer (400); Second end of the 7th power switch pipe (S7) is connected to the 3rd end of the 5th power switch pipe (S5), the three-terminal link of the 7th power switch pipe (S7) to the negative pole of the first electric capacity, and is connected with the 3rd end of the 8th power switch pipe (S8); Second end of the 8th power switch pipe (S8) is connected to the 3rd end of the 6th power switch pipe (S6), and the three-terminal link of the 8th power switch pipe (S8) is to the 3rd end of the 7th power switch pipe (S7); The first end of the 5th power switch pipe (S5) in the second full-bridge topology (200) and the first end of the 8th power switch pipe (S8) are the anode (M2+) of the second full-bridge topology (200) pulse input end, and the first end of the 6th power switch pipe (S6) in the second full-bridge topology (200) and the first end of the 7th power switch pipe (S7) are the negative terminal (M2-) of the second full-bridge topology (200) shape pulse input end; The pulse input end of the second full-bridge topology (200) is connected with signal processing unit (600);
3rd full-bridge topology (300) is made up of four power switch pipes, second end of the 9th power switch pipe (S9) is connected with the second end of the positive pole (BAT+) of energy storage device, the tenth power switch pipe (S10), the three-terminal link of the 9th power switch pipe (S9) to the second end of the 11 power switch pipe (S11), and is all connected to the Same Name of Ends of elementary second winding of high frequency transformer (400); Second end of the tenth power switch pipe (S10) is connected to the second end of the 9th power switch pipe (S9), the three-terminal link of the tenth power switch pipe (S10) to the second end of the 12 power switch pipe (S12), and is connected to the different name end of elementary second winding of high frequency transformer (400); Second end of the 11 power switch pipe (S11) is connected to the 3rd end of the 9th power switch pipe (S9), and the 3rd end of the 11 power switch pipe (S11) is connected with the negative pole (BAT-) of energy storage device, the 3rd end of the 12 power switch pipe (S12); Second end of the 12 power switch pipe (S12) is connected to the 3rd end of the tenth power switch pipe (S10), and the three-terminal link of the 12 power switch pipe (S12) is to the 3rd end of the 11 power switch pipe (S11); The first end of the 9th power switch pipe (S9) in 3rd full-bridge topology (300) and the first end of the 12 power switch pipe (S12) are the anode (M3+) of the 3rd full-bridge topology (300) pulse input end, and the first end of the tenth power switch pipe (S10) in the 3rd full-bridge topology (300) and the first end of the 11 power switch pipe (S11) are the negative terminal (M3-) of the 3rd full-bridge topology (300) shape pulse input end; The pulse input end of the 3rd full-bridge topology (300) is connected with signal processing unit (600);
4th full-bridge topology (500) is made up of four power switch pipes, second end of the 13 power switch pipe (S13) is connected with the second end of the anode (LINE+) of DC bus, the 14 power switch pipe (S14), 3rd end of the 13 power switch pipe (S13) is connected with the second end of the 15 power switch pipe (S15), and is connected to the Same Name of Ends of the secondary winding of high frequency transformer (400); Second end of the 14 power switch pipe (S14) is connected to the second end of the 13 power switch pipe (S13), the three-terminal link of the 14 power switch pipe (S14) to the second end of the 16 power switch pipe (S16), and is connected to the different name end of the secondary winding of high frequency transformer (400); Second end of the 15 power switch pipe (S15) is connected to the 3rd end of the 13 power switch pipe (S13), and the three-terminal link of the 15 power switch pipe (S15) is to the 3rd end of the 16 power switch pipe (S16); Second end of the 16 power switch pipe (S16) is connected to the 3rd end of the 14 power switch pipe (S14), and the 3rd end of the 16 power switch pipe (S16) is connected with the 3rd end of the 15 power switch pipe (S15), the negative terminal (LINE-) of DC bus; The first end of the 13 power switch pipe (S13) in 4th full-bridge topology (500) and the first end of the 16 power switch pipe (S16) are the anode (M4+) of the 4th full-bridge topology (500) pulse input end, and the first end of the 14 power switch pipe (S14) in the 4th full-bridge topology (500) and the first end of the 15 power switch pipe (S15) are the negative terminal (M4-) of the 4th full-bridge topology (500) shape pulse input end; The pulse input end of the 4th full-bridge topology (500) is connected with signal processing unit (600);
Signal processing unit (600) is made up of digital signal processor, 4 driving chip, and the microprocessor with analog-digital conversion function, timer, flash storage, more than 4 PWM generator selected by digital signal processor; The flash storage of digital signal processor has table of natural sines and fixed numbers D; PWM generator all has advanced phase shifting control register, delayed phase shifting control register, on off control register; First PWM generator is connected with the first driving chip, exports sine pulse i.e. the first pulse signal according to the sine function obtained from table of natural sines to the first driving chip; Second PWM generator is connected with the second driving chip, exports the second pulse signal according to fixed numbers D to the second driving chip; 3rd PWM generator is connected with the 3rd driving chip, exports the 3rd pulse signal according to fixed numbers D to the 3rd driving chip; 4th PWM generator is connected with four-wheel drive chip, exports the 4th pulse signal according to fixed numbers D to four-wheel drive chip;
Driving chip comprises the first driving chip, second and drives sheet, the 3rd driving chip and four-wheel drive chip; First driving chip is connected with the first full-bridge topology (100) with the first PWM generator, the first pulse signal first PWM generator passed over converts the first positive drive singal and the first negative drive singal to, and the first positive drive singal is delivered to the anode (M1+) of the first full-bridge topology (100) pulse input end, the first negative drive singal is delivered to the negative terminal (M1-) of the first full-bridge topology (100) pulse input end; Second driving chip is connected with the second full-bridge topology (200) with the second PWM generator, the second pulse signal second PWM generator passed over converts the second positive drive singal and the second negative drive singal to, and the second positive drive singal is delivered to the anode (M2+) of the second full-bridge topology (200) pulse input end, the second negative drive singal is delivered to the negative terminal (M2-) of the second full-bridge topology (200) pulse input end; 3rd driving chip is connected with the 3rd full-bridge topology (300) with the 3rd PWM generator, the 3rd pulse signal 3rd PWM generator passed over converts the 3rd positive drive singal and the 3rd negative drive singal to, 3rd positive drive singal is passed to the anode (M3+) of the 3rd full-bridge topology (300) pulse input end, the 3rd negative drive singal is passed to the negative terminal (M3-) of the 3rd full-bridge topology (300) pulse input end; Four-wheel drive chip is connected with the 4th full-bridge topology (500) with the 4th PWM generator, the 4th pulse signal 4th PWM generator passed over converts the 4th positive drive singal and the 4th negative drive singal to, and the 4th positive drive singal is delivered to the anode (M4+) of the 4th full-bridge topology (500) pulse input end, the 4th negative drive singal is delivered to the negative terminal (M4-) of the 4th full-bridge topology (500) pulse input end;
2., as claimed in claim 1 towards the three-port DC bus Voltage stabilizing module of direct-current grid, it is characterized in that the size of voltage signal magnitude in the rectified signal that described first electric capacity exports according to the first full-bridge topology (100) and the size of ripple peak-to-peak value and frequency thereof are chosen; The capacitance of the first electric capacitywherein V1for voltage signal average value, the V of rectified signalr1for size, the f of rectified voltage signal rippler1for the rated power that the size of rectified voltage signal ripple frequency, P are the first full-bridge topology (100), be numerically equal to maximum power and the distributed power source maximum power sum of load in direct-current grid; The withstand voltage 1.2V of the first electric capacity1.
4., as claimed in claim 1 towards the three-port DC bus Voltage stabilizing module of direct-current grid, it is characterized in that the maximum power P of the number of turn of elementary first winding of described high frequency transformer (400), elementary second winding and secondary winding according to the three-port DC bus Voltage stabilizing module towards direct-current grid1, high frequency transformer (400) operating frequency fsand the size of high frequency transformer (400) output voltage and input voltage is determined; The number of turn of elementary first winding of high frequency transformer (400)wherein V2the input voltage of elementary first winding of high frequency transformer, fsfor the operating frequency of high frequency transformer, Bwmagnetic core work intensity, Aefor the effective work area of magnetic core; Secondary winding turnswherein V3the voltage at high frequency transformer (400) secondary winding two ends; The number of turn of elementary second windingwherein V4it is the input voltage of elementary second winding of high frequency transformer; The magnetic core used in high frequency transformer (400) adopts the manganese-zinc ferrite core of ETD type.
The operating frequency f of 1.1 initialize digital signal processorsg, given the Duty ratio control register of the first PWM generator by the sine function assignment that will obtain from table of natural sines, the first PWM generator be set as sine pulse i.e. the first output of pulse signal; By fixed numbers D assignment being given the Duty ratio control register of the second PWM generator, the 3rd PWM generator and the 4th PWM generator, respectively the second PWM generator is set as the second output of pulse signal of fixed duty cycle, 3rd PWM generator is set as the 3rd output of pulse signal of fixed duty cycle, and the 4th PWM generator is set as the 4th output of pulse signal of fixed duty cycle; By numerical value fsassignment gives the frequency control register of the second PWM generator, the 3rd PWM generator and the 4th PWM generator, and the frequency making the second PWM generator, the 3rd PWM generator and the 4th PWM generator produce pulse is fs; By fixed numbers S assignment to timer, timing length is set as Ts, wherein Ts=S/fg; fgbeing the operating frequency of digital signal processor, should estimating the number Y of execute statement needed for signal processing software flow process when arranging, S should be greater than 1.2Y;
7. as claimed in claim 1 towards the three-port DC bus Voltage stabilizing module of direct-current grid, it is characterized in that the scope of described signal condition unit (700) input voltage should meet: institute allows the AC voltage range of input should be greater than AC signal (VaC) peak value, allow input DC voltage range should be greater than the first d. c. voltage signal (VdC1), the second d. c. voltage signal (VdC2), the 3rd d. c. voltage signal (VdC3) maximum; The scope of input current should meet: allow input alternating current should be greater than alternating current (IaC) peak value, allow input direct current should be greater than the second DC current signal (IdC2), the 3rd DC current signal (IdC3) maximum; Output voltage and electric current should be less than the voltage and current value of the input that analog-to-digital conversion module that be connected digital signal processor carries allows.
8., as claimed in claim 1 or 2 towards the three-port DC bus Voltage stabilizing module of direct-current grid, it is characterized in that described first to the 12 power switch pipe is field-effect transistor or insulated gate bipolar transistor IGBT; If power switch pipe selects IGBT power switch pipe, then the first end of power switch pipe is the gate pole of IGBT, and power switch pipe second end is the collector electrode of IGBT, and power switch pipe the 3rd end is the emitter of IGBT; If selection field-effect transistor is power switch pipe, then the first end of power switch pipe is the grid of field-effect transistor, and power switch pipe second end is the drain electrode of field-effect transistor, and power switch pipe the 3rd end is the source electrode of field-effect transistor.
CN201410417518.5A2014-08-222014-08-22A kind of three-port DC bus Voltage stabilizing module towards direct-current gridExpired - Fee RelatedCN104134991B (en)

Priority Applications (1)

Application NumberPriority DateFiling DateTitle
CN201410417518.5ACN104134991B (en)2014-08-222014-08-22A kind of three-port DC bus Voltage stabilizing module towards direct-current grid

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
CN201410417518.5ACN104134991B (en)2014-08-222014-08-22A kind of three-port DC bus Voltage stabilizing module towards direct-current grid

Publications (2)

Publication NumberPublication Date
CN104134991A CN104134991A (en)2014-11-05
CN104134991Btrue CN104134991B (en)2016-03-02

Family

ID=51807567

Family Applications (1)

Application NumberTitlePriority DateFiling Date
CN201410417518.5AExpired - Fee RelatedCN104134991B (en)2014-08-222014-08-22A kind of three-port DC bus Voltage stabilizing module towards direct-current grid

Country Status (1)

CountryLink
CN (1)CN104134991B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
MY181704A (en)*2016-02-052021-01-04Guangdong Oppo Mobile Telecommunications Corp LtdCharge method, adapter and mobile terminal
CN107482917B (en)*2016-06-082020-11-24马小林Integrated three-port power converter
CN109149550B (en)*2018-09-012021-07-13哈尔滨工程大学 A method for realizing electric energy transmission in distribution area with three-port converter as control node
CN117878869B (en)*2024-03-112024-05-28绵阳正能新能源技术有限公司DC voltage stabilization control method of DC micro-grid system

Citations (6)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN102290999A (en)*2011-08-152011-12-21南京航空航天大学Multi-port isolating bidirectional DC-DC (direct current to direct current) converter
US8232669B2 (en)*2006-09-292012-07-31Ford Global Technologies, LlcEnergy conversion system for a vehicle
CN102074952B (en)*2010-12-032013-02-27中国科学院广州能源研究所 An independent microgrid system
CN103199704A (en)*2013-04-192013-07-10深圳市航天新源科技有限公司Three-port DC-DC (direct current) converter topology circuit
CN103490448A (en)*2013-10-122014-01-01东南大学Power generation energy storage device based on cascade H bridge and multiport DC converter
CN103904905A (en)*2014-04-182014-07-02燕山大学 Isolated three-port bidirectional DC/DC converter

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US8232669B2 (en)*2006-09-292012-07-31Ford Global Technologies, LlcEnergy conversion system for a vehicle
CN102074952B (en)*2010-12-032013-02-27中国科学院广州能源研究所 An independent microgrid system
CN102290999A (en)*2011-08-152011-12-21南京航空航天大学Multi-port isolating bidirectional DC-DC (direct current to direct current) converter
CN103199704A (en)*2013-04-192013-07-10深圳市航天新源科技有限公司Three-port DC-DC (direct current) converter topology circuit
CN103490448A (en)*2013-10-122014-01-01东南大学Power generation energy storage device based on cascade H bridge and multiport DC converter
CN103904905A (en)*2014-04-182014-07-02燕山大学 Isolated three-port bidirectional DC/DC converter

Also Published As

Publication numberPublication date
CN104134991A (en)2014-11-05

Similar Documents

PublicationPublication DateTitle
CN107276418B (en)Wide-range soft switching direct current conversion circuit and control method thereof
CN103219878B (en)A kind of capacitor discharging circuit and power inverter
EP3337024B1 (en)Bidirectional resonant conversion circuit and converter
CN101854120B (en) A High Efficiency Multifunctional Flyback Converter
CN203911762U (en)LLC resonance converting device
CN104158400A (en)Modularized high-pressure power supply circuit
CN108173299A (en)Wireless receiving device and use its wireless power transmission device and rectifier
CN104134991B (en)A kind of three-port DC bus Voltage stabilizing module towards direct-current grid
TWI481181B (en)Dc to ac power conversion apparatus and method thereof
CN103647448B (en)Integrated step-down-flyback type high power factor constant current circuit and device
CN102447397A (en)Power supply device
JP2023049712A (en) Control method, control device and control system
US20080123381A1 (en)Inverter Circuit and Control Circuit Thereof
CN104638688A (en)Single-phase uninterrupted power supply circuit and three-phase uninterrupted power supply circuit
CN106026686A (en)Power electronic transformer integrated with energy storage system
CN102122891A (en)Absorption feedback circuit for transformer leakage inductance energy
CN202931197U (en)Flyback converter based on transformer transformation
CN104541443B (en)Rectification circuit and method for nonequilibrium two-phase DC power networks
US12040618B2 (en)Power conversion system including a second circuit being configured to control a current or power such that the current or the power is synchronized with power ripples caused by the AC power supply or the AC load
CN105659483B (en)power supply device
CN208174547U (en)A kind of two-way resonance DC-DC transfer circuit and uninterruptible power supply
CN104218809B (en)A kind of circuit device of integrated power factor correcting and DC-dc conversion
CN206620056U (en)A kind of LLC DC converters of self-driving type synchronous rectification
CN205902179U (en) A high frequency generator circuit
CN107979095A (en)A kind of intelligent industrial drive system of robot

Legal Events

DateCodeTitleDescription
C06Publication
PB01Publication
C10Entry into substantive examination
SE01Entry into force of request for substantive examination
C14Grant of patent or utility model
GR01Patent grant
CF01Termination of patent right due to non-payment of annual fee

Granted publication date:20160302

Termination date:20210822

CF01Termination of patent right due to non-payment of annual fee

[8]ページ先頭

©2009-2025 Movatter.jp