The method for cutting silicon chips that has hollowed membrane structureTechnical field
The present invention relates to a kind of method for cutting silicon chips, relate in particular to a kind of method for cutting silicon chips that has hollowed membrane structure.
Background technology
Along with the development of MEMS processing technology, unit is done less and less, integrated level is done higher and higher, deformable films is done more and more, and removable frame is also done larger and larger, but incident be exactly that the scribing cutting difficulty of chip is increasing.
Conventional wafer dicing cutting method has mechanical scribing patterning method and laser scribing patterning method.Machinery scribing patterning method is to adopt main shaft to drive cutter High Rotation Speed, lowers the temperature, removes white residue with liquid spray cut place simultaneously.Although machine cuts equipment cost is relatively low, spray liquid cognition causes damage to the non-cutting zone hollowed membrane of chip surface or moving structure, and the bad removal of residual white residue, can reduce rate of finished products greatly.Laser scribing patterning method is to utilize the heat energy of laser beam to realize cutting, and the energy exactly laser beam irradiation being discharged during to silicon chip surface melts workpiece and evaporates, then by gas, molten slag is blown away, to reach the object of cutting and carving.Although this laser scribing patterning method is little to the non-cutting zone damage of silicon chip surface, equipment cost is high, and it is residual that surface easily produces region white residue, and efficiency is lower.
Summary of the invention
In order to overcome above-mentioned defect, the invention provides a kind of method for cutting silicon chips that has hollowed membrane structure, reduced and had the hollow out of membrane structure wafer dicing cutting difficulty, the damage of external force to micro-structural while having reduced scribing cutting, the cost that greatly reduces scribing cutting, has improved efficiency simultaneously simultaneously.
The present invention for the technical scheme that solves its technical problem and adopt is: a kind of method for cutting silicon chips that has hollowed membrane structure, adopt the silicon chip that crystal orientation is 100, this silicon slice corrosion go out some have hollowed membrane structure in, in the surrounding of each this hollowed membrane structure, erode away the sliver groove of non-penetrative, then in the another side of the silicon chip corresponding with this sliver groove, apply over against the power of this sliver groove direction described silicon chip is divided, form some single chips.
As preferred version of the present invention, the corrosion depth of described sliver groove is silicon wafer thickness 1/2～2/3.
As preferred version of the present invention, the corrosion angle of described sliver groove is 53.7 °, and this corrosion angle is the angle of a side of this sliver groove and described silicon chip surface.
As preferred version of the present invention, adopt spread sheet device to apply over against the power of this sliver groove direction described silicon chip is divided at the opposite side of silicon chip corresponding to described sliver groove, form some single chips.
The invention has the beneficial effects as follows: this has the method for cutting silicon chips of hollowed membrane structure by the rational Design on Plane of domain, in wet etching micro structural component, the characteristic such as the crystal orientation of silicon chip, wet etching, self termination while utilizing corrosion, directly etching goes out to have the sliver groove of certain depth, the equipment such as recycling spread sheet device, apply small power in crystal orientation direction and just can divide all single chips.Reduced and had the hollow out of membrane structure wafer dicing cutting difficulty, the impact of the silicon residue that has solved general scribing cutting equipment on micro-structural, the damage of external force to micro-structural while having reduced scribing cutting, can improve the stability of rate of finished products and micro-structural greatly; Can batch operation, solved the inefficiency problem of the monolithic cutting of equipment; The cost that greatly reduces scribing cutting, has improved working (machining) efficiency.
Accompanying drawing explanation
Fig. 1 is one of embodiment of the present invention chip manufacturing proces structural representation;
Fig. 2 is two of embodiment of the present invention chip manufacturing proces structural representation;
Fig. 3 is three of embodiment of the present invention chip manufacturing proces structural representation;
Fig. 4 is four of embodiment of the present invention chip manufacturing proces structural representation;
Fig. 5 is five of embodiment of the present invention chip manufacturing proces structural representation;
Fig. 6 is six of embodiment of the present invention chip manufacturing proces structural representation;
Fig. 7 is seven of embodiment of the present invention chip manufacturing proces structural representation;
Fig. 8 is glue unit structure for amplifying schematic diagram described in the embodiment of the present invention.
By reference to the accompanying drawings, make the following instructions:
1---silicon base 2---silicon nitride layer
3---photoresist 4---hollow out glue pattern
5---sliver groove 6---alkali resistant glue
7---blue film
Embodiment
Below in conjunction with accompanying drawing, a preferred embodiment of the present invention is elaborated.But protection scope of the present invention is not limited to following embodiment, the simple equivalence of in every case being done with the present patent application the scope of the claims and description changes and modifies, within all still belonging to patent covering scope of the present invention.
As shown in Figure 1, selecting thickness is that 450 microns, the crystal orientation 4 cun of silicon chips that are 100 are as silicon base 1.
As shown in Figure 2, utilize LPCVD double-sided deposition low stress nitride silicon layer 2 in above-mentioned silicon base 1, these silicon nitride layer 2 thickness are 500 nanometers.
As shown in Figure 3, resist coating 3 on the silicon nitride layer 2 at above-mentioned silicon base 1 back side, utilizes photoetching, developing apparatus, making unit is 1 centimeter square, 2.5 millimeters of square hollow out glue patterns 4, and width is the glue pattern of the sliver groove 5 of 360 microns, glue unit enlarged drawing is shown in Fig. 8.
As Fig. 4, back side dry etching silicon nitride layer 500nm, spills silicon base 1.
As shown in Figure 5, remove photoresist 3, with alkali resistant glue 6, do front silicon nitride layer protection.
Then above-mentioned silicon chip is put into 70 ℃, in 33% KOH solution, soak, corrode, after 8 hours, 5 millimeters of square silicon can be corroded and totally realize the silicon nitride film of hollow out, and as shown in Figure 6, but sliver groove position is because A/F only has 400 microns, so 100 crystal orientation silicon chips have the corrosion angle of 53.7 °, while causing corrosion depth to reach 250 microns of left and right, stop voluntarily, the silicon that also leaves 200 microns of left and right connects.
As shown in Figure 7, at silicon chip back side, stick blue film 7, utilize blade or spread sheet device to apply power at sliver groove place, front, silicon chip just can rupture voluntarily, forms some single chips.