Control circuit and power converterTechnical Field
The present invention relates to the field of power conversion technology for electrical devices, and in particular, to a control circuit and a power converter.
Background
The power conversion technology is an energy (power) processing technology, and a power stage (PowerStage) circuit of a power converter is composed of a power switch tube and an inductor (such as an inductor, a capacitor and the like). The power conversion technology can be divided into four types:
(1) AC-DC Conversion, which converts an AC voltage into a DC voltage of a certain value, is called forward Conversion, and is generally simply referred to as Conversion (Conversion). The most basic, simplest AC-DC conversion is the Rectification (Rectification) that is commonly used;
(2) a DC-DC conversion for converting a DC voltage of a certain value into a DC voltage of another value;
(3) DC-AC conversion, which converts a DC voltage into an AC point of a certain waveform, a certain frequency and a certain voltage, is called inverse transformation, often simply Inversion (Inversion);
(4) and the AC-AC conversion is used for converting alternating current with one waveform, frequency and voltage into alternating current with another waveform, frequency and voltage to realize alternating-alternating voltage and variable frequency (Cyclo-conversion).
However, in any power conversion technique, when the load is light, the output voltage of the power stage circuit has large ripple. When a power converter of the DC-DC conversion technology in the prior art is fully loaded, the power converter usually works in a continuous current mode (CCM for short), and the ripple of the output voltage is small; when the output load of the power converter changes from full load to light load, the power converter usually operates in Discontinuous Current Mode (DCM), and the output voltage has a large ripple. The large ripple may cause the efficiency of the power converter to be reduced and may cause electromagnetic interference (EMI) characteristics to be reduced. In order to reduce the ripple, a commonly used control method is to set a minimum on time (minimum on time) to limit the on time of the power stage circuit at light load, so as to reduce the output ripple.
As shown in fig. 1, a power converter 10 of a DC-DC conversion technology is shown by taking a boost circuit as an example, and the power converter 10 includes a power stage circuit 100 and a control circuit 120. Among them, power stage circuit 100 includes: a voltage input terminal 101, an inductor L, a voltage output terminal 102 and a power switch Q1, wherein the voltage input terminal 101 is used for inputting an input voltage VinOne end of the inductor L is connected to the voltage input terminal 101, and the voltage output terminal 102 is used for inputting an output voltage VoThe voltage output terminal 102 is connected to the other end of the inductor L, the drain of the power switch Q1 is connected to the inductor L, the source of the power switch Q1 is grounded, and the gate of the power switch Q1 receives a control signal BG. In addition, the power converter 10 may further include an input capacitor CinDiode D and output capacitor CoutLoad resistance RLEtc.
The control circuit 120 includes a blanking time circuit 121, a voltage compensation circuit 122, a comparison circuit 123, and a logic control circuit 124. Blanking time circuit 121 controls current feedback signal ILThe current feedback signal ILCharacterizing the current i flowing through the inductance LLDuring blanking time, the blanking time circuit 121 controls the current feedback signal ILIs in an invalid state.
The voltage compensation circuit 122 is based on the output voltage VoIs fed back to the voltage source VfAnd a reference voltage VrefGenerating a voltage compensation signal VcompSaid voltage compensation signal VcompCharacterizing the output voltage VoIs fed back to the voltage source VfAnd a reference voltage VrefThe difference of (a).
A comparison circuit 123 for receiving the voltage compensation signal VcompAnd a current feedback signal ILGenerating a comparison control signal Va. A logic control circuit 124 for controlling the output of the voltage regulator according to the comparison control signal VaAnd a clock signal CLK outputting a control signal BG for controlling the power switch Q1.
In the power stage circuit 100, the conduction of the power switch Q1 during low duty cycle operation is always controlled by the internal clock of the power stage circuit 100, independent of the control circuit 120, so there is a minimum conduction time that limits the operation of the power stage circuit 100 to higher switching frequencies. Also, due to the limitation of settling time, the current cannot be sensed when the pulse is not wide enough.
However, in the prior art, the minimum on time is limited by the blanking time (blanking) of the peak sample, which is difficult to be made smaller, and thus, the ripple cannot be outputted.
Disclosure of Invention
An object of the present invention is to provide a control circuit and a power converter that can obtain a smaller minimum on time at the time of light load and further reduce ripple of an output voltage.
To solve the above technical problem, the present invention provides a control circuit for controlling an output voltage of a power converter to maintain stable, comprising a current sampling circuit, a voltage compensation circuit, a minimum on-time limiting circuit and a comparison circuit, wherein,
the current sampling circuit is used for generating a current feedback signal representing the inductive current in the power stage circuit;
the voltage compensation circuit is connected with the output end of the power level circuit and used for receiving the feedback voltage of the output voltage of the power level circuit and a reference voltage and generating a voltage compensation signal, and the voltage compensation signal represents the difference value of the feedback voltage of the output voltage and the reference voltage;
the minimum on-time limiting circuit is used for generating a ramp voltage signal with a rising slope in inverse proportion to the voltage compensation signal within the on-time of the power switch tube;
the comparison circuit receives the ramp voltage signal, the voltage compensation signal and the current feedback signal and generates a comparison control signal for turning off a power switch tube in the power level circuit;
and in the on-time of the power switch tube, when one of the current feedback signal and the ramp voltage signal reaches the voltage compensation signal, the comparison circuit outputs an effective comparison control signal to turn off the power switch tube so as to keep the output voltage of the power stage circuit stable.
Alternatively to this, the first and second parts may,
when the power switch tube is in a first load state, the current feedback signal is larger than the ramp voltage signal in the blanking time, and the comparison circuit outputs a first comparison signal as the comparison control signal to control the turn-off of the power switch tube;
and in a second load state, the current feedback signal is smaller than the ramp voltage signal in the blanking time, and the comparison circuit outputs a second comparison signal as the comparison control signal to control the turn-off of the power switch tube.
Optionally, the control circuit further includes a blanking time circuit, where the blanking time circuit receives the current feedback signal, and controls the current feedback signal to be in an inactive state in the blanking time period after the power switch tube is turned on.
Optionally, the control circuit further includes a logic control circuit, and the logic control circuit outputs a control signal for controlling the power switching tube according to the comparison control signal and the clock signal; wherein,
the clock signal is used for switching on a power switch tube of the power stage circuit;
the comparison control signal is used for turning off a power switch tube of the power level circuit.
Optionally, the minimum on-time limiting circuit includes an inverter, a second switching tube, a second capacitor, and a current source, where:
the NOT gate is used for generating a second control signal opposite to the control signal of the power switch tube to the second switch tube, so that the second switch tube is turned off to start the minimum on-time limiting circuit to work and output the ramp voltage signal during the on period of the power switch tube; the input end of the NOT gate receives a control signal of the power switch tube;
the grid electrode of the second switch tube is connected with the output end of the NOT gate, the source electrode of the second switch tube is grounded, and the drain electrode of the second switch tube is connected with the comparison circuit;
one end of the second capacitor is connected with the comparison circuit, and the other end of the second capacitor is grounded;
one end of the current source is connected with the comparison circuit, the other end of the current source is grounded, and the current output value of the current source is in inverse proportion to the voltage compensation signal.
Optionally, the current sampling circuit is connected to the source of the power switching tube, and is configured to receive an inductive current signal of the power stage circuit and generate a current feedback signal representing an inductive current in the power stage circuit.
Optionally, the voltage compensation circuit includes a transconductance amplifier and a first capacitor, wherein:
the inverting input end of the transconductance amplifier is connected with the feedback voltage, the non-inverting input end of the transconductance amplifier is connected with the reference voltage, the transconductance amplifier compares and amplifies the feedback voltage and the reference voltage, and the output end of the transconductance amplifier is connected with a compensation circuit comprising a first capacitor so as to output a first voltage compensation signal at the output end of the voltage compensation circuit;
one end of the first capacitor is connected with the output end of the transconductance amplifier, and the other end of the first capacitor is grounded.
Optionally, the voltage compensation circuit includes a transconductance amplifier, a first capacitor, and a subtractor, wherein:
the inverting input end of the transconductance amplifier is connected with the feedback voltage, the non-inverting input end of the transconductance amplifier is connected with the reference voltage, the transconductance amplifier compares and amplifies the feedback voltage and the reference voltage, and the output end of the transconductance amplifier is connected with a compensation circuit comprising a first capacitor so as to output a first voltage compensation signal at the output end of the voltage compensation circuit;
one end of the first capacitor is connected with the output end of the transconductance amplifier, and the other end of the first capacitor is grounded;
the subtracter receives the voltage compensation signal and a triangular wave signal, and outputs a second voltage compensation signal after difference operation is carried out on the voltage compensation signal and the triangular wave signal.
Optionally, the control circuit further includes a voltage sampling circuit, and the voltage sampling circuit receives the output voltage and outputs the output voltage feedback signal.
According to another aspect of the present invention, there is also provided a power converter including the control circuit as described in any one of the above, the power converter being peak current mode control.
Compared with the prior art, the control circuit and the power converter provided by the invention have the following advantages:
in the control circuit and the power converter provided by the invention, when one of the current feedback signal and the ramp voltage signal reaches the voltage compensation signal within the on-time of the power switch tube, the comparison circuit outputs an effective comparison control signal for turning off the power switch tube, so that the output voltage of the power stage circuit is kept stable.
Drawings
FIG. 1 is a circuit diagram of a prior art power converter;
FIG. 2 is a circuit diagram of a power converter according to an embodiment of the present invention;
FIG. 3 is a circuit diagram of a voltage compensation circuit according to another embodiment of the present invention;
FIG. 4 is a circuit diagram of a voltage compensation circuit according to another embodiment of the present invention;
FIG. 5 is a waveform diagram of signals of the power converter in the first load state according to an embodiment of the present invention;
fig. 6 is a waveform diagram of signals of the power converter in the second load state according to an embodiment of the invention.
Detailed Description
In the interest of clarity, not all features of an actual implementation are described. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. It will of course be appreciated that in the development of any such actual embodiment, numerous implementation-specific details must be set forth in order to achieve the developer's specific goals, such as compliance with system-related and business-related constraints, which will vary from one implementation to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking for those of ordinary skill in the art.
The invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
The detailed operation of the present invention is described below with reference to fig. 2, and fig. 2 is a circuit diagram of a power converter according to an embodiment of the present invention. As shown in fig. 2, the power converter 20 includes a power stage circuit 100 and a control circuit 220. In this embodiment, the power stage circuit 100 is a boost circuit of a DC-DC conversion technology, that is, the power stage circuit 100 is used to convert a DC voltage into a DC voltage, and in other embodiments of the present invention, the power stage circuit 100 may also be a conversion circuit of a DC-AC conversion, an AC-DC conversion, and an AC-AC conversion, which can be understood by those skilled in the art and is not described herein again.
Wherein the power stage circuit 100 comprises: voltage input terminal 101, inductor L, voltage output terminal 102 and power switch Q1. Wherein the voltage input terminal 101 is used for inputting an input voltage VinIn the present embodiment, the input voltage VinThe direct current is used for the in and out. One end of the inductor L is connected to the voltage input terminal 101, and the voltage output terminal 102 is used for outputting an output voltage VoSaid output voltage VoThe voltage output terminal 102 is connected to the other end of the inductor L for dc input and output. The drain of the power switch Q1 is connected to the inductor L, the source of the power switch Q1 is grounded, and the gate of the power switch Q1 receives a control signal BG. In addition, the power converter 10 may further include an input capacitor CinDiode D and output capacitor CoutLoad resistance RLAnd the like, which are understood by those skilled in the art, and are not described in detail herein.
The control circuit 220 includes a current sampling circuit 226, a voltage compensation circuit 222, a minimum on-time limit circuit 225, and a comparison circuit 223. The current sampling circuit 226 is used to generate a signal representing the inductive current i in the power stage circuit 100LCurrent feedback signal IL. The inductance current iLFor the current flowing through the inductor L, preferably, the inductor L is a resistorThe hidden time circuit 221 is connected to the source of the power switch transistor Q1 to obtain the current feedback signal IL. In this embodiment, IL＝K1×iLAnd K1 is the first coefficient.
As shown in fig. 2, the current sampling circuit 226 is preferably connected to the source of the power switch Q1 for receiving the inductor current signal of the power stage circuit 100 and generating a signal representing the inductor current i in the power stage circuit 100LCurrent feedback signal IL. Of course, the current sampling circuit 226 is not limited to being connected to the source of the power switch Q1, as long as the current feedback signal I can be generatedLCharacterizing the current i flowing through the inductance LL. Also within the scope of the inventive idea.
In this embodiment, the control circuit 220 further includes a blanking time circuit 221, and the blanking time circuit 221 receives the current feedback signal ILControlling the current feedback signal I during the blanking period after the power switch Q1 is turned onLIs in an invalid state.
The voltage compensation circuit 222 is connected to the output terminal 102 of the power stage circuit 100 for receiving the output voltage V of the power stage circuit 100oIs fed back to the voltage source VfAnd a reference voltage VrefGenerating a voltage compensation signal representing the output voltage VoIs fed back to the voltage source VfAnd a reference voltage VrefThe difference of (a).
Optionally, the control circuit 220 further includes a voltage sampling circuit 227, and the voltage sampling circuit 227 receives the output voltage VoTo detect the feedback voltage VfAnd outputs a feedback voltage Vf. The voltage sampling circuit 227 may include a first resistor R1And a second resistor R2The first resistor R1Is connected to the voltage output terminal 102, the first resistor R1Is connected with the second resistor R at the other end2Of said second resistor R, said second resistor R2The other end of the first resistor R is grounded, and the first resistor R1And the other end of the second resistor R and the second resistor R2Is connected to the voltage compensation circuit 222 to output the feedback voltage V to the voltage compensation circuit 222f. Of course, the voltage sampling circuit 227 is not limited to the above-described structure as long as the feedback voltage V can be detectedfAnd (4) finishing.
In this embodiment, as shown in fig. 2, the voltage compensation circuit 222 includes: transconductance amplifier gm and first capacitor C1And a subtractor 2221. The inverting input terminal of the transconductance amplifier gm is connected to the feedback voltage VfThe same-phase input terminal is connected with a reference voltage VrefSaid transconductance amplifier gm coupling said feedback voltage VfAnd a reference voltage VrefComparing and amplifying, the output end of the transconductance amplifier gm outputs a compensation difference signal Vcomp. The output termination of the transconductance amplifier gm comprises a first capacitor C1To output a second voltage compensation signal V at an output terminal of the voltage compensation circuit 222comp-Vslope. The first capacitor C1Is connected to the output of the transconductance amplifier gm, the first capacitor C1The other end of the first and second electrodes is grounded; the subtracter receives the compensation difference signal VcompAnd a triangular wave signal VslopeThe compensated difference signal V iscompAnd a triangular wave signal VslopeAfter the difference operation is carried out, the second voltage compensation signal V is outputcomp-Vslope. The triangular wave signal VslopeThe voltage compensation signal is enabled to drop during the on-time of the power switch Q1, so that the on-time of the power switch Q1 can be shortened. In this embodiment, the second voltage compensation signal Vcomp-VslopeAs the voltage compensation signal.
The voltage compensation circuit 222 is not limited to the above structure, as shown in fig. 3, and in another embodiment of the present invention, the voltage compensation circuit 322 may further include: transconductance amplifier gm and first capacitor C1. The above-mentionedThe inverting input terminal of the transconductance amplifier gm is connected to the feedback voltage VfThe same-phase input terminal is connected with a reference voltage VrefSaid transconductance amplifier gm coupling said feedback voltage VfAnd a reference voltage VrefComparing and amplifying, the output end of the transconductance amplifier gm outputs a compensation difference signal Vcomp. The output termination of the transconductance amplifier gm comprises a first capacitor C1To output a first voltage compensation signal V at an output terminal of the voltage compensation circuit 222compThe first voltage compensation signal is the compensation difference signal Vcomp. The first capacitor C1Is connected to the output of the transconductance amplifier gm, the first capacitor C1And the other end of the same is grounded. In another embodiment of the present invention, the first voltage compensation signal is used as the voltage compensation signal.
As another example, as shown in fig. 4, in a further embodiment of the present invention, the voltage compensation circuit 422 may further include: error amplifier EA and third capacitor C3Said third capacitance C3And the compensation circuit is connected between the inverting input end and the output end of the error amplifier EA, so that the compensation circuit is formed. The inverting input end of the error amplifier EA is connected with the feedback voltage VfThe same-phase input terminal is connected with a reference voltage VrefSaid error amplifier EA couples said feedback voltage VfAnd a reference voltage VrefComparing and amplifying, and outputting a compensation difference signal V from the output end of the error amplifier EAcompThe first voltage compensation signal is the compensation difference signal VcompIn yet another embodiment of the present invention, the first voltage compensation signal is used as the voltage compensation signal. Of course, it is also possible to connect a subtractor at the output of the error amplifier EA, said subtractor receiving the compensated difference signal VcompAnd a triangular wave signal VslopeThe compensated difference signal V iscompAnd a triangular wave signal VslopeAfter the difference operation is carried out, the second voltage compensation signal V is outputcomp-Vslope. In light of the above description of the invention, this is within the skill of the artAs will be appreciated by the skilled person, no further description is provided herein.
The minimum on-time limiting circuit 225 is used for generating a ramp voltage signal V with a rising slope in inverse proportion to the voltage compensation signal during the on-time of the power switch Q1ramp. As shown in fig. 2, in this embodiment, the minimum on-time limiting circuit 225 includes an inverter 2251 and a second switch Q2A second capacitor C2And a current source 2252. The not gate 2251 is configured to generate a second control signal to the second switch Q opposite to the control signal GB of the power switch Q12So that the second switch tube Q1 is turned on2Is turned off to start the minimum on-time limiting circuit 225 to work and output the ramp voltage signal Vramp(ii) a The input end of the not gate 2251 receives the control signal GB of the power switch Q1; grid Q of the second switch tube2The output end of the not gate 2251 is connected to the source Q of the second switch tube2Ground, the second switching tube Q2Is connected to the comparison circuit 223; the second capacitor C2Is connected to the comparison circuit 223, the second capacitor C2The other end of the first and second electrodes is grounded; one end of the current source 2252 is connected to the comparator 223, the other end of the current source 2252 is connected to ground, and the current output value I of the current source 22521Inversely proportional to the first voltage compensation signal.
When the first power switch tube Q1 is turned on, the second switch tube Q2Non-conductive, the current source 2252 couples the second capacitor C2Charging so that the ramp voltage signal VrampRising; when the first power switch tube Q1 is not conducting, the second switch tube Q2On, the current source 2252 and the second capacitor C2Short circuit, the ramp voltage signal VrampAnd maintained unchanged.
Preferably, the output voltage V is within the conduction period of the first power switch Q1oIs fed back to the voltage source VfAnd a reference voltage VrefDifference value V ofcompAnd the output current I of the current source 22521In inverse ratio, I1＝K2/VcompAnd K2 is the second coefficient. Output current I of the current source 22521Is not limited to the above disclosure as long as the output current I1When the first power switch Q1 is turned on, the ramp voltage signal VrampRises and makes the ramp voltage signal V rise when the load is lightrampThe voltage compensation signal is reached first.
The comparison circuit 223 receives the ramp voltage signal VrampVoltage compensation signal and current feedback signal I processed by the blanking time circuit 221LThe comparison control signal Va is generated to turn off the power switch Q1 in the power stage circuit 100. During the conduction time of the power switch tube Q1, when the current feedback signal ILAnd the ramp voltage signal VrampWhen one of the two signals reaches the voltage compensation signal, the comparison circuit 223 outputs an effective comparison control signal Va to turn off the power switch Q1, so that the output voltage V of the power stage circuit 100oAnd maintaining the stability.
Preferably, the control circuit 220 further includes a logic control circuit 224, and the logic control circuit 224 outputs a control signal BG for controlling the power switch Q1 according to the comparison control signal Va and the clock signal CLK; the clock signal CLK is used to turn on a power switch Q1 of the power stage circuit 100; the comparison control signal Va is used to turn off the power switch Q1 of the power stage circuit 100. As shown in fig. 2, the logic control circuit 224 may be an RS flip-flop or the like.
In this embodiment, when the control circuit 220 is in operation, the comparison circuit 123 is configured to apply the ramp voltage signal VrampAnd a current feedback signal I processed by the blanking time circuit 221LRespectively with said second voltage compensation signal Vcomp-VslopeAnd (3) comparison:
as the ramp voltage signal VrampAnd a current feedback signal I processed by the blanking time circuit 221LHave not reached the second voltage compensation signal Vcomp-VslopeThe comparison control signal Va controls the logic control circuit 224 to generate the inactive control signal BG;
as the ramp voltage signal VrampUp to the second voltage compensation signal Vcomp-VslopeOr the current feedback signal I processed by the blanking time circuit 221LUp to the second voltage compensation signal Vcomp-VslopeThe comparison control signal Va controls the logic control circuit 224 to generate the active control signal BG, and the power switch turns off Q1.
Referring to fig. 5, the power stage circuit 100 is in a first load state for a period of time (time t)1Time t2) At the beginning, i.e. at time t1Within the blanking time blanking, the blanking time circuit 221 controls the current feedback signal ILAnd (6) blanking. The first power switch Q1 is conducted, and the conduction time t of the first power switch Q1 ison_1’Inner, the ramp voltage signal VrampAnd a current feedback signal ILAll rise, the current feedback signal ILIs greater than the ramp voltage signal VrampAfter the blanking time interval blanking, the blanking time circuit 221 does not feed back the current feedback signal ILAnd (6) blanking. At time t4Said current feedback signal ILFirst reaching the second voltage compensation signal Vcomp-VslopeThe comparison circuit 223 outputs a first comparison signal as the comparison control signal Va to control the turn-off of the power switch Q1. After the first power switch Q1 is turned off, the power switch G2 is turned on, and the second switch G2 is turned on for a time ton_2’Inner, the ramp voltage signal VrampThe low voltage is kept unchanged.
Referring to fig. 6, the power stage circuit 100 is in the second load state (light load state, load in the second load state is smaller than load in the first load state), and in one time period (time t)1Time t2) At the beginning, i.e. at time t1Within the blanking time blanking, the blanking time circuit 221 controls the current feedback signal ILAnd (6) blanking. The first power switch Q1 is conducted, and the conduction time t of the first power switch Q1 ison_1Inner, the ramp voltage signal VrampAnd a current feedback signal ILAll rise, the ramp voltage signal VrampIs greater than the current feedback signal ILAfter the blanking time interval blanking, at time t3Said ramp voltage signal VrampFirst reaching the second voltage compensation signal Vcomp-VslopeThe comparison circuit 223 outputs a second comparison signal as the comparison control signal Va to control the turn-off of the power switch Q1, so that the minimum on-time of the first power switch Q1 is not limited by the blanking time, and the ripple of the output voltage can be further reduced. After the first power switch Q1 is turned off, the power switch G2 is turned on, and the second switch G2 is turned on for a time ton_2Inner, the ramp voltage signal VrampThe low voltage is kept unchanged.
In this embodiment, the ramp voltage signal V may be generated by adjusting the values of the first coefficient K1 and the second coefficient K2rampAnd a current feedback signal ILThe variation of (c) meets the requirements.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.