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CN104009628B - Voltage converter - Google Patents

Voltage converter
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CN104009628B
CN104009628BCN201310057304.7ACN201310057304ACN104009628BCN 104009628 BCN104009628 BCN 104009628BCN 201310057304 ACN201310057304 ACN 201310057304ACN 104009628 BCN104009628 BCN 104009628B
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voltage
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pressure converter
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CN104009628A (en
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林宝全
陈利杰
周宏哲
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Excelliance Mos Corp
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Excelliance Mos Corp
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Abstract

Translated fromChinese

本发明提供一种电压转换器,包括固定导通时间信号产生器、第一晶体管、第二晶体管、电感以及涟波注入电路。固定导通时间信号产生器产生第一驱动信号以及第二驱动信号。涟波注入电路接收输出信号产生涟波注入信号。其中,固定导通时间信号产生器依据涟波注入信号、输出信号以及参考信号以产生第一及第二驱动信号。

The present invention provides a voltage converter, comprising a fixed on-time signal generator, a first transistor, a second transistor, an inductor and a ripple injection circuit. The fixed on-time signal generator generates a first drive signal and a second drive signal. The ripple injection circuit receives an output signal to generate a ripple injection signal. The fixed on-time signal generator generates the first and second drive signals according to the ripple injection signal, the output signal and a reference signal.

Description

Translated fromChinese
电压转换器voltage converter

技术领域technical field

本发明是有关于一种电压转换器,且特别是有关于一种产生稳定涟波输出信号的降压式电压转换器。The present invention relates to a voltage converter, and more particularly to a buck voltage converter that generates a stable ripple output signal.

背景技术Background technique

请参照图1A,图1A为现有的电压转换器100的示意图。电压转换器100包括驱动器110、逻辑运算电路120、比较器CMP1、晶体管M1、M2、电感L1、电容C1以及电阻R1及R2。在电压转换器100中,比较器CMP1通过比较参考信号REF以及反馈信号VFB的比较结果,依序通过逻辑运算电路120以及驱动器110来产生驱动信号DRV1以及DRV2。另外,晶体管M1接收电源电压VIN。Please refer to FIG. 1A , which is a schematic diagram of a conventional voltage converter 100 . The voltage converter 100 includes a driver 110 , a logic operation circuit 120 , a comparator CMP1 , transistors M1 , M2 , an inductor L1 , a capacitor C1 , and resistors R1 and R2 . In the voltage converter 100 , the comparator CMP1 generates the driving signals DRV1 and DRV2 through the logical operation circuit 120 and the driver 110 by comparing the comparison results of the reference signal REF and the feedback signal VFB. In addition, the transistor M1 receives the power voltage VIN.

在电压转换器100中,当比较器CMP1比较出反馈电压VFB低于参考电压REF时,晶体管M1依据驱动信号DRV1来导通一段时间,并使降压输出电压VOUT对应上升,之后晶体管M1依据驱动信号DRV1断开而晶体管M2依据驱动信号DRV2导通,而降压输出电压VOUT又下降直到反馈电压VFB再次低于参考电压REF时,晶体管M1再依据驱动信号DRV1来导通一段时间。In the voltage converter 100, when the feedback voltage VFB is lower than the reference voltage REF compared by the comparator CMP1, the transistor M1 is turned on for a period of time according to the driving signal DRV1, and the step-down output voltage VOUT rises correspondingly, and then the transistor M1 is driven according to the The signal DRV1 is turned off and the transistor M2 is turned on according to the driving signal DRV2, and the step-down output voltage VOUT drops again until the feedback voltage VFB is lower than the reference voltage REF again, and the transistor M1 is turned on for a period of time according to the driving signal DRV1.

在当电容C1的等效串联电阻ESR太低时,请参照图1B,图1B为电压转换器100的动作波形图。其中的反馈电压VFB上的涟波部分将会很不明显,并致使降压输出电压VOUT上的涟波现象呈现很不稳定的状态,而降低了降压输出电压VOUT的品质。When the equivalent series resistance ESR of the capacitor C1 is too low, please refer to FIG. 1B , which is an operation waveform diagram of the voltage converter 100 . The ripple on the feedback voltage VFB will be very inconspicuous, which will cause the ripple on the buck output voltage VOUT to be in a very unstable state, thereby degrading the quality of the buck output voltage VOUT.

发明内容Contents of the invention

本发明提供一种电压转换器,有效产生具有稳定涟波的输出信号。The present invention provides a voltage converter to efficiently generate an output signal with stable ripple.

本发明提出一种电压转换器,包括固定导通时间信号产生器、第一晶体管、第二晶体管、电感以及涟波注入电路。固定导通时间信号产生器产生第一驱动信号以及第二驱动信号。第一晶体管,具有第一端、第二端以及控制端,其第一端接收电源电压,其控制端接收第一驱动信号。第二晶体管,具有第一端、第二端以及控制端,第二晶体管的第一端耦接第一晶体管的第二端,第二晶体管的控制端接收第二驱动信号,第二晶体管的第二端耦接至参考接地电压。电感串接在第一晶体管的第二端与电压转换器的输出端间。电压转换器的输出端上产生输出信号。涟波注入电路接收输出信号产生涟波注入信号。其中,固定导通时间信号产生器依据涟波注入信号、输出信号以及参考信号以产生第一及第二驱动信号。The present invention provides a voltage converter, which includes a constant on-time signal generator, a first transistor, a second transistor, an inductor, and a ripple injection circuit. The constant on-time signal generator generates a first driving signal and a second driving signal. The first transistor has a first terminal, a second terminal and a control terminal, the first terminal of which receives the power supply voltage, and the control terminal of which receives the first driving signal. The second transistor has a first terminal, a second terminal and a control terminal, the first terminal of the second transistor is coupled to the second terminal of the first transistor, the control terminal of the second transistor receives the second driving signal, and the first terminal of the second transistor receives the second driving signal. The two terminals are coupled to the reference ground voltage. The inductor is connected in series between the second terminal of the first transistor and the output terminal of the voltage converter. An output signal is generated at the output of the voltage converter. The ripple injection circuit receives the output signal and generates a ripple injection signal. Wherein, the constant on-time signal generator generates the first and second driving signals according to the ripple injection signal, the output signal and the reference signal.

在本发明的一实施例中,上述的涟波注入电路依据涟波部分以产生斜波电流,并依据斜波电流来产生斜波电压。In an embodiment of the present invention, the above-mentioned ripple injection circuit generates a ramp current according to the ripple portion, and generates a ramp voltage according to the ramp current.

在本发明的一实施例中,上述的涟波注入电路包括转导放大器以及电容。转导放大器的一输入端接收输出信号,另一输入端接收参考接地电压,其输出端产生斜波电流。电容的第一端耦接转导放大器的输出端及固定导通时间信号产生器,其第二端耦接至参考接地电压,电容接收该斜波电流并在其第一端产生斜波电压。In an embodiment of the present invention, the above-mentioned ripple injection circuit includes a transconductance amplifier and a capacitor. One input terminal of the transconductance amplifier receives the output signal, the other input terminal receives the reference ground voltage, and its output terminal generates a ramp current. The first end of the capacitor is coupled to the output end of the transconductance amplifier and the constant on-time signal generator, and the second end is coupled to the reference ground voltage. The capacitor receives the ramp current and generates a ramp voltage at its first end.

在本发明的一实施例中,上述的涟波注入电路还包括重置开关。重置开关与电容并连耦接,重置开关依据控制信号以导通或断开。In an embodiment of the present invention, the above-mentioned ripple injection circuit further includes a reset switch. The reset switch is coupled in parallel with the capacitor, and the reset switch is turned on or off according to the control signal.

在发明的一实施例中,上述的固定导通时间信号产生器加成输出信号以及斜波电压以产生反馈信号。固定导通时间信号产生器并依据比较反馈信号以及参考信号以产生第一及第二驱动信号。In an embodiment of the invention, the above-mentioned fixed on-time signal generator adds the output signal and the ramp voltage to generate the feedback signal. The constant on-time signal generator generates the first and second driving signals according to the comparison feedback signal and the reference signal.

在本发明的一实施例中,上述的固定导通时间信号产生器包括加法器以及比较器。加法器针对输出信号以及斜波电压进行加法运算以产生反馈信号。比较器接收反馈信号以及参考信号。比较器并依据比较反馈信号以及参考信号来产生比较结果。其中,固定导通时间信号产生器依据比较结果来产生第一及第二驱动信号。In an embodiment of the present invention, the above constant on-time signal generator includes an adder and a comparator. The adder performs addition operation on the output signal and the ramp voltage to generate the feedback signal. The comparator receives the feedback signal and the reference signal. The comparator generates a comparison result according to the comparison feedback signal and the reference signal. Wherein, the constant on-time signal generator generates the first and second driving signals according to the comparison result.

在发明的一实施例中,上述的固定导通时间信号产生器还包括逻辑运算电路以及驱动器。逻辑运算电路耦接比较器的输出端。逻辑运算电路接收并针对比较结果以进行逻辑运算。驱动器耦接逻辑运算电路,接收并依据逻辑运算电路所进行的逻辑运算的运算结果来产生第一及第二驱动信号。In an embodiment of the invention, the above-mentioned constant on-time signal generator further includes a logic operation circuit and a driver. The logic operation circuit is coupled to the output terminal of the comparator. The logical operation circuit receives and performs logical operation on the comparison result. The driver is coupled to the logic operation circuit, receives and generates the first and second driving signals according to the operation result of the logic operation performed by the logic operation circuit.

在发明的一实施例中,上述的固定导通时间信号产生器加成参考信号以及斜波电压以产生反馈信号。固定导通时间信号产生器并依据比较反馈信号以及输出信号以产生第一及第二驱动信号。In an embodiment of the invention, the above-mentioned constant on-time signal generator adds the reference signal and the ramp voltage to generate the feedback signal. The constant on-time signal generator generates the first and second driving signals according to the comparison feedback signal and the output signal.

在发明的一实施例中,上述的固定导通时间信号产生器包括加法器以及比较器。加法器针对参考信号以及斜波电压进行加法运算以产生反馈信号。比较器接收反馈信号以及输出信号。比较器并依据比较反馈信号以及输出信号来产生比较结果。其中,固定导通时间信号产生器依据比较结果来产生第一及第二驱动信号。In an embodiment of the invention, the above constant on-time signal generator includes an adder and a comparator. The adder performs addition operation on the reference signal and the ramp voltage to generate the feedback signal. The comparator receives a feedback signal and an output signal. The comparator generates a comparison result according to the comparison feedback signal and the output signal. Wherein, the constant on-time signal generator generates the first and second driving signals according to the comparison result.

在发明的一实施例中,上述的固定导通时间信号产生器还包括逻辑运算电路和驱动器。逻辑运算电路耦接比较器的输出端。逻辑运算电路接收并针对比较结果以进行逻辑运算。驱动器耦接逻辑运算电路,接收并依据逻辑运算电路所进行的逻辑运算的运算结果来产生第一及第二驱动信号。In an embodiment of the invention, the above-mentioned constant on-time signal generator further includes a logic operation circuit and a driver. The logic operation circuit is coupled to the output terminal of the comparator. The logical operation circuit receives and performs logical operation on the comparison result. The driver is coupled to the logic operation circuit, receives and generates the first and second driving signals according to the operation result of the logic operation performed by the logic operation circuit.

在发明的一实施例中,电压转换器还包括输出电容。输出电容的一端耦接至电压转换器的输出端,其另一端耦接至参考接地电压。其中,输出电容为低等效串联电阻的电容。In an embodiment of the invention, the voltage converter further includes an output capacitor. One end of the output capacitor is coupled to the output end of the voltage converter, and the other end is coupled to the reference ground voltage. Wherein, the output capacitor is a capacitor with low equivalent series resistance.

在发明的一实施例中,电压转换器还包括分压电路。分压电路耦接在涟波注入电路耦接输出信号的路径间。In an embodiment of the invention, the voltage converter further includes a voltage dividing circuit. The voltage divider circuit is coupled between the paths where the ripple injection circuit is coupled to the output signal.

在发明的一实施例中,上述的分压电路包括第一电阻以及第二电阻。第一电阻的一端耦接至电压转换器的输出端,其另一端耦接至涟波注入电路。第二电阻的一端耦接至第一电阻及电压转换器的输出端,其另一端耦接至参考接地电压。In an embodiment of the invention, the above voltage dividing circuit includes a first resistor and a second resistor. One end of the first resistor is coupled to the output end of the voltage converter, and the other end is coupled to the ripple injection circuit. One end of the second resistor is coupled to the first resistor and the output end of the voltage converter, and the other end is coupled to the reference ground voltage.

为让本发明的上述特征和优点能更明显易懂,下文特举实施例,并配合附图作详细说明如下。In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail with reference to the accompanying drawings.

附图说明Description of drawings

图1A为现有的电压转换器100的示意图;FIG. 1A is a schematic diagram of a conventional voltage converter 100;

图1B为电压转换器100的动作波形图;FIG. 1B is an action waveform diagram of the voltage converter 100;

图2为本发明一实施例的电压转换器200的示意图;FIG. 2 is a schematic diagram of a voltage converter 200 according to an embodiment of the present invention;

图3A为本发明另一实施例的电压转换器300的示意图;FIG. 3A is a schematic diagram of a voltage converter 300 according to another embodiment of the present invention;

图3B为本发明实施例的电压转换器300的波形图;FIG. 3B is a waveform diagram of a voltage converter 300 according to an embodiment of the present invention;

图4A为本发明另一实施例的电压转换器400的示意图;FIG. 4A is a schematic diagram of a voltage converter 400 according to another embodiment of the present invention;

图4B为本发明实施例的电压转换器400的波形图。FIG. 4B is a waveform diagram of the voltage converter 400 according to the embodiment of the present invention.

附图标记说明:Explanation of reference signs:

100、200、300、400:电压转换器;100, 200, 300, 400: voltage converter;

110、311、411:驱动器;110, 311, 411: drive;

120、312、412:逻辑运算电路;120, 312, 412: logic operation circuit;

CMP1:比较器;CMP1: comparator;

210、310、410:固定导通时间信号产生器;210, 310, 410: constant on-time signal generators;

220、320、420:涟波注入电路;220, 320, 420: ripple injection circuit;

313、413:加法器;313, 413: adder;

330、430:分压电路;330, 430: voltage divider circuit;

M1、M2:晶体管;M1, M2: transistors;

L1:电感;L1: inductance;

C1、C2、C3:电容;C1, C2, C3: capacitance;

VIN:电源电压;VIN: supply voltage;

DRV1、DRV2:驱动信号;DRV1, DRV2: drive signal;

GND:参考接地电压;GND: reference ground voltage;

OT:输出端;OT: output terminal;

VOUT:输出信号;VOUT: output signal;

REF:参考信号;REF: reference signal;

VFB:反馈电压;VFB: feedback voltage;

ESR:等效串联电阻;ESR: equivalent series resistance;

OTA:转导放大器;OTA: transduction amplifier;

IRMP:斜波电流;IRMP: ramp current;

VRMP:斜波电压;VRMP: ramp voltage;

CTRL:控制信号;CTRL: control signal;

SW1:重置开关;SW1: reset switch;

R1、R2:电阻100:电子装置。R1, R2: resistance 100: electronic device.

具体实施方式detailed description

请参照图2,图2为本发明一实施例的电压转换器200的示意图。电压转换器200为一种降压式电压转换器,包括固定导通时间信号产生器210、涟波注入电路220、晶体管M1及M2、电感L1以及电容C2。固定导通时间信号产生器210用来产生驱动信号DRV1以及驱动信号DRV2。晶体管M1具有第一端、第二端以及控制端,晶体管M1的第一端接收电源电压VIN,晶体管M1的控制端接收驱动信号DRV1以导通或断开。晶体管M2具有第一端、第二端以及控制端,晶体管M2的第一端耦接晶体管M1的第二端,晶体管M2的控制端接收驱动信号DRV2以导通或断开,晶体管M2的第二端耦接至参考接地电压GND。附带一提的,输出电容C2(未示出)串接在输出端OT以及参考接地电压GND间。输出电容C2可以是低等效串联电阻(effectiveseries resistance,ESR)的电容。Please refer to FIG. 2 , which is a schematic diagram of a voltage converter 200 according to an embodiment of the present invention. The voltage converter 200 is a step-down voltage converter, including a constant on-time signal generator 210 , a ripple injection circuit 220 , transistors M1 and M2 , an inductor L1 and a capacitor C2 . The constant on-time signal generator 210 is used to generate the driving signal DRV1 and the driving signal DRV2 . The transistor M1 has a first terminal, a second terminal and a control terminal. The first terminal of the transistor M1 receives the power voltage VIN, and the control terminal of the transistor M1 receives the driving signal DRV1 to be turned on or off. The transistor M2 has a first terminal, a second terminal and a control terminal. The first terminal of the transistor M2 is coupled to the second terminal of the transistor M1. The control terminal of the transistor M2 receives the driving signal DRV2 to turn on or off. The second terminal of the transistor M2 terminal is coupled to the reference ground voltage GND. Incidentally, the output capacitor C2 (not shown) is connected in series between the output terminal OT and the reference ground voltage GND. The output capacitor C2 may be a capacitor with a low effective series resistance (ESR).

电感L1串接在晶体管M1的第二端与电压转换器200的输出端OT间,电压转换器200的输出端OT上产生输出信号VOUT。涟波注入电路220则耦接至输出信号VOUT,以采集输出信号VOUT的涟波部分。其中,固定导通时间信号产生器210依据涟波注入电路220所采集的涟波部分、输出信号VOUT以及参考信号REF以产生驱动信号DRV1及DRV2。The inductor L1 is connected in series between the second terminal of the transistor M1 and the output terminal OT of the voltage converter 200 , and the output terminal OT of the voltage converter 200 generates an output signal VOUT. The ripple injection circuit 220 is coupled to the output signal VOUT to collect the ripple portion of the output signal VOUT. Wherein, the constant on-time signal generator 210 generates the driving signals DRV1 and DRV2 according to the ripple part collected by the ripple injection circuit 220 , the output signal VOUT and the reference signal REF.

具体说明,在本实施例中,涟波注入电路220采集输出信号VOUT的电压产生涟波注入信号至固定导通时间信号产生器210中。固定导通时间信号产生器210则同时依据输出信号VOUT、参考信号REF以及涟波注入信号来产生驱动信号DRV1及DRV2。举例来说,固定导通时间信号产生器210可针对输出信号VOUT及涟波注入信号进行加成,并把加成的结果与参考信号REF进行比较,再依据比较的结果来产生驱动信号DRV1及DRV2。或者,固定导通时间信号产生器210也可针对参考信号REF及依据输出信号VOUT所产生的涟波注入信号进行加成,并把加成的结果与输出信号VOUT进行比较,再依据比较的结果来产生驱动信号DRV1及DRV2。Specifically, in this embodiment, the ripple injection circuit 220 collects the voltage of the output signal VOUT to generate a ripple injection signal to the constant on-time signal generator 210 . The constant on-time signal generator 210 simultaneously generates the driving signals DRV1 and DRV2 according to the output signal VOUT, the reference signal REF and the ripple injection signal. For example, the constant on-time signal generator 210 can add the output signal VOUT and the ripple injection signal, compare the added result with the reference signal REF, and then generate the driving signal DRV1 and DRV2. Alternatively, the fixed on-time signal generator 210 may also perform addition on the reference signal REF and the ripple injection signal generated according to the output signal VOUT, and compare the addition result with the output signal VOUT, and then based on the comparison result to generate driving signals DRV1 and DRV2.

值得注意的是,通过依据输出信号VOUT的涟波部分来产生驱动信号DRV1及DRV2,在输出电容C2为低等效串联电阻的电容时,依据输出信号VOUT所产生的涟波注入信号也可以被加强以产生驱动信号DRV1及DRV2。如此一来,电压转换器200可以产生具有稳定涟波的输出信号VOUT。It should be noted that by generating the driving signals DRV1 and DRV2 according to the ripple portion of the output signal VOUT, when the output capacitor C2 is a capacitor with a low ESR, the ripple injection signal generated according to the output signal VOUT can also be injected Enhanced to generate drive signals DRV1 and DRV2. In this way, the voltage converter 200 can generate the output signal VOUT with stable ripples.

以下请参照图3A,图3A为本发明另一实施例的电压转换器300的示意图。电压转换器300包括固定导通时间信号产生器310、涟波注入电路320、分压电路330、晶体管M1及M2、电感L1以及电容C1。Please refer to FIG. 3A below. FIG. 3A is a schematic diagram of a voltage converter 300 according to another embodiment of the present invention. The voltage converter 300 includes a constant on-time signal generator 310 , a ripple injection circuit 320 , a voltage divider circuit 330 , transistors M1 and M2 , an inductor L1 and a capacitor C1 .

涟波注入电路320包括转导放大器OTA、电容C3以及重置开关SW1。转导放大器OTA的一输入端接收依据输出信号VOUT进行分压所产生的分压电压DVOUT,转导放大器OTA的另一输入端接收参考接地电压GND,转导放大器OTA的输出端产生斜波电流IRMP。也就是说,涟波注入电路320中的转导放大器OTA通过采集输出信号VOUT的涟波部分,并转换所采集的涟波部分为斜波电流IRMP。电容C3耦接转导放大器OTA的输出端以接收斜波电流IRMP以进行充电,并藉以产生斜波电压VRMP。The ripple injection circuit 320 includes a transconductance amplifier OTA, a capacitor C3 and a reset switch SW1. One input terminal of the transconductance amplifier OTA receives the divided voltage DVOUT generated by dividing the voltage according to the output signal VOUT, the other input terminal of the transconductance amplifier OTA receives the reference ground voltage GND, and the output terminal of the transconductance amplifier OTA generates a ramp current IRMP. That is to say, the transconductance amplifier OTA in the ripple injection circuit 320 collects the ripple part of the output signal VOUT, and converts the collected ripple part into the ramp current IRMP. The capacitor C3 is coupled to the output terminal of the transconductance amplifier OTA to receive the ramp current IRMP for charging, thereby generating the ramp voltage VRMP.

附带一提的,重置开关SW1的一端耦接至转导放大器OTA的输出端,其另一端则耦接至参考接地电压GND。重置开关SW1依据控制信号CTRL以导通或断开,并且,当重置开关SW1依据控制信号CTRL而导通时,电容C3中的电荷可以通过导通的重置开关SW1进行放电,并使电容C3的两端的电压差在接收下一次斜波电流IRMP前,可以保持等于零伏特。由于输出信号VOUT的涟波部分是周期性产生的,因此斜波电流IRMP也对应为周期性的被产生,也因此,重置开关SW1的导通及断开动作,也会周期性的交互发生。Incidentally, one terminal of the reset switch SW1 is coupled to the output terminal of the transconductance amplifier OTA, and the other terminal is coupled to the reference ground voltage GND. The reset switch SW1 is turned on or off according to the control signal CTRL, and when the reset switch SW1 is turned on according to the control signal CTRL, the charge in the capacitor C3 can be discharged through the turned on reset switch SW1, and the The voltage difference across the capacitor C3 can remain equal to zero volts before receiving the next ramp current IRMP. Since the ripple part of the output signal VOUT is periodically generated, the ramp current IRMP is also generated periodically, and therefore, the on and off actions of the reset switch SW1 will also occur periodically and alternately. .

在本实施例中,固定导通时间信号产生器310包括驱动器311、逻辑运算电路312、加法器313以及比较器CMP1。加法器313接收来自电容C3的斜波电压VRMP以及分压电压DVOUT以进行电压加成的动作,并据以产生反馈电压VFB。比较器CMP1则针对反馈电压VFB以及参考信号REF进行比对,并将比较结果传送至逻辑运算电路312。逻辑运算电路312针对比较器CMP1所产生的比较结果进行逻辑运算,并将逻辑运算传送至驱动器311。驱动器311耦接逻辑运算电路312,接收并依据逻辑运算的运算结果来产生驱动信号DRV1及DRV2。In this embodiment, the constant on-time signal generator 310 includes a driver 311 , a logic operation circuit 312 , an adder 313 and a comparator CMP1 . The adder 313 receives the ramp voltage VRMP and the divided voltage DVOUT from the capacitor C3 to perform voltage addition, and generates a feedback voltage VFB accordingly. The comparator CMP1 compares the feedback voltage VFB and the reference signal REF, and transmits the comparison result to the logic operation circuit 312 . The logic operation circuit 312 performs a logic operation on the comparison result generated by the comparator CMP1 , and transmits the logic operation to the driver 311 . The driver 311 is coupled to the logic operation circuit 312 , receives and generates the driving signals DRV1 and DRV2 according to the operation result of the logic operation.

在此,逻辑运算电路312以及驱动器311的动作细节,为本领域技术人员所熟知的技术,在此恕不多赘述。Here, the operation details of the logic operation circuit 312 and the driver 311 are well-known technologies by those skilled in the art, and will not be repeated here.

此外,本实施例中的涟波注入电路320并非直接接收输出信号VOUT,而是接收通过分压电路330依据输出信号VOUT来进行分压所产生的分压电压DVOUT来进行涟波部分的采集动作。在此,分压电路330包括电阻R1及R2。电阻R1的一端耦接至电压转换器300的输出端OT,其另一端耦接至涟波注入电路320。电阻R2的一端耦接至电阻R1及电压转换器300的输出端OT,其另一端耦接至参考接地电压GND。In addition, the ripple injection circuit 320 in this embodiment does not receive the output signal VOUT directly, but receives the divided voltage DVOUT generated by dividing the voltage according to the output signal VOUT by the voltage divider circuit 330 to collect the ripple part. . Here, the voltage dividing circuit 330 includes resistors R1 and R2. One end of the resistor R1 is coupled to the output terminal OT of the voltage converter 300 , and the other end is coupled to the ripple injection circuit 320 . One end of the resistor R2 is coupled to the resistor R1 and the output terminal OT of the voltage converter 300 , and the other end is coupled to the reference ground voltage GND.

以下请参照图3B,图3B为本发明实施例的电压转换器300的波形图。由图3B可以清楚发现,电压转换器300所产生的降压输出电压VOUT可具有稳定的涟波。Please refer to FIG. 3B below. FIG. 3B is a waveform diagram of the voltage converter 300 according to an embodiment of the present invention. It can be clearly found from FIG. 3B that the buck output voltage VOUT generated by the voltage converter 300 can have a stable ripple.

以下请参照图4A,图4A为本发明另一实施例的电压转换器400的示意图。电压转换器300包括固定导通时间信号产生器410、涟波注入电路420、分压电路430、晶体管M1及M2、电感L1以及电容C1。与图3A的实施例不相同的,加法器413针对参考信号REF以及斜波电压VRMP进行加成,并产生反馈电压VFB。比较器CMP1再针对反馈电压VFB以及分压电压DVOUT进行比较,并将比较结果传送至逻辑运算电路412,使逻辑运算电路412可据以产生驱动信号DRV1及DRV2。Please refer to FIG. 4A below. FIG. 4A is a schematic diagram of a voltage converter 400 according to another embodiment of the present invention. The voltage converter 300 includes a constant on-time signal generator 410 , a ripple injection circuit 420 , a voltage divider circuit 430 , transistors M1 and M2 , an inductor L1 and a capacitor C1 . Different from the embodiment in FIG. 3A , the adder 413 adds the reference signal REF and the ramp voltage VRMP to generate the feedback voltage VFB. The comparator CMP1 then compares the feedback voltage VFB and the divided voltage DVOUT, and transmits the comparison result to the logic operation circuit 412 so that the logic operation circuit 412 can generate the driving signals DRV1 and DRV2 accordingly.

以下请参照图4B,图4B为本发明实施例的电压转换器400的波形图。由图4B可以清楚发现,电压转换器400所产生的降压输出电压VOUT同样可具有稳定的涟波。Please refer to FIG. 4B below. FIG. 4B is a waveform diagram of the voltage converter 400 according to an embodiment of the present invention. It can be clearly found from FIG. 4B that the step-down output voltage VOUT generated by the voltage converter 400 can also have a stable ripple.

综上所述,本发明通过采集输出信号的涟波部分,来使固定导通时间信号产生器依据涟波部分、输出信号以及预设的参考信号来产生驱动信号,并进以控制电压转换器中的晶体管的切换动作。如此一来,电压转换器便可产生具有稳定涟波的降压输出电压。In summary, the present invention enables the fixed on-time signal generator to generate a driving signal according to the ripple part, the output signal and a preset reference signal by collecting the ripple part of the output signal, and further controls the voltage converter. switching action of the transistor. In this way, the voltage converter can generate a buck output voltage with stable ripple.

最后应说明的是:以上各实施例仅用以说明本发明的技术方案,而非对其限制;尽管参照前述各实施例对本发明进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分或者全部技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present invention, rather than limiting them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: It is still possible to modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the technical solutions of the various embodiments of the present invention. scope.

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