CN103869105A - General type test board - Google Patents
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- CN103869105A CN103869105ACN201210532534.XACN201210532534ACN103869105ACN 103869105 ACN103869105 ACN 103869105ACN 201210532534 ACN201210532534 ACN 201210532534ACN 103869105 ACN103869105 ACN 103869105A
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Abstract
Translated fromChineseDescription
Translated fromChinese技术领域technical field
本发明涉及晶圆可靠性测试领域，特别是涉及一种通用型测试板。The invention relates to the field of wafer reliability testing, in particular to a universal testing board.
背景技术Background technique
现有各芯片生产商在芯片正式量产前，为了向客户保证所使用芯片的ESD及Latch up性能,需要对已封装的芯片的进行ESD（Electro-Static discharge）及Latch up等各项测试。测试通常需要通过测试机台来进行，即将放置有待测芯片的测试板放置在测试机台上，随后通过测试机台提供的电源、时钟信号等来对待测芯片的性能进行测试。Existing chip manufacturers need to conduct ESD (Electro-Static discharge) and Latch up tests on the packaged chips in order to ensure the ESD and Latch up performance of the chips used before the official mass production of the chips. The test usually needs to be carried out by a test machine, that is, the test board with the chip to be tested is placed on the test machine, and then the performance of the chip to be tested is tested through the power supply, clock signal, etc. provided by the test machine.
如图1a及1b所示，其中，图1a为测试机台的俯视图，图1b为放置有封装类型为PDIP64的待测芯片2a的测试板1a俯视图。该测试机台表面设置有组合成圆形的32根条状连接件，每一连接件上有8个插孔，总计有256个插孔。相应地，图1b所示的测试板1a的背面设置有组合成圆形的256个插针，以便能与图1a所示的测试机台对接，而该测试板1a的正面设置有多组供插设PDIP64型芯片的插孔组，将PDIP64型芯片2的64个引脚插设在相应的插孔中，并将该测试板1a插接在测试机台上，就可对芯片进行测试。如图1b所示，该测试板1a上插接有4个PDIP64型芯片2a。而若需要对封装类型为BGA144的芯片进行测试时，则需要更换如图1c所示的测试板1b，该测试板的背面与图1b所示的测试板的背面相同，其正面设有与芯片对接的144个焊盘，将BGA144的芯片与该测试板的焊盘对接，如图1c所示，测试板1b的正中央接设有一BGA144待测芯片2b，将该测试板1b插接在测试机台后，即可对BGA144待测芯片2b的性能进行测试。As shown in FIGS. 1 a and 1 b , wherein FIG. 1 a is a top view of a test machine, and FIG. 1 b is a top view of a test board 1 a on which a chip 2 a to be tested is placed in a PDIP64 package. The surface of the test machine is provided with 32 strip connectors combined into a circle, each connector has 8 jacks, and there are 256 jacks in total. Correspondingly, the back side of the test board 1a shown in Figure 1b is provided with 256 pins combined into a circle, so as to be able to dock with the test machine shown in Figure 1a, and the front side of the test board 1a is provided with multiple sets of supply pins. Insert the jack group of the PDIP64 type chip, insert the 64 pins of the
由上所述可见，现有芯片测试中，由于一种测试板只能接设一种封装类型的芯片，不同芯片的测试需要更换测试板，由于测试板背面的插针过多，更换测试板的操作需要小心谨慎，稍有不慎容易使测试板背面的插针折断，进而使测试无法进行；而且测试板的价格昂贵，不利于芯片生产商降低成本。It can be seen from the above that in the existing chip test, since one test board can only be connected with one package type of chip, the test of different chips needs to replace the test board, because there are too many pins on the back of the test board, the replacement test board The operation needs to be cautious, and the pins on the back of the test board may be easily broken if a little carelessness, so that the test cannot be carried out; and the price of the test board is expensive, which is not conducive to reducing the cost of the chip manufacturer.
发明内容Contents of the invention
鉴于以上所述现有技术的缺点，本发明的目的在于提供一种通用型测试板。In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a universal test board.
为实现上述目的及其他相关目的，本发明提供一种通用型测试板，其至少包括：In order to achieve the above purpose and other related purposes, the present invention provides a universal test board, which at least includes:
具有第一表面及第二表面的板体，其中，在所述第一表面设置有与测试机台对接的第一对接件；在所述第二表面设置有与至少一种第一封装类型的待测芯片对接的第二对接件以及用于与转换板对接的扩展对接件，且所述第一对接件分别与第二对接件及扩展对接件电气连接。A board body having a first surface and a second surface, wherein a first docking member docked with a test machine is provided on the first surface; The second docking piece for docking with the chip to be tested and the extended docking piece for docking with the conversion board, and the first docking piece is electrically connected to the second docking piece and the extended docking piece respectively.
优选地，所述通用型测试板还包括：具有第三表面及第四表面的对接件转换板，其中，在所述第三表面设置有与至少一种第二封装类型的待测芯片对接的第三对接件，在第四表面设置有与所述扩展对接件对接的第四对接件，且第三对接件与第四对接件电气连接。Preferably, the universal test board further includes: a docking member conversion board having a third surface and a fourth surface, wherein, on the third surface, there is an interface with at least one second packaging type of the chip to be tested. The third docking piece is provided with a fourth docking piece that docks with the extended docking piece on the fourth surface, and the third docking piece is electrically connected to the fourth docking piece.
优选地，在所述第二表面还设置有与地连接的地对接件。Preferably, a ground butt joint connected to the ground is also provided on the second surface.
优选地，在所述第二表面还设置有与提供信号的设备连接的设备对接件；更为优选地，所述信号包括时钟信号。Preferably, a device docking piece connected to a device providing a signal is also provided on the second surface; more preferably, the signal includes a clock signal.
优选地，与第二对接件对接的待测芯片包括具有引脚的芯片。Preferably, the chip to be tested docked with the second docking member includes a chip with pins.
优选地，与第三对接件对接的待测芯片包括无引脚类的芯片。Preferably, the chip to be tested docked with the third docking member includes a leadless chip.
优选地，所述第二对接件及扩展对接件均为插槽。Preferably, both the second docking piece and the extended docking piece are slots.
如上所述，本发明的通用型测试板，具有以下有益效果：无需更换板体即可对不同封装类型的芯片的性能进行测试，有效降低芯片的测试成本，提高了企业经济效益。As mentioned above, the general-purpose test board of the present invention has the following beneficial effects: the performance of chips of different packaging types can be tested without changing the board body, effectively reducing the test cost of the chip and improving the economic benefits of the enterprise.
附图说明Description of drawings
图1a显示为现有测试机台俯视图。Figure 1a shows a top view of the existing testing machine.
图1b及1c显示为现有测试板俯视图。Figures 1b and 1c show top views of existing test boards.
图2显示为本发明的测试板的板体的正面俯视图。Fig. 2 is a front plan view of the board body of the test board of the present invention.
图3显示为本发明的测试板的板体的一种优选俯视图。Fig. 3 shows a preferred top view of the board body of the test board of the present invention.
图4显示为本发明的测试板的对接件转换板的侧视图。Figure 4 shows a side view of a docking element conversion plate for a test plate of the present invention.
元件标号说明Component designation description
具体实施方式Detailed ways
以下由特定的具体实施例说明本发明的实施方式，熟悉此技术的人士可由本说明书所揭露的内容轻易地了解本发明的其他优点及功效。The implementation of the present invention will be illustrated by specific specific examples below, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.
请参阅图2至图4。须知，本说明书所附图式所绘示的结构、比例、大小等，均仅用以配合说明书所揭示的内容，以供熟悉此技术的人士了解与阅读，并非用以限定本发明可实施的限定条件，故不具技术上的实质意义，任何结构的修饰、比例关系的改变或大小的调整，在不影响本发明所能产生的功效及所能达成的目的下，均应仍落在本发明所揭示的技术内容得能涵盖的范围内。同时，本说明书中所引用的如“上”、“下”、“左”、“右”、“中间”及“一”等的用语，亦仅为便于叙述的明了，而非用以限定本发明可实施的范围，其相对关系的改变或调整，在无实质变更技术内容下，当亦视为本发明可实施的范畴。See Figures 2 through 4. It should be noted that the structures, proportions, sizes, etc. shown in the drawings attached to this specification are only used to match the content disclosed in the specification, for those who are familiar with this technology to understand and read, and are not used to limit the implementation of the present invention. Limiting conditions, so there is no technical substantive meaning, any modification of structure, change of proportional relationship or adjustment of size, without affecting the effect and purpose of the present invention, should still fall within the scope of the present invention. The disclosed technical content must be within the scope covered. At the same time, terms such as "upper", "lower", "left", "right", "middle" and "one" quoted in this specification are only for the convenience of description and are not used to limit the scope of this specification. The practicable scope of the invention and the change or adjustment of its relative relationship shall also be regarded as the practicable scope of the present invention without any substantial change in the technical content.
如图2所示，本发明提供一种通用型测试板。该通用型测试板至少包括：板体3。As shown in Fig. 2, the present invention provides a general-purpose test board. The universal test board at least includes: a board body 3 .
所述板体3的形状不限，优选地，包括但不限于方形、圆形等等。所述板体3可为单层结构、也可为多层结构，例如，由母板3a与子板3b叠合而成的两层结构，如图3所示。The shape of the plate body 3 is not limited, preferably, including but not limited to square, circular and so on. The board body 3 can be a single-layer structure or a multi-layer structure, for example, a two-layer structure formed by laminating a
所述板体3的背面设置有与测试机台对接的第一对接件。The back of the board body 3 is provided with a first docking piece docked with the testing machine.
本领域技术人员应该理解，所述第一对接件用于与测试机台对接，故其形状及结构等均基于测试机台来确定。例如，若测试机台的正面如图1a所示，则所述第一对接件包括组合成圆形的256个插针，以便分别插接入图1a所示的各插孔内；又例如，若测试机台正面包括多个插槽，则所述第一对接件包括相应数量的插针等。Those skilled in the art should understand that the first docking member is used for docking with the test machine, so its shape and structure are determined based on the test machine. For example, if the front of the test machine is as shown in Figure 1a, the first docking part includes 256 pins combined into a circle, so as to be inserted into the sockets shown in Figure 1a respectively; for another example, If the front of the testing machine includes multiple slots, the first docking member includes a corresponding number of pins and the like.
所述板体3的正面设置有与至少一种第一封装类型的待测芯片对接的第二对接件31以及用于与转换板对接的扩展对接件32，且所述第一对接件分别与第二对接件31及扩展对接件32电气连接。The front of the board body 3 is provided with a
其中，第一封装类型包括任何一种能用于封装芯片的类型，优选地，包括但不限于DIP类。所述第二对接件31的结构及形状等基于第一封装类型的待测芯片来确定。Wherein, the first package type includes any type that can be used to package chips, preferably, including but not limited to DIP type. The structure and shape of the
例如，若待测芯片采用的第一封装类型为DIP64，则所述第二对接件31由插槽31a及31b构成，如图2所示。其中，插槽31a及31b各自可分别包括32、64、或128个等插孔，以便插槽31a及31b可同时插接1个、2个或4个DIP64芯片。For example, if the first package type adopted by the chip to be tested is DIP64, the
其中，所述扩展对接件32可为多个插槽或插针等，优选地，其包括72个插槽，以便与转换板对接。Wherein, the
所述转换板作为一种芯片与所述板体对接的辅助板，其形状不限，包括但不限于：方形、圆形等等。所述转换板可以采用任何一种能与芯片及扩展对接件132对接的板体，优选地，其采用能与第二封装类型的待测芯片及扩展对接件32对接的对接件转换板，该对接件转换板的一表面设置有与至少一种第二封装类型的待测芯片对接的第三对接件，另一表面设置有与所述扩展对接件32对接的第四对接件，且第三对接件与第四对接件电气连接。The conversion board is used as an auxiliary board for the chip to interface with the board body, and its shape is not limited, including but not limited to: square, circular and so on. The conversion board can adopt any board body capable of docking with the chip and the extended docking member 132, preferably, it adopts a docking member conversion board capable of docking with the second package type of the chip to be tested and the extended
其中，第二封装类型包括任何一种能用于封装芯片的类型，优选地，包括但不限于BGA封装类或QFN封装类等。例如，如图4所示，其为一种对接件转换板示意图。该对接件转换板4的上表面的第三对接件与BGA144封装结构的芯片5对接，其包括144个焊盘，该对接件转换板4的下表面设置有与所述扩展对接件32对接的144个插针，其中，每一个插针连接对应的1个焊盘。Wherein, the second package type includes any type that can be used to package chips, preferably, including but not limited to BGA package or QFN package. For example, as shown in FIG. 4 , it is a schematic diagram of a docking part conversion board. The third butt joint on the upper surface of the
需要说明的是，为了能通过测试机台对放置在板体上的待测芯片的性能进行测试，则测试机台通过板体应能与待测芯片的相应各引脚电气连通，故本领域技术人员基于现有测试板上与待测芯片连接的连接件及现有测试板上与测试机台连接的连接件之间的电气连接方式，应该理解本发明的板体的第一对接件与第二对接件及扩展对接件的电气连接方式，例如，本领域技术人员基于图1b所示的测试板正面的连接件与背面的连接件之间的电气连接方式，应该理解本发明的板体的第一对接件与第二对接件的电气连接方式、基于图1c所示的测试板正面的连接件与背面的连接件之间的电气连接方式，应该理解本发明的板体的的第一对接件与扩展对接件的电气连接方式，故在此不再予以详述。It should be noted that, in order to test the performance of the chip to be tested placed on the board through the test machine, the test machine should be electrically connected to the corresponding pins of the chip to be tested through the board. Based on the electrical connection between the connecting piece connected to the chip to be tested on the existing test board and the connecting piece connected to the test machine on the existing test board, the technician should understand that the first butt joint of the board body of the present invention and the The electrical connection mode of the second docking piece and the extended docking piece, for example, those skilled in the art should understand the board body of the present invention based on the electrical connection mode between the connector on the front side of the test board and the connector on the back side of the test board shown in Figure 1b The electrical connection between the first docking piece and the second docking piece, and the electrical connection between the front connector and the back connector of the test board shown in Figure 1c, it should be understood that the first of the board body of the present invention The electrical connection method between the docking piece and the extended docking piece will not be described in detail here.
作为一种优选方式，在所述板体1的正面还设置有与地连接的地对接件33，如图2所示。优选地，该地对接件33包括多组插槽，以便与连接地的插针对接。As a preferred manner, a
作为另一种优选方式，在所述板体1的正面还设置有与提供信号的设备连接的设备对接件34，如图2所示。优选地，所述设备对接件34包括多组插槽，以便与连接设备的插针对接。As another preferred manner, a
其中，所述设备包括在芯片性能测试过程中所需要的信号设备，优选地，包括但不限于：提供时钟信号的设备等。Wherein, the device includes the signal device required in the chip performance test process, preferably including but not limited to: a device providing a clock signal and the like.
使用时，若待测芯片能与板体3上的第二对接件31对接，则将待测芯片与第二对接件31对接后，再将板体3与测试机台对接后，即可对待测芯的性能进行测试；若待测芯片不能与板体3上的第二对接件31对接，则先将待测芯片与对接件转换板对接后，再将对接件转换板与板体3的扩展对接件32对接后，接着再将板体3与测试机台对接，即可对待测芯的性能进行测试。During use, if the chip to be tested can be docked with the
综上所述，本发明的测试板通过在板体上设置扩展对接件以及对接件转换板，就可在不更换板体的前提下完成对不同封装类型的芯片的性能测试，有效降低了企业的测试成本，而且相较于现有测试操作，操作便捷。所以，本发明有效克服了现有技术中的种种缺点而具高度产业利用价值。To sum up, the test board of the present invention can complete the performance test of chips of different package types without changing the board body by setting the extended docking piece and the docking piece conversion board on the board body, effectively reducing the cost of the enterprise. The test cost is low, and compared with the existing test operation, the operation is convenient. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial application value.
上述实施例仅例示性说明本发明的原理及其功效，而非用于限制本发明。任何熟悉此技术的人士皆可在不违背本发明的精神及范畴下，对上述实施例进行修饰或改变。因此，举凡所属技术领域中具有通常知识者在未脱离本发明所揭示的精神与技术思想下所完成的一切等效修饰或改变，仍应由本发明的权利要求所涵盖。The above-mentioned embodiments only illustrate the principles and effects of the present invention, but are not intended to limit the present invention. Anyone skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those skilled in the art without departing from the spirit and technical ideas disclosed in the present invention should still be covered by the claims of the present invention.
Claims (8)
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| CN104281147A (en)* | 2014-10-24 | 2015-01-14 | 上海自仪泰雷兹交通自动化系统有限公司 | Internal signal fault testing device for rail transit signal equipment |
| WO2021088833A1 (en)* | 2019-11-05 | 2021-05-14 | 新嘉数码电子(深圳)有限公司 | Auxiliary device for testing chip-on-board |
| CN116430198A (en)* | 2023-02-24 | 2023-07-14 | 上海华力集成电路制造有限公司 | General chip test system and method |
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| CN104281147B (en)* | 2014-10-24 | 2016-08-17 | 上海自仪泰雷兹交通自动化系统有限公司 | A kind of internal signal fault testing apparatus of track traffic signal equipment |
| WO2021088833A1 (en)* | 2019-11-05 | 2021-05-14 | 新嘉数码电子(深圳)有限公司 | Auxiliary device for testing chip-on-board |
| CN116430198A (en)* | 2023-02-24 | 2023-07-14 | 上海华力集成电路制造有限公司 | General chip test system and method |
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