技术领域technical field
本发明涉及一种高密度多层线路芯片倒装封装结构及制作方法，属于半导体封装技术领域。The invention relates to a high-density multilayer circuit chip flip-chip packaging structure and a manufacturing method, belonging to the technical field of semiconductor packaging.
背景技术Background technique
当前高密度基板封装结构如图25所示，其制作工艺主要是在玻璃纤维板核心材料的基础上通过积成材料积成的方式叠加形成多层线路板，线路层之间通过激光钻孔的方式开孔，再镀孔完成电性连接。The current high-density substrate packaging structure is shown in Figure 25. Its manufacturing process is mainly to form a multi-layer circuit board by stacking the core material of the glass fiber board by accumulating materials, and laser drilling is used between the circuit layers. Holes are drilled and then plated to complete the electrical connection.
上述当前高密度基板封装结构存在以下不足和缺陷：The above-mentioned current high-density substrate packaging structure has the following deficiencies and defects:
1、多了一层的玻璃纤维材料，同样的也多了一层玻璃纤维的成本；1. There is an extra layer of glass fiber material, and also the cost of an extra layer of glass fiber;
2、因为多了一层玻璃纤维板核心层，厚度约为100~150μm，所以无法做到超薄封装设计；2. Because there is an extra layer of glass fiber board core layer, the thickness is about 100~150μm, so it is impossible to achieve ultra-thin packaging design;
3、玻璃纤维本身就是一种发泡物质，所以容易因为放置的时间与环境吸入水分以及湿气，直接影响到可靠性的安全能力或是可靠性等级；3. Glass fiber itself is a kind of foaming material, so it is easy to absorb moisture and moisture due to the storage time and environment, which directly affects the safety capability or reliability level of reliability;
4、线路层之间的连接是用激光钻孔方式进行开孔，再进行镀铜，通过激光钻孔形成的孔径大，难以做到高密度的设计与制造。4. The connection between the circuit layers is made by laser drilling, and then copper plating is performed. The aperture formed by laser drilling is large, and it is difficult to achieve high-density design and manufacture.
发明内容Contents of the invention
本发明的目的在于克服上述不足，提供一种高密度倒装封装结构及制作方法，其工艺简单，不需使用玻璃纤维层，减薄了封装体厚度，提高了封装体的安全性和可靠性，减少了玻璃纤维材料带来的环境污染，而且线路层之间的电性连接采用的是电镀方法，能够真正做到高密度线路的设计和制造；内外层线路覆盖油墨加以保护，同时采用的先封装后蚀刻方式，在封装过程中带有坚硬的金属载体，可确保在装片高温过程中不发生热变形，可彻底解决传统基板在封装工艺中的翘曲问题。The purpose of the present invention is to overcome the above disadvantages and provide a high-density flip-chip packaging structure and manufacturing method, which has a simple process, does not need to use a glass fiber layer, reduces the thickness of the package, and improves the safety and reliability of the package. , which reduces the environmental pollution caused by glass fiber materials, and the electrical connection between the circuit layers adopts the electroplating method, which can truly achieve the design and manufacture of high-density circuits; the inner and outer layers of the circuit are covered with ink to protect them, and the The method of encapsulation first and then etching, with a hard metal carrier in the encapsulation process, can ensure that no thermal deformation occurs during the high temperature process of chip loading, and can completely solve the warping problem of traditional substrates in the encapsulation process.
本发明的目的是这样实现的：一种高密度多层线路芯片倒装封装结构，它包括一层线路层、芯片和二层线路层，所述一层线路层和二层线路层之间通过铜柱层相连接，所述铜柱层与铜柱层之间以及一层线路层与一层线路层之间均填充有绝缘材料，所述一层线路层和绝缘材料背面设置有外层油墨层，所述外层油墨层曝光显影露出一层线路层背面的外引脚，所述外引脚处设置有金属球，所述二层线路层正面设置有内引脚，所述二层线路层和内引脚周围设置有内层油墨层，所述芯片倒装于内引脚正面，所述芯片外围包封有塑封料。The purpose of the present invention is achieved in this way: a high-density multilayer circuit chip flip-chip package structure, which includes a layer of circuit layer, a chip and a second layer of circuit layer, between the first layer of circuit layer and the second layer of circuit layer through The copper column layer is connected, and insulating material is filled between the copper column layer and the copper column layer and between a circuit layer and a circuit layer, and an outer layer of ink is provided on the back of the circuit layer and the insulating material layer, the outer ink layer is exposed and developed to expose the outer pins on the back of the first layer of circuit layer, the outer pins are provided with metal balls, the front of the second layer of circuit layer is provided with inner pins, and the second layer of circuit layers An inner ink layer is arranged around the layer and the inner pin, the chip is flip-chip mounted on the front of the inner pin, and the periphery of the chip is encapsulated with plastic encapsulant.
一种高密度多层线路芯片倒装封装结构的制造方法，所述方法包括以下工艺步骤：A method for manufacturing a high-density multilayer circuit flip-chip packaging structure, the method comprising the following process steps:
步骤一、取金属载板Step 1. Take the metal carrier
步骤二、金属载板表面预镀铜材Step 2. Pre-plating copper on the surface of the metal carrier
在金属载板表面电镀一层铜材薄膜，Electroplate a layer of copper film on the surface of the metal carrier,
步骤三、贴光阻膜显影开窗Step 3: Paste the photoresist film, develop and open the window
在步骤二完成预镀铜材薄膜的金属载板的正面及背面分别贴上可进行曝光显影的光阻膜，利用曝光显影设备将金属载板正面进行图形曝光、显影与去除部分图形光阻膜，以露出金属载板正面后续需要进行一层线路层电镀的区域图形，In step 2, the front and back of the metal carrier with the pre-plated copper film are pasted with a photoresist film that can be exposed and developed, and the exposure and development equipment is used to expose, develop and remove part of the graphic photoresist film on the front of the metal carrier. , to expose the pattern of the area on the front of the metal carrier that needs to be electroplated with a layer of circuit layer,
步骤四、电镀一层线路层Step 4: Plating a circuit layer
在步骤三中金属载板正面去除部分光阻膜的区域内电镀上金属线路层作为一层线路层；Electroplating a metal circuit layer as a layer of circuit layer in the area where part of the photoresist film is removed from the front of the metal carrier in step 3;
步骤五、去除光阻膜Step 5. Remove the photoresist film
去除金属载板表面的光阻膜，Remove the photoresist film on the surface of the metal carrier,
步骤六、贴光阻膜显影开窗Step 6: Paste the photoresist film, develop and open the window
在完成一层线路层的线路板的正面及背面分别贴上可进行曝光显影的光阻膜，利用曝光显影设备将金属载板正面进行图形曝光、显影与去除部分图形光阻膜，以露出线路板正面后续需要进行铜柱层电镀的区域图形；A photoresist film that can be exposed and developed is attached to the front and back of the circuit board with a circuit layer, and the exposure and development equipment is used to expose, develop and remove part of the photoresist film on the front of the metal carrier to expose the circuit. The area pattern that needs to be electroplated on the copper pillar layer on the front of the board;
步骤七、电镀铜柱层Step 7. Electroplating copper pillar layer
在步骤六中线路板正面去除部分光阻膜的区域内电镀上金属线路层作为铜柱层；Electroplating a metal circuit layer as a copper pillar layer in the area where part of the photoresist film is removed on the front of the circuit board in step 6;
步骤八、去除光阻膜Step 8. Remove the photoresist film
去除线路板表面的光阻膜，Remove the photoresist film on the surface of the circuit board,
步骤九、覆盖绝缘材料层Step 9. Cover the insulating material layer
在线路板表面覆盖一层绝缘材料，A layer of insulating material is covered on the surface of the circuit board,
步骤十、绝缘材料表面减薄Step 10. Thinning the surface of the insulating material
将绝缘材料表面进行机械减薄，直到露出铜柱层为止；Mechanically thin the surface of the insulating material until the copper pillar layer is exposed;
步骤十一、绝缘材料表面金属化Step 11. Metallization of insulating material surface
对绝缘材料表面进行金属化处理，使其表面后续能进行电镀；Metallize the surface of the insulating material so that the surface can be subsequently electroplated;
步骤十二、贴光阻膜显影开窗Step 12: Paste the photoresist film, develop and open the window
在步骤十一完成金属化的线路板正面及背面分别贴上可进行曝光显影的光阻膜，利用曝光显影设备将线路板正面进行图形曝光、显影与去除部分图形光阻膜，以露出线路板正面后续需要进行二层线路层电镀的区域图形；In step 11, the front and back of the metallized circuit board are respectively pasted with a photoresist film that can be exposed and developed, and the front of the circuit board is subjected to pattern exposure, development and removal of part of the pattern photoresist film by using the exposure and development equipment to expose the circuit board The area pattern that needs to be electroplated on the second layer of the circuit layer on the front side;
步骤十三、电镀二层线路层Step 13. Electroplating the second circuit layer
在步骤十二中线路板正面去除部分光阻膜的区域内电镀上金属线路层作为二层线路层；In step 12, in the area where part of the photoresist film is removed from the front of the circuit board, a metal circuit layer is electroplated as a second circuit layer;
步骤十四、去除光阻膜Step 14. Remove the photoresist film
去除线路板表面的光阻膜，Remove the photoresist film on the surface of the circuit board,
步骤十五、快速蚀刻Step 15. Fast Etching
对线路板正面进行快速蚀刻，去除二层线路层以外的金属；Perform rapid etching on the front of the circuit board to remove the metal other than the second layer of circuit layer;
步骤十六、油墨曝光显影Step sixteen, ink exposure and development
在二层线路层的表面进行油墨曝光显影，以露出二层线路层上需要电镀的键合区；Carry out ink exposure and development on the surface of the second circuit layer to expose the bonding area on the second circuit layer that needs to be electroplated;
步骤十七、进行单层或多层金属电镀Step 17. Perform single-layer or multi-layer metal plating
在步骤十六中二层线路层正面露出的电镀键合区进行单层或多层金属电镀，形成内引脚，Perform single-layer or multi-layer metal plating on the electroplating bonding area exposed on the front side of the second-layer circuit layer in step sixteen to form inner leads,
步骤十八、装片Step 18, loading film
将芯片倒装于二层线路层正面芯片贴装区，Flip-chip the chip on the front chip mounting area of the second layer circuit layer,
步骤十九、包封Step nineteen, encapsulation
在线路板正面采用塑封料进行塑封，The front of the circuit board is plastic-sealed with plastic sealing compound,
步骤二十、去除金属载板Step 20. Remove the metal carrier
将塑封好的线路板背面进行蚀刻，去除金属载板，露出外引脚，Etch the back of the plastic-encapsulated circuit board, remove the metal carrier, and expose the outer pins.
步骤二十一、油墨曝光显影并做有机层保护Step 21: Ink exposure and development and organic layer protection
在一层线路层背面进行油墨曝光显影，以露出焊区需要的外引脚，在露出的外引脚处进行金属有机层保护；Carry out ink exposure and development on the back of a circuit layer to expose the outer pins required by the soldering area, and protect the exposed outer pins with a metal-organic layer;
步骤二十二、植球Step 22, planting the ball
在去除金属载板后的线路板背面植球处植入金属球，使金属球与外引脚背面相接触，Implant metal balls at the ball planting place on the back of the circuit board after removing the metal carrier board, so that the metal balls are in contact with the back of the outer pins,
步骤二十三、切割成品Step 23. Cut the finished product
将步骤二十二完成植球的半成品进行切割作业，使原本以阵列式集合体方式集成在一起并含有芯片的塑封体模块一颗颗切割独立开来。Cutting the semi-finished products that have been ball-planted in step 22, so that the plastic package modules that are originally integrated in an array form and contain chips are cut and separated one by one.
所述金属载板的材质为铜材、铁材、镍铁材或锌铁材。The material of the metal carrier is copper, iron, nickel-iron or zinc-iron.
所述光阻膜采用湿式光阻膜或干式光阻膜。The photoresist film adopts a wet photoresist film or a dry photoresist film.
所述光阻膜去除方法采用化学药水软化并采用高压水喷除。The method for removing the photoresist film is softened by chemical liquid and sprayed with high-pressure water.
所述内引脚镀层种类为铜镍金、铜镍银、钯金、金或铜。The plating layer of the inner pin is copper-nickel-gold, copper-nickel-silver, palladium-gold, gold or copper.
所述步骤十九中塑封方式采用模具灌胶方式、喷涂设备的喷涂方式或是用贴膜方式。The plastic sealing method in the step nineteen adopts the method of mold filling, spraying by spraying equipment, or the method of sticking a film.
所述步骤二十中的蚀刻药水采用氯化铜或是氯化铁。The etching solution in the step 20 is copper chloride or ferric chloride.
所述步骤二十二中植球方式采用植球机或是采用金属膏印刷再经高温溶解之后形成球状体，所述金属球的材料是纯锡或锡合金。In the step 22, the ball planting method adopts a ball planting machine or uses metal paste printing and then dissolves at high temperature to form a spheroid. The material of the metal ball is pure tin or tin alloy.
与现有技术相比，本发明的有益效果是：Compared with prior art, the beneficial effect of the present invention is:
1、本发明不需要使用玻璃纤维层作为核心材料层，所以可以显著降低芯片封装载板的厚度，实现高密度封装；1. The present invention does not need to use the glass fiber layer as the core material layer, so the thickness of the chip packaging carrier can be significantly reduced to achieve high-density packaging;
2、本发明没有使用玻璃纤维层的发泡物质，所以可靠性的等级可以再提高，相对封装体的安全性就会提高；2. The present invention does not use the foaming material of the glass fiber layer, so the level of reliability can be further improved, and the safety of the package will be improved;
3、本发明不需要使用玻璃纤维层物质，所以就可以减少玻璃纤维材料所带来的环境污染；3. The present invention does not need to use glass fiber material, so the environmental pollution caused by glass fiber material can be reduced;
4、本发明高密度多层线路层所采用的是电镀方法，而电镀层的总厚度约在10~15μm，而线路与线路之间的间隙可以轻松的达到15μm以下的间隙，同时线路层间的铜柱也是电镀形成，直径比传统钻孔小，所以可以真正地做到高密度线路的技术能力；4. The electroplating method is adopted for the high-density multilayer circuit layer of the present invention, and the total thickness of the electroplating layer is about 10-15 μm, and the gap between the lines can easily reach a gap below 15 μm, and at the same time, the gap between the circuit layers The copper pillars are also formed by electroplating, and the diameter is smaller than that of traditional drilling, so it can truly achieve the technical capability of high-density circuits;
5、本发明采用的先封装后蚀刻方式，由于封装过程中带有的金属载体具有热膨胀系数小，强度大等特点，可确保在装片高温过程中不发生热变形，可彻底解决传统基板在封装工艺中的翘曲问题。5. The method of encapsulating first and then etching adopted in the present invention, because the metal carrier in the encapsulating process has the characteristics of small thermal expansion coefficient and high strength, can ensure that no thermal deformation occurs during the high temperature process of chip loading, and can completely solve the problem of traditional substrates Warpage problem in packaging process.
附图说明Description of drawings
图1~图23为本发明一种高密度多层线路芯片倒装封装结构的制作方法各工序示意图。1 to 23 are schematic diagrams of each process of a manufacturing method of a high-density multilayer circuit chip flip-chip packaging structure according to the present invention.
图24本发明一种高密度多层线路芯片倒装封装结构的示意图。Fig. 24 is a schematic diagram of a high-density multilayer circuit chip flip-chip packaging structure according to the present invention.
图25为当前高密度基板封装结构的示意图。FIG. 25 is a schematic diagram of a current high-density substrate packaging structure.
其中：in:
内层油墨层1inner ink layer 1
芯片2Chip 2
倒装焊区3Flip Chip Land 3
塑封料4Plastic compound 4
铜柱层5Copper Pillar Layer 5
绝缘材料6Insulation 6
外引脚7External pin 7
金属球8metal ball 8
外层油墨层9Outer Ink Layer 9
一层线路层10A layer of wiring layer 10
二层线路层11Layer 2 circuit layer 11
内引脚12。Inner pin 12.
具体实施方式detailed description
本发明一种高密度多层线路芯片倒装封装结构，它包括一层线路层10、芯片2和二层线路层11，所述一层线路层10和二层线路层11之间通过铜柱层5相连接，所述铜柱层5与铜柱层5之间以及一层线路层10与一层线路层10之间均填充有绝缘材料6，所述一层线路层10和绝缘材料6背面设置有外层油墨层9，所述外层油墨层9曝光显影露出一层线路层10背面的外引脚7，所述外引脚7处设置有金属球8，所述二层线路层11正面倒装焊区3设置有内引脚12，所述二层线路层11和内引脚12周围设置有内层油墨层1，所述芯片2倒装于内引脚12正面，所述芯片2与内引脚12正面之间通过金属凸点相连接，所述芯片2外围包封有塑封料4。The present invention is a high-density multi-layer circuit chip flip-chip packaging structure, which includes a circuit layer 10, a chip 2 and a circuit layer 11, and a copper column is passed between the circuit layer 10 and the circuit layer 11. The layer 5 is connected, and the insulating material 6 is filled between the copper column layer 5 and the copper column layer 5 and between the circuit layer 10 and the circuit layer 10, and the circuit layer 10 and the insulating material 6 The back is provided with an outer ink layer 9, and the outer ink layer 9 is exposed and developed to expose the outer pins 7 on the back of the circuit layer 10. The outer pins 7 are provided with metal balls 8, and the second layer of circuit layer 11 The front flip-chip soldering area 3 is provided with inner pins 12, the inner layer ink layer 1 is arranged around the second layer circuit layer 11 and the inner pins 12, the chip 2 is flip-chip on the front side of the inner pins 12, the The chip 2 is connected to the front surface of the inner pin 12 through a metal bump, and the periphery of the chip 2 is encapsulated with a plastic encapsulant 4 .
其制造方法如下：Its manufacturing method is as follows:
步骤一、取金属载板Step 1. Take the metal carrier
参见图1，取一片厚度合适的金属载板，金属载板的材质可以依据芯片的功能与特性进行变换，例如：铜材、铁材、镍铁材或锌铁材等；Referring to Figure 1, take a metal carrier with a suitable thickness. The material of the metal carrier can be changed according to the function and characteristics of the chip, for example: copper, iron, nickel-iron or zinc-iron;
步骤二、金属载板表面预镀铜材Step 2. Pre-plating copper on the surface of the metal carrier
参见图2，在金属载板表面电镀一层铜材薄膜，目的是为后续电镀作基础，所述电镀的方式可以采用化学镀或是电解电镀；Referring to Figure 2, a layer of copper film is electroplated on the surface of the metal carrier to serve as the basis for subsequent electroplating. The electroplating method can be electroless plating or electrolytic plating;
步骤三、贴光阻膜显影开窗Step 3: Paste the photoresist film, develop and open the window
参见图3，在步骤二完成预镀铜材薄膜的金属载板的正面及背面分别贴上可进行曝光显影的光阻膜，利用曝光显影设备将金属载板正面进行图形曝光、显影与去除部分图形光阻膜，以露出金属载板正面后续需要进行一层线路层电镀的区域图形，所述光阻膜可以采用湿式光阻膜或干式光阻膜；Referring to Figure 3, in step 2, the front and back of the metal carrier of the pre-plated copper film are pasted with a photoresist film that can be exposed and developed, and the front of the metal carrier is exposed, developed and removed using the exposure and development equipment. Graphical photoresist film to expose the area pattern that needs to be electroplated with a layer of circuit layer on the front of the metal carrier. The photoresist film can be a wet photoresist film or a dry photoresist film;
步骤四、电镀金属线路层（一层线路层）Step 4. Electroplating metal circuit layer (a circuit layer)
参见图4，在步骤三中金属载板正面去除部分光阻膜的区域内电镀上金属线路层作为一层线路层；Referring to Figure 4, in step 3, a metal circuit layer is electroplated as a circuit layer in the area where part of the photoresist film is removed from the front of the metal carrier;
步骤五、去除光阻膜Step 5. Remove the photoresist film
参见图5，去除金属载板表面的光阻膜，去除方法采用化学药水软化并采用高压水喷除；See Figure 5, to remove the photoresist film on the surface of the metal carrier, the removal method is softened by chemical potion and sprayed with high-pressure water;
步骤六、贴光阻膜显影开窗Step 6: Paste the photoresist film, develop and open the window
参见图6，在完成一层线路层的线路板的正面及背面分别贴上可进行曝光显影的光阻膜，利用曝光显影设备将金属载板正面进行图形曝光、显影与去除部分图形光阻膜，以露出线路板正面后续需要进行铜柱层电镀的区域图形；Referring to Figure 6, a photoresist film that can be exposed and developed is pasted on the front and back of the circuit board with a circuit layer, and the front of the metal carrier is exposed, developed, and part of the photoresist film is removed using the exposure and development equipment. , to expose the pattern of the area on the front of the circuit board that needs to be electroplated on the copper pillar layer;
步骤七、电镀铜柱层Step 7. Electroplating copper pillar layer
参见图7，在步骤六中线路板正面去除部分光阻膜的区域内电镀上金属线路层作为连接一层线路层和二层线路层的铜柱层；Referring to Fig. 7, in the area where part of the photoresist film is removed from the front of the circuit board in step 6, a metal circuit layer is electroplated as a copper column layer connecting the first circuit layer and the second circuit layer;
步骤八、去除光阻膜Step 8. Remove the photoresist film
参见图11，去除线路板表面的光阻膜，去除方法采用化学药水软化并采用高压水喷除；See Figure 11, remove the photoresist film on the surface of the circuit board, the removal method is softened by chemical potion and sprayed with high-pressure water;
步骤九、覆盖绝缘材料层Step 9. Cover the insulating material layer
参见图9，在线路板表面覆盖一层绝缘材料，目的是为了做一层线路层与二层线路层之间的绝缘层，同时为后续电镀二层线路层做基础；Referring to Figure 9, a layer of insulating material is covered on the surface of the circuit board, the purpose is to make an insulating layer between the first layer of circuit layer and the second layer of circuit layer, and at the same time lay the foundation for the subsequent electroplating of the second layer of circuit layer;
步骤十、绝缘材料表面减薄Step 10. Thinning the surface of the insulating material
参见图10，将绝缘材料表面进行机械减薄，直到露出铜柱层为止。目的是为了使铜柱层与后续的二层线路层连接，同时能增加后续化学铜的结合力；Referring to FIG. 10 , the surface of the insulating material is mechanically thinned until the copper pillar layer is exposed. The purpose is to connect the copper pillar layer with the subsequent two-layer circuit layer, and at the same time increase the bonding force of the subsequent chemical copper;
步骤十一、绝缘材料表面金属化Step 11. Metallization of insulating material surface
参见图11，对绝缘材料表面进行金属化处理，使其表面后续能进行电镀；Referring to Figure 11, the surface of the insulating material is metallized so that the surface can be subsequently electroplated;
步骤十二、贴光阻膜显影开窗Step 12: Paste the photoresist film, develop and open the window
参见图12，在步骤十一完成金属化的线路板正面及背面分别贴上可进行曝光显影的光阻膜；利用曝光显影设备将线路板正面进行图形曝光、显影与去除部分图形光阻膜，以露出线路板正面后续需要进行二层线路层电镀的区域图形；Referring to Figure 12, the front and back of the metallized circuit board in step 11 are respectively pasted with a photoresist film that can be exposed and developed; use the exposure and development equipment to perform pattern exposure, development and removal of part of the pattern photoresist film on the front of the circuit board, To expose the area pattern on the front of the circuit board that needs to be electroplated on the second layer of the circuit layer;
步骤十三、电镀金属线路层（二层线路层）Step 13. Plating metal circuit layer (two-layer circuit layer)
参见图13，在步骤十二中线路板正面去除部分光阻膜的区域内电镀上金属线路层作为二层线路层；Referring to Fig. 13, in step 12, in the area where part of the photoresist film is removed from the front of the circuit board, a metal circuit layer is electroplated as a second circuit layer;
步骤十四、去除光阻膜Step 14. Remove the photoresist film
参见图14，去除线路板表面的光阻膜，去除方法采用化学药水软化并采用高压水喷除；See Figure 14, remove the photoresist film on the surface of the circuit board, the removal method is softened by chemical potion and sprayed with high-pressure water;
步骤十五、快速蚀刻Step 15. Fast Etching
参见图15，对线路板正面进行快速蚀刻，去除二层线路层以外的金属；Referring to Figure 15, quickly etch the front of the circuit board to remove the metal other than the second circuit layer;
步骤十六、油墨曝光显影Step sixteen, ink exposure and development
参见图16，在二层线路层的表面进行油墨曝光显影，以露出二层线路层上需要电镀的键合区；Referring to Figure 16, ink exposure and development is performed on the surface of the second circuit layer to expose the bonding area on the second circuit layer that needs to be electroplated;
步骤十七、进行单层或多层金属电镀Step 17. Perform single-layer or multi-layer metal plating
参见图17，在步骤十六中二层线路层正面露出的电镀键合区进行单层或多层金属电镀，形成内引脚，镀层种类可以是铜镍金、铜镍银、钯金、金或铜等，电镀方法可以是化学电镀或是电解电镀；Referring to Figure 17, perform single-layer or multi-layer metal electroplating on the electroplating bonding area exposed on the front side of the second-layer circuit layer in step sixteen to form inner pins. The type of plating can be copper-nickel-gold, copper-nickel-silver, palladium-gold, gold Or copper, etc., the electroplating method can be chemical plating or electrolytic plating;
步骤十八、装片Step 18, loading film
参见图18，将芯片倒装于二层线路层正面芯片贴装区，芯片与二层线路层倒装焊区之间通过金属凸点连接；Referring to Figure 18, the chip is flip-chip mounted on the front chip mounting area of the second-layer circuit layer, and the chip and the flip-chip bonding area of the second-layer circuit layer are connected by metal bumps;
步骤十九、包封Step nineteen, encapsulation
参见图19，在线路板正面采用塑封料进行塑封，塑封方式可以采用模具灌胶方式、喷涂设备的喷涂方式或是用贴膜方式。所述塑封料可以采用有填料物质或是无填料物质的环氧树脂；Referring to Figure 19, the front of the circuit board is sealed with a plastic sealing compound, and the plastic sealing method can be mold filling, spraying by spraying equipment, or film sticking. The molding compound can be epoxy resin with filler or no filler;
步骤二十、去除金属载板Step 20. Remove the metal carrier
参见图20，将塑封好的线路板背面进行蚀刻，去除金属载板，露出外引脚，蚀刻药水可以采用氯化铜或是氯化铁；Referring to Figure 20, etch the back of the plastic-encapsulated circuit board, remove the metal carrier, and expose the outer pins. The etching solution can be copper chloride or ferric chloride;
步骤二十一、油墨曝光显影并做有机层保护Step 21: Ink exposure and development and organic layer protection
参见图21，在一层线路层背面进行油墨曝光显影，以露出焊区需要的外引脚，在露出的外引脚处进行金属有机层保护；Referring to Figure 21, ink exposure and development is performed on the back of a circuit layer to expose the outer pins required by the soldering area, and metal-organic layer protection is performed on the exposed outer pins;
步骤二十二、植球Step 22, planting the ball
参见图22，在去除金属载板后的线路板背面植球处植入金属球，使金属球与外引脚背面相接触，植球方式可以采用常规的植球机或是采用金属膏印刷再经高温溶解之后即可形成球状体，金属球的材料可以是纯锡或锡合金；Referring to Figure 22, metal balls are implanted at the ball planting place on the back of the circuit board after the metal carrier is removed, so that the metal balls are in contact with the back of the outer pins. The ball planting method can be conventional ball planting machine or metal paste printing. Spheroids can be formed after high temperature dissolution, and the material of metal balls can be pure tin or tin alloy;
步骤二十三、切割成品Step 23. Cut the finished product
参见图23，将步骤二十二完成植球的半成品进行切割作业，使原本以阵列式集合体方式集成在一起并含有芯片的塑封体模块一颗颗切割独立开来。Referring to FIG. 23 , the semi-finished products that have been ball-planted in step 22 are cut, so that the plastic package modules that are originally integrated in the form of an array assembly and contain chips are cut and separated one by one.
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310188938.6ACN103311216B (en) | 2013-05-20 | 2013-05-20 | High-density multi-layered circuit chip flip-chip packaged structure and manufacture method |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310188938.6ACN103311216B (en) | 2013-05-20 | 2013-05-20 | High-density multi-layered circuit chip flip-chip packaged structure and manufacture method |
| Publication Number | Publication Date |
|---|---|
| CN103311216A CN103311216A (en) | 2013-09-18 |
| CN103311216Btrue CN103311216B (en) | 2016-02-24 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310188938.6AActiveCN103311216B (en) | 2013-05-20 | 2013-05-20 | High-density multi-layered circuit chip flip-chip packaged structure and manufacture method |
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| CN (1) | CN103311216B (en) |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109841707B (en)* | 2017-11-27 | 2020-11-03 | 晶呈科技股份有限公司 | Structure of vertical light-emitting diode die and method for manufacturing the same |
| CN111477556B (en)* | 2020-05-19 | 2025-01-10 | 深圳和美精艺半导体科技股份有限公司 | A packaging method for ultra-thin substrate and chip structure thereof |
| CN115148695A (en)* | 2022-07-25 | 2022-10-04 | 合肥矽迈微电子科技有限公司 | Pre-encapsulated substrate and manufacturing method thereof |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1497692A (en)* | 2002-09-26 | 2004-05-19 | ������������ʽ���� | Manufacturing method of circuit device |
| CN1697127A (en)* | 2004-05-11 | 2005-11-16 | 新光电气工业株式会社 | Method of manufacturing semiconductor device |
| KR100817030B1 (en)* | 2006-12-01 | 2008-03-26 | 주식회사 케이이씨 | Semiconductor package and manufacturing method thereof |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8709933B2 (en)* | 2011-04-21 | 2014-04-29 | Tessera, Inc. | Interposer having molded low CTE dielectric |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1497692A (en)* | 2002-09-26 | 2004-05-19 | ������������ʽ���� | Manufacturing method of circuit device |
| CN1697127A (en)* | 2004-05-11 | 2005-11-16 | 新光电气工业株式会社 | Method of manufacturing semiconductor device |
| KR100817030B1 (en)* | 2006-12-01 | 2008-03-26 | 주식회사 케이이씨 | Semiconductor package and manufacturing method thereof |
| Publication number | Publication date |
|---|---|
| CN103311216A (en) | 2013-09-18 |
| Publication | Publication Date | Title |
|---|---|---|
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| TR01 | Transfer of patent right | Effective date of registration:20160505 Address after:214434 Jiangyin, Jiangsu, Chengjiang city street, Long Hill Road, No. 78 Patentee after:Jiangsu Changjiang Electronics Technology Co., Ltd. Address before:214434 Jiangyin, Jiangsu Province, the development of mountain road, No. 78, No. Patentee before:Jiangsu Changjiang Electronics Technology Co., Ltd. |