技术领域technical field
本发明是有关于一种芯片封装结构及其制造方法，且特别是有关于一种硅微机电麦克风(silicon MEMS microphone)芯片封装结构及其制造方法。The present invention relates to a chip packaging structure and a manufacturing method thereof, and in particular to a silicon MEMS microphone chip packaging structure and a manufacturing method thereof.
背景技术Background technique
一般微机电麦克风封装件是将微机电麦克风芯片与其他芯片例如特定应用集成电路(ASIC)、读取集成电路芯片等配置在单一个基板，并利用具有容置空间的遮罩遮蔽所有的芯片。其中不同的芯片是利用打线(trace)彼此电性连接。然而，此微机电麦克风封装件具有大的尺寸，因此不利于应用至微型装置，使用价值与弹性受到限制。A general microelectromechanical microphone package is to arrange the microelectromechanical microphone chip and other chips such as application specific integrated circuit (ASIC) and read integrated circuit chip on a single substrate, and use a mask with accommodating space to cover all the chips. Different chips are electrically connected to each other by traces. However, the MEMS microphone package has a large size, so it is not conducive to be applied to miniature devices, and the use value and flexibility are limited.
发明内容Contents of the invention
本发明有关于一种芯片封装结构及其制造方法。芯片封装结构具有微小的尺寸。The invention relates to a chip packaging structure and a manufacturing method thereof. Chip packaging structures have tiny dimensions.
根据一实施例，提出一种芯片封装结构，其包括一基板、一电声波芯片(acoustictransducer chip)、一盖结构(cap)与一封胶体。基板具有相对的一第一基板表面、一第二基板表面与一声孔。第一基板表面上具有一线路层。电声波芯片配置在基板的第一基板表面上，并电性连接至线路层。电声波芯片的一主动面是朝向声孔。盖结构配置在基板的第一基板表面上，并具有一容置空间用以容置电声波芯片。封胶体包覆盖结构与盖结构外侧的线路层。基板与封胶体其中之一具有数个导电穿孔。导电穿孔直接与线路层接触，且经由线路层电性连接至电声波芯片。According to an embodiment, a chip packaging structure is provided, which includes a substrate, an acoustic transducer chip, a cap and an encapsulant. The substrate has a first substrate surface, a second substrate surface and acoustic holes opposite to each other. There is a circuit layer on the surface of the first substrate. The electroacoustic wave chip is configured on the first substrate surface of the substrate and is electrically connected to the circuit layer. An active surface of the electroacoustic chip is facing the acoustic hole. The cover structure is arranged on the first substrate surface of the substrate, and has an accommodating space for accommodating the electroacoustic wave chip. The encapsulant wraps the covering structure and the circuit layer outside the covering structure. One of the substrate and the encapsulant has several conductive through holes. The conductive through hole is in direct contact with the circuit layer, and is electrically connected to the electroacoustic wave chip through the circuit layer.
根据一实施例，提出一种芯片封装结构，其包括一基板、一电声波芯片与一遮罩。基板具有相对的一第一基板表面、一第二基板表面、一声孔与数个延伸在第一基板表面与第二基板表面之间的导电穿孔。第一基板表面上具有一线路层电性连接至导电穿孔。电声波芯片配置在基板的第一基板表面上，并电性连接至线路层。电声波芯片的一主动面是朝向声孔。遮罩配置在基板的第一基板表面上，并具有一容置空间用以容置电声波芯片。According to an embodiment, a chip packaging structure is provided, which includes a substrate, an electroacoustic wave chip, and a mask. The substrate has a first substrate surface, a second substrate surface, acoustic holes and several conductive through holes extending between the first substrate surface and the second substrate surface. A circuit layer is electrically connected to the conductive through hole on the surface of the first substrate. The electroacoustic wave chip is configured on the first substrate surface of the substrate and is electrically connected to the circuit layer. An active surface of the electroacoustic chip is facing the acoustic hole. The mask is arranged on the first substrate surface of the substrate, and has an accommodating space for accommodating the electroacoustic wave chip.
根据一实施例，提出一种芯片封装结构的制造方法，其包括以下步骤。提供一基板。基板具有相对的一第一基板表面、一第二基板表面与一声孔。第一基板表面上具有一线路层。配置一电声波芯片在基板的第一基板表面上，并电性连接至线路层。电声波芯片的一主动面是朝向声孔。配置一盖结构在基板的第一基板表面上，并具有一容置空间用以容置电声波芯片。利用一封胶体包覆盖结构与盖结构外侧的线路层。在基板与封胶体其中之一中形成数个导电穿孔。导电穿孔直接与线路层接触，且经由线路层电性连接至电声波芯片。According to an embodiment, a method for manufacturing a chip packaging structure is provided, which includes the following steps. A substrate is provided. The substrate has a first substrate surface, a second substrate surface and acoustic holes opposite to each other. There is a circuit layer on the surface of the first substrate. An electroacoustic wave chip is disposed on the first substrate surface of the substrate and electrically connected to the circuit layer. An active surface of the electroacoustic chip is facing the acoustic hole. A cover structure is disposed on the first substrate surface of the substrate, and has an accommodating space for accommodating the electroacoustic chip. Use a colloid package to cover the structure and cover the circuit layer outside the structure. A plurality of conductive through holes are formed in one of the substrate and the encapsulant. The conductive through hole is in direct contact with the circuit layer, and is electrically connected to the electroacoustic wave chip through the circuit layer.
为了对本发明的上述及其他方面有更佳的了解，下文特举较佳实施例，并配合附图，作详细说明如下：In order to have a better understanding of the above-mentioned and other aspects of the present invention, the preferred embodiments are specifically cited below, together with the accompanying drawings, and are described in detail as follows:
附图说明Description of drawings
图1绘示根据一实施例中的芯片封装结构。FIG. 1 illustrates a chip package structure according to an embodiment.
图2绘示根据一实施例中芯片封装结构的上视示意图。FIG. 2 is a schematic top view of a chip package structure according to an embodiment.
图3绘示根据一实施例中的芯片封装结构。FIG. 3 illustrates a chip packaging structure according to an embodiment.
图4绘示根据一实施例中芯片封装结构的上视示意图。FIG. 4 is a schematic top view of a chip package structure according to an embodiment.
图5绘示根据一实施例中芯片封装结构的上视示意图。FIG. 5 is a schematic top view of a chip package structure according to an embodiment.
图6绘示根据一实施例中的芯片封装结构。FIG. 6 illustrates a chip package structure according to an embodiment.
图7绘示根据一实施例中的芯片封装结构。FIG. 7 illustrates a chip packaging structure according to an embodiment.
图8绘示根据一实施例中的芯片封装结构。FIG. 8 illustrates a chip packaging structure according to an embodiment.
图9A至图9J绘示根据一实施例的芯片封装结构的制造方法。9A to 9J illustrate a method of manufacturing a chip package structure according to an embodiment.
图10A至图10F绘示根据一实施例的芯片封装结构的制造方法。10A to 10F illustrate a method for manufacturing a chip package structure according to an embodiment.
图11A至图11D绘示根据一实施例的芯片封装结构的制造方法。11A to 11D illustrate a method for manufacturing a chip package structure according to an embodiment.
图12A至图12D绘示根据一实施例的芯片封装结构的制造方法。12A to 12D illustrate a method of manufacturing a chip package structure according to an embodiment.
符号说明：Symbol Description:
102、202、302、402、502～芯片封装结构；104～基板；106～电声波芯片；108～盖结构；110～封胶体；112～第一基板表面；114～第二基板表面；116～线路层；118～绝缘层；120、121～开口；122～声孔；124～主动面；126～导电垫；128～导电凸块；130～振膜；132～共振腔室；134、134A～导电胶；138、138A～容置空间；140、140A、140B～导电穿孔；142～表面；144、144A～导电垫；146、146A～焊料球；147～上表面；148、150、150A、150B～导线；152～遮罩；154～容置空间；156、156A、156B～穿孔。102, 202, 302, 402, 502～chip package structure; 104～substrate; 106～electroacoustic wave chip; 108～cover structure; 110～sealing body; 112～first substrate surface; 114～second substrate surface; 116 ～circuit layer; 118～insulating layer; 120, 121～opening; 122～acoustic hole; 124～active surface; 126～conductive pad; 128～conductive bump; 130～diaphragm; 132～resonant chamber; 134, 134A ～Conductive adhesive; 138, 138A～accommodating space; 140, 140A, 140B～conductive perforation; 142～surface; 144, 144A～conductive pad; 146, 146A～solder ball; 147～upper surface; 150B～wire; 152～shield; 154～accommodating space; 156, 156A, 156B～perforation.
具体实施方式detailed description
请参照图1，其绘示根据一实施例中芯片封装结构102，包括一基板104、一电声波芯片(acoustic transducer chip)106、一盖结构(cap)108与一封胶体110。Please refer to FIG. 1 , which shows a chip package structure 102 according to an embodiment, including a substrate 104 , an acoustic transducer chip 106 , a cap 108 and an encapsulant 110 .
基板104具有相对的一第一基板表面112与一第二基板表面114。第一基板表面112上具有一线路层116。绝缘层118配置在线路层116上，并具有数个开口120、121露出部分线路层116。基板104具有一声孔122，可用以接收外部的声波。The substrate 104 has a first substrate surface 112 and a second substrate surface 114 opposite to each other. A circuit layer 116 is formed on the first substrate surface 112 . The insulating layer 118 is disposed on the circuit layer 116 and has several openings 120 , 121 exposing part of the circuit layer 116 . The substrate 104 has an acoustic hole 122 for receiving external acoustic waves.
电声波芯片106可经由覆晶技术，配置在基板104的第一基板表面112上，并通过主动面124上的导电垫126与填充开口120的导电凸块128电性连接至线路层116，其中电声波芯片106的主动面124是朝向基板104的声孔122。电声波芯片106包括微机电麦克风芯片(MEMS microphone die)。电声波芯片106的主动面124具有振膜130。电声波芯片106具有共振腔室132。导电凸块128可包括焊料材料、铜，或其他合适的导电材料。The electroacoustic wave chip 106 can be disposed on the first substrate surface 112 of the substrate 104 via flip-chip technology, and electrically connected to the circuit layer 116 through the conductive pad 126 on the active surface 124 and the conductive bump 128 filling the opening 120, The active surface 124 of the electroacoustic wave chip 106 is facing the acoustic hole 122 of the substrate 104 . The electro-acoustic wave chip 106 includes a micro-electro-mechanical microphone chip (MEMS microphone die). The active surface 124 of the electroacoustic wave chip 106 has a diaphragm 130 . The electroacoustic wave chip 106 has a resonance chamber 132 . The conductive bumps 128 may include solder material, copper, or other suitable conductive materials.
数个互相分开的导电胶134配置在绝缘层118的开口121中，并电性连接至开口121露出的线路层116。A plurality of conductive adhesives 134 separated from each other are disposed in the opening 121 of the insulating layer 118 and electrically connected to the circuit layer 116 exposed by the opening 121 .
盖结构108配置在基板104的第一基板表面112上，并具有一容置空间138用以容置单一个电声波芯片106。与声孔122连通的容置空间138可用作电声波芯片106的共振腔室。于一实施例中，盖结构108是经由导电胶134贴附至基板104并电性连接至线路层116。盖结构108的材质包括金属或其他合适的导电材料。The cover structure 108 is disposed on the first substrate surface 112 of the substrate 104 and has an accommodating space 138 for accommodating a single electroacoustic wave chip 106 . The accommodating space 138 communicating with the acoustic hole 122 can be used as a resonance chamber of the electroacoustic wave chip 106 . In one embodiment, the cover structure 108 is attached to the substrate 104 via a conductive adhesive 134 and is electrically connected to the circuit layer 116 . The material of the cover structure 108 includes metal or other suitable conductive materials.
封胶体110封装盖结构108与盖结构108外侧的线路层116与绝缘层118。举例来说，封胶体110包括有机环氧树脂，或其他合适的绝缘材料。封胶体110与绝缘层118具有数个导电穿孔140，因此导电穿孔140与线路层116直接接触，而导电穿孔140便可以经由线路层116电性连接至电声波芯片106与盖结构108，以有效达成结构薄型化与减少电性损耗的目的。The encapsulant 110 encapsulates the cover structure 108 and the wiring layer 116 and the insulating layer 118 outside the cover structure 108 . For example, the encapsulant 110 includes organic epoxy resin, or other suitable insulating materials. The encapsulant 110 and the insulating layer 118 have several conductive through holes 140, so the conductive through holes 140 are in direct contact with the circuit layer 116, and the conductive through holes 140 can be electrically connected to the electroacoustic wave chip 106 and the cover structure 108 through the circuit layer 116, so as to Effectively achieve the purpose of thinning the structure and reducing electrical loss.
可在封胶体110的表面142上配置与导电穿孔140电性连接的其他接触结构，例如图1所示的导电垫144与焊料球146，芯片封装结构102可藉其物理连接并电性连接至其他信号端或装置结构。于一实施例中，举例来说，盖结构108是通过导电胶134、线路层116、导电穿孔140、导电垫144与焊料球146电性连接至一外部的接地端，且盖结构108可用作电磁波干扰(Electromagnetic Interference，EMI)防护作用。Other contact structures electrically connected to the conductive via 140 may be disposed on the surface 142 of the encapsulant 110, such as the conductive pad 144 and the solder ball 146 shown in FIG. Other signal terminals or device structures. In one embodiment, for example, the cover structure 108 is electrically connected to an external ground terminal through the conductive glue 134, the circuit layer 116, the conductive via 140, the conductive pad 144 and the solder ball 146, and the cover structure 108 can be used For electromagnetic interference (Electromagnetic Interference, EMI) protection.
请参照图2，其绘示如图1所示的芯片封装结构102的上视示意图。线路层116包括数个导线148与导线150。电声波芯片106上的导电凸块128是经由导线148电性连接至导电穿孔140。位在绝缘层118的开口121中且呈点状分布的导电胶134是经由导线150电性连接至导电穿孔140，盖结构108因直接与导电胶134接触，便可经由导电胶134与导线150而电性连接至导电穿孔140，导电穿孔140例如电性连接至一外部接地电源，而使盖结构108与外部接地电源电性连接。Please refer to FIG. 2 , which is a schematic top view of the chip package structure 102 shown in FIG. 1 . The circuit layer 116 includes a plurality of wires 148 and wires 150 . The conductive bumps 128 on the electroacoustic wave chip 106 are electrically connected to the conductive vias 140 via wires 148 . The conductive glue 134 located in the opening 121 of the insulating layer 118 and distributed in dots is electrically connected to the conductive through hole 140 through the wire 150, and the cover structure 108 can be connected to the wire 150 through the conductive glue 134 because it is in direct contact with the conductive glue 134. And electrically connected to the conductive through hole 140 , for example, the conductive through hole 140 is electrically connected to an external ground power source, so that the cover structure 108 is electrically connected to the external ground power source.
请参照图3，其绘示根据一实施例中芯片封装结构202。图3的芯片封装结构202与图1的芯片封装结构102之间的差异在于，一部分导电胶134A是配置在绝缘层118的上表面147，且另一部分的导电胶134A是填充在绝缘层118的开口121中，藉此使盖结构108电性连接至开口121露出的线路层116与导电穿孔140。Please refer to FIG. 3 , which illustrates a chip package structure 202 according to an embodiment. The difference between the chip packaging structure 202 of FIG. 3 and the chip packaging structure 102 of FIG. In the opening 121 , the cover structure 108 is electrically connected to the circuit layer 116 and the conductive via 140 exposed by the opening 121 .
请参照图4，其绘示如图3所示的芯片封装结构202于一实施例中的上视示意图。线路层116包括数个导线148与导线150A。电声波芯片106上的导电凸块128是经由导线148电性连接至导电穿孔140。长条状的导电胶134A是经由设置于绝缘层118的上表面147(图3)的部分，与填充绝缘层118的开口121中的部分而电性连接至基板104的第一基板表面112上的导线150A与导电穿孔140。由于本实施例中导电胶134A为一L型结构，经由增加盖结构108与导电胶134A的接触面积，达到稳定盖结构108物理与电气特性的目的。Please refer to FIG. 4 , which shows a schematic top view of the chip package structure 202 shown in FIG. 3 in an embodiment. The circuit layer 116 includes a plurality of wires 148 and wires 150A. The conductive bumps 128 on the electroacoustic wave chip 106 are electrically connected to the conductive vias 140 via wires 148 . The strip-shaped conductive glue 134A is electrically connected to the first substrate surface 112 of the substrate 104 via the portion disposed on the upper surface 147 ( FIG. 3 ) of the insulating layer 118 and the portion filling the opening 121 of the insulating layer 118 The wires 150A and the conductive vias 140 . Since the conductive adhesive 134A in this embodiment is an L-shaped structure, the purpose of stabilizing the physical and electrical properties of the cover structure 108 is achieved by increasing the contact area between the cover structure 108 and the conductive adhesive 134A.
请参照图5，其绘示如图3所示的芯片封装结构202于一实施例中的上视示意图。图5与图4之间的差异在于，导电胶134A是配置成环状，且是经由设置于绝缘层118的上表面147(图3)的部分，与填充绝缘层118的开口121中的部分以电性连接至导线150B与导电穿孔140，经由增加盖结构108与导电胶134A的接触面积，达到稳定盖结构108物理与电气特性的目的。Please refer to FIG. 5 , which shows a schematic top view of the chip package structure 202 shown in FIG. 3 in an embodiment. The difference between FIG. 5 and FIG. 4 is that the conductive glue 134A is configured in a ring shape, and is disposed on the upper surface 147 ( FIG. 3 ) of the insulating layer 118 and fills the opening 121 of the insulating layer 118. By being electrically connected to the wire 150B and the conductive through hole 140 , the purpose of stabilizing the physical and electrical properties of the cover structure 108 is achieved by increasing the contact area between the cover structure 108 and the conductive glue 134A.
实施例的导电胶的配置并不限于如图2、图4与图5的方式，而可根据其他实际条件需求(例如盖结构108的形状、制造成本等考量)适当地调变。The configuration of the conductive glue in the embodiment is not limited to the manners shown in FIG. 2 , FIG. 4 and FIG. 5 , but can be appropriately adjusted according to other actual requirements (such as the shape of the cover structure 108 , manufacturing cost, etc.).
请参照图6，其绘示根据一实施例中芯片封装结构302。图6的芯片封装结构302与图3的芯片封装结构202之间的差异在于，基板104具有数个导电穿孔140A，且导电穿孔140A经由线路层116电性连接至电声波芯片106与导电胶134A。导电穿孔140A可包括焊料材料。于一些实施例中，导电胶134A具有如图4或图5所示的配置。导电胶134A并不限于不同部分配置在绝缘层118上并填充开口121，而可如图1所示的对应开口121来配置，并具有如图2所示的分布。Please refer to FIG. 6 , which illustrates a chip package structure 302 according to an embodiment. The difference between the chip packaging structure 302 in FIG. 6 and the chip packaging structure 202 in FIG. 134A. The conductive via 140A may include a solder material. In some embodiments, the conductive glue 134A has a configuration as shown in FIG. 4 or FIG. 5 . The conductive glue 134A is not limited to be disposed on the insulating layer 118 and fill the opening 121 in different parts, but can be disposed corresponding to the opening 121 as shown in FIG. 1 and have a distribution as shown in FIG. 2 .
请参照图7，其绘示根据一实施例中芯片封装结构402。图7的芯片封装结构402与图1的芯片封装结构102之间的差异在于，省略了绝缘层118与导电胶134。再者，盖结构108是配置在线路层116上，并直接与线路层116电性连接。Please refer to FIG. 7 , which illustrates a chip package structure 402 according to an embodiment. The difference between the chip package structure 402 in FIG. 7 and the chip package structure 102 in FIG. 1 is that the insulating layer 118 and the conductive glue 134 are omitted. Furthermore, the cover structure 108 is disposed on the circuit layer 116 and is directly electrically connected to the circuit layer 116 .
请参照图8，其绘示根据一实施例中芯片封装结构502。图8芯片封装结构502与图1的芯片封装结构102之间的差异在于，省略了绝缘层118与导电胶134。再者，遮罩(lid)152配置在基板104的第一基板表面112上，并具有一容置空间154用以容置单一个电声波芯片106与线路层116。与声孔122连通的容置空间154可用作电声波芯片106的共振腔室。于一实施例中，举例来说，遮罩152的材质包括金属或其他合适的导电材料，并可电性连接至一外部的接地端，用作电磁波干扰防护作用。基板104具有数个导电穿孔140B，且导电穿孔140B经由线路层116电性连接至电声波芯片106。可在基板104的第二基板表面114上配置与导电穿孔140B电性连接的其他接触结构，例如图8所示的导电垫144A与焊料球146A，藉其将芯片封装结构502物理连接并电性连接至其他信号端或装置结构。于其他实施例中，导电穿孔140B可替换成如图6所示由焊料材料填充穿孔所形成的结构，并省略导电垫144A与焊料球146A，反的亦然。Please refer to FIG. 8 , which illustrates a chip package structure 502 according to an embodiment. The difference between the chip packaging structure 502 in FIG. 8 and the chip packaging structure 102 in FIG. 1 is that the insulating layer 118 and the conductive adhesive 134 are omitted. Furthermore, the lid 152 is disposed on the first substrate surface 112 of the substrate 104 and has a containing space 154 for containing a single electroacoustic wave chip 106 and the circuit layer 116 . The accommodating space 154 communicating with the acoustic hole 122 can be used as a resonance chamber of the electroacoustic wave chip 106 . In one embodiment, for example, the material of the shield 152 includes metal or other suitable conductive materials, and can be electrically connected to an external ground terminal for electromagnetic interference protection. The substrate 104 has a plurality of conductive through holes 140B, and the conductive through holes 140B are electrically connected to the electroacoustic wave chip 106 through the circuit layer 116 . Other contact structures electrically connected to the conductive vias 140B may be disposed on the second substrate surface 114 of the substrate 104, such as the conductive pads 144A and solder balls 146A shown in FIG. Connect to other signal terminals or device structures. In other embodiments, the conductive through hole 140B can be replaced with a structure formed by filling the through hole with solder material as shown in FIG. 6 , and the conductive pad 144A and the solder ball 146A are omitted, and vice versa.
于实施例中，芯片封装结构为芯片级(chip-scale)的封装结构，具有微小的尺寸而能应用至各种装置系统，因此利用价值高。In the embodiment, the chip packaging structure is a chip-scale packaging structure, which has a small size and can be applied to various device systems, so the utilization value is high.
图9A至图9J绘示根据一实施例的芯片封装结构的制造方法。9A to 9J illustrate a method of manufacturing a chip package structure according to an embodiment.
请参照图9A，在基板104的第一基板表面112上形成线路层116。基板104可包括玻璃基板，其具有较佳的绝缘效果且成本低。基板104可以晶圆级的工艺制造。于一实施例中，线路层116的形成方法包括在第一基板表面112上形成导电层(包括金属例如铜或其他合适的导电材料)，然后图案化导电层以形成线路层116。线路层116可包括导线、导电垫等。Referring to FIG. 9A , a circuit layer 116 is formed on the first substrate surface 112 of the substrate 104 . The substrate 104 may include a glass substrate, which has better insulating effect and low cost. The substrate 104 can be manufactured in a wafer-level process. In one embodiment, the method for forming the circuit layer 116 includes forming a conductive layer (including metal such as copper or other suitable conductive materials) on the first substrate surface 112 , and then patterning the conductive layer to form the circuit layer 116 . The circuit layer 116 may include wires, conductive pads and the like.
请参照图9B，在基板104的第一基板表面112与线路层116上形成绝缘层118。于一实施例中，绝缘层118的形成方法包括在第一基板表面112与线路层116上形成绝缘薄膜，然后图案化绝缘薄膜以形成露出部分线路层116的开口120、开口121。在一些实施例中，可经由绝缘层118的开口120、开口121定义出线路层116的导电垫。Referring to FIG. 9B , an insulating layer 118 is formed on the first substrate surface 112 and the circuit layer 116 of the substrate 104 . In one embodiment, the method for forming the insulating layer 118 includes forming an insulating film on the first substrate surface 112 and the circuit layer 116 , and then patterning the insulating film to form openings 120 and 121 exposing part of the circuit layer 116 . In some embodiments, the conductive pads of the circuit layer 116 can be defined through the openings 120 and 121 of the insulating layer 118 .
请参照图9C，在基板104与绝缘层118中形成声孔122。声孔122可以鑚孔或蚀刻的方式形成，例如深反应性离子蚀刻、激光蚀刻、湿式化学蚀刻等方式。于一实施例中，基板104包括硅基板，其形成声孔122(穿孔)的工艺简单。基板104可以晶圆级的工艺制造。Referring to FIG. 9C , an acoustic hole 122 is formed in the substrate 104 and the insulating layer 118 . The acoustic hole 122 can be formed by drilling or etching, such as deep reactive ion etching, laser etching, wet chemical etching and the like. In one embodiment, the substrate 104 includes a silicon substrate, and the process for forming the acoustic hole 122 (through hole) is simple. The substrate 104 can be manufactured in a wafer-level process.
请参照图9D，可经由覆晶技术，将电声波芯片106配置在基板104的第一基板表面112上，并通过主动面124上的导电垫126与填充开口120的导电凸块128电性连接至线路层116。Please refer to FIG. 9D , the electroacoustic wave chip 106 can be disposed on the first substrate surface 112 of the substrate 104 through the flip-chip technology, and the conductive pad 126 on the active surface 124 is electrically connected to the conductive bump 128 filling the opening 120. Connect to line layer 116.
请参照图9E，可利用点胶的方式，将导电胶134配置在绝缘层118的开口121中与绝缘层118上。将盖结构108配置在基板104的第一基板表面112上，其中电声波芯片106是容置在盖结构108的容置空间138中。于一实施例中，盖结构108是经由导电胶134贴附至基板104并电性连接至线路层116。Referring to FIG. 9E , the conductive glue 134 can be disposed in the opening 121 of the insulating layer 118 and on the insulating layer 118 by dispensing glue. The cover structure 108 is disposed on the first substrate surface 112 of the substrate 104 , wherein the electroacoustic wave chip 106 is accommodated in the accommodating space 138 of the cover structure 108 . In one embodiment, the cover structure 108 is attached to the substrate 104 via a conductive adhesive 134 and is electrically connected to the circuit layer 116 .
请参照图9F，利用封胶体110封装盖结构108与盖结构108外侧的线路层116与绝缘层118。Referring to FIG. 9F , the cover structure 108 and the wiring layer 116 and the insulating layer 118 outside the cover structure 108 are encapsulated by the encapsulant 110 .
请参照图9G，在封胶体110与绝缘层118中形成露出线路层116的穿孔156。穿孔156可以鑚孔或蚀刻的方式形成，例如深反应性离子蚀刻、激光蚀刻、湿式化学蚀刻等方式。Referring to FIG. 9G , a through hole 156 exposing the circuit layer 116 is formed in the encapsulant 110 and the insulating layer 118 . The through hole 156 can be formed by drilling or etching, such as deep reactive ion etching, laser etching, wet chemical etching and the like.
请参照图9H，利用导电材料填充穿孔156以形成导电穿孔140，使导电穿孔140与线路层116直接接触。Referring to FIG. 9H , the through hole 156 is filled with a conductive material to form a conductive through hole 140 , so that the conductive through hole 140 is in direct contact with the circuit layer 116 .
请参照图9I，可在封胶体110的表面142上配置与导电穿孔140电性连接的导电垫144与焊料球146。Referring to FIG. 9I , conductive pads 144 and solder balls 146 electrically connected to the conductive vias 140 can be disposed on the surface 142 of the encapsulant 110 .
请参照图9J，进行切割步骤，以将数个芯片封装结构102单元分开。Referring to FIG. 9J , a cutting step is performed to separate several chip package structures 102 units.
图10A至图10F绘示根据一实施例的芯片封装结构的制造方法。先前的步骤与图9A至第9B图类似，于此不再描述。10A to 10F illustrate a method for manufacturing a chip package structure according to an embodiment. The previous steps are similar to those shown in FIGS. 9A to 9B , and will not be described again here.
请参照图10A，在基板104与绝缘层118中形成声孔122。此外，从第二基板表面114往基板104中形成露出线路层116的穿孔156A。穿孔156A可以钻孔或蚀刻的方式形成，例如深反应性离子蚀刻、激光蚀刻、湿式化学蚀刻等方式。于一实施例中，基板104包括硅基板，其形成声孔122、穿孔156A的工艺简单。于另一实施例中，基板104包括玻璃基板，其具有较佳的绝缘效果且成本低。基板104并不限于硅基板与玻璃基板，而可包括其他合适的基板。基板104可以晶圆级的工艺制造。Referring to FIG. 10A , an acoustic hole 122 is formed in the substrate 104 and the insulating layer 118 . In addition, a through hole 156A exposing the circuit layer 116 is formed from the second substrate surface 114 into the substrate 104 . The through hole 156A can be formed by drilling or etching, such as deep reactive ion etching, laser etching, wet chemical etching and the like. In one embodiment, the substrate 104 includes a silicon substrate, and the process for forming the acoustic hole 122 and the through hole 156A is simple. In another embodiment, the substrate 104 includes a glass substrate, which has better insulation effect and low cost. The substrate 104 is not limited to a silicon substrate and a glass substrate, but may include other suitable substrates. The substrate 104 can be manufactured in a wafer-level process.
请参照图10B，可经由覆晶技术，将电声波芯片106配置在基板104的第一基板表面112上，并通过电声波芯片106主动面124上的导电垫126与填充开口120的导电凸块128电性连接至线路层116。Please refer to FIG. 10B , the electroacoustic wave chip 106 can be disposed on the first substrate surface 112 of the substrate 104 through flip-chip technology, and the conductive pad 126 on the active surface 124 of the electroacoustic wave chip 106 and the conductive pad 126 filling the opening 120 can be used. The bump 128 is electrically connected to the circuit layer 116 .
请参照图10C，可利用点胶的方式，将导电胶134A配置在绝缘层118的开口121中与绝缘层118上。将盖结构108配置在基板104的第一基板表面112上，其中电声波芯片106是容置在盖结构108的容置空间138中。于一实施例中，盖结构108是经由导电胶134A贴附至基板104并电性连接至线路层116。Referring to FIG. 10C , the conductive glue 134A can be disposed in the opening 121 of the insulating layer 118 and on the insulating layer 118 by dispensing glue. The cover structure 108 is disposed on the first substrate surface 112 of the substrate 104 , wherein the electroacoustic wave chip 106 is accommodated in the accommodating space 138 of the cover structure 108 . In one embodiment, the cover structure 108 is attached to the substrate 104 via a conductive adhesive 134A and is electrically connected to the circuit layer 116 .
请参照图10D，利用封胶体110封装盖结构108与盖结构108外侧的线路层116与绝缘层118。Referring to FIG. 10D , the cover structure 108 and the circuit layer 116 and the insulating layer 118 outside the cover structure 108 are encapsulated by the encapsulant 110 .
请参照图10E，利用焊料材料填充穿孔156A，以形成导电穿孔140A。于其他实施例中，焊料材料可以其他合适的导电材料取代，例如铜、铝等。Referring to FIG. 10E , the through hole 156A is filled with solder material to form the conductive through hole 140A. In other embodiments, the solder material can be replaced by other suitable conductive materials, such as copper, aluminum, and the like.
请参照图10F，进行切割步骤，以将数个芯片封装结构202的单元分开。Referring to FIG. 10F , a dicing step is performed to separate units of several chip packaging structures 202 .
图11A至图11D绘示根据一实施例的芯片封装结构的制造方法。11A to 11D illustrate a method for manufacturing a chip package structure according to an embodiment.
请参照图11A，在基板104的第一基板表面112上形成线路层116。于基板104中形成声孔122。可经由覆晶技术，将电声波芯片106配置在基板104的第一基板表面112上，并通过电声波芯片106主动面124上的导电垫126与导电凸块128电性连接至线路层116。将盖结构108配置在基板104的第一基板表面112上，其中电声波芯片106是容置在盖结构108的容置空间138A中。Referring to FIG. 11A , a circuit layer 116 is formed on the first substrate surface 112 of the substrate 104 . An acoustic hole 122 is formed in the substrate 104 . The electroacoustic wave chip 106 can be disposed on the first substrate surface 112 of the substrate 104 through flip-chip technology, and electrically connected to the circuit layer through the conductive pad 126 and the conductive bump 128 on the active surface 124 of the electroacoustic wave chip 106 116. The cover structure 108 is disposed on the first substrate surface 112 of the substrate 104 , wherein the electroacoustic wave chip 106 is accommodated in the accommodating space 138A of the cover structure 108 .
请参照图11B，利用封胶体110封装盖结构108与盖结构108外侧的线路层116。Referring to FIG. 11B , the cover structure 108 and the circuit layer 116 outside the cover structure 108 are encapsulated by the encapsulant 110 .
请参照图11C，在封胶体110中形成露出线路层116的穿孔156。再者，利用导电材料填充穿孔156以形成导电穿孔140。可在封胶体110的表面142上配置与导电穿孔140电性连接的导电垫144与焊料球146。Referring to FIG. 11C , a through hole 156 exposing the circuit layer 116 is formed in the encapsulant 110 . Furthermore, the through hole 156 is filled with a conductive material to form the conductive through hole 140 . Conductive pads 144 and solder balls 146 electrically connected to the conductive vias 140 can be disposed on the surface 142 of the encapsulant 110 .
请参照图11D，进行切割步骤，以将数个芯片封装结构402的单元分开。Referring to FIG. 11D , a dicing step is performed to separate units of several chip packaging structures 402 .
图12A至图12D绘示根据一实施例的芯片封装结构的制造方法。12A to 12D illustrate a method of manufacturing a chip package structure according to an embodiment.
请参照图12A，在基板104的第一基板表面112上形成线路层116。于基板104中形成声孔122。可经由覆晶技术，将电声波芯片106配置在基板104的第一基板表面112上，并通过电声波芯片106主动面124上的导电垫126与导电凸块128电性连接至线路层116。Referring to FIG. 12A , a circuit layer 116 is formed on the first substrate surface 112 of the substrate 104 . An acoustic hole 122 is formed in the substrate 104 . The electroacoustic wave chip 106 can be disposed on the first substrate surface 112 of the substrate 104 through flip-chip technology, and electrically connected to the circuit layer through the conductive pad 126 and the conductive bump 128 on the active surface 124 of the electroacoustic wave chip 106 116.
请参照图12B，在基板104中形成露出线路层116的穿孔156B。穿孔156B可以钻孔或蚀刻的方式形成，例如深反应性离子蚀刻、激光蚀刻、湿式化学蚀刻等方式。再者，利用导电材料填充穿孔156B以形成导电穿孔140B。可在基板104的第二基板表面114上配置与导电穿孔140B电性连接的导电垫144A与焊料球146A。Referring to FIG. 12B , a through hole 156B exposing the wiring layer 116 is formed in the substrate 104 . The through hole 156B can be formed by drilling or etching, such as deep reactive ion etching, laser etching, wet chemical etching and the like. Furthermore, the through hole 156B is filled with a conductive material to form the conductive through hole 140B. Conductive pads 144A and solder balls 146A electrically connected to the conductive vias 140B can be disposed on the second substrate surface 114 of the substrate 104 .
请参照图12C，进行切割步骤，以将数个单元结构分开。Referring to FIG. 12C , a cutting step is performed to separate several unit structures.
请参照图12D，将具有容置空间154的遮罩152配置在基板104的第一基板表面112上，其中电声波芯片106与线路层116是容置在容置空间154中。于另一实施例中，亦可先将具有容置空间154的遮罩152配置在基板104的第一基板表面112上，再进行切割步骤。Referring to FIG. 12D , the mask 152 having the accommodating space 154 is disposed on the first substrate surface 112 of the substrate 104 , wherein the electroacoustic wave chip 106 and the circuit layer 116 are accommodated in the accommodating space 154 . In another embodiment, the mask 152 having the accommodating space 154 may also be disposed on the first substrate surface 112 of the substrate 104 first, and then the cutting step is performed.
实施例的芯片封装结构及其制造方法可应用至晶圆级(wafer level)的封装。The chip packaging structure and manufacturing method of the embodiments can be applied to wafer level packaging.
综上所述，虽然本发明已以较佳实施例揭露如上，然其并非用以限定本发明。本发明所属技术领域中具有通常知识者，在不脱离本发明的精神和范围内，当可作各种的更动与润饰。因此，本发明的保护范围当视权利要求书所界定者为准。To sum up, although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Those skilled in the art of the present invention can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the claims.
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310127767.6ACN103260125B (en) | 2013-04-12 | 2013-04-12 | Chip package structure and manufacturing method thereof |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310127767.6ACN103260125B (en) | 2013-04-12 | 2013-04-12 | Chip package structure and manufacturing method thereof |
| Publication Number | Publication Date |
|---|---|
| CN103260125A CN103260125A (en) | 2013-08-21 |
| CN103260125Btrue CN103260125B (en) | 2017-06-06 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310127767.6AActiveCN103260125B (en) | 2013-04-12 | 2013-04-12 | Chip package structure and manufacturing method thereof |
| Country | Link |
|---|---|
| CN (1) | CN103260125B (en) |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104979298B (en)* | 2015-06-26 | 2017-11-21 | 江西芯创光电有限公司 | A kind of package substrate and its manufacture craft |
| CN106608613A (en)* | 2015-10-24 | 2017-05-03 | 美律电子(深圳)有限公司 | Chip package of micro-electro-mechanical system and manufacturing method of chip package |
| CN110759311A (en)* | 2019-10-29 | 2020-02-07 | 太极半导体（苏州）有限公司 | Leadless MEMS chip packaging structure based on window type substrate and process thereof |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101534465A (en)* | 2008-03-11 | 2009-09-16 | 佳世达科技股份有限公司 | Micro-electro-mechanical microphone and packaging method thereof |
| CN201846474U (en)* | 2010-10-12 | 2011-05-25 | 歌尔声学股份有限公司 | Silicon microphone |
| CN101325823B (en)* | 2007-06-11 | 2011-08-17 | 美律实业股份有限公司 | Encapsulation structure of silicon crystal microphone |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9215519B2 (en)* | 2010-07-30 | 2015-12-15 | Invensense, Inc. | Reduced footprint microphone system with spacer member having through-hole |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101325823B (en)* | 2007-06-11 | 2011-08-17 | 美律实业股份有限公司 | Encapsulation structure of silicon crystal microphone |
| CN101534465A (en)* | 2008-03-11 | 2009-09-16 | 佳世达科技股份有限公司 | Micro-electro-mechanical microphone and packaging method thereof |
| CN201846474U (en)* | 2010-10-12 | 2011-05-25 | 歌尔声学股份有限公司 | Silicon microphone |
| Publication number | Publication date |
|---|---|
| CN103260125A (en) | 2013-08-21 |
| Publication | Publication Date | Title |
|---|---|---|
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