CN103095231A - Novel common mode feedback circuit - Google Patents

Abstract

Translated fromChinese

本发明涉及一种新型的共模反馈电路，包括输出共模电流检测电路、误差放大器和参考电流产生电路。当将本电路的差分输入端与全差分运算放大器的输出端相连时，输出共模电流检测电路将产生与全差分运算放大器的输出共模电平相关的一个电流，通过误差放大器和负反馈，使此电流与参考电流产生电路产生的参考电流相等，从而使全差分运算放大器的输出共模电平等于某一参考电压。采用本发明实现共模反馈时，不需要定时对电路进行刷新、不会降低全差分运算放大器的开环增益、输出摆幅和输入共模范围等；同时具有较小的面积和寄生效应等优点。

The invention relates to a novel common-mode feedback circuit, which includes an output common-mode current detection circuit, an error amplifier and a reference current generation circuit. When the differential input of this circuit is connected to the output of the fully differential operational amplifier, the output common mode current detection circuit will generate a current related to the output common mode level of the fully differential operational amplifier, through the error amplifier and negative feedback, Make this current equal to the reference current generated by the reference current generating circuit, so that the output common mode level of the fully differential operational amplifier is equal to a certain reference voltage. When using the present invention to realize common-mode feedback, the circuit does not need to be refreshed regularly, and the open-loop gain, output swing and input common-mode range of the fully differential operational amplifier will not be reduced; at the same time, it has the advantages of smaller area and parasitic effects, etc. .

Description

Translated fromChinese

一种新型的共模反馈电路A New Common Mode Feedback Circuit

技术领域technical field

本发明涉及全差分运算放大器技术领域，尤其涉及一种新型的共模反馈电路。The invention relates to the technical field of fully differential operational amplifiers, in particular to a novel common-mode feedback circuit.

背景技术Background technique

现有技术公开了运算放大器是模拟集成电路中的一个重要模块。与单端输出的运算放大器相比，全差分运算放大器具有更大的输出摆幅和更强的抗干扰能力，在模数转换器、滤波器等电路中得到广泛的应用。The prior art discloses that an operational amplifier is an important block in an analog integrated circuit. Compared with single-ended output operational amplifiers, fully differential operational amplifiers have larger output swings and stronger anti-interference capabilities, and are widely used in circuits such as analog-to-digital converters and filters.

研究显示，由于高增益全差分运算放大器的输出共模电平对器件的失配非常敏感，所以必须通过增加共模反馈电路来稳定其输出共模电平。共模反馈电路通常要实现以下功能：对输出共模电平进行检测，将检测结果与某一参考电压进行比较，产生误差电压或误差电流，用于调节放大器的某一路偏置电流，通过负反馈来将输出共模电平稳定为该参考电压。Studies have shown that since the output common-mode level of a high-gain fully differential operational amplifier is very sensitive to device mismatch, it is necessary to stabilize its output common-mode level by adding a common-mode feedback circuit. The common-mode feedback circuit usually needs to realize the following functions: detect the output common-mode level, compare the detection result with a certain reference voltage, and generate an error voltage or error current, which is used to adjust a certain bias current of the amplifier. feedback to stabilize the output common-mode level to this reference voltage.

现有的用于输出共模电平检测的电路有以下几类，一类是用电阻检测，但是用于检测的电阻必须比运算放大器的输出阻抗大很多，否则会降低放大器的开环增益，而高阻值的电阻会占用大的芯片面积和带来大的寄生效应；一类是用工作在深线性区的MOS管检测，但是这种方法存在如下两个问题，一个问题是会减小放大器的输出电压摆幅或输入共模范围，另一问题是不能将输出共模电压稳定在一个确定的值；还有一类是用电容检测，但是这类电路需要周期性地刷新。Existing circuits for outputting common-mode level detection include the following types. One type uses resistance detection, but the resistance used for detection must be much larger than the output impedance of the operational amplifier, otherwise the open-loop gain of the amplifier will be reduced. A resistor with a high resistance value will occupy a large chip area and bring a large parasitic effect; one is to use a MOS tube working in a deep linear region for detection, but this method has the following two problems, one problem is that it will reduce The output voltage swing or input common-mode range of the amplifier, another problem is that the output common-mode voltage cannot be stabilized at a certain value; another type is to use capacitance detection, but this type of circuit needs to be refreshed periodically.

发明内容Contents of the invention

本发明的主要目的在于克服现有技术存在的缺陷，提供一种新型的共模反馈电路。The main purpose of the present invention is to overcome the defects in the prior art and provide a novel common-mode feedback circuit.

为了达到上述目的，本发明的技术方案是：提供了一种新型的共模反馈电路(如图1所示)，由输出共模电流检测电路(1)、误差放大器(2)和参考电流产生电路(3)组成；有四个输入端，其中V_inp和V_inn为两个差分输入端，V_bp为偏置电压输入端，V_ref为参考电压输入端；有一个输出端V_cmfb；In order to achieve the above object, the technical solution of the present invention is to provide a novel common-mode feedback circuit (as shown in Figure 1), which is generated by the output common-mode current detection circuit (1), error amplifier (2) and reference current The circuit (3) consists of four input terminals, wherein V_inp and Vin_in are two differential input terminals, V_bp is a bias voltage input terminal, and V_ref is a reference voltage input terminal; there is an output terminal V_cmfb ;

所述输出共模电流检测电路(1)由四个MOS管组成，其中PMOS管M₁和M₂的栅极分别与输入端V_inp和V_inn相连；PMOS管M₁和M₂的漏极共点，并与NMOS管M₃的漏极和栅极相连；NMOS管M₃的源极与地GND相连；PMOS管M₄的栅极与输入端V_bp相连；M₄的源极与电源VDD相连；PMOS管M₁和M₂的源极共点，并与PMOS管M₄的漏极、V_{in_cm}端以及误差放大器的一个输入端相连；The output common-mode current detection circuit (1) is composed of four MOS transistors, wherein the gates of the PMOS transistors_M1 and_M2 are connected to the input terminals V_inp and_Vinn respectively; the drains of the PMOS transistors_M1 and_M2 common point, and connected to the drain and gate of the NMOS transistor_M3 ; the source of the NMOS transistor_M3 is connected to the ground GND; the gate of the PMOS transistor_M4 is connected to the input terminal V_bp ; the source of the_M4 is connected to the power supply VDD is connected; the sources of the PMOS transistors_M1 and_M2 are at the same point, and are connected to the drain of the PMOS transistor_M4 , the V_{in_cm} terminal and an input terminal of the error amplifier;

所述参考电流产生电路(3)由四个MOS管组成，其中PMOS管M₆和M₇的栅极分别与输入端V_ref相连；PMOS管M₆和M₇的漏极共点，并与NMOS管M₅的漏极和栅极相连；NMOS管M₅的源极与地GND相连；PMOS管M₈的栅极与输入端V_bp相连；M₈的源极与电源VDD相连；PMOS管M₆和M₇的源极共点，并与PMOS管M₈的漏极、V_{ref_cm}端以及误差放大器的一个输入端相连；The reference current generating circuit (3) is composed of four MOS transistors, wherein the gates of the PMOS transistors_M6 and_M7 are respectively connected to the input terminal_Vref ; the drains of the PMOS transistors_M6 and_M7 are at the same point, and are connected with The drain of the NMOS transistor_M5 is connected to the gate; the source of the NMOS transistor_M5 is connected to the ground GND; the gate of the PMOS transistor_M8 is connected to the input terminal_Vbp ; the source of the_M8 is connected to the power supply VDD; The sources of M₆ and M₇ are at the same point, and are connected to the drain of the PMOS transistor M₈ , the V_{ref_cm} terminal and an input terminal of the error amplifier;

所述误差放大器(2)的输出与输出端V_cmfb相连。The output of the error amplifier (2) is connected to the output terminal V_cmfb .

在实现共模反馈功能时，差分输入端V_inp和V_inn分别与全差分运算放大器的输出端V_outp和V_outn相连，输出端V_cmfb用于控制全差分运算放大器的某一路偏置电流，构成负反馈回路，使运算放大器的输出共模电平等于参考电压V_ref。When realizing the common-mode feedback function, the differential input terminals V_inp and V_inn are respectively connected to the output terminals V_outp and V_outn of the fully differential operational amplifier, and the output terminal V_cmfb is used to control a certain bias current of the fully differential operational amplifier. A negative feedback loop is formed to make the output common mode level of the operational amplifier equal to the reference voltage V_ref .

当全差分运算放大器的输出共模电平发生变化时，如当输出共模电平高于参考电压V_ref时，输出共模电流检测电路(1)的V_{in_cm}端电压上升，通过误差放大器(2)将其与参考电流产生电路(3)的V_{ref_cm}端电压进行比较，并将误差电压放大，通过V_cmfb输出端控制运算放大器的某一路偏置电流，使输出共模电平下降，最终使其等于参考电压V_ref。同样，当输出共模电平低于参考电压V_ref时，输出共模电流检测电路(1)的V_{in_cm}端电压下降，通过误差放大器(2)将其与参考电流产生电路(3)的V_{ref_cm}端电压进行比较，并将误差电压放大，通过V_cmfb输出端控制运算放大器的某一路偏置电流，通过负反馈使输出共模电平上升，最终使其等于参考电压V_ref。When the output common-mode level of the fully differential operational amplifier changes, such as when the output common-mode level is higher than the reference voltage V_ref , the V_{in_cm} terminal voltage of the output common-mode current detection circuit (1) rises, through the error amplifier ( 2) Compare it with the V_{ref_cm} terminal voltage of the reference current generating circuit (3), and amplify the error voltage, control a certain bias current of the operational amplifier through the V_cmfb output terminal, so that the output common-mode level drops, and finally Make it equal to the reference voltage V_ref . Similarly, when the output common-mode level is lower than the reference voltage V_ref , the voltage at the V_{in_cm} terminal of the output common-mode current detection circuit (1) drops, and it is connected to the V of the reference current generation circuit (3) through the error amplifier (2). The voltage at_{the ref_cm} terminal is compared, and the error voltage is amplified, and a certain bias current of the operational amplifier is controlled through the V_cmfb output terminal, and the output common-mode level is increased through negative feedback, and finally equal to the reference voltage V_ref .

本发明的共模反馈电路具有以下优点：The common mode feedback circuit of the present invention has the following advantages:

1、利用本发明实现的共模反馈电路，不需要定时对电路进行刷新、不会降低运算放大器的开环增益、输出摆幅和输入共模范围等；1. The common-mode feedback circuit realized by the present invention does not need to regularly refresh the circuit, and will not reduce the open-loop gain, output swing and input common-mode range of the operational amplifier;

2、同时具有较小的面积和寄生效应等优点。2. At the same time, it has the advantages of smaller area and parasitic effects.

附图说明Description of drawings

图1为本发明的共模反馈电路的电路示意图。FIG. 1 is a schematic circuit diagram of a common-mode feedback circuit of the present invention.

具体实施方式Detailed ways

下面结合附图对本发明进一步详细说明。The present invention will be described in further detail below in conjunction with the accompanying drawings.

图1所示为本发明提供的一种新型的共模反馈电路的电路图，由输出共模电流检测电路(1)、误差放大器(2)和参考电流产生电路(3)组成。PMOS管M₁、M₂、M₆和M₇相同，PMOS管M₄和M₈相同，NMOS管M₃和M₅相同。Figure 1 shows a circuit diagram of a novel common-mode feedback circuit provided by the present invention, which is composed of an output common-mode current detection circuit (1), an error amplifier (2) and a reference current generation circuit (3). The PMOS transistors M₁ , M₂ , M₆ and M₇ are the same, the PMOS transistors M₄ and M₈ are the same, and the NMOS transistors M₃ and M₅ are the same.

当本发明用于共模反馈时，差分输入端V_inp和V_inn分别与全差分运算放大器的输出端V_outp和V_outn相连。共模电流检测电路(1)中的差分输入对M₁和M₂管的共模输入电平，即全差分运算放大器的输出共模电平V_cm为：When the present invention is used for common mode feedback, the differential input terminals V_inp and V_inn are respectively connected to the output terminals V_outp and V_outn of the fully differential operational amplifier. The common-mode input level of the differential input pair_M1 and_M2 in the common-mode current detection circuit (1), that is, the output common-mode level V_cm of the fully differential operational amplifier is:

V_cm＝0.5*(V_outp+V_outn)    (1)V_cm ＝0.5*(V_outp +V_outn ) (1)

PMOS管M₄的电流为：The current of PMOS transistor_M4 is:

${\mathrm{<span><span>I</span>I</span>}}_{\mathrm{<span><span>M</span>m</span>}\mathrm{<span><span>4</span>4</span>}}<span><span>=</span>=</span>{\mathrm{<span><span>\&mu;</span>\&mu;</span>}}_{\mathrm{<span><span>p</span>p</span>}}{\mathrm{<span><span>C</span>C</span>}}_{\mathrm{<span><span>ox</span>ox</span>}}\frac{{\mathrm{<span><span>W</span>W</span>}}_{\mathrm{<span><span>4</span>4</span>}}}{{\mathrm{<span><span>L</span>L</span>}}_{\mathrm{<span><span>4</span>4</span>}}}{<span><span>(</span>(</span>{\mathrm{<span><span>V</span>V</span>}}_{\mathrm{<span><span>cm</span>cm</span>}}<span><span>-</span>-</span>{\mathrm{<span><span>V</span>V</span>}}_{\mathrm{<span><span>in</span>in</span>}<span><span>\_</span>\_</span>\mathrm{<span><span>cm</span>cm</span>}}<span><span>-</span>-</span>{\mathrm{<span><span>V</span>V</span>}}_{\mathrm{<span><span>th</span>the\; th</span>}}<span><span>)</span>)</span>}^{\mathrm{<span><span>2</span>2</span>}}<span><span>-</span>-</span><span><span>-</span>-</span><span><span>-</span>-</span><span><span>(</span>(</span>\mathrm{<span><span>2</span>2</span>}<span><span>)</span>)</span>$

式(2)中μ_p，C_ox，V_th和

分别为M₁/M₂管的载流子迁移率，单位面积的栅氧化层电容，阈值电压和宽长比。In formula (2), μ_p , C_ox , V_th and

They are the carrier mobility of the M₁ /M₂ tube, the capacitance of the gate oxide layer per unit area, the threshold voltage and the width-to-length ratio.

参考电流产生电路(3)中的差分对M₆和M₇管的共模输入电平为V_ref，流过MOS管M₈的电流为：The common-mode input level of the differential pair_M6 and_M7 in the reference current generating circuit (3) is_Vref , and the current flowing through the MOS transistor_M8 is:

${\mathrm{<span><span>I</span>I</span>}}_{\mathrm{<span><span>M</span>m</span>}\mathrm{<span><span>8</span>8</span>}}<span><span>=</span>=</span>{\mathrm{<span><span>\&mu;</span>\&mu;</span>}}_{\mathrm{<span><span>p</span>p</span>}}{\mathrm{<span><span>C</span>C</span>}}_{\mathrm{<span><span>ox</span>ox</span>}}\frac{{\mathrm{<span><span>W</span>W</span>}}_{\mathrm{<span><span>6</span>6</span>}}}{{\mathrm{<span><span>L</span>L</span>}}_{\mathrm{<span><span>6</span>6</span>}}}{<span><span>(</span>(</span>{\mathrm{<span><span>V</span>V</span>}}_{\mathrm{<span><span>ref</span>ref</span>}}<span><span>-</span>-</span>{\mathrm{<span><span>V</span>V</span>}}_{\mathrm{<span><span>ref</span>ref</span>}<span><span>\_</span>\_</span>\mathrm{<span><span>cm</span>cm</span>}}<span><span>-</span>-</span>{\mathrm{<span><span>V</span>V</span>}}_{\mathrm{<span><span>th</span>the\; th</span>}}<span><span>)</span>)</span>}^{\mathrm{<span><span>2</span>2</span>}}<span><span>-</span>-</span><span><span>-</span>-</span><span><span>-</span>-</span><span><span>(</span>(</span>\mathrm{<span><span>3</span>3</span>}<span><span>)</span>)</span>$

式(3)中μ_p，C_ox，V_th和

分别为M₆/M₇管的载流子迁移率，单位面积的栅氧化层电容，阈值电压和宽长比。In formula (3), μ_p , C_ox , V_th and

They are the carrier mobility of the M₆ /M₇ tube, the capacitance of the gate oxide layer per unit area, the threshold voltage and the width-to-length ratio.

由于负反馈的作用，使误差放大器(2)的两个输入端电压相等，即V_{ref_cm}＝V_{in_cm}。因为MOS管M₄和M₈具有相同的尺寸和相同的栅极电压、漏极电压和源极电压，所以有I_M8＝I_M4，即式(2)等于式(3)。由于MOS管M₁、M₂、M₆和M₇同为PMOS管，且具有相同的宽度和长度，故由式(2)＝式(3)可得：Due to the effect of negative feedback, the voltages at the two input terminals of the error amplifier (2) are equal, ie V_{ref_cm} =V_{in_cm} . Because the MOS transistors M₄ and M₈ have the same size and the same gate voltage, drain voltage and source voltage, there is I_M8 =I_M4 , that is, formula (2) is equal to formula (3). Since the MOS tubes M₁ , M₂ , M₆ and M₇ are all PMOS tubes and have the same width and length, it can be obtained from formula (2) = formula (3):

V_cm＝V_ref        (4)V_cm = V_ref (4)

这样，就把全差分运算放大器的输出共模电平稳定为参考电压V_ref。In this way, the output common-mode level of the fully differential operational amplifier is stabilized as the reference voltage V_ref .

与现有的共模反馈技术相比，本发明的一种新型的共模反馈电路不需要定时对电路进行刷新、不会降低运算放大器的开环增益、输出摆幅和输入共模范围等；同时具有较小的面积和寄生效应等优点。Compared with the existing common-mode feedback technology, a new type of common-mode feedback circuit of the present invention does not need to regularly refresh the circuit, and will not reduce the open-loop gain, output swing and input common-mode range of the operational amplifier; At the same time, it has the advantages of smaller area and parasitic effects.

Claims (4)

Translated fromChinese

1.一种新型的共模反馈电路，其特征在于，该电路由输出共模电流检测电路(1)、误差放大器(2)和参考电流产生电路(3)组成；有四个输入端，其中V_inp和V_inn为两个差分输入端，V_bp为偏置电压输入端，V_ref为参考电压输入端；有一个输出端V_cmfb；1. A novel common-mode feedback circuit is characterized in that the circuit is made up of an output common-mode current detection circuit (1), an error amplifier (2) and a reference current generating circuit (3); four input terminals are arranged, wherein V_inp and_Vin are two differential input terminals, V_bp is a bias voltage input terminal, V_ref is a reference voltage input terminal; there is an output terminal V_cmfb ;所述输出共模电流检测电路(1)由四个MOS管组成，其中PMOS管M₁和M₂的栅极分别与输入端V_inp和V_inn相连；PMOS管M₁和M₂的漏极共点，并与NMOS管M₃的漏极和栅极相连；NMOS管M₃的源极与地GND相连；PMOS管M₄的栅极与输入端V_bp相连；M₄的源极与电源VDD相连；PMOS管M₁和M₂的源极共点，并与PMOS管M₄的漏极、V_{in_cm}端以及误差放大器的一个输入端相连；The output common-mode current detection circuit (1) is composed of four MOS transistors, wherein the gates of the PMOS transistors_M1 and_M2 are connected to the input terminals V_inp and_Vinn respectively; the drains of the PMOS transistors_M1 and_M2 common point, and connected to the drain and gate of the NMOS transistor_M3 ; the source of the NMOS transistor_M3 is connected to the ground GND; the gate of the PMOS transistor_M4 is connected to the input terminal V_bp ; the source of the_M4 is connected to the power supply VDD is connected; the sources of the PMOS transistors_M1 and_M2 are at the same point, and are connected to the drain of the PMOS transistor_M4 , the V_{in_cm} terminal and an input terminal of the error amplifier;所述参考电流产生电路(3)由四个MOS管组成，其中PMOS管M₆和M₇的栅极分别与输入端V_ref相连；PMOS管M₆和M₇的漏极共点，并与NMOS管M₅的漏极和栅极相连；NMOS管M₅的源极与地GND相连；PMOS管M₈的栅极与输入端V_bp相连；M₈的源极与电源VDD相连；PMOS管M₆和M₇的源极共点，并与PMOS管M₈的漏极、V_{ref_cm}端以及误差放大器的一个输入端相连；The reference current generating circuit (3) is composed of four MOS transistors, wherein the gates of the PMOS transistors_M6 and_M7 are respectively connected to the input terminal_Vref ; the drains of the PMOS transistors_M6 and_M7 are at the same point, and are connected with The drain of the NMOS transistor_M5 is connected to the gate; the source of the NMOS transistor_M5 is connected to the ground GND; the gate of the PMOS transistor_M8 is connected to the input terminal_Vbp ; the source of the_M8 is connected to the power supply VDD; The sources of M₆ and M₇ are at the same point, and are connected to the drain of the PMOS transistor M₈ , the V_{ref_cm} terminal and an input terminal of the error amplifier;所述误差放大器(2)的输出与输出端V_cmfb相连。The output of the error amplifier (2) is connected to the output terminal V_cmfb .2.按权利要求1所述的共模反馈电路，其特征在于，在实现共模反馈功能时，所述的差分输入端V_inp和V_inn分别与全差分运算放大器的输出端V_outp和V_outn相连，输出端V_cmfb用于控制全差分运算放大器的某一路偏置电流，构成负反馈回路，使运算放大器的输出共模电平等于参考电压V_ref。2. by the described common-mode feedback circuit of claim 1, it is characterized in that, when realizing common-mode feedback function, described differential input terminal V_inp and V_inn are respectively connected with output terminal V_outp and V of fully differential operational amplifier_outn is connected, and the output terminal V_cmfb is used to control a certain bias current of the fully differential operational amplifier to form a negative feedback loop, so that the output common mode level of the operational amplifier is equal to the reference voltage V_ref .3.按权利要求1所述的共模反馈电路，其特征在于，当全差分运算放大器的输出共模电平发生变化时，其中，当输出共模电平高于参考电压V_ref时，输出共模电流检测电路(1)的V_{in_cm}端电压上升，通过误差放大器(2)将其与参考电流产生电路(3)的V_{ref_cm}端电压进行比较，并将误差电压放大，通过V_cmfb输出端控制运算放大器的某一路偏置电流，使输出共模电平下降，最终使其等于参考电压V_ref。3. The common-mode feedback circuit according to claim 1, wherein when the output common-mode level of the fully differential operational amplifier changes, wherein, when the output common-mode level is higher than the reference voltage_Vref , the output The V_{in_cm} terminal voltage of the common-mode current detection circuit (1) rises, and is compared with the V_{ref_cm} terminal voltage of the reference current generation circuit (3) through the error amplifier (2), and the error voltage is amplified, and the V_cmfb output terminal A bias current of a channel of the operational amplifier is controlled to reduce the output common-mode level and finally make it equal to the reference voltage V_ref .4.按权利要求1所述的共模反馈电路，其特征在于，当全差分运算放大器的输出共模电平发生变化时，其中，当输出共模电平低于参考电压V_ref时，输出共模电流检测电路(1)的V_{in_cm}端电压下降，通过误差放大器(2)将其与参考电流产生电路(3)的V_{ref_cm}端电压进行比较，并将误差电压放大，通过V_cmfb输出端控制运算放大器的某一路偏置电流，通过负反馈使输出共模电平上升，最终使其等于参考电压V_ref。4. The common-mode feedback circuit according to claim 1, wherein when the output common-mode level of the fully differential operational amplifier changes, wherein, when the output common-mode level is lower than the reference voltage_Vref , the output The V_{in_cm} terminal voltage of the common-mode current detection circuit (1) drops, and it is compared with the V_{ref_cm} terminal voltage of the reference current generation circuit (3) through the error amplifier (2), and the error voltage is amplified, and the V_cmfb output terminal A bias current of a certain channel of the operational amplifier is controlled, and the output common-mode level is increased through negative feedback to finally make it equal to the reference voltage V_ref .

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