技术领域technical field
本发明属于平板显示领域，具体涉及一种像素驱动电路及其驱动方法。The invention belongs to the field of flat panel display, and in particular relates to a pixel driving circuit and a driving method thereof.
背景技术Background technique
有源矩阵有机发光二级管（Active Matrix Organic Light-Emitting Diode）AMOLED具有体积小，结构简单、自主发光、亮度高、画质好、可视角度大、功耗低及响应时间短等优点，因而引起广泛关注，极可能成为取代液晶的下一代显示技术。Active Matrix Organic Light-Emitting Diode (Active Matrix Organic Light-Emitting Diode) AMOLED has the advantages of small size, simple structure, self-illumination, high brightness, good picture quality, large viewing angle, low power consumption and short response time, etc. Therefore, it has attracted widespread attention and is likely to become a next-generation display technology to replace liquid crystals.
当前，用于驱动AMOLED的薄膜晶体管TFT主要有非晶硅薄膜晶体管和多晶硅薄膜晶体管。由于有机发光二级管OLED电流驱动的特性，OLED需要大电流来驱动，由于非晶硅薄膜晶体管由于载流子迁移率低无法提供足够的驱动电流，而多晶硅薄膜晶体管和金属氧化物半导体晶体管的载流子迁移率远大于非晶硅薄膜晶体管由于载流子迁移率，能满足驱动OLED的要求，因而多晶硅薄膜晶体管和金属氧化物半导体晶体管成为驱动OLED的首选。现有技术中，通常采用两个晶体管一个电容2T1C的像素驱动电路用来驱动OLED。但是，以多晶硅TFT作为驱动管，由于多晶硅材料的晶粒间界随机分布，多晶硅TFT的阈值电压在显示区域的各像素之间分布不均匀，导致显示区域亮度不均匀；大部分金属氧化物半导体也是多晶结构，也存在阈值电压在各像素之间分布不均匀的问题。因此，传统的两个晶体管一个电容2T1C的像素驱动电路结构不适合高质量AMOLED显示。为了实现对驱动管的阈值电压的补偿，需要通过电路补偿来更好的驱动像素电路。Currently, TFTs used to drive AMOLEDs mainly include amorphous silicon thin film transistors and polysilicon thin film transistors. Due to the current-driven characteristics of organic light-emitting diodes (OLEDs), OLEDs require a large current to drive, because amorphous silicon thin film transistors cannot provide sufficient driving current due to low carrier mobility, and polysilicon thin film transistors and metal oxide semiconductor transistors Carrier mobility is much greater than that of amorphous silicon thin film transistors. Because of the carrier mobility, it can meet the requirements of driving OLEDs, so polysilicon thin film transistors and metal oxide semiconductor transistors have become the first choice for driving OLEDs. In the prior art, a pixel driving circuit with two transistors and one capacitor 2T1C is usually used to drive the OLED. However, using polysilicon TFT as the driver tube, due to the random distribution of grain boundaries of polysilicon material, the threshold voltage of polysilicon TFT is unevenly distributed among the pixels in the display area, resulting in uneven brightness in the display area; most metal oxide semiconductors It is also a polycrystalline structure, and there is also the problem that the threshold voltage is not uniformly distributed among the pixels. Therefore, the traditional pixel driving circuit structure of two transistors and one capacitor 2T1C is not suitable for high-quality AMOLED display. In order to achieve compensation for the threshold voltage of the driving tube, it is necessary to drive the pixel circuit better through circuit compensation.
然而，现有技术中，大部分AMOLED像素驱动电路的设计只能在一定程度上补偿驱动管的阈值电压，并不能精确地消除由阈值分布不均匀所带来的显示不均匀的问题。However, in the prior art, the design of most AMOLED pixel driving circuits can only compensate the threshold voltage of the driving tube to a certain extent, but cannot accurately eliminate the problem of uneven display caused by uneven threshold distribution.
发明内容Contents of the invention
为了克服上述现有技术的缺陷和不足，本发明提供一种精确补偿驱动管的阈值电压的AMOLED的像素驱动电路及其驱动方法。In order to overcome the defects and deficiencies of the above-mentioned prior art, the present invention provides an AMOLED pixel driving circuit and a driving method thereof that accurately compensates the threshold voltage of the driving tube.
本发明的一个目的在于提供一种像素驱动电路。An object of the present invention is to provide a pixel driving circuit.
本发明的像素驱动电路包括：第一晶体管至第四晶体管、存储电容、有机发光二级管OLED、旁路电路、数据线、第N-1扫描线和第N扫描线；其中，N为自然数，The pixel driving circuit of the present invention includes: first transistor to fourth transistor, storage capacitor, organic light emitting diode OLED, bypass circuit, data line, N-1th scanning line and Nth scanning line; wherein, N is a natural number ,
第一晶体管的漏极接电源电压，栅极接存储电容的第一端，源极接存储电容的第二端及OLED的阳极；The drain of the first transistor is connected to the power supply voltage, the gate is connected to the first end of the storage capacitor, and the source is connected to the second end of the storage capacitor and the anode of the OLED;
第二晶体管的漏极和栅极接存储电容的第一端、第三晶体管的源极及第一晶体管的栅极，源极接第四晶体管的漏极；The drain and gate of the second transistor are connected to the first end of the storage capacitor, the source of the third transistor and the gate of the first transistor, and the source is connected to the drain of the fourth transistor;
第三晶体管的栅极接第N-1扫描线，漏极接电源电压，源极接存储电容、第一晶体管的栅极及第二晶体管的漏极和栅极；The gate of the third transistor is connected to the N-1th scanning line, the drain is connected to the power supply voltage, and the source is connected to the storage capacitor, the gate of the first transistor, and the drain and gate of the second transistor;
第四晶体管的栅极接第N扫描线，漏极接第二晶体管的源极，源极接数据线；The gate of the fourth transistor is connected to the Nth scan line, the drain is connected to the source of the second transistor, and the source is connected to the data line;
存储电容的第一端接第一晶体管的栅极、第三晶体管源极及第二晶体管的栅极和漏极，第二端接OLED的阳极及第一晶体管的源极；The first terminal of the storage capacitor is connected to the gate of the first transistor, the source of the third transistor, and the gate and drain of the second transistor, and the second terminal is connected to the anode of the OLED and the source of the first transistor;
OLED的阳极接存储电容的第二端及第一晶体管的源极，阴极接地；The anode of the OLED is connected to the second end of the storage capacitor and the source of the first transistor, and the cathode is grounded;
旁路电路与OLED并联，两个控制端分别接第N-1扫描线和第N扫描线。The bypass circuit is connected in parallel with the OLED, and the two control terminals are respectively connected to the N-1th scanning line and the Nth scanning line.
第一晶体管作为驱动管，为OLED提供驱动电流。The first transistor serves as a driving transistor to provide driving current for the OLED.
第二晶体管、第三晶体管及旁路电路在第N-1扫描线为高电平并且扫描线第N扫描线为低电平时，对存储电容进行预充电。The second transistor, the third transistor and the bypass circuit precharge the storage capacitor when the N-1th scan line is at high level and the Nth scan line is at low level.
第二晶体管、第四晶体管及旁路电路在第N-1扫描线为低电平并且第N扫描线为高电平时，将数据电压写入到第一晶体管的栅极并存储于存储电容。The second transistor, the fourth transistor and the bypass circuit write the data voltage into the gate of the first transistor and store it in the storage capacitor when the N-1th scan line is at low level and the Nth scan line is at high level.
第N扫描线为第N次编程时的扫描线；第N-1扫描线为第N-1次编程时的扫描线。The Nth scanning line is the scanning line for the Nth programming; the N-1th scanning line is the scanning line for the N-1th programming.
第一晶体管至第四晶体管采用多晶硅薄膜晶体管或金属氧化物半导体晶体管。The first to fourth transistors are polysilicon thin film transistors or metal oxide semiconductor transistors.
在显示区域中，各个像素位于不同区域，因此位于不同区域的像素的晶体管的阈值电压的漂移各不相同（增大或减小），而在同一像素内的晶体管的阈值电压的漂移是一致的（同时增大或减小）。因此，在同一像素内，第一晶体管和第二晶体管在版图设置中紧密排列，并且尺寸相同，使得在同一像素中两者的阈值电压始终保持大小一致，即VTH1=VTH2。In the display area, each pixel is located in a different area, so the drift of the threshold voltage of the transistor of the pixel located in different areas is different (increase or decrease), while the drift of the threshold voltage of the transistor in the same pixel is consistent (simultaneously increase or decrease). Therefore, in the same pixel, the first transistor and the second transistor are closely arranged in the layout setting and have the same size, so that the threshold voltages of the two transistors in the same pixel are always kept the same, that is, VTH1 =VTH2 .
旁路电路与OLED并联，两个控制端分别接第N-1扫描线和第N扫描线。在编程状态时，即第N-1扫描线为高电平和第N扫描线为低电平，或第N-1扫描线为低电平和第N扫描线为高电平时，旁路电路导通，电流从旁路电路通过，OLED被旁路，从而OLED不发光，避免了当第N-1扫描线为高电平的时候有大电流流过OLED的情况，有利于提高开口率及显示分辨率。The bypass circuit is connected in parallel with the OLED, and the two control terminals are respectively connected to the N-1th scanning line and the Nth scanning line. In the programming state, that is, when the N-1 scanning line is high and the N scanning line is low, or the N-1 scanning line is low and the N scanning line is high, the bypass circuit is turned on , the current passes through the bypass circuit, and the OLED is bypassed, so that the OLED does not emit light, avoiding the situation that a large current flows through the OLED when the N-1th scanning line is at a high level, which is conducive to improving the aperture ratio and display resolution Rate.
OLED的第二端接作为驱动管的第一晶体管的源极，避免了在工作阶段的驱动电流对OLED的影响。The second terminal of the OLED is connected as the source of the first transistor of the driving tube, which avoids the influence of the driving current on the OLED in the working stage.
本发明的另一个目的在于提供一种上述像素驱动电路的驱动方法。Another object of the present invention is to provide a driving method for the above-mentioned pixel driving circuit.
一种像素驱动电路的驱动方法，包括以下步骤：A driving method for a pixel driving circuit, comprising the following steps:
1）预设阶段：第N-1扫描线为高电平并且第N扫描线为低电平，在此阶段，第二晶体管和第三晶体管开启，旁路电路导通，电源电压对存储电容预充电至电源电压；1) Preset stage: the N-1th scan line is at high level and the Nth scan line is at low level, at this stage, the second transistor and the third transistor are turned on, the bypass circuit is turned on, and the power supply voltage is on the storage capacitor precharged to supply voltage;
2）调整阶段：第N-1扫描线为低电平并且第N扫描线为高电平阶段，在此阶段，第二晶体管和第四晶体管开启，旁路电路导通，存储电容通过第二晶体管和第四晶体管放电，直到第二晶体管进入截止状态停止放电，此时存储电容上的电压为数据电压加上第二晶体管的阈值电压；2) Adjustment phase: the N-1th scan line is low level and the Nth scan line is high level phase. In this phase, the second transistor and the fourth transistor are turned on, the bypass circuit is turned on, and the storage capacitor passes through the second Discharging the transistor and the fourth transistor until the second transistor enters an off state and stops discharging, at this time, the voltage on the storage capacitor is the data voltage plus the threshold voltage of the second transistor;
3）工作阶段：第N-1扫描线和第N扫描线为低电平，在此阶段，第二晶体管、第四晶体管及旁路电路截止，存储电容两端的电压保持不变，其中，N为自然数。3) Working phase: the N-1 scanning line and the N scanning line are at low level. In this phase, the second transistor, the fourth transistor and the bypass circuit are cut off, and the voltage across the storage capacitor remains unchanged. Among them, N is a natural number.
在工作阶段，由于第二晶体管、第四晶体管及旁路电路截止，存储电容不存在泄放通路，故存储电容的两端的电压保持不变，故此时存储电容上的电压为数据电压、第二晶体管的阈值电压和OLED的阳极电压之和。而此时流过第一晶体管的电流即为流过OLED的电流，其电流大小正比与第一晶体管的栅源电压与阈值电压之差的平方成正比，而第一晶体管的阈值电压等于第二晶体管的阈值电压，因此流过OLED的电流之与数据电压的平方成正比。因此流过OLED的电流完全由数据电压决定，而与第一晶体管的阈值电压无关。In the working stage, since the second transistor, the fourth transistor and the bypass circuit are cut off, there is no discharge path for the storage capacitor, so the voltage across the storage capacitor remains unchanged, so the voltage on the storage capacitor is the data voltage, the second The sum of the threshold voltage of the transistor and the anode voltage of the OLED. At this time, the current flowing through the first transistor is the current flowing through the OLED, and its magnitude is proportional to the square of the difference between the gate-source voltage and the threshold voltage of the first transistor, and the threshold voltage of the first transistor is equal to the second The threshold voltage of the transistor, and therefore the current through the OLED, is proportional to the square of the data voltage. Therefore, the current flowing through the OLED is completely determined by the data voltage and has nothing to do with the threshold voltage of the first transistor.
现有技术中，OLED的第二端接地，流过OLED的电流与电源电压与OLED的开启电压之差成正比。在本发明中，由于存储电容的第二端连接第一晶体管的源极，这样流过OLED的电流与数据电压的平方成正比。因此，在保证流过OLED的电流相同的情况下，本发明的数据电压可以小得多。由于数据电压越大，对于抑制阈值电压分布不均匀的能力就越差，因此，本发明能在保证流过OLED的电流相同的情况下，有效地减小数据电压，极大地提高了抑制阈值电压分布不均匀的能力。In the prior art, the second terminal of the OLED is grounded, and the current flowing through the OLED is proportional to the difference between the power supply voltage and the turn-on voltage of the OLED. In the present invention, since the second end of the storage capacitor is connected to the source of the first transistor, the current flowing through the OLED is proportional to the square of the data voltage. Therefore, under the condition that the current flowing through the OLED is kept the same, the data voltage of the present invention can be much smaller. Since the greater the data voltage, the worse the ability to suppress the uneven distribution of the threshold voltage, therefore, the present invention can effectively reduce the data voltage and greatly improve the suppression threshold voltage under the condition that the current flowing through the OLED is the same. Ability to distribute unevenly.
本发明的有益效果：Beneficial effects of the present invention:
本发明的像素驱动电路，采用存储电容的第二端接第一晶体管的源极，以及OLED与旁路电路并联，使得流过OLED的电流完全由数据电压决定，而与第一晶体管的阈值电压无关。本发明在不过多增加晶体管、电容及控制线的数量的同时，使得流经OLED的电流完全依赖于数据线的数据电压，能够精确地实现阈值电压补偿以保持显示亮度的均匀恒定，有利于提高开口率及显示分辨率，而且能在保证流过OLED的电流相同的情况下，有效地减小数据电压，极大地提高了抑制电压分布不均匀的能力。因此，本发明具有较高的实用价值，有望广泛用于微电子和平板显示产业。In the pixel driving circuit of the present invention, the second terminal of the storage capacitor is connected to the source of the first transistor, and the OLED is connected in parallel with the bypass circuit, so that the current flowing through the OLED is completely determined by the data voltage, and is not related to the threshold voltage of the first transistor. irrelevant. The present invention makes the current flowing through the OLED completely depend on the data voltage of the data line without excessively increasing the number of transistors, capacitors and control lines, and can accurately realize threshold voltage compensation to keep the display brightness uniform and constant, which is beneficial to improve Aperture ratio and display resolution, and can effectively reduce the data voltage while ensuring the same current flowing through the OLED, greatly improving the ability to suppress uneven voltage distribution. Therefore, the invention has high practical value and is expected to be widely used in microelectronics and flat panel display industries.
附图说明Description of drawings
图1为本发明的像素驱动电路的实施例一的电路图；FIG. 1 is a circuit diagram of Embodiment 1 of the pixel driving circuit of the present invention;
图2为本发明的像素驱动电路的实施例二的电路图；2 is a circuit diagram of Embodiment 2 of the pixel driving circuit of the present invention;
图3为本发明的实施例的信号时序图。FIG. 3 is a signal timing diagram of an embodiment of the present invention.
具体实施方式Detailed ways
下面结合附图，通过实施例对本发明做进一步说明。The present invention will be further described through the embodiments below in conjunction with the accompanying drawings.
实施例一Embodiment one
本发明的像素驱动电路包括：第一晶体管T1至第四晶体管T4、存储电容CS、有机发光二级管OLED、旁路电路、数据线、第N-1扫描线VN-1和第N扫描线VN；其中，The pixel driving circuit of the present invention includes: first transistor T1 to fourth transistor T4, storage capacitor CS , organic light emitting diode OLED, bypass circuit, data line, N-1th scanning line VN-1 and Nth scan line VN ; where,
第一晶体管T1的漏极接电源电压，栅极接存储电容CS的第一端，源极接存储电容CS的第二端及OLED的阳极；The drain of the first transistor T1 is connected to the power supply voltage, the gate is connected to the first end of the storage capacitorCS , and the source is connected to the second end of the storage capacitorCS and the anode of the OLED;
第二晶体管T2的漏极和栅极接存储电容CS的第一端、第三晶体管T3的源极及第一晶体管T1的栅极，源极接第四晶体管T4的漏极；The drain and gate of the second transistor T2 are connected to the first end of the storage capacitorCS , the source of the third transistor T3 and the gate of the first transistor T1, and the source is connected to the drain of the fourth transistor T4;
第三晶体管T3的栅极接第N-1扫描线，漏极接电源电压，源极接存储电容CS、第一晶体管T1的栅极及第二晶体管T2的漏极和栅极；The gate of the third transistor T3 is connected to the N-1th scanning line, the drain is connected to the power supply voltage, and the source is connected to the storage capacitorCS , the gate of the first transistor T1, and the drain and gate of the second transistor T2;
第四晶体管T4的栅极接第N扫描线，漏极接第二晶体管T2的源极，源极接数据线；The gate of the fourth transistor T4 is connected to the Nth scanning line, the drain is connected to the source of the second transistor T2, and the source is connected to the data line;
存储电容CS的第一端接第一晶体管T1的栅极、第三晶体管T3源极及第二晶体管T2的栅极和漏极，第二端接OLED的阳极及第一晶体管T1的源极；The first terminal of the storage capacitorCS is connected to the gate of the first transistor T1, the source of the third transistor T3, and the gate and drain of the second transistor T2, and the second terminal is connected to the anode of the OLED and the source of the first transistor T1 ;
OLED的阳极接存储电容的第二端及第一晶体管T1的源极，阴极接地；The anode of the OLED is connected to the second end of the storage capacitor and the source of the first transistor T1, and the cathode is grounded;
在本实施例中，旁路电路为异步双栅薄膜晶体管T5，与OLED并联，漏极接OLED的阳极，源极接地，顶栅电极接第N-1扫描线VN-1，底栅电极接第N扫描线VN。In this embodiment, the bypass circuit is an asynchronous double-gate thin film transistor T5, which is connected in parallel with the OLED, the drain is connected to the anode of the OLED, the source is grounded, the top gate electrode is connected to the N-1th scanning line VN-1 , and the bottom gate electrode is connected to the N-1th scanning line V N-1. Connect to the Nth scan line VN .
第二晶体管T2、第三晶体管T3及第五晶体管T5在扫描线VN-1为高电平并且扫描线VN为低电平时对存储电容CS进行预充。The second transistor T2, the third transistor T3 and the fifth transistor T5 precharge the storage capacitorCS when the scan line VN-1 is at a high level and the scan line VN is at a low level.
第二晶体管T2、第四晶体管T4及第五晶体管T5在扫描线VN-1为低电平并且扫描线VN为高电平时将数据电压写入到第一晶体管的栅极并存储于存储电容CS。The second transistor T2, the fourth transistor T4, and the fifth transistor T5 write the data voltage into the gate of the first transistor and store it in the memory when the scanning line VN-1 is at a low level and the scanning line VN is at a high level. Capacitance CS .
第一晶体管和第二晶体管在版图设计中紧密排列，设计成同样的尺寸，使得在同一像素中第一晶体管和第二晶体管的阈值电压VTH1和VTH2的大小一致，即VTH1=VTH2。The first transistor and the second transistor are closely arranged in the layout design and designed to be the same size, so that the threshold voltages VTH1 and VTH2 of the first transistor and the second transistor in the same pixel are the same, that is, VTH1 = VTH2 .
在本实施例中，各个元件的参数分别为：VDD取12V；VN-1高电平时取10V，维持时间50uS；VN高电平时取10V，维持时间50uS；CS电容取0.5pS；T1的宽长比设置为18um/6um；T2的宽长比设置为18um/6um；T3的宽长比设置为6um/6um；T4的宽长比设置为6um/6um；T5的宽长比设置为6um/6um。In this embodiment, the parameters of each component are: VDD is 12V; VN-1 is 10V when it is high level, and the maintenance time is 50uS; VN is 10V when it is high level, and the maintenance time is 50uS; CS capacitance is 0.5pS; The aspect ratio of T1 is set to 18um/6um; the aspect ratio of T2 is set to 18um/6um; the aspect ratio of T3 is set to 6um/6um; the aspect ratio of T4 is set to 6um/6um; the aspect ratio of T5 is set It is 6um/6um.
各信号线的时序如图3所示，上述像素驱动电路的驱动方法，包括以下步骤：The timing of each signal line is shown in FIG. 3 , and the above-mentioned driving method of the pixel driving circuit includes the following steps:
1）预设阶段（阶段1）：第N-1扫描线VN-1为高电平并且第N扫描线VN为低电平，在此阶段，第二晶体管T2、第三晶体管T3及第五晶体管T5开启，电源电压VDD对存储电容CS预充电至电源电压VDD；1) Preset stage (stage 1): the N-1th scanning line VN-1 is at high level and the Nth scanning line VN is at low level. In this stage, the second transistor T2, the third transistor T3 and The fifth transistor T5 is turned on, and the power supply voltage VDD precharges the storage capacitorCS to the power supply voltage VDD ;
2）调整阶段（阶段2）：第N-1扫描线VN-1为低电平并且第N扫描线VN为高电平阶段，在此阶段，第二晶体管T2、第四晶体管T4及第五晶体管T5开启，存储电容CS通过第二晶体管T2和第四晶体管T4放电，直到第二晶体管T2进入截止状态停止放电，此时存储电容CS上的电压为数据电压VDATA加上第二晶体管的阈值电压VTH2，即VDATA+VTH2；2) Adjustment stage (stage 2): the N-1th scanning line VN-1 is at a low level and the Nth scanning line VN is at a high level stage. In this stage, the second transistor T2, the fourth transistor T4 and The fifth transistor T5 is turned on, and the storage capacitorCS is discharged through the second transistor T2 and the fourth transistor T4 until the second transistor T2 enters an off state and stops discharging. At this time, the voltage on the storage capacitorCS is the data voltage VDATA plus the first The threshold voltage VTH2 of the second transistor is VDATA +VTH2 ;
3）工作阶段（阶段3）：第N-1扫描线VN-1和第N扫描线VN为低电平，在此阶段，第二晶体管T2、第四晶体管T4及第五晶体管T5截止，存储电容CS两端的电压保持不变，其中，N为自然数。3) Working stage (stage 3): the N-1 scanning line VN-1 and the N-th scanning line VN are at low level, at this stage, the second transistor T2, the fourth transistor T4 and the fifth transistor T5 are turned off , the voltage across the storage capacitorCS remains unchanged, where N is a natural number.
在工作阶段，由于第二晶体管T2、第四晶体管T4及第五晶体管T5截止，存储电容CS不存在泄放通路，故存储电容CS的两端的电压保持不变，故此时存储电容上的电压为数据电压、第二晶体管的阈值电压和OLED的阳极电压之和，即VDATA+VTH2+VOLED，其中VOLED为OLED的开启电压。而此时流过第一晶体管T1的电流即为流过OLED的电流，电流大小正比与第一晶体管T1的栅源电压VGS1与阈值电压VTH1之差的平方成正比，即（VGS1-VTH1）2，也就是（VDATA+VTH2+VOLED-VOLED-VTH1）2，而第一晶体管和第二晶体管的阈值电压VTH1和VTH2相等，即VTH1=VTH2，也就是，流过OLED的电流之与数据电压的平方成正比，即VDATA2。因此流过OLED的电流完全由数据电压VDATA决定，而与第一晶体管的阈值电压VTH1无关。In the working phase, since the second transistor T2, the fourth transistor T4 and the fifth transistor T5 are cut off, there is no discharge path for the storage capacitorCS , so the voltage across the storage capacitorCS remains unchanged, so at this time the storage capacitor CS The voltage is the sum of the data voltage, the threshold voltage of the second transistor and the anode voltage of the OLED, that is, VDATA +VTH2 +VOLED , wherein VOLED is the turn-on voltage of the OLED. At this time, the current flowing through the first transistor T1 is the current flowing through the OLED, and the magnitude of the current is proportional to the square of the difference between the gate-source voltage VGS1 of the first transistor T1 and the threshold voltage VTH1 , that is, (VGS1 - VTH1 )2 , that is (VDATA +VTH2 +VOLED -VOLED -VTH1 )2 , and the threshold voltages VTH1 and VTH2 of the first transistor and the second transistor are equal, that is, VTH1 =VTH2 , That is, the current flowing through the OLED is proportional to the square of the data voltage, that is, VDATA2 . Therefore, the current flowing through the OLED is completely determined by the data voltage VDATA and has nothing to do with the threshold voltage VTH1 of the first transistor.
实施例二Embodiment two
在本实施例中，旁路电路为并联的第六晶体管和第七晶体管T6和T7，与OLED并联，T6和T7的漏极分别接OLED的阳极，T6和T7的源极接地，T6的栅极接第N-1扫描线VN-1，T7的栅极接第N扫描线VN，其他的电路连接与实施例一相同，如图2所示。In this embodiment, the bypass circuit is the sixth transistor and the seventh transistor T6 and T7 connected in parallel with the OLED, the drains of T6 and T7 are respectively connected to the anode of the OLED, the sources of T6 and T7 are grounded, and the gate of T6 The electrode is connected to the N-1th scanning line VN-1 , the gate of T7 is connected to the Nth scanning line VN , and other circuit connections are the same as those in the first embodiment, as shown in FIG. 2 .
上述像素驱动电路的驱动方案，包括以下步骤：The driving scheme of the above-mentioned pixel driving circuit includes the following steps:
1）预设阶段：第N-1扫描线VN-1为高电平并且第N扫描线VN为低电平，在此阶段，第二晶体管T2、第三晶体管T3及第六和第七晶体管T6和T7开启，电源电压VDD对存储电容CS预充电至电源电压VDD；1) Preset stage: the N-1th scanning line VN-1 is at high level and the Nth scanning line VN is at low level. In this stage, the second transistor T2, the third transistor T3 and the sixth and third transistors The seven transistors T6 and T7 are turned on, and the power supply voltage VDD precharges the storage capacitorCS to the power supply voltage VDD ;
2）调整阶段：第N-1扫描线VN-1为低电平并且第N扫描线VN为高电平阶段，在此阶段，第二晶体管T2、第四晶体管T4及第六和第七晶体管T6和T7开启，存储电容CS通过第二晶体管T2和第四晶体管T4放电，直到第二晶体管T2进入截止状态停止放电，此时存储电容CS上的电压为数据电压VDATA加上第二晶体管的阈值电压VTH2，即VDATA+VTH2；2) Adjustment stage: the N-1th scan line VN-1 is at low level and the Nth scan line VN is at high level stage. In this stage, the second transistor T2, the fourth transistor T4, and the sixth and third transistors The seven transistors T6 and T7 are turned on, and the storage capacitorCS is discharged through the second transistor T2 and the fourth transistor T4 until the second transistor T2 enters the cut-off state and stops discharging. At this time, the voltage on the storage capacitorCS is the data voltage VDATA plus The threshold voltage VTH2 of the second transistor is VDATA +VTH2 ;
3）工作阶段：第N-1扫描线VN-1和第N扫描线VN为低电平，在此阶段，第二晶体管T2、第四晶体管T4及第六和第七晶体管T6和T7截止，存储电容CS两端的电压保持不变。3) Working stage: the N-1 scanning line VN-1 and the N-th scanning line VN are at low level. In this stage, the second transistor T2, the fourth transistor T4 and the sixth and seventh transistors T6 and T7 At the end, the voltage across the storage capacitorCS remains unchanged.
与实施例一同理，存储电容CS两端的电压保持不变，流过第一晶体管T1的电流即为流过OLED的电流，正比于VDATA2。故流过OLED的电流完全由VDATA决定，而与第一晶体管的阈值电压VTH1无关。Similar to the embodiment, the voltage across the storage capacitorCS remains constant, and the current flowing through the first transistor T1 is the current flowing through the OLED, which is proportional to VDATA2 . Therefore, the current flowing through the OLED is completely determined by VDATA and has nothing to do with the threshold voltage VTH1 of the first transistor.
最后需要注意的是，公布实施方式的目的在于帮助进一步理解本发明，但是本领域的技术人员可以理解：在不脱离本发明及所附的权利要求的精神和范围内，各种替换和修改都是可能的。因此，本发明不应局限于实施例所公开的内容，本发明要求保护的范围以权利要求书界定的范围为准。Finally, it should be noted that the purpose of publishing the implementation is to help further understand the present invention, but those skilled in the art can understand that various replacements and modifications can be made without departing from the spirit and scope of the present invention and the appended claims. It is possible. Therefore, the present invention should not be limited to the content disclosed in the embodiments, and the protection scope of the present invention is subject to the scope defined in the claims.
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210425355.6ACN102915703B (en) | 2012-10-30 | 2012-10-30 | Pixel driving circuit and driving method thereof |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210425355.6ACN102915703B (en) | 2012-10-30 | 2012-10-30 | Pixel driving circuit and driving method thereof |
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| CN102915703A CN102915703A (en) | 2013-02-06 |
| CN102915703Btrue CN102915703B (en) | 2014-12-17 |
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| CN201210425355.6AActiveCN102915703B (en) | 2012-10-30 | 2012-10-30 | Pixel driving circuit and driving method thereof |
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