技术领域technical field
本申请涉及集成电路设计领域，具体涉及一种处理器指令级的功能仿真模型及其自动生成装置和一种处理器的功能验证方法。The present application relates to the field of integrated circuit design, in particular to a processor instruction-level function simulation model and its automatic generation device, and a processor function verification method.
背景技术Background technique
处理器硬件设计的逻辑功能和性能指标主要依赖于硬件设计人员利用硬件描述语言编写的代码质量，在实际应用前通常需要先对该处理器的正确性进行验证。伴随处理器复杂度的不断上升，处理器验证工作的复杂度和工作量呈现指数上升，对验证的依赖与要求越来越高。作为设计过程的一部分，验证起着越来越关键的作用，验证的工作量也是相对较大，可能占据到整个设计工作量的70％左右，验证的效率和可靠性往往决定了项目的成败。The logical functions and performance indicators of processor hardware design mainly depend on the code quality written by hardware designers using hardware description language, and the correctness of the processor usually needs to be verified before practical application. With the increasing complexity of processors, the complexity and workload of processor verification work has risen exponentially, and the reliance on and requirements for verification are getting higher and higher. As part of the design process, verification plays an increasingly critical role, and the workload of verification is relatively large, which may account for about 70% of the entire design workload. The efficiency and reliability of verification often determine the success or failure of a project.
处理器的验证主要包括功能验证和时序验证等过程，而功能验证中最基本且使用最广泛的方法是仿真验证，仿真验证在处理器验证的工程中起着非常重要的作用。Processor verification mainly includes processes such as functional verification and timing verification, and the most basic and widely used method in functional verification is simulation verification, which plays a very important role in processor verification engineering.
为了确保处理器功能的正确性，通常需要建立一个功能仿真模型，对比处理器和功能仿真模型两者在相同输入激励下的输出结果来验证。现有技术中通常采用完全手工开发一个功能仿真模型的方式，这种方式不仅是一项非常繁重的工作，而且极易出错。一般来说，不仅开发过程需要花费数月的时间，还需要花费大量的时间来进行功能仿真模型正确性的验证。In order to ensure the correctness of the processor function, it is usually necessary to establish a functional simulation model, and compare the output results of the processor and the functional simulation model under the same input stimulus to verify. In the prior art, a method of completely manually developing a function simulation model is usually adopted, which is not only a very heavy work, but also extremely error-prone. Generally speaking, not only does the development process take several months, it also takes a lot of time to verify the correctness of the functional simulation model.
发明内容Contents of the invention
本申请要解决的主要技术问题是，提供一种可由用户根据需求自行配置的处理器功能仿真模型的生成装置。The main technical problem to be solved in this application is to provide a device for generating a processor function simulation model that can be configured by the user according to requirements.
为解决上述技术问题，本申请提供一种处理器功能仿真模型的生成装置，该处理器功能仿真模型包括数据结构声明单元、寄存器初始化单元、输入处理单元、功能仿真单元和仿真结果输出单元；In order to solve the above technical problems, the application provides a device for generating a processor function simulation model, the processor function simulation model includes a data structure declaration unit, a register initialization unit, an input processing unit, a function simulation unit and a simulation result output unit;
数据结构声明单元分别与寄存器初始化单元、输入处理单元、功能仿真单元、仿真结果输出单元相连；数据结构声明单元用于以计算机可执行语言描述寄存器参数，声明寄存器的名称及数据位宽；The data structure declaration unit is respectively connected with the register initialization unit, the input processing unit, the function simulation unit, and the simulation result output unit; the data structure declaration unit is used to describe the register parameters in a computer executable language, and declare the name and data bit width of the register;
寄存器初始化单元分别与数据结构声明单元、功能仿真单元相连；寄存器初始化单元用于以计算机可执行语言描述寄存器初始值；The register initialization unit is respectively connected with the data structure declaration unit and the function simulation unit; the register initialization unit is used to describe the initial value of the register in a computer executable language;
输入处理单元分别与数据结构声明单元、功能仿真单元相连；输入处理单元用于提取输入的指令机器码中的信息，根据指令机器码的指令类型字段判断指令的类型，并将指令机器码中的操作数映射字段转换为功能仿真器中的操作数信息，并将指令的类型和操作数信息按照预设的数据结构进行存储；The input processing unit is respectively connected with the data structure declaration unit and the function simulation unit; the input processing unit is used to extract the information in the input instruction machine code, judge the type of the instruction according to the instruction type field of the instruction machine code, and convert the information in the instruction machine code The operand mapping field is converted into operand information in the functional simulator, and the instruction type and operand information are stored according to the preset data structure;
功能仿真单元分别与数据结构声明单元、寄存器初始化单元、输入处理单元以及仿真结果输出单元相连；功能仿真单元用于根据所述输入处理单元中确定的指令的功能，执行输入处理单元发送的指令，改变相应寄存器的值；The function simulation unit is respectively connected with the data structure declaration unit, the register initialization unit, the input processing unit and the simulation result output unit; the function simulation unit is used to execute the instruction sent by the input processing unit according to the function of the instruction determined in the input processing unit, Change the value of the corresponding register;
仿真结果输出单元分别与功能仿真单元、数据结构声明单元相连；仿真结果输出单元用于将功能仿真单元处理的寄存器的值按照仿真结果输出格式输出；The simulation result output unit is respectively connected with the function simulation unit and the data structure declaration unit; the simulation result output unit is used to output the value of the register processed by the function simulation unit according to the simulation result output format;
该生成装置包括寄存器配置模块、指令集配置模块、输入处理单元生成模块、功能仿真单元生成模块、仿真结果配置模块、仿真结果输出单元生成模块和指令功能库；The generating device includes a register configuration module, an instruction set configuration module, an input processing unit generation module, a function simulation unit generation module, a simulation result configuration module, a simulation result output unit generation module and an instruction function library;
寄存器配置模块：分别与指令集配置模块、功能仿真单元生成模块以及仿真结果配置模块连接，用于接收用户输入的寄存器参数，所述寄存器参数包括寄存器个数及每个寄存器的名称、数据位宽和复位值，并根据寄存器的个数、名称与数据位宽生成数据结构声明单元；根据寄存器的复位值生成寄存器初始化单元；Register configuration module: respectively connected with the instruction set configuration module, the function simulation unit generation module and the simulation result configuration module to receive the register parameters input by the user. The register parameters include the number of registers, the name of each register, and the data bit width and reset value, and generate a data structure declaration unit according to the number, name and data bit width of the register; generate a register initialization unit according to the reset value of the register;
指令集配置模块：分别与寄存器配置模块、输入处理单元生成模块、功能仿真单元生成模块相连，用于接收用户输入的指令集配置信息，指令集配置信息包括指令机器码和指令功能信息，所述指令机器码包括指令类型的映射字段和操作数映射字段；还用于根据指令类型在指令功能库中匹配出该指令的指令功能；Instruction set configuration module: connected to register configuration module, input processing unit generation module, and function simulation unit generation module respectively, for receiving user input instruction set configuration information, instruction set configuration information includes instruction machine code and instruction function information, said The instruction machine code includes the mapping field of the instruction type and the operand mapping field; it is also used to match the instruction function of the instruction in the instruction function library according to the instruction type;
输入处理单元生成模块：与指令集配置模块相连，用于根据指令集配置模块接收的指令集配置信息中的机器码信息，生成输入处理单元；Input processing unit generation module: connected to the instruction set configuration module, used to generate the input processing unit according to the machine code information in the instruction set configuration information received by the instruction set configuration module;
功能仿真单元生成模块：分别与指令集配置模块、寄存器配置模块相连，用于根据指令集配置模块接收的指令集配置信息中的功能信息生成功能仿真单元；Functional simulation unit generation module: connected to the instruction set configuration module and the register configuration module respectively, for generating a functional simulation unit according to the functional information in the instruction set configuration information received by the instruction set configuration module;
仿真结果配置模块：分别与寄存器配置模块、仿真结果输出单元生成模块相连，用于接收用户输入的仿真结果输出格式；Simulation result configuration module: respectively connected to the register configuration module and the simulation result output unit generation module, for receiving the simulation result output format input by the user;
仿真结果输出单元生成模块：用于根据所述仿真结果配置模块接收的仿真结果输出格式生成仿真结果输出单元；A simulation result output unit generation module: used to generate a simulation result output unit according to the simulation result output format received by the simulation result configuration module;
指令功能库：分别与指令集配置模块、功能仿真单元生成模块相连，用于存储指令集配置模块接收的指令集配置信息中的指令功能信息；所述功能仿真单元生成模块还根据指令功能库存储的功能信息生成功能仿真单元。Instruction function library: respectively connected with the instruction set configuration module and the function simulation unit generation module, used to store the instruction function information in the instruction set configuration information received by the instruction set configuration module; the function simulation unit generation module also stores the information according to the instruction function library The functional information generates a functional simulation unit.
进一步，所述处理器功能仿真模型的输入处理单元包括：Further, the input processing unit of the processor function simulation model includes:
指令类型判断子单元：与指令操作数信息处理子单元相连，用于根据指令机器码中表示指令类型的信息判断指令类型；Instruction type judging subunit: connected to the instruction operand information processing subunit, used to judge the instruction type according to the information indicating the instruction type in the instruction machine code;
指令操作数信息处理子单元：用于将指令机器码中表示指令操作数的信息转换为所述数据结构声明单元中声明的数据结构并保存；Instruction operand information processing subunit: used to convert the information representing the instruction operand in the instruction machine code into the data structure declared in the data structure declaration unit and save it;
所述生成装置的输入处理单元生成模块包括：The input processing unit generating module of the generating device includes:
指令类型判断子单元生成模块：用于根据机器码信息中表示指令类型的信息生成所述指令类型判断子单元；Instruction type judging subunit generating module: used to generate the instruction type judging subunit according to the information indicating the instruction type in the machine code information;
指令操作数信息处理子单元生成模块：用于根据机器码信息中表示指令操作数的信息，生成所述指令操作数信息处理子单元。Instruction operand information processing subunit generating module: used to generate the instruction operand information processing subunit according to the information indicating the instruction operand in the machine code information.
进一步，所述指令操作数信息包括：操作数个数和操作数数组。Further, the instruction operand information includes: operand number and operand array.
进一步，所述操作数数组包括操作数类型和操作数数值。Further, the operand array includes operand types and operand values.
同时，本申请还提供了一种处理器功能仿真模型的生成方法，其包括以下步骤：At the same time, the application also provides a method for generating a processor function simulation model, which includes the following steps:
配置寄存器信息：接收用户输入的寄存器参数，所述寄存器参数包括寄存器个数及每个寄存器的名称、数据位宽和复位值；根据寄存器的个数、名称与数据位宽生成数据结构声明单元，根据寄存器的复位值生成寄存器初始化单元，数据结构声明单元用于以计算机可执行语言描述寄存器参数，声明寄存器的名称和数据位宽，寄存器初始化单元用于以计算机可执行语言描述寄存器初始值；Configure register information: receive the register parameters input by the user, the register parameters include the number of registers and the name, data bit width and reset value of each register; generate a data structure declaration unit according to the number, name and data bit width of the registers, Generate a register initialization unit according to the reset value of the register, the data structure declaration unit is used to describe the register parameters in a computer executable language, declare the name and data bit width of the register, and the register initialization unit is used to describe the initial value of the register in a computer executable language;
配置指令集信息：接收用户输入的指令集配置信息，指令集配置信息包括指令机器码和指令功能信息，所述指令机器码包括指令类型的映射字段和操作数映射字段；根据指令类型在指令功能库中匹配出该指令的指令功能；Configure instruction set information: Receive the instruction set configuration information input by the user. The instruction set configuration information includes instruction machine code and instruction function information. The instruction machine code includes the mapping field of the instruction type and the operand mapping field; according to the instruction type in the instruction function Match the instruction function of the instruction in the library;
根据指令机器码生成机器码输入处理单元，所述机器码输入处理单元用于提取输入的指令机器码中的信息，根据指令机器码的指令类型字段判断指令的类型，并将指令机器码中的操作数映射字段转换为功能仿真器中的操作数信息，并将指令的类型和操作数信息按照预设的数据结构进行存储；Generate a machine code input processing unit according to the instruction machine code, the machine code input processing unit is used to extract the information in the input instruction machine code, judge the type of the instruction according to the instruction type field of the instruction machine code, and send the information in the instruction machine code The operand mapping field is converted into operand information in the functional simulator, and the instruction type and operand information are stored according to the preset data structure;
根据指令功能生成功能仿真单元，所述功能仿真单元用于根据指令功能，执行机器码输入处理单元发送的指令，改变相应寄存器的值；Generate a function simulation unit according to the instruction function, and the function simulation unit is used to execute the instruction sent by the machine code input processing unit according to the instruction function, and change the value of the corresponding register;
配置输出结果：根据用户输入的仿真结果输出格式生成仿真结果输出单元，所述仿真结果输出单元用于将功能仿真单元处理的寄存器的值按照仿真结果输出格式输出。Configure the output result: generate a simulation result output unit according to the simulation result output format input by the user, and the simulation result output unit is used to output the value of the register processed by the functional simulation unit according to the simulation result output format.
本申请还提供了一种处理器功能验证方法，利用仿真模型对处理器设计进行功能验证，所述方法包括：The present application also provides a method for verifying the function of a processor, using a simulation model to verify the function of the processor design, the method comprising:
根据上述处理器功能仿真模型的生成方法，接收用户输入的待验证处理器的寄存器参数、指令集信息和仿真结果输出格式信息，运用上述处理器功能仿真模型的生成装置，自动生成上述处理器指令级功能仿真模型；According to the generation method of the above-mentioned processor function simulation model, the register parameters, instruction set information and simulation result output format information of the processor to be verified input by the user are received, and the above-mentioned processor instruction is automatically generated by using the above-mentioned generation device of the processor function simulation model Level function simulation model;
让该功能仿真模型与待验证的处理器运行相同的一段指令，比较每条指令执行完以后，该功能仿真模型和待验证的处理器对应的各个寄存器的值是否相同；若所有寄存器的值都相同，则认为待验证处理器在执行该段指令时没有错误；反之，则认为待验证处理在执行该段代码时会出现错误，需要对待验证处理器进行修改；Let the functional simulation model run the same instruction as the processor to be verified, and compare whether the values of the registers corresponding to the functional simulation model and the processor to be verified are the same after each instruction is executed; If they are the same, it is considered that the processor to be verified has no error when executing the instruction; otherwise, it is considered that the processor to be verified will have an error when executing the code, and the processor to be verified needs to be modified;
重复上述操作，保证待验证处理器在执行很多代码段时都不会出错，通过分析待验证处理器在仿真验证过程中的覆盖率，以待验证处理的覆盖率作为验证是否通过的指标。Repeat the above operations to ensure that the processor to be verified will not make mistakes when executing many code segments. By analyzing the coverage rate of the processor to be verified in the simulation verification process, the coverage rate of the process to be verified is used as an indicator of whether the verification is passed.
本申请的有益效果是：采用本申请提供的生成装置可自动生成满足仿真功能需要的功能仿真模型，避免了完全手工开发导致大量错误的可能性；同时，采用本申请的自动生成方法也大大节省了功能仿真模型的开发时间。The beneficial effects of the present application are: adopting the generating device provided by the present application can automatically generate a functional simulation model that meets the needs of the simulation function, avoiding the possibility of a large number of errors caused by completely manual development; at the same time, adopting the automatic generation method of the present application also greatly saves Reduced development time for functional simulation models.
附图说明Description of drawings
图1为实施例提供的一种处理器功能仿真模型结构示意图；Fig. 1 is a schematic structural diagram of a processor function simulation model provided by the embodiment;
图2为实施例提供的输入处理单元的一种结构示意图；FIG. 2 is a schematic structural diagram of an input processing unit provided by an embodiment;
图3为实施例保存指令信息的一种数据结构示意图；FIG. 3 is a schematic diagram of a data structure for storing instruction information in an embodiment;
图4为实施例提供的处理器功能仿真模型的生成装置结构示意图；FIG. 4 is a schematic structural diagram of a generating device for a processor function simulation model provided in an embodiment;
图5为实施例提供的输入处理单元生成模块的一种结构示意图；FIG. 5 is a schematic structural diagram of an input processing unit generation module provided by an embodiment;
图6为实施例提供的处理器功能仿真模型的生成方法流程图；6 is a flow chart of a method for generating a processor function simulation model provided by an embodiment;
图7为实施例提供的处理器功能仿真模型的工作流程图。Fig. 7 is a working flowchart of the processor function simulation model provided by the embodiment.
具体实施方式Detailed ways
下面通过具体实施方式结合附图对本申请作进一步详细说明。The present application will be described in further detail below through specific embodiments in conjunction with the accompanying drawings.
本实施例先介绍一种处理器功能仿真模型，其次介绍生成该功能仿真模型的生成装置。(本申请中，处理器功能仿真模型也简称功能仿真模型。)This embodiment first introduces a processor function simulation model, and then introduces a generating device for generating the function simulation model. (In this application, the processor function simulation model is also referred to as the function simulation model.)
请参阅图1,该处理器功能仿真模型主要包括数据结构声明单元10、寄存器初始化单元20、输入处理单元30、功能仿真单元40和仿真结果输出单元50。Please refer to FIG. 1 , the processor function simulation model mainly includes a data structure declaration unit 10 , a register initialization unit 20 , an input processing unit 30 , a function simulation unit 40 and a simulation result output unit 50 .
数据结构声明单元10：分别与寄存器初始化单元20、输入处理单元30、功能仿真单元40、仿真结果输出单元50相连；用于以计算机可执行语言描述寄存器参数，声明寄存器的名称及数据位宽。Data structure declaration unit 10: respectively connected to register initialization unit 20, input processing unit 30, function simulation unit 40, and simulation result output unit 50; used to describe register parameters in computer executable language, and declare register names and data bit widths.
数据结构声明单元10声明的寄存器(以变量形式)供下述寄存器初始化单元20、功能仿真单元40以及仿真结果输出单元50使用，声明的保存指令信息的数据结构供下述输入处理单元30以及功能仿真单元40使用。The register (in variable form) declared by the data structure declaration unit 10 is used for the following register initialization unit 20, the function simulation unit 40 and the simulation result output unit 50, and the data structure for saving instruction information of the declaration is provided for the following input processing unit 30 and function Simulation unit 40 is used.
寄存器初始化单元20：分别与数据结构声明单元、功能仿真单元相连；用于以计算机可执行语言描述寄存器初始值，然后提供给下述输入处理单元30使用。Register initialization unit 20: respectively connected to the data structure declaration unit and the function simulation unit; used to describe the initial value of the register in a computer executable language, and then provide the following input processing unit 30 for use.
上述数据结构声明单元10和寄存器初始化单元20中提到的寄存器配置信息可以由用户根据待验证处理器的寄存器信息得到。数据结构声明单元10仅用于进行声明。例如：假设有两个寄存器，名称分别配置为r0和r1，r0的数据位宽配置为32位，r1的数据位宽配置为16位，两个寄存器的初始值均配置为零，以计算机可执行语言中的C程序为例，在C程序中会首先进行以下声明：The register configuration information mentioned above in the data structure declaration unit 10 and the register initialization unit 20 can be obtained by the user according to the register information of the processor to be verified. The data structure declaring unit 10 is only used for declaring. For example: Suppose there are two registers, the names are configured as r0 and r1 respectively, the data bit width of r0 is configured as 32 bits, the data bit width of r1 is configured as 16 bits, and the initial values of the two registers are configured as zero. Take the C program in the execution language as an example. In the C program, the following declaration will be made first:
int r0；short r1；int r0; short r1;
在功能仿真模型后续的运行过程中，寄存器初始化单元20可以利用上述配置初始值零对寄存器进行初始化(复位)。During the subsequent running of the functional simulation model, the register initialization unit 20 may initialize (reset) the registers by using the configuration initial value zero.
输入处理单元30：分别与数据结构声明单元10、功能仿真单元40相连；用于提取输入的指令机器码中的信息，根据指令机器码的指令类型字段判断指令的类型，并将指令机器码中的操作数映射字段转换为功能仿真器中的操作数信息，并将指令的类型和操作数信息按照预设的数据结构进行存储。Input processing unit 30: connected with the data structure declaration unit 10 and the function simulation unit 40 respectively; used to extract the information in the input instruction machine code, judge the type of the instruction according to the instruction type field of the instruction machine code, and transfer the information in the instruction machine code The operand mapping field of the function simulator is converted into the operand information in the functional simulator, and the instruction type and operand information are stored according to the preset data structure.
上述输入处理单元30中提到的“指令机器码”来源于用户输入。The "instruction machine code" mentioned in the above-mentioned input processing unit 30 is derived from user input.
请参阅图2，为更具体描述输入处理单元30的应用，本实施例将输入处理单元30细分为以下子单元：Please refer to FIG. 2, for a more specific description of the application of the input processing unit 30, the present embodiment subdivides the input processing unit 30 into the following subunits:
指令类型判断子单元31：与指令操作数信息处理子单元32相连，用于根据指令机器码中表示指令类型的信息判断指令类型，并将指令类型的信息提供给下述指令操作数信息处理子单元32。Instruction type judging subunit 31: connected with instruction operand information processing subunit 32, for judging the instruction type according to the information indicating instruction type in the instruction machine code, and providing the information of instruction type to the following instruction operand information processing subunit Unit 32.
指令操作数信息处理子单元32：用于将指令机器码中表示指令操作数的信息转换为所述数据结构声明单元10中声明的数据结构并保存。Instruction operand information processing subunit 32: for converting the information representing the instruction operand in the instruction machine code into the data structure declared in the data structure declaration unit 10 and saving it.
假设某指令集中(已预先配置完毕)，指令ADD R7,R8的机器码为1000_0000_0111_1000，其中，16位机器码中的高8位“1000_0000”为表示指令类型信息的固有机器码，即所有ADD指令(该指令集中ADD指令的操作数为两个通用寄存器)的高8位机器码都为1000_0000。低8位机器码“0111_1000”为表示指令操作数信息的部分，其中的高4位“0111”表示第一个操作数的值为7，即第一个操作数为R7(第7个通用寄存器)；其中的低4位“1000”表示第二个操作数的值为8，即第二个操作数为R8(第8个通用寄存器)。Assuming a certain instruction set (already pre-configured), the machine code of the instruction ADD R7, R8 is 1000_0000_0111_1000, among which, the upper 8 bits "1000_0000" in the 16-bit machine code are the inherent machine code representing the instruction type information, that is, all ADD instructions (The operands of the ADD instruction in the instruction set are two general-purpose registers) and the high-order 8-bit machine codes are all 1000_0000. The lower 8-bit machine code "0111_1000" is the part indicating the operand information of the instruction, and the upper 4 bits "0111" indicate that the value of the first operand is 7, that is, the first operand is R7 (the seventh general-purpose register ); wherein the lower 4 bits "1000" indicate that the value of the second operand is 8, that is, the second operand is R8 (the eighth general-purpose register).
因此，若用户输入的机器码为“1000_0000_0111_1000”，首先由指令类型判断子单元31提取高8位，得到1000_0000，即可确定该指令的类型为ADD，然后通过操作数信息处理子单元32提取低8位，得到0111_1000，即可确定该指令的操作数为R7,R8，最后由转换保存子单元33将该指令信息转换为数据结构声明单元10中声明的数据结构并保存，至此便完成了输入指令机器码的处理工作。Therefore, if the machine code input by the user is "1000_0000_0111_1000", first the high 8 bits are extracted by the instruction type judging subunit 31 to obtain 1000_0000, then the type of the instruction can be determined to be ADD, and then the low 8 bits are extracted by the operand information processing subunit 32. 8 bits, get 0111_1000, then it can be determined that the operands of the instruction are R7, R8, and finally the conversion and storage subunit 33 converts the instruction information into the data structure declared in the data structure declaration unit 10 and saves it, so far the input is completed Instruction machine code processing.
请参阅图3，本实施例中的保存指令信息的数据结构中包括指令类型和操作数信息。而操作数信息中又包括操作数的个数以及每个操作数的信息即操作数数组。操作数数组中的每个元素又包括该操作数的类型与该操作数的具体值。图3以保存如下的指令信息为例：ST R5,R6,1，即指令类型为ST，该条指令包含3个操作数：第一个操作数的类型为R(即通用寄存器)，值为5(即第5个通用寄存器)；第二个操作数的类型为R(即通用寄存器)，值为6(即第6个通用寄存器)；第三个操作数的类型为I(即立即数)，值为1。Please refer to FIG. 3 , the data structure for storing instruction information in this embodiment includes instruction type and operand information. The operand information includes the number of operands and the information of each operand, that is, the operand array. Each element in the operand array includes the type of the operand and the specific value of the operand. Figure 3 takes the following instruction information as an example: ST R5, R6, 1, that is, the instruction type is ST, and this instruction contains 3 operands: the type of the first operand is R (that is, a general-purpose register), and the value is 5 (that is, the fifth general-purpose register); the type of the second operand is R (that is, the general-purpose register), and the value is 6 (that is, the sixth general-purpose register); the type of the third operand is I (that is, the immediate value ), with a value of 1.
功能仿真单元40：分别与数据结构声明单元10、寄存器初始化单元20、输入处理单元30以及仿真结果输出单元50相连；用于根据输入处理单元30中确定的指令的功能，执行输入处理单元发送的指令，改变相应寄存器的值。该仿真过程和结果根据数据结构声明单元10中声明的寄存器个数、名称及数据位宽来使用寄存器，同时，要用到寄存器初始化单元20对寄存器的初始化值。Functional simulation unit 40: respectively connected with data structure declaration unit 10, register initialization unit 20, input processing unit 30 and simulation result output unit 50; used to execute the instruction sent by the input processing unit according to the function of the instruction determined in the input processing unit 30 instruction to change the value of the corresponding register. The simulation process and results use the registers according to the number, name and data bit width of the registers declared in the data structure declaration unit 10, and at the same time, the register initialization unit 20 is used to initialize the registers.
仿真结果输出单元50：分别与功能仿真单元30、数据结构声明单元10相连；用于将功能仿真单元40处理的寄存器的值按照仿真结果输出格式输出。这里说的“一定格式”是指根据需要可按八进制、十六进制等格式输出，以及根据需要只输出某些寄存器的仿真结果。该仿真结果的输出根据数据结构声明单元10中声明的寄存器个数、名称及数据位宽来使用寄存器。The simulation result output unit 50 : connected to the function simulation unit 30 and the data structure declaration unit 10 respectively; used to output the value of the register processed by the function simulation unit 40 according to the simulation result output format. The "certain format" mentioned here refers to the output in octal, hexadecimal and other formats as required, and the simulation results of only certain registers are output as required. The output of the simulation result uses registers according to the number, name and data bit width of the registers declared in the data structure declaration unit 10 .
以下介绍上述处理器功能仿真模型的生成装置。The device for generating the above-mentioned processor function simulation model is introduced below.
请参阅图4，该生成装置主要包括：寄存器配置模块100、指令集配置模块200、输入处理单元生成模块300、功能仿真单元生成模块400、仿真结果配置模块500、仿真结果输出单元生成模块600和指令功能库700。Referring to Fig. 4, the generating device mainly includes: a register configuration module 100, an instruction set configuration module 200, an input processing unit generation module 300, a function simulation unit generation module 400, a simulation result configuration module 500, a simulation result output unit generation module 600 and Instruction function library 700 .
寄存器配置模块100：分别与指令集配置模块200、功能仿真单元生成模块400以及仿真结果配置模块500连接，用于接收寄存器参数，寄存器参数包括寄存器个数及每个寄存器的名称、数据位宽和复位值，并根据寄存器的个数、名称与数据位宽生成上述数据结构声明单元10；根据寄存器的复位值生成上述寄存器初始化单元20。Register configuration module 100: connected with instruction set configuration module 200, function simulation unit generation module 400 and simulation result configuration module 500 respectively, for receiving register parameters, register parameters include the number of registers and the name of each register, data bit width and Reset the value, and generate the above-mentioned data structure declaration unit 10 according to the number, name and data bit width of the register; generate the above-mentioned register initialization unit 20 according to the reset value of the register.
例如，用户进行如下配置：配置16个通用寄存器,名称为R0、R1……R14、R15，每个通用寄存器数据位宽为16，且初始值均为0x0000；配置1控制寄存器，名称为PC，数据位宽为16，初始值为0x0800。根据上述配置，寄存器配置模块100会在上述功能仿真模型的数据结构声明单元10中声明17个位宽为16的整型变量R0、R1……R14、R15以及PC；并且在上述功能仿真模型的寄存器初始化单元20中将R0、R1……R14、R15的初始值赋值为0x0000，将PC的初始值赋值为0x0800。For example, the user performs the following configuration: configure 16 general-purpose registers, named R0, R1...R14, R15, each general-purpose register has a data bit width of 16, and the initial value is 0x0000; configure 1 control register, named PC, The data bit width is 16, and the initial value is 0x0800. According to the above configuration, the register configuration module 100 will declare 17 integer variables R0, R1...R14, R15 and PC with a bit width of 16 in the data structure declaration unit 10 of the above-mentioned functional simulation model; and in the above-mentioned functional simulation model In the register initialization unit 20, the initial value of R0, R1...R14, R15 is assigned as 0x0000, and the initial value of PC is assigned as 0x0800.
指令集配置模块200：分别与寄存器配置模块100、输入处理单元生成模块300、功能仿真单元生成模块400相连，用于接收用户输入的指令集配置信息，指令集配置信息包括指令机器码信息以及指令功能信息，该指令机器码包括指令类型的映射字段和操作数映射字段；还用于根据指令类型在指令功能库中匹配出该指令的指令功能。Instruction set configuration module 200: connected to register configuration module 100, input processing unit generation module 300, and function simulation unit generation module 400 respectively, for receiving user input instruction set configuration information, instruction set configuration information including instruction machine code information and instruction Function information, the instruction machine code includes an instruction type mapping field and an operand mapping field; it is also used to match the instruction function of the instruction in the instruction function library according to the instruction type.
例如，对指令集进行如下配置：假设现需要配置指令集中的以下两类指令：MOVL，ADD。先以ADD指令为例，首先配置ADD指令机器码中表示指令类型的信息，机器码的高8位固定为1000_0000。然后配置ADD指令机器码中表示操作数的信息，将该类指令的操作数类型都配置为通用寄存器。机器码低8位中的高4位表示第一个操作数的值，即若此4位为0111，则表示第一个操作数为R7(第7个通用寄存器；注意R0为第0个通用寄存器，故R7为第7个通用寄存器)；机器码低8位中的低4位表示第二个操作数的值，若此4位为1000，则表示第二个操作数为R8(第8个通用寄存器)。上述指令集的机器码信息将提供给输入处理单元生成模块300。For example, configure the instruction set as follows: Assume that the following two types of instructions in the instruction set need to be configured: MOVL and ADD. First take the ADD instruction as an example. First, configure the information indicating the instruction type in the machine code of the ADD instruction. The upper 8 bits of the machine code are fixed at 1000_0000. Then configure the information representing the operand in the machine code of the ADD instruction, and configure the operand type of this type of instruction as a general-purpose register. The upper 4 bits of the lower 8 bits of the machine code represent the value of the first operand, that is, if the 4 bits are 0111, it means that the first operand is R7 (the 7th general-purpose register; note that R0 is the 0th general-purpose register register, so R7 is the seventh general-purpose register); the lower 4 bits in the lower 8 bits of the machine code represent the value of the second operand, if the 4 bits are 1000, it means that the second operand is R8 (the 8th general-purpose registers). The machine code information of the above instruction set will be provided to the input processing unit generation module 300 .
配置指令功能的过程，可以用编程语言描述该指令的功能，并将该功能加入指令功能库700中，使用时查询指令功能库700进行调用。In the process of configuring the instruction function, the function of the instruction can be described in a programming language, and the function can be added to the instruction function library 700, and the instruction function library 700 can be queried for calling during use.
指令功能库700：分别与指令集配置模块200、功能仿真单元生成模块400相连，用于存储指令集配置模块200接收的指令集配置信息中的功能信息。Instruction function library 700 : connected to the instruction set configuration module 200 and the function simulation unit generation module 400 respectively, and used to store the function information in the instruction set configuration information received by the instruction set configuration module 200 .
查询指令功能库700并配置指令功能的过程包括：查询指令功能库700中是否包含ADD指令的功能，假设ADD指令的功能不包含在该指令功能库700中，则可利用规定的编程语言描述该类指令的功能并加入指令功能库700中。现用C语言描述ADD指令的功能：The process of querying the instruction function library 700 and configuring the instruction functions includes: querying whether the instruction function library 700 contains the function of the ADD instruction, assuming that the function of the ADD instruction is not included in the instruction function library 700, the specified programming language can be used to describe the The functions of class instructions are added to the instruction function library 700. Now use C language to describe the function of the ADD instruction:
op1＝op1+op2；op1=op1+op2;
pc＝pc+2；pc=pc+2;
其中，op1表示第一个操作数，op2表示第二个操作数，pc表示程序计数器。将上述功能描述加入指令功能库700中，然后再次查询ADD指令的功能是否包含在指令功能库700中，此时ADD指令的功能已经在指令功能库700中，所以仅需要根据指令功能库700配置该条指令的功能。这样就完成了ADD指令的配置。上述指令集的功能信息将提供给功能仿真单元生成模块400，并将用户自定义的ADD指令功能加入指令功能库700中。Among them, op1 represents the first operand, op2 represents the second operand, and pc represents the program counter. Add the above function description into the instruction function library 700, and then check again whether the function of the ADD instruction is included in the instruction function library 700. At this time, the function of the ADD instruction is already in the instruction function library 700, so it only needs to be configured according to the instruction function library 700 function of this command. This completes the configuration of the ADD command. The function information of the above instruction set will be provided to the function simulation unit generation module 400 , and the user-defined ADD instruction function will be added into the instruction function library 700 .
又如，在上述指令集配置过程中，MOVL指令的功能在指令功能库700中已有说明，则只需将MOVL的功能指定为指令功能库700中对应功能说明即可。For another example, in the configuration process of the above instruction set, the function of the MOVL instruction has been described in the instruction function library 700 , so it is only necessary to designate the function of MOVL as the corresponding function description in the instruction function library 700 .
输入处理单元生成模块300：与指令集配置模块200相连，用于根据指令集配置模块200接收的指令集配置信息中的机器码信息，生成上述输入处理单元30。The input processing unit generation module 300 : connected to the instruction set configuration module 200 , configured to generate the above-mentioned input processing unit 30 according to the machine code information in the instruction set configuration information received by the instruction set configuration module 200 .
请参阅图5，为更好描述上述输入处理单元生成模块300的工作过程，本实施例将输入处理单元生成模块300细分为：Please refer to FIG. 5. In order to better describe the working process of the above-mentioned input processing unit generation module 300, the present embodiment subdivides the input processing unit generation module 300 into:
指令类型判断子单元生成模块310：用于根据机器码信息中表示指令类型的信息生成上述指令类型判断子单元31。Instruction type judging subunit generating module 310: used to generate the above instruction type judging subunit 31 according to the information indicating the instruction type in the machine code information.
指令操作数信息处理子单元生成模块320：用于根据机器码信息中表示指令操作数的信息，生成上述指令操作数信息处理子单元32。Instruction operand information processing subunit generation module 320 : used to generate the above instruction operand information processing subunit 32 according to the information indicating the instruction operand in the machine code information.
例如，上述指令集中，ADD指令的机器码高8位固定为1000_0000(该指令集中的另一类指令MOVL的机器码高8位不可能为1000_0000)，则机器码高8位为1000_0000的指令即为ADD指令，指令类型判断子单元生成模块31以此为根据自动生成上述指令类型判断子单元31。ADD指令的机器码低8位中的高4位表示第一个操作数的值，即若此4位为0111，则表示第一个操作数为R7；机器码低8位中的低4位表示第二个操作数的值，若此4位为1000，则表示第二个操作数为R8。根据上述信息，指令操作数信息处理子单元生成模块320即可生成上述指令操作数信息处理子单元32。For example, in the above instruction set, the upper 8 bits of the machine code of the ADD instruction are fixed at 1000_0000 (the upper 8 bits of the machine code of another type of instruction MOVL in this instruction set cannot be 1000_0000), then the instruction with the upper 8 bits of the machine code being 1000_0000 is is an ADD instruction, and the instruction type judging subunit generating module 31 automatically generates the above instruction type judging subunit 31 based on this. The upper 4 bits of the lower 8 bits of the machine code of the ADD instruction represent the value of the first operand, that is, if the 4 bits are 0111, it means that the first operand is R7; the lower 4 bits of the lower 8 bits of the machine code Indicates the value of the second operand, if the 4 bits are 1000, it means that the second operand is R8. According to the above information, the instruction operand information processing subunit generating module 320 can generate the above instruction operand information processing subunit 32 .
功能仿真单元生成模块400：分别与指令集配置模块200、寄存器配置模块100相连，用于根据指令集配置模块200接收的指令集配置信息中的功能信息(指令功能库700中的功能信息)生成功能仿真单元40。Functional simulation unit generation module 400: connected to the instruction set configuration module 200 and the register configuration module 100 respectively, for generating according to the function information in the instruction set configuration information received by the instruction set configuration module 200 (the function information in the instruction function library 700) Functional simulation unit 40 .
例如，上述ADD指令的功能已在指令功能库700中选定，则以指令功能库700中对该指令功能进行描述的计算机编程语言作为主体，自动生成上述功能仿真单元中的ADD指令功能仿真函数。For example, if the function of the above-mentioned ADD instruction has been selected in the instruction function library 700, then the computer programming language that describes the instruction function in the instruction function library 700 is used as the main body to automatically generate the ADD instruction function simulation function in the above-mentioned function simulation unit .
仿真结果配置模块500：分别与寄存器配置模块100、仿真结果输出单元生成模块600相连，用于接收用户输入的仿真结果配置信息。The simulation result configuration module 500 : connected to the register configuration module 100 and the simulation result output unit generation module 600 respectively, for receiving the simulation result configuration information input by the user.
例如，对仿真结果输出格式进行如下配置：若只关心16个通用寄存器的值，则只需要将输出格式配置为每条指令执行完以后按16进制输出16个通用寄存器的值，并将该信息提供给仿真结果输出单元生成模块600。For example, configure the output format of the simulation results as follows: If you only care about the values of 16 general-purpose registers, you only need to configure the output format to output the values of 16 general-purpose registers in hexadecimal after each instruction is executed, and set the The information is provided to the simulation result output unit generation module 600 .
仿真结果输出单元生成模块600：与仿真结果配置模块相连，用于根据仿真结果配置模块500接收的仿真结果输出格式生成上述仿真结果输出单元50。Simulation result output unit generation module 600 : connected to the simulation result configuration module, for generating the simulation result output unit 50 according to the simulation result output format received by the simulation result configuration module 500 .
以下介绍上述处理器仿真功能模型的生成方法,请参考图6，包括以下步骤：The following describes the generation method of the above-mentioned processor simulation function model, please refer to Figure 6, including the following steps:
S100，配置寄存器信息：接收用户输入的寄存器参数，该寄存器参数包括寄存器个数及每个寄存器的名称、数据位宽和复位值。根据寄存器的个数、名称与数据位宽生成数据结构声明单元10，根据寄存器的复位值生成寄存器初始化单元20。S100, configure register information: receive register parameters input by the user, the register parameters include the number of registers, the name of each register, data bit width and reset value. The data structure declaration unit 10 is generated according to the number, name and data bit width of the registers, and the register initialization unit 20 is generated according to the reset value of the registers.
S200，配置指令集信息：接收用户输入的指令集配置信息，指令集配置信息包括指令机器码，该指令机器码包括指令类型的映射字段和操作数映射字段；根据指令类型在指令功能库中匹配出该指令的指令功能；根据指令机器码生成机器码输入处理单元30；根据指令功能生成功能仿真单元40。S200, configure the instruction set information: receive the instruction set configuration information input by the user, the instruction set configuration information includes the instruction machine code, the instruction machine code includes the mapping field of the instruction type and the operand mapping field; match in the instruction function library according to the instruction type Generate the instruction function of the instruction; generate the machine code according to the instruction machine code and input it into the processing unit 30; generate the function simulation unit 40 according to the instruction function.
本实施例将输入处理单元30细分为以下子单元：In this embodiment, the input processing unit 30 is subdivided into the following subunits:
指令类型判断子单元31：与指令操作数信息处理子单元32相连，用于根据指令机器码中表示指令类型的信息判断指令类型，并将指令类型的信息提供给下述指令操作数信息处理子单元32。Instruction type judging subunit 31: connected with instruction operand information processing subunit 32, for judging the instruction type according to the information indicating instruction type in the instruction machine code, and providing the information of instruction type to the following instruction operand information processing subunit Unit 32.
指令操作数信息处理子单元32：用于将指令机器码中表示指令操作数的信息转换为所述数据结构声明单元10中声明的数据结构并保存。Instruction operand information processing subunit 32: for converting the information representing the instruction operand in the instruction machine code into the data structure declared in the data structure declaration unit 10 and saving it.
根据指令机器码生成输入处理单元30的步骤，具体为：先根据机器码信息中表示指令类型的信息生成上述指令类型判断子单元31，再根据机器码信息中表示指令操作数的信息，生成上述指令操作数信息处理子单元32。The step of generating the input processing unit 30 according to the instruction machine code is specifically: first generate the above-mentioned instruction type judging subunit 31 according to the information indicating the instruction type in the machine code information, and then generate the above-mentioned instruction type judging subunit 31 according to the information indicating the instruction operand in the machine code information. Instruction operand information processing subunit 32 .
即配置每条指令的名称、机器码以及每条指令的功能；并根据配置的指令名称和机器码生成输入处理单元30，根据配置指令名称和功能生成功能仿真单元40。That is, configure the name, machine code, and function of each instruction; and generate an input processing unit 30 according to the configured instruction name and machine code, and generate a function simulation unit 40 according to the configured instruction name and function.
S300，配置输出结果，根据用户输入的仿真结果输出格式生成仿真结果输出单元50。S300, configure the output result, and generate the simulation result output unit 50 according to the simulation result output format input by the user.
为更好描述步骤S100中配置寄存器信息的过程，将其细分为以下步骤：In order to better describe the process of configuring register information in step S100, it is subdivided into the following steps:
S110：配置寄存器的个数及每个寄存器的名称，作为数据结构声明单元声明寄存器的个数及变量名称的依据。S110: Configure the number of registers and the name of each register as a basis for the data structure declaration unit to declare the number of registers and the name of the variable.
S120：配置每个寄存器的数据位宽，作为数据结构声明单元声明寄存器数据位宽的依据。S120: Configure the data bit width of each register as a basis for the data structure declaration unit to declare the data bit width of the register.
S130：配置寄存器复位值，作为寄存器初始化单元初始化寄存器的依据。S130: Configure the reset value of the register as a basis for initializing the register by the register initialization unit.
为更好描述步骤S200中配置指令集的过程，将其细分为以下步骤：In order to better describe the process of configuring the instruction set in step S200, it is subdivided into the following steps:
S210：配置指令名称，作为输入处理单元30、功能仿真单元40识别指令的依据；一般采用助记符，如MOV、ADD等。S210: configure the instruction name as a basis for identifying the instruction by the input processing unit 30 and the function simulation unit 40; mnemonics such as MOV and ADD are generally used.
S220：配置指令机器码中表示指令类型的信息，作为输入处理单元30(指令类型判断子单元31)判断指令类型的依据。S220: Configure information indicating the instruction type in the instruction machine code as a basis for the input processing unit 30 (instruction type judging subunit 31) to judge the instruction type.
S230：配置指令机器码中表示操作数的信息，作为输入处理单元30(指令操作数信息处理子单元)提取指令信息中操作数信息的依据，操作数不同时，机器码做相应的改变。S230: Configure the information representing the operand in the instruction machine code as the basis for the input processing unit 30 (instruction operand information processing subunit) to extract the operand information in the instruction information. When the operands are different, the machine code is changed accordingly.
S260：配置指令的功能，作为功能仿真单元进行功能仿真的依据。S260: Configure the function of the instruction as a basis for the function simulation unit to perform function simulation.
配置每条指令的功能包括：根据指令功能库中该条指令的功能进行配置。Configuring the function of each instruction includes: configuring according to the function of the instruction in the instruction function library.
上述步骤S260中配置每条指令的功能的之前可先查询指令功能库，即：Before configuring the function of each instruction in the above step S260, you can first query the instruction function library, namely:
S240：查询指令功能库中是否包含该指令的功能；若是，则根据指令功能库配置该条指令的功能；若否，则执行：S240: Query whether the instruction function library contains the function of the instruction; if yes, configure the function of the instruction according to the instruction function library; if not, execute:
S250：用编程语言描述该指令的功能并将其加入指令功能库中。S250: Describe the function of the instruction in a programming language and add it to the instruction function library.
当用户需要对处理器的设计进行验证时，验证流程如下：When the user needs to verify the design of the processor, the verification process is as follows:
根据所述处理器功能仿真模型的生成方法，接收用户输入的待验证处理器的寄存器参数、指令集信息和仿真结果输出格式信息，运用所述处理器功能仿真模型的生成装置，自动生成所述处理器指令级功能仿真模型；According to the generation method of the processor function simulation model, the register parameters, instruction set information and simulation result output format information of the processor to be verified input by the user are received, and the generation device of the processor function simulation model is used to automatically generate the described Processor instruction level functional simulation model;
让该功能仿真模型与待验证的处理器运行相同的一段指令，比较每条指令执行完以后，该功能仿真模型和待验证的处理器对应的各个寄存器的值是否相同；若所有寄存器的值都相同，则认为待验证处理器在执行该段指令时没有错误；反之，则认为待验证处理在执行该段代码时会出现错误，需要对待验证处理器进行修改；Let the functional simulation model run the same instruction as the processor to be verified, and compare whether the values of the registers corresponding to the functional simulation model and the processor to be verified are the same after each instruction is executed; If they are the same, it is considered that the processor to be verified has no error when executing the instruction; otherwise, it is considered that the processor to be verified will have an error when executing the code, and the processor to be verified needs to be modified;
重复上述操作，保证待验证处理器在执行很多代码段时都不会出错，通过分析待验证处理器在仿真验证过程中的覆盖率，以待验证处理的覆盖率作为验证是否通过的指标。Repeat the above operations to ensure that the processor to be verified will not make mistakes when executing many code segments. By analyzing the coverage rate of the processor to be verified in the simulation verification process, the coverage rate of the process to be verified is used as an indicator of whether the verification is passed.
图7为处理器功能仿真模型的一个工作实例的流程图,主要包括：Fig. 7 is a flowchart of a working example of the processor function simulation model, which mainly includes:
1、首先由寄存器初始化单元20初始化寄存器，即根据寄存器的复位值对声明的寄存器进行初始化。1. First, registers are initialized by the register initialization unit 20, that is, the declared registers are initialized according to the reset values of the registers.
2、然后判断指令是否执行完，若执行完，则仿真结束；若没有执行完，则继续完成以下操作：2. Then judge whether the instruction has been executed. If it is executed, the simulation ends; if it is not executed, continue to complete the following operations:
3、用输入处理单元30从虚拟存储器中读取指令，并处理用户输入的指令机器码，将指令信息保存到图3所述的数据结构中。具体包括：提取指令机器码中的信息，根据指令机器码的指令类型字段判断指令的类型，并将指令机器码中的操作数映射字段转换为功能仿真器中的操作数信息，并将指令按照类型和操作数信息存储为预设的数据结构。3. Use the input processing unit 30 to read instructions from the virtual memory, process the instruction machine code input by the user, and store the instruction information in the data structure described in FIG. 3 . It specifically includes: extracting the information in the instruction machine code, judging the type of the instruction according to the instruction type field of the instruction machine code, converting the operand mapping field in the instruction machine code into the operand information in the functional simulator, and converting the instruction according to Type and operand information is stored as preset data structures.
4、用功能仿真单元40完成该条指令的功能仿真，即根据指令功能，执行指令，改变相应寄存器的值。4. Use the function simulation unit 40 to complete the function simulation of the instruction, that is, execute the instruction and change the value of the corresponding register according to the function of the instruction.
5、用仿真结果输出单元50输出仿真结果，一般为输出各个寄存器在执行完该条指令后的值。5. Use the simulation result output unit 50 to output the simulation results, generally the values of each register after the instruction is executed.
例如，若某处理器功能仿真模型执行如下的指令机器码：For example, if a processor function simulation model executes the following instruction machine code:
00100100010001000010010001000100
00110100010000000011010001000000
00100010011001100010001001100110
00110010101000000011001010100000
10000000010000101000000001000010
对应如下的指令：Corresponds to the following commands:
MOVL R4,0x44MOVL R4,0x44
MOVH R4,0x40MOVH R4,0x40
MOVL R2,0x66MOVL R2,0x66
MOVH R2,0xa0MOVH R2,0xa0
ADD R4,R2ADD R4,R2
首先，根据该处理器功能仿真模型的寄存器配置信息，由寄存器初始化单元20完成各个寄存器的初始化。(如在该处理器功能仿真模型中，除了程序计数器PC以外的寄存器都初始化为0。)First, according to the register configuration information of the processor function simulation model, the initialization of each register is completed by the register initialization unit 20 . (For example, in the processor functional simulation model, all registers except the program counter PC are initialized to 0.)
其次，将上述5条指令都存入处理器功能仿真模型的指令存储器中，即存入功能仿真模型中的一块虚拟存储(若该功能仿真模型用C语言实现，即声明为16bits的整型数组)。Next, store the above five instructions in the instruction memory of the processor function simulation model, that is, store them in a piece of virtual storage in the function simulation model (if the function simulation model is implemented in C language, it is declared as an integer array of 16 bits ).
然后，判断是否已经执行了5条指令，若已经执行过5条指令，则仿真结束。若还没有执行完5条指令，则由输入处理单元30先处理输入的指令机器码，如现在刚开始执行第一条指令，先处理该条指令的机器码，由此可知第一条指令为MOVL R4,0x44；Then, it is judged whether 5 instructions have been executed, and if 5 instructions have been executed, the simulation ends. If the 5 instructions have not been executed, then the input processing unit 30 first processes the input instruction machine code. As the first instruction is just started to be executed now, the machine code of the instruction is first processed. Thus it can be seen that the first instruction is MOVL R4,0x44;
再次，由功能仿真单元40根据指令MOVL R4,0x44的功能完成仿真，即将0x44赋值给R4的低8位，除此之外不影响其他的寄存器。Again, the simulation is completed by the function simulation unit 40 according to the function of the instruction MOVL R4, 0x44, that is, assigning 0x44 to the lower 8 bits of R4, other registers are not affected.
最后，由仿真结果输出单元50输出该条指令的仿真结果。假设输出格式为按16进制输出16个通用寄存器的值，则输出的仿真结果为：0x00000x0000 0x0000 0x0000 0x0044 0x0000 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0x0000 0x0000 0x0000 0x0000。Finally, the simulation result of the instruction is output by the simulation result output unit 50 . Assuming that the output format is to output the values of 16 general-purpose registers in hexadecimal, the output simulation result is: 0x00000x0000 0x0000 0x0000 0x0044 0x0000 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0x0000 0x0000 0x0000.
假设输出格式设置为每条指令执行完以后按16进制输出16个通用寄存器的值，会得到如下结果：Assuming that the output format is set to output the values of 16 general-purpose registers in hexadecimal after each instruction is executed, the following results will be obtained:
0x0000 0x0000 0x0000 0x0000 0x0044 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0x0000 0x0000 0x0044 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000
0x0000 0x0000 0x0000 0x0000 0x4044 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0x0000 0x0000 0x4044 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000
0x0000 0x0000 0x0066 0x0000 0x4044 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0x0066 0x0000 0x4044 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000
0x0000 0x0000 0xa066 0x0000 0x4044 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0xa066 0x0000 0x4044 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000
0x0000 0x0000 0xa066 0x0000 0xe0aa 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0xa066 0x0000 0xe0aa 0x0000 0x0000 0x0000 0x00000x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000
以上内容是结合具体的实施方式对本申请所作的进一步详细说明，不能认定本申请的具体实施只局限于这些说明。对于本申请所属技术领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干简单推演或替换，都应当视为属于本申请的保护范围。The above content is a further detailed description of the present application in conjunction with specific implementation modes, and it cannot be deemed that the specific implementation of the present application is limited to these descriptions. For those of ordinary skill in the technical field to which this application belongs, some simple deduction or substitutions can be made without departing from the concept of this application, which should be deemed to belong to the protection scope of this application.
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