The manufacture method of solar cell and solar cellTechnical field
The present invention relates to a kind of manufacture method and solar cell of solar cell, particularly relate to a kind of manufacture method and back contact solar cell of back contact solar cell.
Background technology
New forms of energy are one of five big technical fields of tool decision power in the 21st century development of world economy.Solar energy is a kind of cleaning, efficiently and never depleted new forms of energy.In the new century, national governments are all with the important content of solar energy resources utilization as the national sustainable development strategy.And that photovoltaic generation has is safe and reliable, noiseless, pollution-free, restriction less, advantages such as low, the easy maintenance of failure rate.
In recent years, international photovoltaic generation fast development, supply falls short of demand for solar wafer, so the electricity conversion of raising solar wafer and the production capacity of solar wafer become important problem.After solar cell received illumination, battery produced electron-hole pair after absorbing the incident photon of an energy greater than band gap width, and electronics and hole are energized into the upper state of conduction band and valence band respectively.Moment after exciting, the energy of incident photon is depended in electronics and hole in the energy position of excitation state.The photo-generated carrier that is in upper state very fast with the lattice interaction, energy is given phonon and is fallen back at the bottom of the conduction band and top of valence band, this process is also referred to as the thermalization process, the thermalization process make high-energy photon energy loss a part.After the thermalization process, the transport process of photo-generated carrier will have recombination losses in (barrier region or diffusion region).Last voltage output once pressure drop again, pressure drop derive from the difference with the work function of electrode material.By above-mentioned analysis, solar battery efficiency receives material, device architecture and preparation technology's influence, comprises the light loss of battery, limited mobility, recombination losses, series resistance and the bypass resistance loss etc. of material.For certain material, battery structure and preparation technology's improvement is important to improving photoelectric conversion efficiency.A kind of feasible realization low-cost high-efficiency solar cell scheme is a concentrator solar cell.Concentrator solar cell is the economical with materials cost greatly, obviously improves efficiency of solar cell.Adopt the solar cell of front junction structure, in order to satisfy the bigger characteristics of concentrator cell current density, must increase front gate line density greatly, this can influence the grid line shading rate conversely, reduces short circuit current.The scheme that a kind of feasible solution shading is lost is carried on the back the contact structures solar cell exactly, also is back of the body junction battery.The doped region and golden half contact area of back of the body contact structures solar cell all are integrated in back of solar cell, and it is very most of that backplate occupies back of the body surface, reduced the contact resistance loss.In addition, direction of current flow is perpendicular to the interface, and this has just further eliminated the ohmic loss that the Facad structure transverse current flows and causes, and will satisfy the requirement that high-strength focused front receives light and high-photoelectric transformation efficiency simultaneously like this.Back contact solar cell also helps cell package, further reduces cost.
But because the PN junction of back of the body junction battery is near cell backside; And must diffusing through whole silicon wafer thickness, minority carrier just can reach interface, the back side; So the silicon chip that this battery design just needs especially high minority carrier life time is as base material; Otherwise few son also is not diffused into interface, the back side just have been fallen by compound, and the efficient of battery will descend greatly like this.IBC (interdigitated back contact) solar cell is the back of the body junction battery of studying the earliest; Be mainly used in the condenser system at first; The back contact silicon solar cell progress of Ren Bingyan etc. has been introduced the structure and the manufacture craft of various back contact silicon solar cells in (material Leader the 22nd the 9th phase of volume of September in 2008); With the IBC solar cell is example, and the high conversion efficiency of the IBC solar cell that SUNPOWER company makes can reach 24%, then because it has adopted photoetching process; Because the complex operations that photoetching brought makes that its cost is difficult to descend, and causes difficulty for commercial applications civilian or common occasion.In order to reduce cost, the P+ district and the N+ district that utilize mask plate to form cross arrangement are also arranged, but in manufacturing process, must use many mask plates, also produced the problem of mask plate calibration when increasing cost, for manufacturing process has been brought many difficulty.
Summary of the invention
The technical problem that the present invention will solve be only need mask plate, a maskless plate calibration problem in a kind of manufacturing process in order to use the defective that lithographic process steps is numerous and diverse, cost is higher in the manufacturing process that overcomes IBC solar cell in the prior art, to provide, cost is lower, processing step is less and dopant ion concentration is able to the accurately manufacture method and the solar cell of the solar cell of control.
The present invention solves above-mentioned technical problem through following technical proposals:
A kind of manufacture method of solar cell, its characteristics are that it may further comprise the steps:
Step S1, form N+ type doped layer at N type substrate surface;
Step S2, form film on this N+ type doped layer surface with pattern, wherein, be not open area by this film region covered with pattern; This film with pattern plays the effect of mask;
Step S3, this open area is carried out etching, etch depth is greater than the thickness of this N+ type doped layer and until this N type substrate, to form a groove at this N type substrate surface and the corresponding position of this open area; Promptly except the N+ type doped layer of open area had been removed by complete etching, the N type substrate that this open area is corresponding also was etched skim, has just formed groove in this N type substrate like this;
Step S4, in the groove surfaces of N type substrate, form P+ type doped region, wherein, this P+ type doped region did not contact without etched N+ type doped layer with this mutually;
Step S5, remove this film to obtain wafers doped with pattern;
Step S6, form coating at the back side of this wafers doped, this coating be first passivation layer and and anti-reflection film;
Step S7, form second passivation layer on the surface of this wafers doped; Surface passivation can reduce semi-conductive surface activity; The recombination rate on surface is reduced; Its main mode is the dangling bonds at saturated semiconductor surface place, reduces surface activity, increases the cleaning procedure on surface; Avoid reducing the recombination velocity of minority carrier with this owing to impurity forms the complex centre in the introducing of superficial layer.Through surface passivation, make surface recombination reduce, thereby improve effective minority carrier life time.Anti-reflection film can reduce surperficial sun reflection of light, improves the utilance of sunlight, adopts above-mentioned coating to be the effective means that improves the solar cell photoelectric conversion efficiency;
Step S8, form positive electrode and negative electrode on the surface of this wafers doped, wherein, this positive electrode is formed on this P+ type doped region, this negative electrode is formed at this without on the etched N+ type doped layer;
Step S9, this wafers doped of sintering, make the metallic element of positive electrode and negative electrode and wafers doped eutectic compound,
Wherein, when described P type replaced with the N type, the N type replaced with the P type simultaneously.
Preferably, step S1In the mode injected through thermal diffusion or ion form this N+ type doped layer, wherein the square resistance of this N+ type doped layer is 20-100 Ω/.Preferably, the square resistance of this N+ type doped layer is 30-90 Ω/, and more preferably, the square resistance of this N+ type doped layer is 40-80 Ω/.Those skilled in the art can select diffuse source and diffusion temperature, for example POCl according to conventional parameter3As diffuse source.
Preferably, step S2In mode through silk screen printing form the film that this has pattern, wherein this thickness with film of pattern is 1-50 μ m and by synthetic rubber or metal, for example albronze is processed.After this film with pattern forms, also comprise the step of drying this film.Adopt the just comparatively preferred mode of silk screen printing, but be not limited thereto, can also adopt other known means to form this and have the film of pattern.
Preferably, step S3In the degree of depth of etched N type substrate be at least 5 μ m, preferably, the degree of depth of etched N type substrate is 5-30 μ m, the degree of depth of said here etched N type substrate promptly refers to the thickness of the skim that this N type substrate is etched.In breakdown for PN junction is not easy, as to improve solar cell useful life, the preferred depth of the degree of depth of this etched N type substrate is 5-20 μ m.
Preferably, step S4In the mode injected through thermal diffusion or ion form this P+ type doped region; Those skilled in the art can select diffuse source and diffusion temperature according to conventional parameter; The mode of perhaps quickening P type ion and injecting through ion is injected into the substrate of N type to form P+ type doped region with this P type ion from this open area of this N type substrate surface; Wherein, this P type ion is accelerated to 500eV-50keV, and the square resistance of formed P+ type doped region is 40-120 Ω/.Preferably, P type ion is accelerated to 1keV-40keV, and more preferably, P type ion is accelerated to 5keV-30keV; Preferably, the square resistance of formed P+ type doped region is 60-110 Ω/, and more preferably, the square resistance of formed P+ type doped region is 80-100 Ω/.
In addition, at step S4In, because thermal diffusion process is not had a directivity, its diffusion is all directions, except in the surface of groove, forming P+ type doped region, also can in two sidewalls of this groove, form P+ type doped layer; Even at step S4In what adopt is the method that ion injects, have good directivity though ion injects, the process in that ion injects also may cause part ion to be injected in the two side of this groove, forms the P+ type doped layer that approaches.What no matter adopt is the method that thermal diffusion process or ion inject, all might in the process that forms P+ type doped region, cause in the sidewall of groove and form P+ type doped layer, and this P+ type doped layer with without etching (step S3Described etching) N+ doped layer contacts, and can cause the structure of P+/N+ like this, and its depletion layer is very thin, and is very easy breakdown, influenced the quality and the useful life of the solar cell that finally makes, therefore at step S4Step S afterwards,5Also comprise step S beforeP: step S is removed in etching4In the P+ type doped layer that in this recess sidewall, forms when forming this P+ type doped region, what described etching was adopted is conventional means.
Preferably, step S5Also comprise annealing steps afterwards.After ion injected, preferably, annealing temperature was 850-1000 ℃ to activate dopant ion in 30 seconds to 30 minutes in annealing under 700-1100 ℃ temperature.
Preferably, step S6In form coating through PECVD (plasma enhanced chemical vapor deposition method), first passivation layer of this coating is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or the amorphous silicon membrane, the anti-reflection film of this coating is a silicon nitride film.
Preferably, step S7In form second passivation layer through PECVD, this second passivation layer is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or the amorphous silicon membrane.
Preferably, step S8Middle silver slurry or the silver-colored aluminium paste of adopting also passes through silk screen printing method for producing positive electrode and/or negative electrode.If adopt silver-colored aluminium paste as electrode material, the content of aluminium is greater than 3% in the then said silver-colored aluminium paste, and preferably, the content of aluminium is greater than 5% in the said silver-colored aluminium paste, and said percentage is the mass percent that aluminium accounts for silver/aluminium paste total amount.
Preferably, step S8Further comprising the steps of:
Step S81, in second passivation layer corresponding, form first contact hole with this P+ type doped region, and with this second passivation layer corresponding without etched N+ type doped layer in formation second contact hole;
Step S82, form positive electrode and negative electrode on the surface of this wafers doped, wherein, this positive electrode is connected to this P+ type doped region through this first contact hole, this negative electrode is connected to this without etched N+ type doped layer through this second contact hole.Positive electrode has just formed a little with semi-conducting material with negative electrode and has contacted like this, has further reduced contact resistance.
The solar cell that the present invention also provides a kind of manufacture method of solar cell as described above to make, its characteristics are that this solar cell comprises:
One wafers doped, wherein this wafers doped comprises:
One surface has the N type substrate of groove;
Be formed at least one the N+ type doped region in this N type substrate surface;
Be formed at the P+ type doped region in this N type base groove surface, and
Be formed at the coating at this wafers doped back side, this coating be first passivation layer and and anti-reflection film;
Be formed at second passivation layer on this wafers doped surface;
At least one is positioned at the negative electrode on this at least one N+ type doped region surface;
Be positioned at the positive electrode on this P+ type doped region surface;
Wherein, this N+ type doped region does not contact with this P+ type doped region mutually,
Wherein, when described P type replaced with the N type, the N type replaced with the P type simultaneously.
Preferably, the minimum range of this N+ type doped region and this P+ type doped region is at least 5 μ m, and preferably, the degree of depth of etched N type substrate is 5-30 μ m, and more preferably, the minimum range of this N+ type doped region and this P+ type doped region is 5-20 μ m.
Preferably, the square resistance of this N+ type doped region is 20-100 Ω/.Preferably, the square resistance of this N+ type doped region is 30-90 Ω/, and more preferably, the square resistance of this N+ type doped region is 40-80 Ω/.
Preferably, the square resistance of P+ type doped region is 40-120 Ω/.Preferably, the square resistance of formed P+ type doped region is 60-110 Ω/, and more preferably, the square resistance of formed P+ type doped region is 80-100 Ω/.
Preferably, first passivation layer of this coating is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or the amorphous silicon membrane, and the anti-reflection film of this coating is a silicon nitride film.
Preferably, this second passivation layer is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or the amorphous silicon membrane.
Preferably; Has first contact hole in second passivation layer corresponding with this P+ type doped region; Has at least one second contact hole in second passivation layer corresponding with this at least one N+ type doped region; Wherein, this positive electrode is connected to this P+ type doped region through this first contact hole, and at least one second contact hole is connected to this at least one N+ type doped region to this at least one negative electrode through this.
Only need be in said process, the impurity material that the mode that transposing base material and ion inject or diffusion is grown is mixed, then this method is equally applicable to the making of P type solar energy solar cell, and when promptly described N type replaced with the P type, the P type replaced with the N type simultaneously.
Positive progressive effect of the present invention is:
1, P+ type doped region and without having N type base material as resilient coating between the etched N+ type doped layer among the present invention, make can not cause between the PN junction because depletion layer is too thin breakdown, the useful life of having improved this solar cell thus.
2, compared with adopting photoetching process to make back of the body junction battery; The present invention has simplified processing step, need not to buy mask aligner, and cost reduces greatly; Make need not in the flow process to use many mask plates in addition, also reduced cost of manufacture when having solved the mask plate calibration problem.
3, the minimum widith of the N type resilient coating between P+ type doped region and the N+ type doped region is 5 μ m among the present invention; The mask plate that adopts pure machining process to make is difficult to accomplish such precision; Promptly enable to accomplish; Such mask plate also is an expensive, and the mode that the present invention passes through in base material, to form groove and in groove, forms the P+ doped region forms the N type resilient coating that meets above-mentioned minimum widith naturally; Save the cost of the high mask plate of purchasing price, further reduced cost of manufacture.
4, adopt the ion injection to mix and form P+ type doped region, the concentration of dopant ion has obtained accurate control, and is more favourable to the efficient that improves opto-electronic conversion compared with the doping of thermal diffusion process.
Description of drawings
Fig. 1-8 is the decomposition step sketch map of manufacturing solar cells of the present invention.
Embodiment
Provide preferred embodiment of the present invention below in conjunction with accompanying drawing, to specify technical scheme of the present invention.
Embodiment 1
With reference to figure 1, step S1, form N+ type dopedlayer 2 onN type substrate 1 surface, the square resistance of this N+ type doped layer is 20 Ω/.Specifically, phosphonium ion is accelerated to 500eV and the mode injected through ion is injected into this N type substrate with this phosphonium ion from the surface of this N type substrate.
With reference to figure 2, step S2, formfilms 3 on this N+ type dopedlayer 2 surfaces with pattern, wherein, be not open area by thesefilm 3 region covered with pattern; This film with pattern plays the effect of mask.Wherein the mode through silk screen printing forms this film withpattern 3, and wherein this thickness with film of pattern is 1 μ m and is processed by synthetic rubber.After this film with pattern forms, dry this film.
With reference to figure 3, step S3, this open area is carried out etching, etch depth is greater than the thickness of this N+ type dopedlayer 2 and until thisN type substrate 1, in the present embodiment, the degree of depth of etched N type substrate is 5 μ m; Promptly except the N+ type doped layer of open area had been removed by complete etching, the N type substrate that this open area is corresponding also was etched skim, and this N type substrate has just formedgroove 4 like this.This film with pattern also has the effect that protection need not etched N+ type doped layer except the effect of mask plate.
With reference to figure 4a, step S4, quickening mode that the boron ion injects to 500eV and through ion, this boron ion vertically is injected intoN type substrate 1 from this open area on thisN type substrate 1 surface along direction a is the P+ type dopedregion 5 of 40 Ω/ to form square resistance; That is to say; This P+ type dopedregion 5 is formed in thisgroove 4; Wherein, this P+ type dopedregion 5 did not contact without etched N+ type doped layer with this mutually.In the present embodiment, this P+ type dopedregion 5 be 5 μ m with the minimum range of being somebody's turn to do without etched N+ type doped layer.
With reference to figure 5, step S5, adopt the conventional means of this area to remove this to have thefilm 3 of pattern, carry out annealing steps afterwards, with solar cell annealing under 700 ℃ temperature 30 minutes to activate dopant ion.By this P+ type dopedregion 5, should constitute the PN junction of P+/N/N+ structure without etched N+ type dopedlayer 2 and above-mentioned between the two N type substrate.Thus, wafers doped completes.
With reference to figure 6, step S6, form coating at the back side of this wafers doped through PECVD, this coating befirst passivation layer 61 and withanti-reflection film 7, wherein, thisfirst passivation layer 61 is silicon nitride film withanti-reflection film 7.
With reference to figure 7, step S7, formsecond passivation layer 62 on the surface of this wafers doped through PECVD, wherein, thissecond passivation layer 62 is a silicon oxide film.
With reference to figure 8, step S8, formpositive electrode 81 andnegative electrode 82 on the surface of this wafers doped, wherein, thispositive electrode 81 is formed on this P+ type dopedregion 5, thisnegative electrode 82 is formed at this without on the etched N+ type doped layer 2.Wherein adopt the silver slurry and pass through silk screen printing method for producingpositive electrode 81 and negative electrode 82.Get into step S afterwards9, with this wafers doped 700 ℃ of sintering 30 minutes, make the metallic element and the wafers doped eutectic ofpositive electrode 81 andnegative electrode 82 compound, thus, said solar cell completes.It will be appreciated by those skilled in the art that surface described here, the back side all are comparatively speaking, is not limitation of the present invention.
Embodiment 2
With reference to figure 1, step S1, form N+ type dopedlayer 2 onN type substrate 1 surface, the square resistance of this N+ type doped layer is 100 Ω/.Specifically, phosphonium ion is accelerated to 50keV and the mode injected through ion is injected into this N type substrate with this phosphonium ion from the surface of this N type substrate.
With reference to figure 2, step S2,form films 3 on this N+ type dopedlayer 2 surfaces with pattern, wherein, be not open area by thesefilm 3 region covered with pattern; This film with pattern plays the effect of mask.Wherein the mode through silk screen printing forms this film withpattern 3, and wherein this thickness with film of pattern is 50 μ m and is processed by albronze.After this film with pattern forms, dry this film.
With reference to figure 3, step S3, this open area is carried out etching, etch depth is greater than the thickness of this N+ type dopedlayer 2 and until thisN type substrate 1, in the present embodiment, the degree of depth of etched N type substrate is 30 μ m; Promptly except the N+ type doped layer of open area had been removed by complete etching, the N type substrate that this open area is corresponding also was etched skim, and this N type substrate has just formedgroove 4 like this.This film with pattern also has the effect that protection need not etched N+ type doped layer except the effect of mask plate.
With reference to figure 4a, step S4, quickening mode that the boron ion injects to 50keV and through ion, this boron ion vertically is injected intoN type substrate 1 from this open area on thisN type substrate 1 surface along direction a is the P+ type dopedregion 5 of 120 Ω/ to form square resistance; That is to say; This P+ type dopedregion 5 is formed in thisgroove 4; Wherein, this P+ type dopedregion 5 did not contact without etched N+ type doped layer with this mutually.In the present embodiment, this P+ type dopedregion 5 be 30 μ m with the minimum range of being somebody's turn to do without etched N+ type doped layer.
With reference to figure 5, step S5, adopt the conventional means of this area to remove this to have thefilm 3 of pattern, carry out annealing steps afterwards, with solar cell annealing under 1100 ℃ temperature 30 seconds to activate dopant ion.By this P+ type dopedregion 5, should constitute the PN junction of P+/N/N+ structure without etched N+ type dopedlayer 2 and above-mentioned between the two N type substrate.Thus, wafers doped completes.
With reference to figure 6, step S6, form coating at the back side of this wafers doped through PECVD, this coating befirst passivation layer 61 and withanti-reflection film 7, wherein, thisfirst passivation layer 61 is a silicon oxide film,anti-reflection film 7 is a silicon nitride film.
With reference to figure 7, step S7, formsecond passivation layer 62 on the surface of this wafers doped through PECVD, wherein, thissecond passivation layer 62 is an amorphous silicon membrane.
With reference to figure 8, step S8, formpositive electrode 81 andnegative electrode 82 on the surface of this wafers doped, wherein, thispositive electrode 81 is formed on this P+ type dopedregion 5, thisnegative electrode 82 is formed at this without on the etched N+ type doped layer 2.Wherein adopt the silver slurry and pass through silk screen printing method for producingpositive electrode 81 and negative electrode 82.Get into step S afterwards9, with this wafers doped 1100 ℃ of sintering 30 seconds, make the metallic element and the wafers doped eutectic ofpositive electrode 81 andnegative electrode 82 compound, thus, the completing of solar cell.
Embodiment 3
With reference to figure 1, step S1, form N+ type dopedlayer 2 onN type substrate 1 surface, the square resistance of this N+ type doped layer is 60 Ω/.Specifically, phosphonium ion is accelerated to 30keV and the mode injected through ion is injected into this N type substrate with this phosphonium ion from the surface of this N type substrate.
With reference to figure 2, step S2,form films 3 on this N+ type dopedlayer 2 surfaces with pattern, wherein, be not open area by thesefilm 3 region covered with pattern; This film with pattern plays the effect of mask.Wherein the mode through silk screen printing forms this film withpattern 3, and wherein this thickness with film of pattern is 30 μ m and is processed by albronze.After this film with pattern forms, dry this film.
With reference to figure 3, step S3, this open area is carried out etching, etch depth is greater than the thickness of this N+ type dopedlayer 2 and until thisN type substrate 1, in the present embodiment, the degree of depth of etched N type substrate is 10 μ m; Promptly except the N+ type doped layer of open area had been removed by complete etching, the N type substrate that this open area is corresponding also was etched skim, and this N type substrate has just formedgroove 4 like this.This film with pattern also has the effect that protection need not etched N+ type doped layer except the effect of mask plate.
With reference to figure 4a, step S4, quickening mode that the boron ion injects to 30keV and through ion, this boron ion vertically is injected intoN type substrate 1 from this open area on thisN type substrate 1 surface along direction a is the P+ type dopedregion 5 of 80 Ω/ to form square resistance; That is to say; This P+ type dopedregion 5 is formed in thisgroove 4; Wherein, this P+ type dopedregion 5 did not contact without etched N+ type doped layer with this mutually.In the present embodiment, this P+ type dopedregion 5 be 10 μ m with the minimum range of being somebody's turn to do without etched N+ type doped layer.
With reference to figure 5, step S5, adopt the conventional means of this area to remove this to have thefilm 3 of pattern, carry out annealing steps afterwards, with solar cell annealing under 850 ℃ temperature 10 minutes to activate dopant ion.By this P+ type dopedregion 5, should constitute the PN junction of P+/N/N+ structure without etched N+ type dopedlayer 2 and above-mentioned between the two N type substrate.Thus, wafers doped completes.
With reference to figure 6, step S6, form coating at the back side of this wafers doped through PECVD, this coating befirst passivation layer 61 and withanti-reflection film 7, wherein, thisfirst passivation layer 61 is silicon nitride film withanti-reflection film 7.
With reference to figure 7, step S7, formsecond passivation layer 62 on the surface of this wafers doped through PECVD, wherein, thissecond passivation layer 62 is an amorphous silicon membrane.
With reference to figure 8, step S8, formpositive electrode 81 andnegative electrode 82 on the surface of this wafers doped, wherein, thispositive electrode 81 is formed on this P+ type dopedregion 5, thisnegative electrode 82 is formed at this without on the etched N+ type doped layer 2.Wherein adopt the silver slurry and pass through silk screen printing method for producingpositive electrode 81 and negative electrode 82.Get into step S afterwards9, with this wafers doped 850 ℃ of sintering 10 minutes, make the metallic element and the wafers doped eutectic ofpositive electrode 81 andnegative electrode 82 compound, thus, the completing of solar cell.
Embodiment 4
The principle ofembodiment 4 is identical withembodiment 1, and its main technique step is also identical, and difference only is following technology and parameters of choice:
Step S1The middle POCl that adopts3As diffuse source, the mode through thermal diffusion forms this N+ type dopedlayer 2, and the square resistance of this N+ type doped layer is 50 Ω/.
Step S3, this open area is carried out etching, etch depth is greater than the thickness of this N+ type dopedlayer 2 and until thisN type substrate 1, in the present embodiment, the degree of depth of etched N type substrate is 15 μ m.All the other NM processing steps are selected all identical inembodiment 1 with parameter.
Embodiment 5
The principle ofembodiment 5 is identical withembodiment 1, and its main technique step is also identical, and difference only is following technology and parameters of choice:
With reference to figure 4b, step S4, quickening mode that the boron ion injects to 500eV and through ion, this boron ion vertically is injected intoN type substrate 1 from this open area on thisN type substrate 1 surface along direction a is the P+ type dopedregion 5 of 70 Ω/ to form square resistance; That is to say; This P+ type dopedregion 5 is formed in thisgroove 4, has good directivity though ion injects, in the collision process of ion; Also may cause part ion to be rebounded to the two side of this groove; Form thin P+ type doped layer 51, with reference to figure 4b, this P+ type doped layer 51 contact without etched N+ type dopedlayer 2 with being somebody's turn to do at this moment; Breakdown in order to prevent PN junction, must remove the P+ type doped layer 51 in this recess sidewall.Therefore, need carry out step SP: step S is removed in etching4In the P+ type doped layer 51 that in this recess sidewall, forms when forming this P+ type doped region, what described etching was adopted is conventional means.
After having removed the P+ type doped layer 51 in this recess sidewall, this P+ type dopedregion 5 did not contact without etched N+ type doped layer with this mutually.In the present embodiment, this P+ type dopedregion 5 be 5 μ m with the minimum range of being somebody's turn to do without etched N+ type doped layer.
All the other NM processing steps are selected all identical inembodiment 1 with parameter.
Embodiment 6
The principle of embodiment 6 is identical withembodiment 1, and its main technique step is also identical, and difference only is following technology and parameters of choice:
With reference to figure 4b, step S4, form the P+ type dopedregion 5 that square resistance is 80 Ω/ through the mode of thermal diffusion, that is to say that this P+ type dopedregion 5 is formed in thisgroove 4; Because thermal diffusion process is not had a directivity; Its diffusion is all directions, except in the surface of groove, forming P+ type dopedregion 5, also can in two sidewalls of this groove, form P+ type doped layer 51; With reference to figure 4b; This moment, this P+ type doped layer 51 contact without etched N+ type dopedlayer 2 with this, and was breakdown in order to prevent PN junction, must remove the P+ type doped layer 51 in this recess sidewall.Therefore, need carry out step SP: step S is removed in etching4In the P+ type doped layer 51 that in this recess sidewall, forms when forming this P+ type doped region, what described etching was adopted is conventional means.
After having removed the P+ type doped layer 51 in this recess sidewall, this P+ type dopedregion 5 did not contact without etched N+ type doped layer with this mutually.In the present embodiment, this P+ type dopedregion 5 be 5 μ m with the minimum range of being somebody's turn to do without etched N+ type doped layer.
All the other NM processing steps are selected all identical withembodiment 1 with parameter.
Embodiment 7
The principle ofembodiment 7 is identical withembodiment 5, and its main technique step is also identical, and difference only is following technology and parameters of choice:
With reference to figure 8, step S8Further comprising the steps of:
Step S81, insecond passivation layer 62 corresponding, form first contact hole with this P+ type dopedregion 5, and with thissecond passivation layer 62 corresponding without etched N+ type doped layer in formation second contact hole;
Step S82, formpositive electrode 81 andnegative electrode 82 on the surface of this wafers doped, wherein, thispositive electrode 81 is connected to this P+ type dopedregion 5 through this first contact hole, thisnegative electrode 82 is connected to this without etched N+ type dopedlayer 2 through this second contact hole.That is to say thatpositive electrode 81 forms point withnegative electrode 82 and wafers doped and contacts.
All the other NM processing steps are selected all identical withembodiment 5 with parameter.
Embodiment 8
The principle of embodiment 8 is identical with embodiment 6, and its main technique step is also identical, and difference only is following technology and parameters of choice:
With reference to figure 8, step S8Further comprising the steps of:
Step S81, insecond passivation layer 62 corresponding, form first contact hole with this P+ type dopedregion 5, and with thissecond passivation layer 62 corresponding without etched N+ type doped layer in formation second contact hole;
Step S82, formpositive electrode 81 andnegative electrode 82 on the surface of this wafers doped, wherein, thispositive electrode 81 is connected to this P+ type dopedregion 5 through this first contact hole, thisnegative electrode 82 is connected to this without etched N+ type dopedlayer 2 through this second contact hole.That is to say thatpositive electrode 81 forms point withnegative electrode 82 and wafers doped and contacts.
All the other NM processing steps are selected all identical with embodiment 6 with parameter.
Only need be in said process, the impurity material that the mode that transposing base material and ion inject or diffusion is grown is mixed, then this method is equally applicable to the making of P type solar energy solar cell, and when promptly described N type replaced with the P type, the P type replaced with the N type simultaneously.
Though more than described embodiment of the present invention, it will be understood by those of skill in the art that these only illustrate, protection scope of the present invention is limited appended claims.Those skilled in the art can make numerous variations or modification to these execution modes under the prerequisite that does not deviate from principle of the present invention and essence, but these changes and modification all fall into protection scope of the present invention.