CN102487282A - Circuit for realizing variable length CRC operation - Google Patents

Abstract

The invention relates to a circuit for realizing a variable length CRC operation. The circuit is composed of an alternative selector, a CRC operation module and an output selection module. The alternative selector carries out selection and output on input data according to a selection condition. The CRC operation module carries out different CRC operations on the input data according to different initial values. The output selection module selects and outputs a CRC operation result according to circuit input data. According to the invention, through cutting a transmission data packet into sub data packets with length less than or equal to 32 bits and employing different CRC operation methods to calculate corresponding CRC values according to effective data length of the sub data packets, a data CRC operation problem brought by uncertain length of the data packet in a traditional realization mode is solved.

Description

A kind of circuit of realizing variable length CRC computing

Technical field

The present invention relates to CRC application in the high-speed communication interfaces such as USB and SATA, relate in particular to a kind of circuit of realizing variable length CRC computing.

Background technology

Along with the development of microelectric technique, big capacity, high-speed data transmission application demand get more and more, and also increasingly high to the requirement of bandwidth, as important high-speed communication interface, USB and SATA have been widely used in the electronic product of daily life.

The technical characterstic of CRC (Cyclic Redundancy Check, CRC) is that error detecing capability is extremely strong, and expense is little, is easy to realize with encoder and testing circuit.From its error detecing capability, it the probability of the mistake that can not find be below 0.0047%.On performance, consider, all be much better than modes such as parity check and arithmetic sum verification, thereby in storage and data communication field, the CRC technology has obtained using widely with expense.How variable length CRC computing being applied to USB, is the technical problem that the present invention will solve in the high-speed communication interface technical fields such as SATA.

Summary of the invention

The object of the invention provides a kind of circuit of realizing variable length CRC computing, through being truncated into transmits data packets the subdata bag that is not more than 32 bit lengths, and takes different CRC operation methods to calculate corresponding crc value according to the valid data length of subdata bag.

A kind of circuit of realizing variable length CRC computing selects module to constitute by alternative selector, CRC computing module and output.

The alternative selector is used for according to alternative condition separately the input data being selected output;

The CRC computing module according to different initial values, carries out the CRC computing to the input data;

Module is selected in output, according to circuit input data, selects output CRC operation result;

The alternative selector is two among the present invention, is respectively selector MUX1 and selector MUX2.The input of selector MUX1 has two: one is constant, is made as 32 ' hff_ff, and the another one input is connected to the output crc_value that module is selected in output; Its control end is the input signal first_byte of circuit, and output is connected respectively to the input crc_initial_value of four CRC computing modules; Control end input signal first_byte bit wide is 1 bit, representes whether the nybble data of current input comprise first byte of transmits data packets data.When first_byte is 1 ' b1, represent that the nybble data of current input comprise first byte of transmits data packets data, output to constant 32 ' hff_ff on the crc_initial_value data wire; Otherwise crc_value is outputed on the crc_initial_value data wire.Selector MUX2 has four inputs, is connected to the output of four CRC computing modules, and its control end is the input signal data_length of circuit.

The CRC computing module is four, is respectively: the CRC_8 that CRC_16 that the effective bit wide of circuit input data din is 32 CRC_32, CRC_24 that the effective bit wide of circuit input data din is 24, the effective bit wide of circuit input data din is 16 and the effective bit wide of circuit input data din are 8.The input of four CRC computing modules all is the output crc_initial_value of circuit input data din and MUX1.Circuit input signal data_length bit wide is 2 bits; When data_length is 2 ' b11; Effective bit wide of the input data din of the current CRC of carrying out computing is 32 bits, and then the operation result crc32_dout of selector MUX2 selection output CRC_32b module is to crc_dout.When data_length was 2 ' b10, effective bit wide of the input data din of the current CRC of carrying out computing was 24 bits, and then the operation result crc24_dout of selector MUX2 selection output CRC_24b module is to crc_dout.When data_length was 2 ' b01, effective bit wide of the input data din of the current CRC of carrying out computing was 16 bits, and then the operation result crc16_dout of selector MUX2 selection output CRC_16b module is to crc_dout.When data_length was 2 ' b00, effective bit wide of the input data din of the current CRC of carrying out computing was 8 bits, and then the operation result crc8_dout of selector MUX2 selection output CRC_8b module is to crc_dout.

It is the output crc_dout of connecting circuit input signal last_byte and alternative selector MUX2 that the input of module is selected in output.The last_byte bit wide is 1 bit, representes whether the nybble data of current input comprise last byte of transmits data packets data.When last_byte is 1 ' b1, represent that the nybble data of current input comprise last byte of transmits data packets data, output to the value of crc_dout on the dout data wire; Otherwise output to the value of crc_dout on the crc_value data wire.

The present invention takes different CRC operation methods to calculate corresponding crc value according to the valid data length of subdata bag, thereby has solved the data CRC operational problem that factor is brought according to the packet length random length in traditional implementation.

Description of drawings

The circuit structure diagram of accompanying drawing 1 realization variable length CRC provided by the invention computing

Specific embodiments

Carry out detailed description below in conjunction with 1 pair of summary of the invention of accompanying drawing provided by the present invention.

Comprise two alternative selector MUX1 and MUX2 in the circuit of realization variable length CRC computing, four CRC computing module CRC_32b, CRC_24b, CRC_16b and CRC_8b, module is selected in an output.At three signal first_byte, last_byte under the control of data_length, accomplishes the CRC arithmetic operation to din.

Length of data package can be more than or equal to a byte in the usb data transmission; If a bag data length is 72 bits; Then these bag data need be divided into three CRC computings; All be 32 bits with the effective length of participating in the data of CRC computing for the second time for the first time, the effective length of participating in the data of CRC computing for the third time is 8 bits.After data din is fed to the CRC circuit, at first can enter into four CRC computing modules simultaneously.Alternative selector MUX1 judges in current this 32 Bit data through the first_byte signal whether comprise the data of first byte of these bag data simultaneously.If comprise, then assign 32 ' hff_ff as initial value, be transported to four CRC computing modules through crc_initial_value; Otherwise be transported to four CRC computing modules to crc_value through crc_initial_value.After computing was accomplished, the operation result of four CRC computing modules was sent to alternative selector MUX2 module through crc32_dout, crc24_dout, crc16_dout and crc8-dout respectively.Alternative selector MUX2 judges through circuit input data data_length how many significance bits of the input data din of the current CRC of carrying out computing is, thereby the operation result of judging which CRC computing module is effective.When data_length was 2 ' b11, effective bit wide of the input data din of the current CRC of carrying out computing was 32 bits, and then the operation result crc32_dout of selector MUX2 selection output CRC_32b module is to crc_dout.When data_length was 2 ' b10, effective bit wide of the input data din of the current CRC of carrying out computing was 24 bits, and then the operation result crc24_dout of selector MUX2 selection output CRC_24b module is to crc_dout.When data_length was 2 ' b01, effective bit wide of the input data din of the current CRC of carrying out computing was 16 bits, and then the operation result crc16_dout of selector MUX2 selection output CRC_16b module is to crc_dout.When data_length is 2, during b00, effective bit wide of the input data din of the current CRC of carrying out computing is 8 bits, then selector MUX2 select output CRC_8b module operation result crc8_dout to crc_dout.Select in the module in output then, confirm through judging last_byte whether current result should be as the operation result output of circuit.When last_byte is 1 ' b1, then to represent to comprise last byte data among the current input data din that carries out the CRC computing, this moment, the CRC computing finished, and crc_dout exports as final result; Otherwise show to also have data not carry out the CRC computing as yet in this packet, then be transported to crc_dout among the alternative selector MUX1 through crc_value that carry out new round interative computation, data all in these bag data are all accomplished the CRC arithmetic operation.

Claims (6)

1. a circuit of realizing variable length CRC computing is characterized in that said circuit is made up of alternative selector, CRC computing module and output selection module.

2. a kind of circuit of realizing variable length CRC computing as claimed in claim 1 is characterized in that said alternative selector is 2, according to alternative condition separately the input data is selected output respectively.

3. a kind of circuit of realizing variable length CRC computing as claimed in claim 1; It is characterized in that said CRC computing module is 4: the effective bit wide of circuit input data is 32 a CRC computing module; The effective bit wide of circuit input data is 24 a CRC computing module, and the effective bit wide of circuit input data is that to import the effective bit wide of data be 8 CRC computing module to 16 CRC computing module and circuit.

4. according to claim 1 or claim 2 a kind of circuit of realizing variable length CRC computing; It is characterized in that said 2 alternative selectors are MUX1 and MUX2; The input of MUX1 is a constant; Another input is connected to the output that module is selected in output, and control end is the input signal first_byte of circuit; MUX2 has four inputs, is connected to the output of four CRC computing modules, and control end is the input signal data_length of circuit.

5. like claim 1 or 3 described a kind of circuit of realizing variable length CRC computing, the input that it is characterized in that said 4 CRC computing modules is the dateout of circuit input data din and MUX1; Whether the output valve of 4 CRC computing modules is effectively confirmed by the value of circuit input signal data_length.

6. a kind of circuit of realizing variable length CRC computing as claimed in claim 1; It is characterized in that it is the output crc_dout of connecting circuit input signal last_byte and alternative selector MUX2 that the input of module is selected in said output, confirms that according to the value of input signal last_byte the value of crc_dout outputs on dout data wire or the crc_value data wire.

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