技术领域technical field
本发明涉及通信中的加扰(scrambling)技术。The present invention relates to scrambling technology in communication.
背景技术Background technique
在数字通信中的基带传送中的发送处理中，要发送的比特串经历处理以满足诸如指示0和1的数目之间的平衡的DC平衡和游程长度之类的约束。这种处理被称为“线路编码(line coding)”。线路编码被大致划分成两种方法：一种是通过添加冗余码以满足约束来执行编码；另一种是通过使用加扰器以随机地满足约束来执行编码。In transmission processing in baseband transmission in digital communication, a bit string to be transmitted undergoes processing to satisfy constraints such as DC balance indicating balance between the numbers of 0 and 1 and run length. This processing is called "line coding". Line coding is roughly divided into two methods: one is to perform coding by adding redundant codes to satisfy constraints; the other is to perform coding to randomly satisfy constraints by using a scrambler.
基于冗余码的前一种方法以(以太网)中使用的曼彻斯特编码或8B/10B编码为代表。当传送速率超过10 Gbps时，冗余度增大，并且相应地，信道速率有可能增大。因此，对于发送/接收设备的要求变得严格。例如，在8B/10B编码的情况下，用于以10 Gbps传送信息的信道速率是12.5 Gbps，从而要求有能够支持此信道速率的发送/接收设备。对于这种高速通信中涉及的要求，使用加扰器的后一种编码方法是更适宜的。The former method based on redundancy code starts with (Ethernet ) is represented by Manchester encoding or 8B/10B encoding. When the transfer rate exceeds 10 Gbps, redundancy increases, and accordingly, the channel rate is likely to increase. Therefore, the requirements for the transmitting/receiving equipment become strict. For example, in the case of 8B/10B encoding, the channel rate for transmitting information at 10 Gbps is 12.5 Gbps, thus requiring a transmission/reception device capable of supporting this channel rate. For the requirements involved in such high-speed communications, the latter encoding method using a scrambler is more suitable.
使用加扰器的方法利用由易于安装的LFSR(线性反馈移位寄存器)生成的伪随机数序列来随机化发送比特序列。这种类型的加扰方法被大致划分成同步型和自同步型。The method using a scrambler randomizes the transmitted bit sequence using a pseudo-random number sequence generated by an easy-to-install LFSR (Linear Feedback Shift Register). This type of scrambling method is roughly divided into a synchronous type and a self-synchronous type.
同步加扰方法是通过信息序列和来自LFSR的伪随机数序列的加法(XOR，异或运算)来实现随机化的方法。图14示出了根据同步加扰方法的发送方加扰器101和接收方加扰器102的配置示例。发送方加扰器101的LFSR具有移位寄存器103a，并且类似地，接收方加扰器102的LFSR具有移位寄存器103b。这些寄存器(103a、103b)表示的值被称为LFSR状态。The synchronous scrambling method is a method of realizing randomization by addition (XOR, exclusive OR operation) of an information sequence and a pseudo-random number sequence from the LFSR. FIG. 14 shows a configuration example of the transmitter scrambler 101 and the receiver scrambler 102 according to the synchronous scrambling method. The LFSR of the transmitting-side scrambler 101 has a shift register 103a, and similarly, the LFSR of the receiving-side scrambler 102 has a shift register 103b. The values represented by these registers (103a, 103b) are called LFSR states.
在这个同步加扰方法中，在发送方(101)和接收方(102)之间需要完全同步LFSR状态。此方法的有利之处在于差错(比特反转)如果发生的话不会传播。在作为多路复用的标准的SONET、作为卫星通信的推荐的CCSDS等等中采用以上同步加扰方法。In this synchronous scrambling method, a complete synchronization of the LFSR states is required between the sender (101) and receiver (102). The advantage of this method is that errors (bit flips) do not propagate if they occur. The above synchronous scrambling method is employed in SONET as a standard for multiplexing, CCSDS as a recommendation for satellite communication, and the like.
自同步加扰方法是通过将过去的输出比特存储在LFSR中并且把来自LFSR的输出与信息序列相加来执行加扰的方法。图15示出了自同步加扰方法的配置示例。发送方加扰器201具有移位寄存器203a，并且类似地，接收方加扰器202具有移位寄存器203b。此方法的不利之处在于诸如比特反转之类的差错如果发生的话则会按来自LFSR的连接线的数目传播，而有利之处在于不需要执行帧同步，从而如果发生失同步，是可能从中恢复的。The self-synchronizing scrambling method is a method of performing scrambling by storing past output bits in an LFSR and adding an output from the LFSR to an information sequence. Fig. 15 shows a configuration example of a self-synchronized scrambling method. The sender scrambler 201 has a shift register 203a, and similarly the receiver scrambler 202 has a shift register 203b. The disadvantage of this method is that errors such as bit flips, if they occur, will propagate by the number of connection lines from the LFSR, and the advantage is that no frame synchronization needs to be performed, so that if a loss of synchronization occurs, it is possible to learn from it restored.
另外，自同步加扰就安全性而言是有利的。作为加扰中的安全性威胁，可以考虑例如输入抵消加扰效果的数据的网络妨害行为。在此情况下攻击者随机选择LFSR的初始状态以生成妨害序列。然而，通过充分增大LFSR长度可以充分减小攻击者设定的初始状态与实际初始状态一致的概率。In addition, self-synchronizing scrambling is advantageous in terms of security. As a security threat in scrambling, for example, network nuisance behavior of inputting data that cancels the effect of scrambling can be considered. In this case the attacker randomly selects the initial state of the LFSR to generate a nuisance sequence. However, the probability that the initial state set by the attacker is consistent with the actual initial state can be sufficiently reduced by sufficiently increasing the length of the LFSR.
在的64b/66b编码中使用自同步加扰方法。64b/66b编码是这样一种方法：将根据生成多项式g(x)＝x^57+x^19+1经历了自同步加扰的数据序列划分成64比特数据块并且向每个数据块的开头添加用于同步的2比特头部(“01”或“10”)，从而形成66比特发送帧。exist The self-synchronizing scrambling method is used in the 64b/66b encoding. 64b/66b encoding is a method of dividing a data sequence subjected to self-synchronous scrambling according to the generator polynomial g(x)=x^57+x^19+1 into 64-bit data blocks and assigning A 2-bit header (“01” or “10”) is added at the beginning for synchronization, thus forming a 66-bit transmit frame.
在基于加扰的线路编码中，随机地劣化通信特性的比特模式的发生是不可避免的。作为与此相关的技术，已知例如在以下列出的PTL 1和2中公开的被称为CIMT(Conditional Inversion Master Transition，条件反转主转变)的方法。In scrambling-based line coding, the occurrence of bit patterns that randomly degrade communication characteristics is unavoidable. As a technique related to this, for example, a method called CIMT (Conditional Inversion Master Transition) disclosed in PTL 1 and 2 listed below is known.
CIMT方法预先保持DC平衡的累积并且计算要发送的数据块的DC平衡。当要发送的数据块的DC平衡的极性(平衡的方向)和先前数据块的DC平衡的极性相互一致时，要发送的数据块中的所有比特都被反转并且反转的块被发送。否则，该数据块中的比特被按其原始形式发送。此时，指示该块是否被反转的头部被添加到该块。这使得发送比特序列可以始终被调整到DC平衡将会更好的方向。The CIMT method maintains an accumulation of DC balances in advance and calculates the DC balances of data blocks to be transmitted. When the polarity of the DC balance (direction of balance) of the data block to be sent and the polarity of the DC balance of the previous data block agree with each other, all bits in the data block to be sent are inverted and the inverted block is send. Otherwise, the bits in the data block are sent in their original form. At this time, a header indicating whether the block is reversed is added to the block. This enables the transmitted bit sequence to always be adjusted in the direction in which the DC balance would be better.
{引文列表}{citation list}
{专利文献}{Patent Document}
{PTL 1}美国专利No.5,022,051，说明书{PTL 1} US Patent No. 5,022,051, specification
{PTL 2}美国专利No.5,438,621，说明书{PTL 2} US Patent No. 5,438,621, specification
发明内容Contents of the invention
{技术问题}{technical problem}
根据PTL 1和2中公开的方法，可以调整累积DC平衡；然而，加扰方法是同步型的，从而在发送方和接收方之间需要执行帧同步。另外，在以上方法中，头部中的差错导致整个块中的差错，从而要求如PTL 2中公开的保护功能，这增大了冗余度。另外，对于全零块或全一块，比特值只是被反转，从而块中的游程长度中没有发生变化，这使得难以减小最大游程长度。According to the methods disclosed in PTL 1 and 2, the cumulative DC balance can be adjusted; however, the scrambling method is of synchronous type, so that frame synchronization needs to be performed between the sender and receiver. In addition, in the above method, an error in the header leads to an error in the entire block, thereby requiring a protection function as disclosed in PTL 2, which increases redundancy. In addition, for an all-zero block or an all-block, the bit values are simply inverted so that no change occurs in the run length in the block, which makes it difficult to reduce the maximum run length.
因此本发明的一个目的是提供一种加扰方法和通信装置，用于发送数据冗余度得到了抑制并且具有适宜于发送的比特序列特性的加扰数据。It is therefore an object of the present invention to provide a scrambling method and communication apparatus for transmitting scrambled data in which data redundancy is suppressed and which has bit sequence characteristics suitable for transmission.
{解决问题的方案}{solution to problem}
根据本发明的第一方面，提供了一种加扰方法，包括：将基准值作为头部添加到数据块的开头以形成基准帧；通过使用自同步加扰器生成基准帧的加扰数据；通过将校正序列与基准帧的加扰数据相加来生成比较帧的加扰数据，在该比较帧中与基准值不同的值被作为头部添加到了数据块；根据评估标准，计算关于基准帧的加扰数据的比特序列特性的评估值和关于比较帧的加扰数据的比特序列特性的另一评估值；从计算出的评估值中选择表示对于发送而言最适宜的比特序列特性的评估值；当所选择的评估值对应于基准帧时，发送基准帧的加扰数据；以及当所选择的评估值对应于比较帧时，发送通过将校正序列与基准帧的加扰数据相加而获得的加扰数据，将加扰器的移位寄存器保存的值校正到在考虑到比较帧的加扰数据的完成时确定的值，并将经校正的值应用到新数据块的基准帧。According to a first aspect of the present invention, there is provided a scrambling method, comprising: adding a reference value as a header to the beginning of a data block to form a reference frame; generating scrambled data of the reference frame by using a self-synchronizing scrambler; The scrambled data of the comparison frame is generated by adding the correction sequence to the scrambled data of the reference frame, in which values different from the reference value are added as headers to the data block; An evaluation value of the bit-sequence characteristic of the scrambled data and another evaluation value of the bit-sequence characteristic of the scrambled data of the comparison frame; an evaluation representing the most suitable bit-sequence characteristic for transmission is selected from the calculated evaluation values value; when the selected evaluation value corresponds to the reference frame, transmit the scrambled data of the reference frame; and when the selected evaluation value corresponds to the comparison frame, transmit the scrambled data obtained by adding the correction sequence to the reference frame Scrambling the data, correcting the value held by the shift register of the scrambler to a value determined in consideration of the completion of the scrambled data of the compared frame, and applying the corrected value to the reference frame of the new data block.
根据本发明的第二方面，提供了一种通信装置，包括：头部添加部，该头部添加部将基准值作为头部添加到数据块的开头以形成基准帧；加扰部，该加扰部通过使用自同步加扰器生成基准帧的加扰数据；评估判定部，该评估判定部：通过将校正序列与基准帧的加扰数据相加来生成比较帧的加扰数据，在该比较帧中与基准值不同的值被作为头部添加到了数据块；根据评估标准，计算关于基准帧的加扰数据的比特序列特性的评估值和关于比较帧的加扰数据的比特序列特性的另一评估值；从计算出的评估值中选择表示对于发送而言最适宜的比特序列特性的评估值；并且根据选择输出校正序列或零序列；以及加法器，该加法器将校正序列或零序列与基准帧的加扰数据相加并发送加法结果，其中，当所选择的评估值对应于比较帧时，评估判定部将选择的结果提供给加扰部并且将校正序列输出到加法器，并且加扰部在选择的结果被发送来时将加扰器的移位寄存器保存的值校正到在考虑到比较帧的加扰数据的完成时确定的值，并将经校正的值应用到新数据块的基准帧。According to a second aspect of the present invention, there is provided a communication device, including: a header adding section that adds a reference value as a header to the beginning of a data block to form a reference frame; a scrambling section that adds A scrambling section generates scrambled data of a reference frame by using a self-synchronizing scrambler; an evaluation determination section that: generates scrambled data of a comparison frame by adding a correction sequence to the scrambled data of a reference frame, in which A value different from the reference value in the comparison frame is added to the data block as a header; according to the evaluation standard, an evaluation value about the bit sequence characteristic of the scrambled data of the reference frame and an evaluation value about the bit sequence characteristic of the scrambled data of the comparison frame are calculated. Another evaluation value; Select an evaluation value representing the most suitable bit sequence characteristic for transmission from the calculated evaluation values; and output a correction sequence or a zero sequence according to the selection; and an adder, which will correct the sequence or zero sequence the sequence is added to the scrambled data of the reference frame and an addition result is transmitted, wherein, when the selected evaluation value corresponds to the comparison frame, the evaluation decision section supplies the selected result to the scramble section and outputs the corrected sequence to the adder, and The scrambling section corrects the value held by the shift register of the scrambler to a value determined in consideration of the completion of the scrambled data of the comparison frame when the selected result is sent, and applies the corrected value to the new data The block's base frame.
{本发明的有利效果}{Advantageous effect of the present invention}
根据本发明，可以发送数据冗余度得到了抑制并且具有适宜于发送的比特序列特性的加扰数据。According to the present invention, it is possible to transmit scrambled data whose data redundancy is suppressed and which has bit sequence characteristics suitable for transmission.
附图说明Description of drawings
图1是本发明的示例性实施例中的通信装置的框图。FIG. 1 is a block diagram of a communication device in an exemplary embodiment of the present invention.
图2是关于本发明的示例性实施例中的帧格式的说明图。FIG. 2 is an explanatory diagram about a frame format in an exemplary embodiment of the present invention.
图3是关于本发明的示例性实施例中的通信装置的基本操作的流程图。FIG. 3 is a flow chart about the basic operation of the communication device in the exemplary embodiment of the present invention.
图4是本发明的示例性实施例中的具有校正功能的加扰器的配置示例。FIG. 4 is a configuration example of a scrambler with a correction function in the exemplary embodiment of the present invention.
图5是本发明的示例性实施例中的评估判定部的配置示例。FIG. 5 is a configuration example of an evaluation determination section in the exemplary embodiment of the present invention.
图6是关于本发明的示例性实施例中在加权累积DC平衡被用作评估标准的情况下判定部的操作的流程图。6 is a flowchart regarding the operation of the determination section in the case where weighted cumulative DC balance is used as an evaluation criterion in the exemplary embodiment of the present invention.
图7是关于本发明的示例性实施例中在使用第一和第二评估标准的情况下判定部的操作的流程图。FIG. 7 is a flowchart regarding the operation of the determination section in the case of using the first and second evaluation criteria in the exemplary embodiment of the present invention.
图8是关于本发明的示例性实施例中在使用随机比特序列的情况下判定部的操作的流程图。FIG. 8 is a flowchart regarding the operation of the determination section in the case of using a random bit sequence in the exemplary embodiment of the present invention.
图9是本发明的示例性实施例中在加权累积DC平衡被用作评估标准的情况下判定部的框图。FIG. 9 is a block diagram of a determination section in the case where weighted cumulative DC balance is used as an evaluation criterion in the exemplary embodiment of the present invention.
图10是本发明的示例性实施例中在加权累积DC平衡被用作评估标准的情况下判定部的另一框图。FIG. 10 is another block diagram of a determination section in the case where weighted cumulative DC balance is used as an evaluation criterion in the exemplary embodiment of the present invention.
图11是关于本发明的示例性实施例中的加权累积DC平衡(ρ＝0.9)的示图。FIG. 11 is a diagram regarding weighted cumulative DC balance (ρ=0.9) in an exemplary embodiment of the present invention.
图12是关于本发明的示例性实施例中的加权累积DC平衡(ρ＝1.0)的示图。FIG. 12 is a diagram regarding weighted cumulative DC balance (ρ=1.0) in an exemplary embodiment of the present invention.
图13是关于本发明的示例性实施例中的有限数目的帧的累积DC平衡的示图。FIG. 13 is a graph of cumulative DC balance for a limited number of frames in an exemplary embodiment of the present invention.
图14是关于同步加扰器的说明图。Fig. 14 is an explanatory diagram related to a synchronous scrambler.
图15是关于自同步加扰器的说明图。Fig. 15 is an explanatory diagram regarding a self-synchronizing scrambler.
{标号列表}{label list}
101、201：发送方加扰器101, 201: sender scrambler
102、202：接收方加扰器102, 202: receiver scrambler
103a、103b、203a、203b：移位寄存器103a, 103b, 203a, 203b: shift registers
500：通信装置500: communication device
501：头部添加部501: Head Addition
502：具有校正功能的加扰器(加扰部)502: Scrambler with correction function (scrambler)
503：缓冲器503: Buffer
504：评估判定部504: Evaluation and Judgment Department
505：加法器505: Adder
601：校正值601: correction value
701：校正序列生成部701: Calibration sequence generation unit
702a、702b：评估值计算部702a, 702b: evaluation value calculation department
703：判定部703: Judgment Department
704：选择器704: selector
1101、1202：寄存器1101, 1202: registers
1102：加法器1102: Adder
1103：乘法器1103: Multiplier
1201：移位寄存器1201: shift register
具体实施方式Detailed ways
图1示出了本发明的示例性实施例中的通信装置500的发送系统的配置。头部添加部501向通过划分数据获得的固定长度数据块的每一个的开头添加具有基准值的加扰头部，以生成具有图2中所示的结构的帧。FIG. 1 shows the configuration of a transmission system of a communication device 500 in the exemplary embodiment of the present invention. The header adding section 501 adds a scramble header having a reference value to the head of each of the fixed-length data blocks obtained by dividing the data to generate a frame having the structure shown in FIG. 2 .
其中基准值被设定到加扰头部的帧对应于本发明的基准帧。加扰头部的比特数目和基准值可被设定到任何值；在本示例性实施例中，头部的比特数目被设定到1比特，并且基准值被设定到“0”。在像本示例性实施例中那样1比特加扰头部被添加到N比特的数据块的情况下，帧的冗余度被表示为(N+1)/N。即使在N被设定到32的情况下，将头部的比特数目设定到1比特也使得冗余度为1.03，从而与8B/10B编码中获得的1.25相比，充分地降低了冗余度。A frame in which a reference value is set to a scramble header corresponds to a reference frame of the present invention. The number of bits of the scrambled header and the reference value can be set to any value; in the present exemplary embodiment, the number of bits of the header is set to 1 bit, and the reference value is set to "0". In the case where a 1-bit scramble header is added to an N-bit data block like in this exemplary embodiment, the redundancy of the frame is expressed as (N+1)/N. Even in the case where N is set to 32, setting the number of bits of the header to 1 bit makes the redundancy 1.03, thereby substantially reducing the redundancy compared to 1.25 obtained in 8B/10B encoding Spend.
具有校正功能的加扰器502利用自同步加扰器向基准帧应用加扰以生成加扰数据T0。所生成的加扰数据T0(比特长度：(N+1)比特)被一次存储在缓冲器503中。加扰器502根据从稍后将描述的评估判定部504反馈来的判定结果，对要被应用到要处理的新数据块的LFSR的状态进行调整。The scrambler with correction function 502 applies scrambling to the reference frame using a self-synchronizing scrambler to generate scrambled data T0. The generated scrambled data T0 (bit length: (N+1) bits) is stored in the buffer 503 once. The scrambler 502 adjusts the state of the LFSR to be applied to a new data block to be processed according to the determination result fed back from the evaluation determination section 504 to be described later.
评估判定部504计算关于数据T0的评估值和通过向该数据块添加与基准值不同的值(“1”)作为头部而获得的加扰数据T1的评估值。评估值是用于判定加扰数据的比特序列特性是否对数据的发送起有利的作用的值。加扰数据T1对应于如后所述利用数据T0生成的比较帧的加扰数据。The evaluation determination section 504 calculates an evaluation value on the data T0 and an evaluation value on the scrambled data T1 obtained by adding a value ("1") different from the reference value to the data block as a header. The evaluation value is a value for determining whether or not the bit sequence characteristics of the scrambled data contribute favorably to data transmission. The scrambled data T1 corresponds to the scrambled data of the comparison frame generated using the data T0 as described later.
评估判定部504从T0和T1的评估值中选择表示对于发送而言最适宜的比特序列特性的那个，并且执行控制以使得最适宜的评估值的加扰数据(T0或T1)被发送。The evaluation decision section 504 selects one representing the most suitable bit sequence characteristic for transmission from the evaluation values of T0 and T1, and performs control so that the scrambled data (T0 or T1) of the most suitable evaluation value is transmitted.
更具体而言，当选择T1的评估值时，评估判定部504输出稍后将描述的校正序列M。校正序列M被加法器505与来自缓冲器503的输出(T0)相加以形成T1，T1随后被发送。校正序列M是在以下情况下获得的输出序列：即，LFSR的初始状态被设定为全零，并且加扰被应用到通过将加扰头部“1”添加到具有比特长度N的全零数据块而获得的帧((N+1)比特)。另一方面，当选择T0的评估值时，评估判定部504输出零序列(全零)。More specifically, when the evaluation value of T1 is selected, the evaluation determination section 504 outputs a correction sequence M which will be described later. The correction sequence M is added by an adder 505 to the output (T0) from the buffer 503 to form T1, which is then transmitted. The correction sequence M is the output sequence obtained when: i.e., the initial state of the LFSR is set to all zeros, and scrambling is applied to Frame ((N+1) bits) obtained from blocks of data. On the other hand, when the evaluation value of T0 is selected, the evaluation determination section 504 outputs a sequence of zeros (all zeros).
另外，评估判定部504把关于被评估为最适宜的评估值的加扰数据是T0还是T1的信息作为判定结果反馈给上述的加扰器502。In addition, the evaluation determination section 504 feeds back information on whether the scrambled data evaluated as the optimum evaluation value is T0 or T1 to the above-mentioned scrambler 502 as a determination result.
参考图3中所示的流程图，将描述具有上述配置的通信装置500的基本操作。图3的过程示出了当处理第t数据块时的处理流程。在对与第t数据块相对应的帧的处理开始时加扰器502中的LFSR的状态由S(t)表示。Referring to the flowchart shown in FIG. 3 , the basic operation of the communication device 500 having the above configuration will be described. The procedure of FIG. 3 shows the processing flow when the t-th data block is processed. The state of the LFSR in the scrambler 502 at the beginning of the processing of the frame corresponding to the t-th data block is denoted by S(t).
当从头部添加部501接收到其中加扰头部“0”被添加到了数据块t的基准帧时，加扰器502在状态S(t)中向该基准帧应用加扰以生成加扰数据T0(步骤S401)。假定数据块长度是N比特，则T0的总数据长度是(N+1)比特。所生成的T0被存储在缓冲器503中，并且被提供给评估判定部504。When receiving a reference frame in which a scrambled header "0" is added to data block t from header adding section 501, scrambler 502 applies scrambling to the reference frame in state S(t) to generate scrambled Data T0 (step S401). Assuming that the data block length is N bits, the total data length of T0 is (N+1) bits. The generated T0 is stored in the buffer 503 and supplied to the evaluation decision section 504 .
评估判定部504根据预先设定的评估标准来计算T0的评估值(步骤S402)。稍后将描述评估值的计算方法。The evaluation determination unit 504 calculates an evaluation value of T0 based on a preset evaluation standard (step S402 ). The calculation method of the evaluation value will be described later.
另外，评估判定部504基于其中加扰头部“1”被添加到了数据块t的帧(比较帧)，在状态S(t)中生成加扰数据T1(比特长度：(N+1)比特)(步骤S403)。数据T1是根据稍后将描述的方法利用T0生成的。评估判定部504计算所生成的T1的评估值(步骤S404)。In addition, the evaluation decision section 504 generates scrambled data T1 (bit length: (N+1) bits ) (step S403). Data T1 is generated using T0 according to a method to be described later. The evaluation determination unit 504 calculates the generated evaluation value of T1 (step S404 ).
在计算T0和T1的评估值之后，评估判定部504比较它们并且基于评估标准判定表示最适宜的比特序列特性的评估值。在T0的评估值好于T1的评估值的情况下(S405中的“是”)，评估判定部504执行控制以使得T0被发送。也就是说，评估判定部504向加法器505输出N比特全零序列。此全零序列在加法器505中被与T0相加，从而最终T0被发送(步骤S406)。After calculating the evaluation values of T0 and T1 , the evaluation decision section 504 compares them and decides an evaluation value representing an optimum bit sequence characteristic based on the evaluation standard. In a case where the evaluation value of T0 is better than the evaluation value of T1 (YES in S405 ), the evaluation determination section 504 performs control so that T0 is transmitted. That is, the evaluation determination unit 504 outputs an N-bit all-zero sequence to the adder 505 . This all-zero sequence is added to T0 in the adder 505, so that T0 is finally transmitted (step S406).
评估判定部504把表明选择了与头部“0”相对应的T0的评估值的信息作为判定结果反馈给加扰器502。在此情况下，加扰器502把T0完成时LFSR的状态，即当前时刻存储在LFSR中的值，认识为新数据块(t+1)的LFSR状态S(t+1)(步骤S407)。The evaluation determination section 504 feeds back information indicating that the evaluation value of T0 corresponding to the header "0" was selected to the scrambler 502 as a determination result. In this case, the scrambler 502 recognizes the state of the LFSR when T0 is completed, that is, the value stored in the LFSR at the current moment, as the LFSR state S(t+1) of the new data block (t+1) (step S407) .
另一方面，在T1的评估值好于T0的评估值的情况下(S405中的“否”)，评估判定部504执行控制以使得T1被发送。也就是说，评估判定部504输出校正序列M。此校正序列M在加法器505中被与T0相加，从而最终T1被发送(步骤S408)。On the other hand, in a case where the evaluation value of T1 is better than the evaluation value of T0 (NO in S405 ), the evaluation determination section 504 performs control so that T1 is transmitted. That is, the evaluation determination unit 504 outputs the correction sequence M. This correction sequence M is added to T0 in the adder 505, so that finally T1 is sent (step S408).
评估判定部504把表明选择了与头部“1”相对应的T1的评估值的信息作为判定结果反馈给加扰器502。在此情况下，加扰器502把T0完成时的LFSR状态S(t)校正成考虑到T1完成时而确定的状态，并且把经校正的状态认识为新数据块(t+1)的S(t+1)(步骤S409)。稍后将描述执行此校正的方法。The evaluation determination section 504 feeds back information indicating that the evaluation value of T1 corresponding to the header "1" was selected to the scrambler 502 as a determination result. In this case, the scrambler 502 corrects the LFSR state S(t) at the completion of T0 to the state determined considering the completion of T1, and recognizes the corrected state as S(t) of the new data block (t+1). t+1) (step S409). A method of performing this correction will be described later.
可并行执行步骤S401和S403。另外，对于顺次生成的T0和T1可顺次执行步骤S402和S404。下文中将描述用于实现这种处理的通信装置500的硬件配置。Steps S401 and S403 may be executed in parallel. In addition, steps S402 and S404 may be executed sequentially for T0 and T1 generated sequentially. Hereinafter, the hardware configuration of the communication device 500 for realizing such processing will be described.
图4示出了具有校正功能的加扰器502的配置示例。加扰器502是基于自同步加扰器配置的(图15)，并且被设计为根据从评估判定部504反馈来的判定结果来调整LFSR的状态。FIG. 4 shows a configuration example of a scrambler 502 with a correction function. The scrambler 502 is based on a self-synchronizing scrambler configuration ( FIG. 15 ), and is designed to adjust the state of the LFSR according to the judgment result fed back from the evaluation judgment section 504 .
加扰器502保存LFSR的校正值601(常数)。所示出的校正值601“1”、“0”、“1”只是示例，而绝不限制本示例性实施例的校正值601。在来自评估判定部504的判定结果对应于T1的情况下，加扰器502把校正值601与LFSR的寄存器中的值相加以将LFSR的状态校正到T1完成时的状态以为下一数据块(t+1)作准备(图3，步骤S409)。另一方面，在判定结果对应于T0的情况下，不用校正值601校正LFSR的状态。The scrambler 502 holds the correction value 601 (constant) of the LFSR. The illustrated correction values 601 "1", "0", and "1" are just examples, and in no way limit the correction values 601 of this exemplary embodiment. In the case where the determination result from the evaluation determination section 504 corresponds to T1, the scrambler 502 adds the correction value 601 to the value in the register of the LFSR to correct the state of the LFSR to the state at the completion of T1 as the next data block ( t+1) for preparation (FIG. 3, step S409). On the other hand, in the case where the determination result corresponds to T0, the state of the LFSR is not corrected with the correction value 601 .
LFSR的校正值601是在LFSR的初始状态被设定到全零并且“100…000”(“0”的数目是数据块长度)被输入的情况下获得的LFSR的寄存器值，并且由与LFSR的寄存器长度相对应的比特数目表示。The correction value 601 of the LFSR is the register value of the LFSR obtained in the case where the initial state of the LFSR is set to all zeros and "100...000" (the number of "0" is the data block length) is input, and is obtained by combining with the LFSR The number of bits corresponding to the register length is indicated.
图5是评估判定部504的配置示例。从加扰器502输出的T0被输入到评估判定部504。校正序列生成部701输出上述的校正序列M。这可通过在存储器中存储预先计算的值来实现。具有头部值“1”的比较帧的加扰数据T1可通过将校正序列M与从加扰器502输出的T0相加来获得。FIG. 5 is a configuration example of the evaluation determination section 504 . T0 output from the scrambler 502 is input to the evaluation determination unit 504 . The correction sequence generator 701 outputs the correction sequence M described above. This can be achieved by storing precomputed values in memory. The scrambled data T1 of the comparison frame having the header value “1” can be obtained by adding the correction sequence M to T0 output from the scrambler 502 .
一评估值计算部702a计算T0的评估值，并且另一评估值计算部702b计算T1的评估值。评估值计算部702a和702b进行的处理根据T0的顺次输入而发生。判定部703从T0和T1的评估值判定最适宜的比特序列特性，并且将判定结果反馈给加扰器502，而且将判定结果提供到选择器704的控制端口。An evaluation value calculation section 702a calculates an evaluation value of T0, and another evaluation value calculation section 702b calculates an evaluation value of T1. The processing by the evaluation value calculation sections 702a and 702b occurs according to the sequential input of T0. The decision section 703 decides the optimum bit sequence characteristic from the evaluation values of T0 and T1 , feeds back the decision result to the scrambler 502 , and supplies the decision result to the control port of the selector 704 .
在来自控制端口的判定结果对应于头部“0”的情况下，选择器704如上所述输出N比特全零序列作为要被输出到加法器505的序列。在此情况下，来自缓冲器503的T0在值不被改变的情况下被发送。在来自控制端口的判定结果对应于头部“1”的情况下，选择器704输出来自校正序列生成部701的校正序列M。这个M被与从缓冲器503输出的T0相加以将T0转换成T1，并且此T1随后被发送。In the case where the determination result from the control port corresponds to the header “0”, the selector 704 outputs an N-bit all-zero sequence as a sequence to be output to the adder 505 as described above. In this case, T0 from buffer 503 is sent without changing the value. When the determination result from the control port corresponds to the header “1”, the selector 704 outputs the correction sequence M from the correction sequence generator 701 . This M is added to T0 output from the buffer 503 to convert T0 into T1, and this T1 is then transmitted.
[评估值模型1][Assessment value model 1]
下面将描述评估判定部504中使用的评估值模型。就实现而言，易于计算评估值是重要的。假定基于数据块t的加扰数据的DC平衡(“0”的数目和“1”的数目之间的差异)是Y(t)。例如，在其中“0”的数目是30并且“1”的数目是34的加扰数据的情况下(数据帧长度：N+1＝64)，DC平衡Y(t)是-4。The evaluation value model used in the evaluation determination section 504 will be described below. Ease of calculation of evaluation values is important in terms of implementation. It is assumed that the DC balance (difference between the number of "0"s and the number of "1") of scrambled data based on data block t is Y(t). For example, in the case of scrambled data in which the number of "0"s is 30 and the number of "1"s is 34 (data frame length: N+1=64), the DC balance Y(t) is -4.
可以利用DC平衡Y(t)和落在预定范围内的加权系数ρ(0≤ρ≤1)，按照以下的式(1)来定义基于连续的数据块t(t＝1，2，3，...)的加扰数据的加权累积DC平衡Z(t)。A DC balance Y(t) and a weighting coefficient ρ (0≤ρ≤1) falling within a predetermined range can be used to define a continuous data block t (t=1, 2, 3, ...) weighted cumulative DC balance Z(t) of scrambled data.
Z(t)＝ρ(Y(t)+Z(t-1))＝ρY(t)+(ρ^2)Y(t-1)+(ρ^3)Y(t-2)+…式(1)Z(t)=ρ(Y(t)+Z(t-1))=ρY(t)+(ρ^2)Y(t-1)+(ρ^3)Y(t-2)+… Formula 1)
在上式中，Z(0)被设定为0。在ρ＝0的情况下，式(1)仅表示当前帧的DC平衡，而在ρ＝1的情况下，式(1)表示没有过去值中的衰减的模型。通过适当地设定用于加权的系数ρ，加权累积DC平衡可被适宜地用在各种类型的发送/接收设备和传送路径中。In the above formula, Z(0) is set to 0. In the case of p=0, equation (1) represents only the DC balance of the current frame, while in the case of p=1, equation (1) represents a model without attenuation in past values. By appropriately setting the coefficient p for weighting, the weighted accumulation DC balance can be suitably used in various types of transmission/reception devices and transmission paths.
在加权累积DC平衡被用作评估标准的情况下，评估值计算部702a和702b(图5)分别计算T0和T1的DC平衡Y0(t)和Y1(t)。将按照图6的流程图描述此情况下判定部703的处理过程。In the case where the weighted cumulative DC balance is used as the evaluation criterion, the evaluation value calculation sections 702a and 702b ( FIG. 5 ) calculate DC balances Y0(t) and Y1(t) of T0 and T1, respectively. The processing procedure of the determination section 703 in this case will be described according to the flowchart of FIG. 6 .
在分别从评估值计算部702a和702b输入T0和T1的DC平衡Y0(t)和Y1(t)时(步骤S800)，判定部703比较Y0(t)和Y1(t)的加权累积DC平衡的绝对值(步骤S801)。根据式(1)，对于Y0(t)，作为当前帧评估值Y0(t)和过去评估值Z(t-1)的加法结果的绝对值的|Y0(t)+Z(t-1)|被获得作为要比较的值，并且对于Y1(t)，|Y1(t)+Z(t-1)|被获得作为要比较的值。When the DC balances Y0(t) and Y1(t) of T0 and T1 are input from the evaluation value calculation sections 702a and 702b, respectively (step S800), the determination section 703 compares the weighted cumulative DC balances of Y0(t) and Y1(t). The absolute value of (step S801). According to formula (1), for Y0(t), |Y0(t)+Z(t-1) which is the absolute value of the addition result of the current frame evaluation value Y0(t) and the past evaluation value Z(t-1) | is obtained as a value to be compared, and for Y1(t), |Y1(t)+Z(t-1)| is obtained as a value to be compared.
在以上比较显示与T0的评估值相对应的|Y0(t)+Z(t-1)|较小的情况下(S801中的“是”)，判定部703判定T0的评估值是最适宜的(步骤S802)，并且将关于此判定的信息反馈给加扰器502。另外，为了为随后数据块(t+1)的评估作准备，判定部703利用当前帧的Y0(t)根据Z(t)＝ρ(Y0(t)+Z(t-1))来更新加权累积DC平衡Z(t)(步骤S803)。In the case where the above comparison shows that |Y0(t)+Z(t-1)| corresponding to the evaluation value of T0 is small (YES in S801), the determination section 703 determines that the evaluation value of T0 is the optimum (step S802), and feed back information about this decision to the scrambler 502. In addition, in order to prepare for the evaluation of the subsequent data block (t+1), the decision unit 703 uses Y0(t) of the current frame to update according to Z(t)=ρ(Y0(t)+Z(t-1)) Weighted cumulative DC balance Z(t) (step S803).
另一方面，在与T1的评估值相对应的|Y1(t)+Z(t-1)|较小的情况下(S801中的“否”)，判定部703判定T1的评估值是最适宜的(步骤S804).然后，判定部703利用当前帧的Y1(t)根据Z(t)＝ρ(Y1(t)+Z(t-1))来更新加权累积DC平衡Z(t)(步骤S805)。On the other hand, when |Y1(t)+Z(t-1)| corresponding to the evaluation value of T1 is small (NO in S801), the determination section 703 determines that the evaluation value of T1 is the most optimal. Appropriate (step S804). Then, the decision section 703 uses Y1(t) of the current frame to update the weighted cumulative DC balance Z(t) according to Z(t)=ρ(Y1(t)+Z(t-1)) (step S805).
[评估值模型2][Assessment value model 2]
作为使用累积DC平衡的评估值模型的另一示例，可以举出使用最近的恒定数目的加扰数据的方法。假定恒定的帧数目是K+1，则本模型的累积DC平衡可由以下式(2)定义。As another example of an evaluation value model using cumulative DC balance, a method using the latest constant number of scrambled data can be cited. Assuming a constant number of frames is K+1, the cumulative DC balance of the present model can be defined by equation (2) below.
Z(t)＝Y(t)+Y(t-1)+…+Y(t-K+1)|式(2)Z(t)=Y(t)+Y(t-1)+...+Y(t-K+1)|Formula (2)
在K＝1的情况下，与式(1)中的ρ＝0的情况一样，式(2)表示基于当前帧的DC平衡的评估值模型。另外，也可定义从式(1)和(2)的组合获得的累积DC平衡。在保存Z(t)的实现方式中，式(2)中的Z(t)的更新可如以下式(3)所表示那样执行。在此模型中，必须保存最近K个帧的DC平衡值。In the case of K=1, as in the case of ρ=0 in Equation (1), Equation (2) represents an evaluation value model based on the DC balance of the current frame. Additionally, the cumulative DC balance obtained from the combination of equations (1) and (2) can also be defined. In implementations where Z(t) is saved, the update of Z(t) in equation (2) may be performed as expressed in equation (3) below. In this model, the DC balance values of the last K frames must be saved.
Z(t)＝Y(t)+Z(t-1)-Y(t-K+1)式(3)Z(t)=Y(t)+Z(t-1)-Y(t-K+1) formula (3)
[评估值模型3][Evaluation value model 3]
除了DC平衡以外，加扰数据的最大游程长度也可用作评估值。本模型是检查T0和T1中的“0”游程长度或“1”游程长度(连续的“0”或“1”的数目)并且利用其最大值即最大游程长度作为评估值的方法。在此模型的评估中，判定例如最大游程长度越小，比特序列特性就越好。In addition to DC balance, the maximum run length of scrambled data can also be used as an evaluation value. This model is a method of checking "0" run lengths or "1" run lengths (the number of consecutive "0"s or "1"s) in T0 and T1 and using the maximum value thereof, that is, the maximum run length, as an evaluation value. In the evaluation of this model, it is judged, for example, that the smaller the maximum run length is, the better the bit sequence characteristic is.
[评估值模型4][Assessment value model 4]
可以考虑使用上述两类评估值即累积DC平衡和最大游程长度的评估值模型。将按照图7的流程图来描述此情况下判定部703的处理过程。以下，假定使用加权累积DC平衡的方法(图6)是第一评估标准，并且使用最大游程长度的方法是第二评估标准。第一评估标准的优先级被设定得高于第二评估标准的优先级。An evaluation value model using the above two types of evaluation values, ie, cumulative DC balance and maximum run length, may be considered. The processing procedure of the determination section 703 in this case will be described according to the flowchart of FIG. 7 . Hereinafter, it is assumed that the method using weighted cumulative DC balance ( FIG. 6 ) is the first evaluation criterion, and the method using the maximum run length is the second evaluation criterion. The priority of the first evaluation criterion is set higher than the priority of the second evaluation criterion.
判定部703基于第一评估标准计算T0和T1的评估值(加权累积DC平衡)并且判定它们之间的差异是否超过预定的阈值(步骤S901)。在两个评估值之间的差异超过阈值的情况下，判定部703按照上述过程(图6的S801至S805)应用基于第一评估标准的判定结果(步骤S902)。The determination section 703 calculates evaluation values (weighted cumulative DC balance) of T0 and T1 based on the first evaluation standard and determines whether the difference between them exceeds a predetermined threshold (step S901 ). In a case where the difference between the two evaluation values exceeds the threshold, the determination section 703 applies the determination result based on the first evaluation standard (step S902 ) according to the above-described procedure ( S801 to S805 of FIG. 6 ).
另一方面，在T0和T1的评估值之间的差异不大于阈值的情况下(S901中的“否”)，判定部703判定在基于第一评估标准的T0和T1的评估值之间不存在大差异，并且基于第二评估标准执行另一判定(基于最大游程长度的判定)(步骤S903)。然后，判定部703把判定结果反馈给加扰器502(步骤S904)。On the other hand, in the case where the difference between the evaluation values of T0 and T1 is not larger than the threshold (NO in S901), the determination section 703 determines that there is no difference between the evaluation values of T0 and T1 based on the first evaluation standard. There is a large difference, and another judgment (judgment based on the maximum run length) is performed based on the second evaluation criterion (step S903 ). Then, the determination unit 703 feeds back the determination result to the scrambler 502 (step S904).
通过设定第二评估标准以始终将T0的信息设定为判定结果，即通过在基于第一评估标准的评估中的两个评估值之间不存在大差异的情况下始终输出T0的评估值最适宜的判定结果，可以实现一个模型，其中评估值之间的比较仅在评估值之间的差异超过阈值时才执行。这降低了加扰器502中执行的校正操作的频率。By setting the second evaluation standard to always set the information of T0 as the judgment result, that is, by always outputting the evaluation value of T0 when there is no large difference between the two evaluation values in the evaluation based on the first evaluation standard For optimal decision results, it is possible to implement a model in which comparisons between evaluated values are performed only when the difference between evaluated values exceeds a threshold. This reduces the frequency of corrective operations performed in the scrambler 502 .
[评估值模型5][Assessment value model 5]
作为上述使用两类评估标准的方法(图7)的修改，可用的有使用随机比特序列的方法。此方法的处理过程在图8中示出。在图示的过程中，该方法使用加权累积DC平衡作为第一评估标准，同时该方法采用使用随机比特序列的随机二选一作为虚拟的第二评估标准。以下，将仅描述与图7中的过程的差异。As a modification of the above method (FIG. 7) using two types of evaluation criteria, a method using a random bit sequence is available. The process of this method is shown in FIG. 8 . In the illustrated process, the method uses the weighted cumulative DC balance as the first evaluation criterion, and at the same time, the method adopts a random binary selection using a random bit sequence as the virtual second evaluation criterion. Hereinafter, only differences from the process in FIG. 7 will be described.
在基于加权累积DC平衡的T0和T1的绝对值之间的差异不大于阈值的情况下(S901中的“否”)，判定部703读出随机比特序列(步骤S1001)。随机比特序列可以是任意的，只要其不能被第三方完全推断出即可。例如，随机比特序列可以是加扰器502中的LFSR的部分值或者时间参数。When the difference between the absolute values of T0 and T1 based on the weighted cumulative DC balance is not greater than the threshold (NO in S901), the determination section 703 reads out a random bit sequence (step S1001). The random bit sequence can be arbitrary as long as it cannot be completely deduced by a third party. For example, the random bit sequence may be a partial value or a time parameter of the LFSR in the scrambler 502 .
判定部703判定所获取的随机比特是否与预先设定的预测值相一致或相对应。例如，在随机比特序列是时间参数的情况下，给定的时间带被预先设定为预测值，然后判定随机比特序列所指示的时间是否对应于预测值的时间带。The judging unit 703 judges whether the obtained random bits are consistent with or correspond to a preset predicted value. For example, when a random bit sequence is a time parameter, a given time zone is preset as the predicted value, and then it is determined whether the time indicated by the random bit sequence corresponds to the time zone of the predicted value.
在随机比特序列不对应于预测值的情况下(步骤S 1002中的“否”)，判定部703判定具有最适宜评估值的加扰数据是T0(步骤S1003)。另一方面，在随机比特序列对应于预测值的情况下，判定部703判定T1是最适宜的(步骤S1004)。从而，采用随机二选一方法使得可以改善对抗对加扰数据的攻击的抵抗力。In a case where the random bit sequence does not correspond to the predicted value ("No" in step S1002), the determination section 703 determines that the scrambled data having the optimum evaluation value is T0 (step S1003). On the other hand, when the random bit sequence corresponds to the predicted value, the determination unit 703 determines that T1 is optimum (step S1004). Thus, employing a random binary selection method makes it possible to improve resistance against attacks on scrambled data.
如上所述，根据本示例性实施例，可以实现冗余度得到了抑制并且具有适宜于发送的比特序列特性的加扰数据的发送。这使得可以改善高速通信的质量。As described above, according to the present exemplary embodiment, it is possible to realize transmission of scrambled data whose redundancy is suppressed and which has bit sequence characteristics suitable for transmission. This makes it possible to improve the quality of high-speed communication.
在本示例性实施例中，加扰数据的接收方仅需要设有现有的自同步解扰器。也就是说，对于接收到的加扰数据中的头部差错，不要求特殊的布置。In this exemplary embodiment, the receiver of the scrambled data need only have an existing self-synchronizing descrambler. That is, no special arrangements are required for header errors in received scrambled data.
预期发送方的电路规模可能大约是传统的两倍那么大；然而，加扰器本身是一个小电路，从而该电路的增大对于整个发送器的规模的影响很小。另外，发送时的延迟的增大只是与大约一个块相应的时间那么短。It is expected that the circuit scale of the transmitter may be about twice as large as conventional ones; however, the scrambler itself is a small circuit, so that the increase of the circuit has little influence on the scale of the entire transmitter. In addition, the increase in delay at the time of transmission is only as short as the time corresponding to about one block.
在校正序列M被设定为具有伪随机特性的情况下，DC平衡的改善基于头部是“0”还是“1”是随机性的；然而，实际上，DC平衡的分布可得到大幅改善。例如，假定使用没有过去值中的衰减的累积DC平衡的极端模型，则累积DC平衡在使用现有加扰器时呈现均匀分布；而根据本示例性实施例，可以获得零均值指数分布。另外，以这种方式选择校正序列M使得可以改善除DC平衡以外的诸如最大游程长度之类的评估值。In the case where the correction sequence M is set to have a pseudo-random property, the improvement of the DC balance is random based on whether the head is "0" or "1"; however, in practice, the distribution of the DC balance can be greatly improved. For example, assuming an extreme model using the cumulative DC balance without decay in past values, the cumulative DC balance exhibits a uniform distribution when using existing scramblers; whereas according to the present exemplary embodiment a zero-mean exponential distribution can be obtained. Also, selecting the correction sequence M in this way makes it possible to improve evaluation values such as the maximum run length other than the DC balance.
＜＜示例＞＞＜＜Example＞＞
将描述上述示例性实施例的更具体示例。为了实现以上示例性实施例，必须预先设定LFSR的校正值601(图4)和当时校正序列生成部701的输出序列M(图5)。例如，假定LFSR的生成多项式是“g(x)＝x^8+x^6+x^5+x^4+1”并且数据块长度N是32(帧长度＝33)，则校正值601被设定为“1000_0100”(8比特)，并且校正序列M被设定为“1011_0001_1110_1000_0111_1111_1001_0000_1”(33比特)。A more specific example of the above-described exemplary embodiment will be described. In order to realize the above exemplary embodiments, it is necessary to set in advance the correction value 601 ( FIG. 4 ) of the LFSR and the output sequence M ( FIG. 5 ) of the current correction sequence generation section 701 . For example, assuming that the generator polynomial of LFSR is "g(x)=x^8+x^6+x^5+x^4+1" and the data block length N is 32 (frame length=33), the correction value 601 is set to "1000_0100" (8 bits), and the correction sequence M is set to "1011_0001_1110_1000_0111_1111_1001_0000_1" (33 bits).
在从数据块的结束到评估判定部504的判定结果的获取之间存在延迟的情况下，校正值601是考虑到该延迟而设定的。在此情况下，取决于先前数据块的加扰头部，根据延迟量向缓冲器503的当前数据块的开头应用延迟校正。评估判定部504在该校正完成之后开始处理。In the case where there is a delay from the end of the data block to the acquisition of the determination result by the evaluation determination section 504 , the correction value 601 is set in consideration of the delay. In this case, a delay correction is applied to the beginning of the current data block of the buffer 503 according to the delay amount, depending on the scrambled header of the previous data block. The evaluation determination unit 504 starts processing after the correction is completed.
校正序列M优选具有使T0和T1没有相关性的值并且就DC平衡、最大游程长度和随机性而言具有良好特性。在64b/66b编码的情况下，使用由以下式(4)的生成多项式表示的加扰器。The correction sequence M preferably has values such that T0 and T1 have no correlation and has good properties in terms of DC balance, maximum run length and randomness. In the case of 64b/66b encoding, a scrambler represented by a generator polynomial of the following equation (4) is used.
g(x)＝x^59+x^19+1式(4)g(x)=x^59+x^19+1 formula (4)
根据式(4)，校正序列M包括在开头的“1”之后连续的38比特“0”，并且在N＝32的情况下，看起来对于加扰头部没有影响。在本发明的实际实现中，需要避免这种加扰器。According to equation (4), the correction sequence M includes 38 consecutive bits of "0" after the initial "1", and in the case of N=32, it seems to have no effect on the scrambled header. In a practical implementation of the invention, such scramblers need to be avoided.
同时，当采用以下式(5)作为生成多项式时，在N＝32的情况下校正序列M呈现全一序列。也就是说，通过将生成多项式设定为以下式(5)，就CIMT或累积DC平衡而言可获得相同的效果。Meanwhile, when the following equation (5) is adopted as the generator polynomial, the correction sequence M exhibits an all-ones sequence in the case of N=32. That is, by setting the generator polynomial to the following equation (5), the same effect can be obtained in terms of CIMT or cumulative DC balance.
g(x)＝x^63+x^62+1式(5)g(x)=x^63+x^62+1 formula (5)
图9示出了根据以上式(1)更新加权累积DC平衡Z(t)的判定部703的实现示例。图示的判定部703包括用于顺次存储Z(t)的寄存器1101、用于将寄存器1101的输出与Y(t+1)相加的加法器1102、以及用于将以上加法结果与加权系数ρ相乘(恒定倍)的乘法器1103。当例如ρ＝0.875时，通过一次移位和一次减法可以实现ρ倍。FIG. 9 shows an implementation example of the determination section 703 that updates the weighted cumulative DC balance Z(t) according to the above equation (1). The illustrated decision section 703 includes a register 1101 for sequentially storing Z(t), an adder 1102 for adding the output of the register 1101 to Y(t+1), and an adder 1102 for combining the above addition result with a weighted The multiplier 1103 multiplies (constant times) the coefficient ρ. When ρ=0.875, for example, the ρ times can be realized by one shift and one subtraction.
图10示出了根据以上式(3)更新有限数目的帧的累积DC平衡Z(t)的判定部703的实现示例(K＝4)。此情况下的判定部703包括加法器1102、用于存储最近的K＝4个帧的Y(t)的移位寄存器1201以及用于存储Z(t)的寄存器1202。FIG. 10 shows an implementation example (K=4) of the determination section 703 that updates the cumulative DC balance Z(t) of a limited number of frames according to the above equation (3). The determination unit 703 in this case includes an adder 1102, a shift register 1201 for storing Y(t) of the latest K=4 frames, and a register 1202 for storing Z(t).
图11和12的示图各自示出了在加权累积DC平衡被用作评估值的情况下(图6)获得的分布。图11的示图示出了在ρ＝0.9的情况下获得的分布，图12的示图示出了在ρ＝1.0的情况下获得的分布。在两种情况下，数据块长度N都被设定为63(帧长度是64)，块的数目是1,000,000，并且输入数据是随机生成的。The graphs of FIGS. 11 and 12 each show a distribution obtained in the case where the weighted cumulative DC balance is used as the evaluation value ( FIG. 6 ). The graph of FIG. 11 shows the distribution obtained in the case of ρ=0.9, and the graph of FIG. 12 shows the distribution obtained in the case of ρ=1.0. In both cases, the data block length N is set to 63 (the frame length is 64), the number of blocks is 1,000,000, and input data is randomly generated.
累积DC平衡的分布指示出通过在每个数据块中对(Y(t)+Z(t-1))/2计数而获得的值。示图的垂直轴是对数刻度的。作为LFSR的生成多项式，使用以下式(6)。The distribution of the cumulative DC balance indicates the value obtained by counting (Y(t)+Z(t-1))/2 in each data block. The vertical axis of the graph is on a logarithmic scale. As the generator polynomial of LFSR, the following equation (6) is used.
g(x)＝x^63+x^62+x^57+x^40+x^34+x^17+1式(6)g(x)=x^63+x^62+x^57+x^40+x^34+x^17+1 formula (6)
图11和12中的每一幅图的“传统方案”的分布是通过在应用典型加扰的情况下对于每个数据块(64比特)对累积DC平衡计数而获得的值。从图11和12的示图可以看出，在本发明的示例中大幅改善了累积DC平衡的分布。例如，在图11中，假定累积DC平衡的绝对值超过20，则在由“传统方案”标示的典型加扰的情况下频率变成1/100以上，而在本示例中频率只有一次达到1/1,000,000。特别地，在图12中所示的ρ＝1.0的模型中，在“传统方案”中获得均匀分布，而在本发明的示例中获得指数分布。The distribution of the "legacy scheme" of each of Figs. 11 and 12 is a value obtained by counting the cumulative DC balance for each data block (64 bits) with typical scrambling applied. As can be seen from the graphs of Figures 11 and 12, the distribution of the cumulative DC balance is greatly improved in the example of the present invention. For example, in Fig. 11, assuming that the absolute value of the cumulative DC balance exceeds 20, the frequency becomes more than 1/100 in the case of typical scrambling denoted by "legacy scheme", whereas in this example the frequency only reaches 1 once /1,000,000. In particular, in the model of p=1.0 shown in FIG. 12, a uniform distribution is obtained in the "conventional scheme", whereas an exponential distribution is obtained in the example of the present invention.
图13的示图示出了在与图11和12的示图的情况相同的设定下基于式(3)的有限数目的帧(K＝4)的累积DC平衡被用作评估标准的情况下获得的分布。可以看出，与图11的情况类似，在本发明的示例中，累积DC平衡的分布得到了改善。例如，图13中在累积DC平衡的绝对值超过20的情况下的相对频率在“传统方案”中变成1/100以上，而在本发明的示例中是1/10,000。The diagram of FIG. 13 shows the case where the cumulative DC balance of a limited number of frames (K=4) based on Equation (3) is used as the evaluation criterion under the same setting as the cases of the diagrams of FIGS. 11 and 12 The distribution obtained below. It can be seen that, similar to the case of FIG. 11 , the distribution of the cumulative DC balance is improved in the example of the present invention. For example, the relative frequency in the case where the absolute value of the cumulative DC balance exceeds 20 in FIG. 13 becomes 1/100 or more in the "conventional scheme", but is 1/10,000 in the example of the present invention.
本发明的示例性实施例不限于上述示例性实施例，而是可以在以下权利要求的范围内根据需要修改。例如，虽然加扰头部的比特数目在以上示例性实施例中是1比特，但其可以是2比特或更多。在这种情况下，计算2^d个头部的评估值(T0，T1，...各自是(N+d)比特)，并且从2^d个评估值中选择最佳的一个。Exemplary embodiments of the present invention are not limited to the above-described exemplary embodiments, but may be modified as required within the scope of the following claims. For example, although the number of bits of the scramble header is 1 bit in the above exemplary embodiment, it may be 2 bits or more. In this case, evaluation values of 2̂d headers (T0, T1, . . . each being (N+d) bits) are calculated, and the best one is selected from the 2̂d evaluation values.
以上示例性实施例的评估判定部504被配置为无论判定结果的内容如何都反馈判定结果。然而，作为替换，评估判定部504可被配置为仅当判定结果指示T1时，即仅当需要利用校正值601校正LFSR时(S409，图3)，才将判定结果反馈给加扰器502。The evaluation determination section 504 of the above exemplary embodiment is configured to feed back the determination result regardless of the content of the determination result. However, alternatively, the evaluation decision section 504 may be configured to feed back the decision result to the scrambler 502 only when the decision result indicates T1, ie only when the LFSR needs to be corrected using the correction value 601 (S409, FIG. 3).
虽然根据本发明的示例性实施例的通信装置500可用硬件实现，但其也可由计算机实现，该计算机从计算机可读记录介质中读取使该计算机可用作通信装置500的程序并且执行该程序。Although the communication device 500 according to the exemplary embodiment of the present invention can be realized by hardware, it can also be realized by a computer that reads a program that makes the computer usable as the communication device 500 from a computer-readable recording medium and executes the program. .
虽然根据本发明的示例性实施例的通信方法可用硬件实现，但其也可由计算机实现，该计算机从计算机可读记录介质中读取使该计算机可执行该方法的程序并且执行该程序。Although the communication method according to the exemplary embodiment of the present invention can be realized by hardware, it can also be realized by a computer which reads a program enabling the computer to execute the method from a computer-readable recording medium and executes the program.
上述示例性实施例是本发明的优选实施例，但不是将本发明的范围仅限于该示例性实施例的，可对其进行各种修改，只要这些修改不偏离本发明的精神。The above-described exemplary embodiment is a preferred embodiment of the present invention, but the scope of the present invention is not limited to this exemplary embodiment, and various modifications can be made thereto as long as the modifications do not depart from the spirit of the present invention.
本申请基于(2009年7月10日提交的)在先日本专利申请No.2009-163798并根据巴黎公约要求其优先权，这里通过引用将该申请的全部内容并入。This application is based on a prior Japanese Patent Application No. 2009-163798 (filed on July 10, 2009) and claims priority under the Paris Convention, the entire contents of which are hereby incorporated by reference.
虽然已详细描述了本发明的示例性实施例，但应当理解，可对其作出各种改变、替代和替换，而不脱离由所附权利要求限定的本发明的精神和范围。另外，发明人希望，即使在审查期间修改了权利要求，也保留要求保护的发明的所有等同物。Although the exemplary embodiments of the present invention have been described in detail, it should be understood that various changes, substitutions and alterations could be made hereto without departing from the spirit and scope of the invention as defined by the appended claims. Further, it is the inventor's intention to retain all equivalents of the claimed invention even if the claims are amended during prosecution.
以上实施例的一部分或全部可描述为以下附记，但不限于此。Part or all of the above embodiments may be described as the following appendixes, but are not limited thereto.
(附记1)一种加扰方法，包括：(Appendix 1) A scrambling method, comprising:
将基准值作为头部添加到数据块的开头以形成基准帧；Add the reference value as a header to the beginning of the data block to form a reference frame;
通过使用自同步加扰器生成所述基准帧的加扰数据；generating scrambled data of the reference frame by using a self-synchronizing scrambler;
通过将校正序列与所述基准帧的加扰数据相加来生成比较帧的加扰数据，在该比较帧中与所述基准值不同的值被作为头部添加到了所述数据块；generating scrambled data of a comparison frame in which a value different from said reference value is added as a header to said data block by adding a correction sequence to said reference frame's scrambled data;
根据评估标准，计算关于所述基准帧的加扰数据的比特序列特性的评估值和关于所述比较帧的加扰数据的比特序列特性的另一评估值；calculating an evaluation value about the bit sequence characteristics of the scrambled data of the reference frame and another evaluation value about the bit sequence characteristics of the scrambled data of the comparison frame according to evaluation criteria;
从计算出的评估值中选择表示对于发送而言最适宜的比特序列特性的评估值；selecting, from the calculated evaluation values, an evaluation value representing the most suitable bit sequence characteristic for transmission;
当所选择的评估值对应于所述基准帧时，发送所述基准帧的加扰数据；以及sending scrambled data of the reference frame when the selected evaluation value corresponds to the reference frame; and
当所选择的评估值对应于所述比较帧时，发送通过将所述校正序列与所述基准帧的加扰数据相加而获得的加扰数据，将所述加扰器的移位寄存器保存的值校正到在考虑到所述比较帧的加扰数据的完成时确定的值，并将经校正的值应用到新数据块的基准帧。When the selected evaluation value corresponds to the comparison frame, the scrambled data obtained by adding the correction sequence to the scrambled data of the reference frame is sent, and the shift register of the scrambler holds the The value is corrected to the value determined in consideration of the completion of the scrambled data of the compared frame, and the corrected value is applied to the reference frame of the new data block.
(附记2)根据附记1所述的加扰方法，还包括：(Supplementary Note 2) According to the scrambling method described in Supplementary Note 1, it also includes:
在用每个加扰数据的DC平衡作为比特序列特性的同时，利用过去的评估值的累积来计算所述评估值；calculating the evaluation value using accumulation of past evaluation values while using the DC balance of each scrambled data as a bit sequence characteristic;
利用表示所述最适宜的比特序列特性的评估值来更新所述过去的评估值的累积；以及updating said accumulation of past evaluation values with evaluation values representing said optimum bit sequence properties; and
利用经更新的累积来计算关于所述新数据块的加扰数据的评估值。An evaluation value for the scrambled data of the new data block is calculated using the updated accumulation.
(附记3)根据附记2所述的加扰方法，其中(Supplementary Note 3) The scrambling method according to Supplementary Note 2, wherein
所述评估值被用具有预定范围内的值的系数加权。The evaluation values are weighted with coefficients having values within a predetermined range.
(附记4)根据附记1所述的加扰方法，其中(Supplementary Note 4) The scrambling method according to Supplementary Note 1, wherein
所述评估值是在用每个加扰数据的最大游程长度作为比特序列特性的同时计算的。The evaluation value is calculated while using the maximum run length of each scrambled data as a bit sequence characteristic.
(附记5)根据附记1所述的加扰方法，还包括：(Supplementary Note 5) According to the scrambling method described in Supplementary Note 1, it also includes:
根据第一评估标准计算每个加扰数据的评估值；calculating an evaluation value of each scrambled data according to a first evaluation standard;
当计算出的评估值之间的差异超过阈值时，选择根据所述第一评估标准表示所述最适宜的比特序列特性的评估值；以及selecting an evaluation value representing the optimum bit sequence characteristic according to the first evaluation criterion when the difference between the calculated evaluation values exceeds a threshold; and
当计算出的评估值之间的差异不大于所述阈值时，根据与所述第一评估标准不同的第二评估标准计算每个加扰数据的评估值并且从计算出的评估值中选择根据所述第二评估标准表示所述最适宜的比特序列特性的评估值。When the difference between the calculated evaluation values is not greater than the threshold, an evaluation value of each scrambled data is calculated according to a second evaluation standard different from the first evaluation standard and an evaluation value is selected from the calculated evaluation values according to The second evaluation criterion represents an evaluation value of the optimum bit sequence characteristic.
(附记6)根据附记5所述的加扰方法，其中(Supplementary Note 6) The scrambling method according to Supplementary Note 5, wherein
由所述第一评估标准表示的评估值是从第一评估值和第二评估值中选择的值，该第一评估值是在用每个加扰数据的DC平衡作为比特序列特性的同时利用过去的评估值的累积计算出的，并且该第二评估值是在用每个加扰数据的最大游程长度作为比特序列特性的同时计算出的，并且The evaluation value indicated by the first evaluation criterion is a value selected from a first evaluation value using DC balance of each scrambled data as a bit sequence characteristic and a second evaluation value. the accumulation of past evaluation values is calculated, and the second evaluation value is calculated while using the maximum run length of each scrambled data as a bit sequence characteristic, and
由所述第二评估标准表示的评估值是从所述第一评估值和所述第二评估值中选择的、与由所述第一评估标准表示的评估值不同的值。The evaluation value indicated by the second evaluation criterion is a value selected from the first evaluation value and the second evaluation value, which is different from the evaluation value indicated by the first evaluation criterion.
(附记7)根据附记6所述的加扰方法，其中(Additional Note 7) The scrambling method according to Additional Note 6, wherein
当在用每个加扰数据的DC平衡作为比特序列特性的同时利用过去的评估值的累积计算所述第一评估值时，所述第一评估值被用具有预定范围内的值的系数加权。When the first evaluation value is calculated using accumulation of past evaluation values while using the DC balance of each scrambled data as a bit sequence characteristic, the first evaluation value is weighted with a coefficient having a value within a predetermined range .
(附记8)根据附记6或附记7所述的加扰方法，其中，如果由所述第一评估标准表示的评估值是在用每个加扰数据的DC平衡作为比特序列特性的同时利用过去的评估值的累积计算的第一评估标准，则所述加扰方法还包括：(Supplementary Note 8) The scrambling method according to Supplementary Note 6 or Supplementary Note 7, wherein if the evaluation value indicated by the first evaluation standard is using the DC balance of each scrambled data as a bit sequence characteristic At the same time using the first evaluation criterion of the cumulative calculation of past evaluation values, the scrambling method further includes:
利用表示所述最适宜的比特序列特性的评估值来更新所述过去的评估值的累积，以及updating said accumulation of past evaluation values with evaluation values representing said optimum bit sequence properties, and
利用经更新的累积来计算关于所述新数据块的加扰数据的评估值。An evaluation value for the scrambled data of the new data block is calculated using the updated accumulation.
(附记9)根据附记1所述的加扰方法，包括：(Supplementary Note 9) The scrambling method according to Supplementary Note 1, including:
根据第一评估标准计算每个加扰数据的评估值；calculating an evaluation value of each scrambled data according to a first evaluation standard;
当计算出的评估值之间的差异超过阈值时，选择根据所述第一评估标准表示所述最适宜的比特序列特性的评估值；when the difference between the calculated evaluation values exceeds a threshold, selecting an evaluation value representing the optimum bit sequence characteristic according to the first evaluation criterion;
当计算出的评估值之间的差异不大于所述阈值时，获取随机比特序列；obtaining a random bit sequence when the difference between the calculated evaluation values is not greater than the threshold;
当所述随机比特序列对应于预测值时，选择所述比较帧的加扰数据作为具有表示所述最适宜的比特序列特性的评估值的加扰数据；以及when said random bit sequence corresponds to a predicted value, selecting scrambled data of said comparison frame as scrambled data having an evaluation value representing said optimum bit sequence characteristic; and
当所述随机比特序列不对应于所述预测值时，选择所述基准帧的加扰数据作为具有表示所述最适宜的比特序列特性的评估值的加扰数据。When the random bit sequence does not correspond to the predicted value, the scrambled data of the reference frame is selected as the scrambled data having an evaluation value representing the optimum bit sequence characteristic.
(附记10)根据附记9所述的加扰方法，其中(Supplementary Note 10) The scrambling method according to Supplementary Note 9, wherein
由所述第一评估标准表示的评估值是从第一评估值和第二评估值中选择的值，该第一评估值是在用每个加扰数据的DC平衡作为比特序列特性的同时利用过去的评估值的累积计算出的，并且该第二评估值是在用每个加扰数据的最大游程长度作为比特序列特性的同时计算出的。The evaluation value indicated by the first evaluation criterion is a value selected from a first evaluation value using DC balance of each scrambled data as a bit sequence characteristic and a second evaluation value. The accumulation of past evaluation values is calculated, and the second evaluation value is calculated while using the maximum run length of each scrambled data as a bit sequence characteristic.
(附记11)根据附记10所述的加扰方法，其中(Supplementary Note 11) The scrambling method according to Supplementary Note 10, wherein
当在用每个加扰数据的DC平衡作为比特序列特性的同时利用过去的评估值的累积计算所述第一评估值时，所述第一评估值被用具有预定范围内的值的系数加权。When the first evaluation value is calculated using accumulation of past evaluation values while using the DC balance of each scrambled data as a bit sequence characteristic, the first evaluation value is weighted with a coefficient having a value within a predetermined range .
(附记12)根据附记10或附记11所述的加扰方法，其中，如果由所述第一评估标准表示的评估值是在用每个加扰数据的DC平衡作为比特序列特性的同时利用过去的评估值的累积计算的第一评估标准，则所述加扰方法还包括：(Supplementary Note 12) The scrambling method according to Supplementary Note 10 or Supplementary Note 11, wherein if the evaluation value represented by the first evaluation standard is using the DC balance of each scrambled data as a bit sequence characteristic At the same time using the first evaluation criterion of the cumulative calculation of past evaluation values, the scrambling method further includes:
利用表示所述最适宜的比特序列特性的评估值来更新所述过去的评估值的累积，以及updating said accumulation of past evaluation values with evaluation values representing said optimum bit sequence properties, and
利用经更新的累积来计算关于所述新数据块的加扰数据的评估值。An evaluation value for the scrambled data of the new data block is calculated using the updated accumulation.
(附记13)根据附记1至12中的任何一项所述的加扰方法，其中(Supplementary Note 13) The scrambling method according to any one of Supplementary Notes 1 to 12, wherein
所述头部的比特数目是1比特。The number of bits of the header is 1 bit.
(附记14)一种通信装置，包括：(Additional Note 14) A communication device, comprising:
头部添加部，该头部添加部将基准值作为头部添加到数据块的开头以形成基准帧；a header adding section that adds a reference value as a header to the beginning of the data block to form a reference frame;
加扰部，该加扰部通过使用自同步加扰器生成所述基准帧的加扰数据；a scrambling section that generates scrambled data of the reference frame by using a self-synchronizing scrambler;
评估判定部，该评估判定部：通过将校正序列与所述基准帧的加扰数据相加来生成比较帧的加扰数据，在该比较帧中与所述基准值不同的值被作为头部添加到了所述数据块，根据评估标准，计算关于所述基准帧的加扰数据的比特序列特性的评估值和关于所述比较帧的加扰数据的比特序列特性的另一评估值，从计算出的评估值中选择表示对于发送而言最适宜的比特序列特性的评估值；并且根据所述选择输出所述校正序列或零序列；以及an evaluation determination section that: generates scrambled data of a comparison frame in which a value different from the reference value is taken as a header by adding a correction sequence to scrambled data of the reference frame Added to the data block, according to the evaluation criteria, an evaluation value about the bit sequence characteristic of the scrambled data of the reference frame and another evaluation value about the bit sequence characteristic of the scrambled data of the comparison frame are calculated from selecting an evaluation value representing an optimum bit sequence characteristic for transmission from the evaluation values; and outputting the correction sequence or the zero sequence according to the selection; and
加法器，该加法器将所述校正序列或所述零序列与所述基准帧的加扰数据相加并发送加法结果，an adder that adds the correction sequence or the zero sequence to the scrambled data of the reference frame and sends the addition result,
其中，当所选择的评估值对应于所述比较帧时，所述评估判定部将所述选择的结果提供给所述加扰部并且将所述校正序列输出到所述加法器，并且所述加扰部在所述选择的结果被发送来时将所述加扰器的移位寄存器保存的值校正到在考虑到所述比较帧的加扰数据的完成时确定的值，并将经校正的值应用到新数据块的基准帧。Wherein, when the selected evaluation value corresponds to the comparison frame, the evaluation decision section supplies the selected result to the scramble section and outputs the correction sequence to the adder, and the addition The scrambling section corrects the value held by the shift register of the scrambler to a value determined in consideration of the completion of the scrambled data of the comparison frame when the selected result is transmitted, and converts the corrected The base frame to which the value applies to new data blocks.
(附记15)根据附记14所述的通信装置，其中(Supplementary Note 15) The communication device according to Supplementary Note 14, wherein
所述评估判定部在用每个加扰数据的DC平衡作为比特序列特性的同时利用过去的评估值的累积来计算所述评估值，利用表示所述最适宜的比特序列特性的评估值来更新所述过去的评估值的累积，并且利用经更新的累积来计算关于所述新数据块的加扰数据的评估值。The evaluation determination unit calculates the evaluation value using the accumulation of past evaluation values while using the DC balance of each scrambled data as the bit sequence characteristic, and updates the evaluation value with the evaluation value indicating the optimum bit sequence characteristic. an accumulation of said past evaluation values, and using the updated accumulation to calculate an evaluation value for the scrambled data of said new data block.
(附记16)根据附记15所述的通信装置，其中(Supplementary Note 16) The communication device according to Supplementary Note 15, wherein
所述评估判定部用具有预定范围内的值的系数来对所述评估值加权。The evaluation determination section weights the evaluation value with a coefficient having a value within a predetermined range.
(附记17)根据附记14所述的通信装置，其中(Supplementary Note 17) The communication device according to Supplementary Note 14, wherein
所述评估判定部在用每个加扰数据的最大游程长度作为比特序列特性的同时计算所述评估值。The evaluation decision section calculates the evaluation value while using the maximum run length of each scrambled data as a bit sequence characteristic.
(附记18)根据附记14所述的通信装置，其中(Supplementary Note 18) The communication device according to Supplementary Note 14, wherein
所述评估判定部根据第一评估标准计算每个加扰数据的评估值，当计算出的评估值之间的差异超过阈值时选择根据所述第一评估标准表示所述最适宜的比特序列特性的评估值，并且当计算出的评估值之间的差异不大于所述阈值时，根据与所述第一评估标准不同的第二评估标准计算每个加扰数据的评估值并且从计算出的评估值中选择根据所述第二评估标准表示所述最适宜的比特序列特性的评估值。The evaluation determination section calculates an evaluation value of each scrambled data according to a first evaluation standard, and selects the bit sequence characteristic representing the optimum bit sequence according to the first evaluation standard when a difference between the calculated evaluation values exceeds a threshold value. , and when the difference between the calculated evaluation values is not greater than the threshold value, the evaluation value of each scrambled data is calculated according to a second evaluation standard different from the first evaluation standard and is calculated from the calculated An evaluation value representing the optimum bit sequence characteristic according to the second evaluation criterion is selected from the evaluation values.
(附记19)根据附记18所述的通信装置，其中(Supplementary Note 19) The communication device according to Supplementary Note 18, wherein
由所述第一评估标准表示的评估值是从第一评估值和第二评估值中选择的值，该第一评估值是在用每个加扰数据的DC平衡作为比特序列特性的同时利用过去的评估值的累积计算出的，并且该第二评估值是在用每个加扰数据的最大游程长度作为比特序列特性的同时计算出的，并且The evaluation value indicated by the first evaluation criterion is a value selected from a first evaluation value using DC balance of each scrambled data as a bit sequence characteristic and a second evaluation value. the accumulation of past evaluation values is calculated, and the second evaluation value is calculated while using the maximum run length of each scrambled data as a bit sequence characteristic, and
由所述第二评估标准表示的评估值是从所述第一评估值和所述第二评估值中选择的、与由所述第一评估标准表示的评估值不同的值。The evaluation value indicated by the second evaluation criterion is a value selected from the first evaluation value and the second evaluation value, which is different from the evaluation value indicated by the first evaluation criterion.
(附记20)根据附记19所述的通信装置，其中(Supplementary Note 20) The communication device according to Supplementary Note 19, wherein
当在用每个加扰数据的DC平衡作为比特序列特性的同时利用过去的评估值的累积计算所述第一评估值时，所述评估判定部用具有预定范围内的值的系数来对所述第一评估值加权。When calculating the first evaluation value using accumulation of evaluation values in the past while using the DC balance of each scrambled data as a bit sequence characteristic, the evaluation determination section evaluates all evaluation values with a coefficient having a value within a predetermined range. weighted by the first evaluation value described above.
(附记21)根据附记19或附记20所述的通信装置，其中，如果由所述第一评估标准表示的评估值是在用每个加扰数据的DC平衡作为比特序列特性的同时利用过去的评估值的累积计算的第一评估标准，那么(Supplementary Note 21) The communication device according to Supplementary Note 19 or Supplementary Note 20, wherein if the evaluation value indicated by the first evaluation criterion is while using the DC balance of each scrambled data as a bit sequence characteristic The first evaluation criterion calculated using the accumulation of past evaluation values, then
所述评估判定部利用表示所述最适宜的比特序列特性的评估值来更新所述过去的评估值的累积，并且利用经更新的累积来计算关于新数据块的加扰数据的评估值。The evaluation decision section updates the accumulation of the past evaluation values with the evaluation value representing the optimum bit sequence characteristic, and calculates the evaluation value about the scrambled data of the new data block using the updated accumulation.
(附记22)根据附记14所述的通信装置，其中(Supplementary Note 22) The communication device according to Supplementary Note 14, wherein
所述评估判定部：根据第一评估标准计算每个加扰数据的评估值；在计算出的评估值之间的差异超过阈值时，选择根据所述第一评估标准表示所述最适宜的比特序列特性的评估值，在计算出的评估值之间的差异不大于所述阈值时，获取随机比特序列，在所述随机比特序列对应于预测值时，选择所述比较帧的加扰数据作为具有表示所述最适宜的比特序列特性的评估值的加扰数据，并且在所述随机比特序列不对应于所述预测值时，选择所述基准帧的加扰数据作为具有表示所述最适宜的比特序列特性的评估值的加扰数据。The evaluation determination unit: calculates an evaluation value of each scrambled data according to a first evaluation standard; and selects the most suitable bit according to the first evaluation standard when the difference between the calculated evaluation values exceeds a threshold. The evaluation value of the sequence characteristic, when the difference between the calculated evaluation values is not greater than the threshold value, a random bit sequence is obtained, and when the random bit sequence corresponds to the predicted value, the scrambled data of the comparison frame is selected as having scrambled data representing an evaluation value of the optimum bit sequence characteristic, and when the random bit sequence does not correspond to the predicted value, selecting the scrambled data of the reference frame as having the value representing the optimum The estimated value of the bit sequence properties of the scrambled data.
(附记23)根据附记22所述的通信装置，其中(Supplementary Note 23) The communication device according to Supplementary Note 22, wherein
由所述第一评估标准表示的评估值是从第一评估值和第二评估值中选择的值，该第一评估值是在用每个加扰数据的DC平衡作为比特序列特性的同时利用过去的评估值的累积计算出的，并且该第二评估值是在用每个加扰数据的最大游程长度作为比特序列特性的同时计算出的。The evaluation value indicated by the first evaluation criterion is a value selected from a first evaluation value using DC balance of each scrambled data as a bit sequence characteristic and a second evaluation value. The accumulation of past evaluation values is calculated, and the second evaluation value is calculated while using the maximum run length of each scrambled data as a bit sequence characteristic.
(附记24)根据附记23所述的通信装置，其中(Supplementary Note 24) The communication device according to Supplementary Note 23, wherein
当在用每个加扰数据的DC平衡作为比特序列特性的同时利用过去的评估值的累积计算所述第一评估值时，所述评估判定部用具有预定范围内的值的系数对所述第一评估值加权。When calculating the first evaluation value using accumulation of past evaluation values while using the DC balance of each scrambled data as a bit sequence characteristic, the evaluation determination section evaluates the The first evaluation value is weighted.
(附记25)根据附记23或附记24所述的通信装置，其中，如果由所述第一评估标准表示的评估值是在用每个加扰数据的DC平衡作为比特序列特性的同时利用过去的评估值的累积计算的第一评估标准，那么(Supplementary Note 25) The communication device according to Supplementary Note 23 or Supplementary Note 24, wherein if the evaluation value represented by the first evaluation criterion is while using the DC balance of each scrambled data as a bit sequence characteristic The first evaluation criterion calculated using the accumulation of past evaluation values, then
所述评估判定部利用表示所述最适宜的比特序列特性的评估值来更新所述过去的评估值的累积，并且利用经更新的累积来计算关于新数据块的加扰数据的评估值。The evaluation decision section updates the accumulation of the past evaluation values with the evaluation value representing the optimum bit sequence characteristic, and calculates the evaluation value about the scrambled data of the new data block using the updated accumulation.
(附记26)根据附记14至25中的任何一项所述的通信装置，其中(Supplementary Note 26) The communication device according to any one of Supplementary Notes 14 to 25, wherein
所述头部添加部向所述数据块添加一比特值作为所述头部。The header adding section adds a one-bit value to the data block as the header.
(附记27)一种程序，使得计算机充当根据附记14至26中的任何一项所述的通信装置。(Supplementary Note 27) A program causing a computer to function as the communication device according to any one of Supplementary Notes 14 to 26.
{工业应用性}{Industrial applicability}
本发明适宜应用到例如光通信中的线路编码。The present invention is suitably applied to, for example, line coding in optical communication.
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| JP2009163798 | 2009-07-10 | ||
| JP2009-163798 | 2009-07-10 | ||
| PCT/JP2010/061531WO2011004838A1 (en) | 2009-07-10 | 2010-07-07 | Scrambling method and communication apparatus |
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| CN102474481A CN102474481A (en) | 2012-05-23 |
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