CN102468881A - Time division-synchronous code division multiple access (TD-SCDMA) double-channel vehicle-mounted correction repeater - Google Patents

Abstract

The invention discloses a time division-synchronous code division multiple access (TD-SCDMA) double-channel vehicle-mounted correction repeater, which comprises a first circulator, a second circulator, a retransmission end circulator, a double-channel downlink, a double-channel uplink, a synchronization unit, an auxiliary control module and a monitoring unit, wherein the double-channel downlink consists of a downlink power amplifier and an automatic frequency control (AFC) module; and the double-channel uplink consists of an uplink low-noise amplifier, an uplink frequency-selecting unit and an uplink power amplification module. The repeater has an AFC function, a downlink automatic gain control function and an uplink gain linkage regulation function; and a main downlink signal of at least one channel of double channels is appropriately selected through the AFC module and used for performing frequency compensation, so that the phenomenon that Doppler frequency shift influences switching of cell signals in high-speed movement is avoided, a terminal which moves at a high speed can normally demodulate signals of a base station, and the problems of call dropping of the terminal caused by frequency shift, poor call quality and low data downloading speed are solved. The repeater and a double-donor antenna are used together, so that the coverage quality of a mobile communication network in a high-speed moving object such as carriages of a high-speed train is improved greatly.

Description

The vehicle-mounted correction of TD-SCDMA binary channels repeater

Technical field

The present invention relates to the vehicle-mounted correction of a kind of TD-SCDMA binary channels repeater, the stable covering of TD-SCDMA movable signal in the high-speed railway railway carriage can be realized in this repeater, improves the communication quality of terminal in high-speed mobile.

Background technology

Under the high speed scene, the translational speed at TD-SCDMA terminal can reach 430 kilometers/hour the soonest, and high-speed motion will will produce following main influence for mobile communications network:

1. the raising of speed brings bigger Doppler frequency shift and Doppler frequency disperse to a certain extent, thereby the downstream signal signal to noise ratio is descended;

2. because high-speed motion increases the number of times that switch the sub-district in the unit interval;

3. high-speed motion will worsen the sub-district success rate for switching;

4. high-speed motion environment, signal will produce the rapid fading phenomenon, cause the terminal call drop;

5. airtight owing to the high-speed train compartment, so the penetration loss in compartment will have influence on the quality that signal covers.

When train reaches 400 kilometers/hour, according to the scheme that private network covers, the TD-SCDMA frequency deviation will reach 750Hz.

Summary of the invention

For solving under the above-mentioned high velocity environment; As influencing TD-SCDMA movable signal covering quality in the high ferro railway carriage, cell signal is switched worsen problems such as terminal call drop; The present invention provides the vehicle-mounted correction of a kind of TD-SCDMA binary channels repeater, to improve the covering quality of movable signal under the high velocity environment.

The vehicle-mounted correction of TD-SCDMA binary channels of the present invention repeater comprises:

First and second circulator connects first filter and second filter of first and second circulator respectively, connects the repeating transmission end circulator of the 3rd filter;

The binary channels down link; Comprise descending power amplifier (PA) and AFC module; Two inputs of AFC module connect the downstream signal output of first and second circulator respectively; The output of AFC module connects the downstream signal input of retransmitting the end circulator through descending power amplifier, and the AFC module is used for descending automatic frequency control (AFC), provides synchronization pulse and descending ALC to start to control degree of depth numerical control deamplification;

The binary channels up link; Comprise the up low noise amplifier (LNA), up frequency-selecting unit and the up power amplifier module that connect successively; Up low noise amplifier input connects the upward signal output of retransmitting the end circulator; Two outputs of up power amplifier module connect the upward signal input of first and second circulator respectively, and the descending ALC that the control end of up power amplifier module connects the output of AFC module starts to control degree of depth numerical control deamplification;

Lock unit, the synchronization pulse that receiving the AFC module provides carries out the baseband decoding computing, detects the time slot power output of each amplifying stage in the uplink and downlink link, and each amplifying stage is carried out automatic electric-level control, and control uplink and downlink chain way switch synchronous working;

The assist control module receives from the two-way uplink synchronous enable signal of AFC module and the up power amplifier synchronous control switch signal of lock unit, controls the synchro switch of up two passages in the up power amplifier module and the switch synchronization action of descending two passages; And,

Monitoring unit; Be connected with AFC module, lock unit through 485 buses respectively; Extract descending time slot input power value from the AFC module; The time slot power output of each amplifying stage from the uplink and downlink link that lock unit extract to detect, and to lock unit second switching point is set, down-going synchronous opens threshold value and down-going synchronous is closed threshold value.

Said monitoring unit also is connected to said up frequency-selecting unit, up power amplifier module, up low noise amplifier and descending power amplifier through 485 buses, and the gain reduction value of complete machine is assigned to said AFC module, up power amplifier module, up low noise amplifier and descending power amplifier classification decay by this monitoring unit respectively through 485 buses.

Said up power amplifier module comprises first and second up power amplifier and power splitter; A road of power splitter is exported the upward signal input that connects first circulator through the first up power amplifier, and another road output of power splitter connects the upward signal input of second circulator through the second up power amplifier.

Automatic frequency control, the control of descending automatic gain and up gain interlock regulatory function have been realized in repeater of the present invention; Select the master of at least one passage in the binary channels to carry out frequency compensation with downstream signal through the AFC module in good time; Avoided the influence that Doppler frequency shift switches cell signal in the high-speed motion; Guarantee the normal demodulation signal of base station of terminal ability of high-speed mobile, solved because frequency deviation causes terminal call drop problem, speech quality difference and data to download slow problem.

Repeater of the present invention cooperates with two donor antennas, and the covering quality of the indoor mobile communications network of railway carriage of high-speed motion is obviously improved.Show through the laboratory contrast test: show through the laboratory contrast test: 1. after adding this repeater, TD-SCDMA voice Block Error Rate obviously descends.2. after adding this repeater, the data Block Error Rate of TD-SCDMA obviously descends.3. after adding this repeater, the data throughout of TD-SCDMA obviously rises.

For adapting to vehicle-mounted requirement, 19 inches standard PC cases are adopted in repeater of the present invention, and low in energy consumption, the voltage adaptation wide ranges is applicable under-25 ℃～+ 70 ℃ ambient temperatures and works, and can resist vibration, drifting dust, salt fog, mould than rugged environment.

Description of drawings

Fig. 1 is the vehicle-mounted binary channels correction of TD-SCDMA of the present invention repeater theory diagram.

Embodiment

Further specify below in conjunction with accompanying drawing.

The vehicle-mounted correction of TD-SCDMA binary channels shown in Figure 1 repeater comprises: first circulator 3 and second circulator 4 connect first filter 1 and second filter 2 of first and second circulator 3,4 respectively; Retransmit end circulator 10, this circulator 10 connects the 3rd filter 11; Binary channels down link, binary channels up link, assist control module 6, lock unit 7 and monitoring unit 8.

The binary channels down link comprises descending power amplifier PA9 and AFC module 5; Two inputs of AFC module 5 connect the downstream signal output of first and second circulator 3,4 respectively, and 5 outputs of AFC module connect the downstream signal input of retransmitting end circulator 10 through descending power amplifier PA9.Wherein, AFC module 5 is mainly accomplished descending automatic frequency controlled function AFC, for following lock unit 7 synchronization pulse is provided simultaneously, provides descending ALC to start to control depth value for up.AFC module 5 comprises: the first descending LNA50, first downstream filter 51 and first low-converter 52 that connect successively are used for the downstream signal of a passage is amplified and down-converted; The second descending LNA53, second downstream filter 54 and second low-converter 55 that connect successively are used for the downstream signal of another passage is amplified and down-converted; A/D converter 56 and 57, both inputs connect first and second low-converter 52,55 outputs respectively, are used for the intermediate frequency rotaring signal of first and second low-converter output is transformed into digital medium-frequency signal; FPGA58, FPGA connects A/D converter 56 and 57, and the digital medium-frequency signal that two A/D converters are exported carries out frequency detecting, and compares with reference frequency, obtains the Doppler frequency deviation value and also compensates; And, D/A converter 59 and upconverter 5A, D/A converter 59 is connected between FPGA58 and the upconverter 5A, and the digital medium-frequency signal after it compensates FPGA 58 is transformed into analog if signal, is transferred to descending PA9 by upconverter 5A upconversion process.

The binary channels up link comprises and connects up low noise amplifier LNA12, up frequency-selecting unit 13 and up power amplifier module 14 successively; Up low noise amplifier LNA12 input connects the upward signal output of retransmitting end circulator 10; Two outputs of up power amplifier module 14 connect the upward signal input of first and second circulator 3,4 respectively, and the descending ALC that the control end of up power amplifier module 14 connects the output of AFC module starts to control degree of depth numerical control deamplification.Wherein, Up power amplifier module 14 comprises up power amplifier UPA1, up power amplifier UPA2 and power splitter; A road of power splitter is exported the upward signal input that connects first circulator 3 through up power amplifier UPA1, and another road output of power splitter connects the upward signal input of second circulator 4 through up power amplifier UPA2.

The synchronization pulse that lock unit 7 receives AFC module 5 to be provided carries out the baseband decoding computing; Detect the time slot power output of each amplifying stage in the uplink and downlink link; Each amplifying stage is carried out automatic electric-level control (ALC), and the synchronous working of control uplink and downlink chain way switch;

According to practical application, synchronozing sensitivity is less than-80dBm, and the method for synchronization is selected the base band demodulating mode.Lock unit 7 carries out the baseband decoding computing according to the synchronization pulse SY that AFC module 5 provides, and produces up power amplifier synchronous control switch signal ULPA_SW, up low noise synchronous control switch signal ULLNA_SW, descending power amplifier PA synchronous control switch signal DLPA_SW.

The up low noise ALC control of lock unit 7 outputs voltage U LLNA_ALC carries out up low noise power output control to up low noise LAN 12; Export descending power amplifier ALC control voltage DLPA_ALC descending power amplifier PA9 is carried out descending power amplifier power output control; Export up power amplifier 1ALC control voltage U LPA1_ALC and be used for, export up power amplifier 2ALC control voltage U LPA2_ALC and be used for up power amplifier UPA2 power output control to up power amplifier UPA1 power output control.

Lock unit 7 also detects the time slot power output of each amplifying stage in the uplink and downlink link.Detected parameters is following: the ascending time slot power output detected value ULPA1_OUT that extracts up power amplifier UPA1 from up power amplifier UPA1; Extract the ascending time slot power output detected value ULPA2_OUT of up power amplifier UPA2 from up power amplifier UPA2, extract descending time slot power output detected value DLPA_OUT and the reverse power output detected value of descending time slot DLPA_out from descending power amplifier PA9.

The control of uplink synchronous switch is because this direct discharging station scheme is the binary channels scheme, and in actual use, there is the mode of only opening one of them passage or opening two passages simultaneously in down link.Therefore, require uply also can carry out channel switch control with down-going synchronous.Because TD is a time-division system, it is very accurate that the up-downgoing Time Calculation requires.Therefore propose two uplink synchronous enable signal CH1_EN and CH2_EN are set, guarantee that the switch of synchro switch and descending two passages of up two passages is synchronous.

These two uplink synchronous enable signal CH1_EN, CH2_EN are realized according to TD-SCDMA uplink and downlink timeslot ratio relation by AFC module 5.The up power amplifier synchronous control switch ULPA_SW that produces through enable signal CH1_EN, CH2_EN and lock unit 7 produces ULPA1_SW, ULPA2_SW according to the logic control computing.

For this reason, this direct discharging station adds an assist control module 6.6 liang of control ends of this assist control module connect two uplink synchronous enable signals (CH1_EN, the CH2_EN) output of AFC module 5 respectively; The up power amplifier synchronous control switch signal ULPA_SW of input termination lock unit 7 outputs, two outputs of assist control module 6 are received the synchro switch of up two passages in the up power amplifier module 14 respectively.Assist control module 6 receives from the two-way uplink synchronous enable signal CH1_EN of AFC module 5 and the up power amplifier synchronous control switch signal ULPA_SW of CH2_EN and lock unit 7, makes the synchro switch of up two passages and the switch synchronization action of descending two passages in the up power amplifier module 14 according to the logic control computing.

Monitoring unit 8 is connected with AFC module 5, lock unit 7 through 485 buses respectively; Extract descending time slot input power value from AFC module 5, extract ascending time slot low noise power output, descending time slot power amplifier output power value, the reverse output power value of descending time slot power amplifier, up power amplifier UPA1 time slot output power value, the up power amplifier UPA2 time slot output power value that detects from lock unit 7; And be provided with to lock unit 7 that second switching point, down-going synchronous are opened threshold value and down-going synchronous is closed threshold value.

Monitoring unit 8 also is connected to said up frequency-selecting unit 13, up power amplifier module 14, up low noise amplifier LNA12 and descending power amplifier PA9 through 485 buses, and the gain reduction value of complete machine is assigned to said AFC module 5, up power amplifier module 14, up low noise amplifier LNA12 and descending power amplifier PA9 classification by this monitoring unit 8 respectively through 485 buses and realizes decay.

Up AGC implementation is following in this direct discharging station:

Because at the volley, the descending field strong production rapid fading that receives, thus require descending realization down output power controlled function, promptly descending ALC controlled function, signal is relatively stable in the maintenance compartment.For guaranteeing the uplink downlink balance, require to realize that up automatic gain interlock regulatory function is up AGC function.This programme is realized up AGC function through the descending degree of depth of starting to control, and promptly uses the descending degree of depth of starting to control to be sent to up power amplifier module 14 through numerical control decay mode, thereby realizes up AGC function.

Reference frequency obtain manner, TD-SCDMAB frequency range are 2010～2015MHz, 9 carrier waves.The center frequency point of each carrier wave is set in the AFC module, as reference frequency.Detect frequency and nine reference frequencies and do comparison, choosing hithermost reference frequency is reference frequency.

Some power datas that lock unit 7 extracts and various control signal such as Fig. 1 table.

AFC module 5 produces synchronizing signal SY and calculates for lock unit 7 synchronously.Lock unit 7 carries out logical operation according to synchronizing signal SY and produces: up low noise synchro switch ULLNA_SW is defeated by up low noise LNA12 and up frequency-selecting module 13; Up power amplifier switch ULPA_SW carries out logical operation for assist control module 6 and produces up ULPA1_SW, ULPA2_SW and be defeated by up power amplifier UPA 1, up power amplifier UPA 2 respectively, and descending power amplifier switch DLPA_SW gives descending power amplifier PA module 9.

Simultaneously; Lock unit 7 produces up low noise ALC control voltage U LLNA_ALC and carries out up low noise power output control for up low noise LNA12; Exporting descending power amplifier ALC control voltage DLPA_ALC carries out descending power amplifier power output control for descending power amplifier PA9; Export up power amplifier 1ALC control voltage U LPA1_ALC and carry out up power amplifier UPA1 power output control, export up power amplifier 2ALC control voltage U LPA2_ALC and carry out up power amplifier UPA2 power output control.

Lock unit 7 extracts descending time slot power output DLPA_OUT and the reverse power output detection of descending time slot DLPA_out from descending power amplifier PA9; Extract up low noise time slot power output ULLNA_OUT from up low noise 12, from up power amplifier module 14, extract up power amplifier UPA1 time slot power output ULLNA1_OUT, up power amplifier UPA2 time slot power output ULLNA2_OUT.And the descending time slot input power detects by monitoring extraction from AFC module 5.

This direct discharging station course of work is following:

When the alms giver hold 1 with the alms giver hold 2 receive base station simultaneously signal, respectively after wave filter 1,2 filtering, get into first and second circulator 3,4 and carry out up-downgoing and separate; The two-way downstream signal that separates gets into AFC module 5 and carries out frequency correction, when two paths of signals is with frequently the time, and the passage that shutdown signal is weak; The field intensity of the passage a little less than signal increases; When surpassing current master channel field intensity 6dB (thresholding can be provided with), this passage is open-minded, other pathway closure; When if two passages are alien frequencies; Two passages are open-minded simultaneously, close the road and carry out the intermediate frequency filtering processing afterwards, the signal that produces is passed to descending power amplifier PA9 amplify; Signal after amplifying carries out up-downgoing through repeating transmission end circulator 10 and closes the road, and 11 filtering are transmitted into the user through the 3rd filter again.Wherein, the two-way downstream signal of 5 pairs of receptions of AFC module carries out automatic frequency to be corrected, and can adopt the automatic frequency correcting method that proposes in applicant " the signal of communication cell switching method in the high ferro compartment ".

The upward signal of user emission through the 3rd filter 11 Filtering Processing after retransmit end circulator 10 and separate; Get into up low noise LNA12 and carry out the low noise amplification; Signal after amplifying carries out Filtering Processing through up frequency-selecting unit 13; Power splitters in the up power amplifier module 14 of signal process after handling carry out getting into up power amplifier UPA1 respectively after the two merits branch, up power amplifier UPA2 amplifies; Signal one tunnel after the amplification is transmitted into the base station through first circulator 3 with filter 1, and another road is transmitted into the base station through second circulator 4 with filter 2.

Claims (6)

1. the vehicle-mounted correction of TD-SCDMA binary channels repeater is characterized in that comprising:

First and second circulator connects first filter and second filter of first and second circulator respectively, is connected with the repeating transmission end circulator of the 3rd filter;

The binary channels down link; Comprise descending power amplifier and AFC module; Two inputs of AFC module connect the downstream signal output of first and second circulator respectively; The output of AFC module connects the downstream signal input of retransmitting the end circulator through descending power amplifier, and the AFC module is used for descending automatic frequency control, provides synchronization pulse and descending ALC to start to control degree of depth numerical control deamplification;

The binary channels up link; Comprise the up low noise amplifier, up frequency-selecting unit and the up power amplifier module that connect successively; Up low noise amplifier input connects the upward signal output of retransmitting the end circulator; Two outputs of up power amplifier module connect the upward signal input of first and second circulator respectively, and the descending ALC that the control end of up power amplifier module connects the output of AFC module starts to control degree of depth numerical control deamplification;

Lock unit, the synchronization pulse that receiving the AFC module provides carries out the baseband decoding computing, detects the time slot power output of each amplifying stage in the uplink and downlink link, and each amplifying stage is carried out automatic electric-level control, and the work of control uplink and downlink link synchronization;

The assist control module receives from the two-way uplink synchronous enable signal of AFC module and the up power amplifier synchronous control switch signal of lock unit, controls the synchro switch of up two passages in the up power amplifier module and the switch synchronization action of descending two passages; And,

Monitoring unit; It is connected with AFC module, lock unit through 485 buses respectively; Extract descending time slot input power value from the AFC module; The time slot power output of each amplifying stage from the uplink and downlink link that lock unit extract to detect, and to lock unit second switching point is set, down-going synchronous opens threshold value and down-going synchronous is closed threshold value.

2. repeater according to claim 1; It is characterized in that: said monitoring unit also is connected to said up frequency-selecting unit, up power amplifier module, up low noise amplifier and descending power amplifier through 485 buses, and the gain reduction value of complete machine is assigned to said AFC module, up power amplifier module, up low noise amplifier and descending power amplifier classification decay by this monitoring unit respectively through 485 buses.

3. repeater according to claim 1 and 2; It is characterized in that: said up power amplifier module comprises first and second up power amplifier and power splitter; A road of power splitter is exported the upward signal input that connects first circulator through the first up power amplifier, and another road output of power splitter connects the upward signal input of second circulator through the second up power amplifier.

4. repeater according to claim 1 and 2; It is characterized in that: the time slot power output of each amplifying stage comprises in the uplink and downlink link that said lock unit detects: from the descending time slot power output and the reverse power output of descending time slot of descending power amplifier; From the two-way ascending time slot power output in the up power amplifier module; And, from the up low noise time slot power output of up low noise.

5. repeater according to claim 1 and 2 is characterized in that said AFC module comprises: the first descending LNA and first low-converter that connect successively are used for the downstream signal of a passage is amplified and down-converted; The second descending LNA and second low-converter that connect successively are used for the downstream signal of another passage is amplified and down-converted; Two A/D converters, both inputs connect first, second low-converter output respectively, and the intermediate-freuqncy signal that is used for respectively first, second low-converter being exported is transformed into digital medium-frequency signal; FPGA, FPGA connect two A/D converter outputs respectively, and the digital medium-frequency signal that two A/D converters are exported carries out frequency detecting, and compares with reference frequency, obtain the Doppler frequency deviation value and also compensate; And, D/A converter and upconverter, the D/A converter is connected between FPGA and the upconverter, and the digital medium-frequency signal after it compensates FPGA is transformed into analog if signal, by being transferred to descending PA after the upconverter upconversion process.

6. repeater according to claim 5; It is characterized in that: said AFC module also comprises first downstream filter and second downstream filter; The former is connected between the first descending LNA and first low-converter, and the latter is connected between the second descending LNA and second low-converter.