Embodiment
Describe embodiments of the invention below in detail, the example of said embodiment is shown in the drawings, and wherein identical from start to finish or similar label is represented identical or similar elements or the element with identical or similar functions.Be exemplary through the embodiment that is described with reference to the drawings below, only be used to explain the present invention, and can not be interpreted as limitation of the present invention.
In order to realize the present invention's purpose, the invention discloses a kind of method that improves receiver sensitivity, may further comprise the steps: receiver is input to analogue-to-digital converters ADC through antenna filter and low noise amplifier with signal through antenna receiving signal; Said ADC is suppressed at clutter noise outside the band, thereafter input digit down-conversion DDC filter through the said reception signal of signal to noise ratio lifting SNRBOOST technical finesse; The clutter noise that the band of the said reception signal of said DDC filter filtering is outer makes the analog-digital conversion of said reception signal satisfy the requirement of system receiver adjacentchannel selectivity ACS.
As shown in Figure 4, the method flow diagram for embodiment of the invention raising receiver sensitivity may further comprise the steps:
S410: receive signal and be input to ADC through antenna filter and low noise amplifier.
In step S410, receiver is input to analogue-to-digital converters ADC through antenna filter and low noise amplifier with signal through antenna receiving signal.
S420:ADC receives signal through the SNRBOOST technical finesse, and clutter noise is suppressed at outside the band.
In step S420, ADC is suppressed at clutter noise outside the band, thereafter input digit down-conversion DDC filter through the said reception signal of signal to noise ratio lifting SNRBOOST technical finesse.
The filtering of S430:DDC filter receives the outer clutter noise of band of signal.
In step S430, the clutter noise that the band of the said reception signal of DDC filter filtering is outer makes the analog-digital conversion that receives signal satisfy the requirement of system receiver adjacentchannel selectivity ACS.
Wherein, the DDC filter is the filter of multiple-stage filtering drawing-out structure.
Particularly, the filter of multiple-stage filtering drawing-out structure comprises:
First order half-band filter HB1 filtering mirror image disturbs;
3 times of extractions eliminate clutter noise behind finitepulse response FIR 3 filter filterings;
Second level half-band filter HB2 filtering; And
Programmable finite impulse response (FIR) PFIR adds the root raised cosine RRC filter that comb filter CIC constitutes.
In addition, the reception signal also comprises before getting into said RRC filter:
To the adjustment that gains of said reception signal, the signal power in the adjustment passband is to satisfy the index request of receiver receiving sensitivity RSL.
In the above-described embodiments, ADC and DDC filter to the lifting of the global noise of said reception signal less than 1dBc.
As shown in Figure 5, the invention allows for a kind ofdevice 100 that improves receiver sensitivity, comprisereceiver module 110,ADC processing module 120 and DDC filtration module 130.
Wherein,receiver module 110 is used for through antenna receiving signal, through antenna filter and low noise amplifier signal is input to saidADC processing module 120.
ADC processing module 120 is used for through the said reception signal of signal to noise ratio lifting SNRBOOST technical finesse clutter noise being suppressed at outside the band, imports DDC filtration module 130 thereafter.
DDC filtration module 130 is used for the outer clutter noise of band of the said reception signal of filtering, makes the analog-digital conversion of said reception signal satisfy the requirement of system receiver adjacentchannel selectivity ACS.
Wherein, DDC filtration module 130 is the filter of multiple-stage filtering drawing-out structure.
Particularly, the filter of said multiple-stage filtering drawing-out structure comprises:
First order half-band filter HB1 filtering mirror image disturbs;
3 times of extractions eliminate clutter noise behind finitepulse response FIR 3 filter filterings;
Second level half-band filter HB2 filtering; And
Programmable finite impulse response (FIR) PFIR adds the root raised cosine RRC filter that comb filter CIC constitutes.
In addition, the reception signal also comprises before getting into said RRC filter:
To the adjustment that gains of said reception signal, the signal power in the adjustment passband is to satisfy the index request of receiver receiving sensitivity RSL.
In the above-described embodiments, the lifting ofADC module 120 and DDC filtration module 130 global noise to received signal is less than 1dBc.
For the ease of understanding said method disclosed by the invention or device; Analyze in the face of signal, the noise situations of each link in the system down; Obviously; Analytic process in the back literary composition is for the ease of understanding above-mentioned concrete embodiment, for example understands choosing or concrete CALCULATION OF PARAMETERS process etc. of the acquisition of concrete parameter in the specific embodiment, concrete technical indicator.
Until ADC gathers the ground noise of whole piece link, this noise gets into the DDC processing after being gathered by ADC to the reception signal from antenna filter, low noise amplifier LNA, and sketch map is as shown in Figure 6.
Behind ADS58C48, handle,, can cause band outer spuious, introduce noise in the feasible final band, the ACS of reduction receiver if follow-up DDC deals with improperly immediately following DDC.This is owing to have adjacent 60MHZ just to have the end lifting of making an uproar after the ADC-ADS58C48 acquired signal, like Fig. 7, shown in Figure 8, is respectively the frequency spectrum after frequency spectrum after the ADC output is exported with DDC; Effective BIT figure place ENOB of ADC is 12.3438 bits among Fig. 7, and full scale root mean square is 3.9794dBm, and every Hz end of making an uproar is-153.8585dBFS; SNRFS-fft every Hz end of making an uproar of gaining, be-113.3476dBFS; ADC noise factor 24.4409dB, SNRFS (60MHz, Nyquist noise) is-76.077dB.So DDC is necessary making an uproar end filtering outside frequency band.
In order to solve the aforementioned problems in the prior; Therefore the framework that needs appropriate design DDC to handle; Make that the spuious end of making an uproar that SNRBOOST causes effectively is suppressed to outside the band, accomplish the design of DPD feedback path and receive link design through same ADC, as shown in Figure 9.
In order to satisfy the receiver sensitivity requirement, need satisfy spuious little that ADC+DDC introduces, totally should not surpass 1dBc.Do concrete analysis in the face of noise profile down.
The ADC noise is introduced analysis and was divided for 4 steps described:
The ADC full range of power and the end power calculation of making an uproar; ADC sampling processing Calculation of Gain; The calculating of ADC noise factor; The signal to noise ratio of analog link and ADC are to the influence of sensitivity.
1.ADC full range of power is calculated and the end power calculation of making an uproar:
The full range of power of ADC (RMS) is calculated as follows:
Calculate as follows for the peak value full range of power:
If VP-P=2v, terminal resistance R=200 Ω, the root mean square full range of power P of this momentFS-ADC-RMS (dBm)=4dBm,
Peak value full range of power PFS-ADC-Peak (dBm)=7dBm,
The purpose of calculating the ADC full range of power is just can know absolute power (dBm) when obtaining the relative amplitude (dBFS) that ADC collects, and in calculating at the back, can use this point.
Gather the end signal of making an uproar of input ADC, can obtain in the passband or the power of making an uproar of the end in the frequency band arbitrarily through following calculating, simultaneously also can be in the hope of the noise power of cell frequency (Hz) in this frequency band:
NoiseNyquist=10*log10(∑|fft-d[snrboost_begin:snrboost_end]|2)
SNRFSNyquist=0-NoiseNyquist=-NoiseNyquist
fft_gain=10*log10(snrboost_end-snrboost_begin)
Noise_Floor/Hz=NoiseNyquist-10*log10(fNyquist_BW*106)
2.ADC sampling processing Calculation of Gain:
F generally speakingNyquist_BWEqual ADC sampling rate fSHalf the, to the ADS58C48 chip of TI company, this sampling rate roughly only about 1/3, this moment fS=184.32MHz, and fNyquist_BW=60MHz.The original position pass_beg=16MHz of passband.If according to a TD carrier wave fTD1C_BW=1.28MHz calculates, and only differs from a sampling processing gain:
So have:
SNRFSTD1C=SNRFSNyquist-Process_Gain
Because the precision of the data of gathering generally can't reach the HZ one-level, just can obtain making an uproar at the end of each frequency sampling point through deducting fft_gain for this reason, figure below all is based on the end power of making an uproar of sampled point.
Noise_Floor=NoiseNyquist-fft_gain
Obtain effective BIT figure place ENOB of ADC according to the noise power calculation of ADC in signal bandwidth:
Figure 10 has illustrated ADC to produce the distribution map of noise power.
Thermal noise power spectrum density time-174dBm/Hz during last figure lowermost end, top is the full range of power 4dBm of ADC.The end power of making an uproar of integration Nyquist band bandwidth (60MHz), the maximum signal power of acquiescence is 0dBFS, just can obtain the signal to noise ratio snr FS of full scale this momentADC_NyquistThough this time, the ADC sampling rate was 184.32MHz, this high-speed ADC can be used for the DPD feedback path, can not adopt the SNRBOOST technology, and this moment, whole feedback path frequency band was smooth, can be used for DPD and handle.This moment, the size of Nyquist_band was 92.16MHZ, if adopt the SNRBOOST technology, in fact smooth passband has only 60MHZ, and the pass band width Nyquist_band of support equals 60MHZ, and the bandwidth signal of other Frequency point is thought out of band signal.
3.ADC the calculating of noise factor:
Though ADC is not a power device, the NF of ADCADCAlso can arrive through what equality calculated.As amplifier, frequency mixer and filter,, just can calculate the stack performance of receiver with it in case this data have been arranged.ADC does not provide any gain, and just with digital quantization, it is the same with input signal therefore to export signal, add the noise of quantification.
As long as know full scale power, sampling rate and SNR just can know the NF of ADCADC, because NFADCBe in the final stage of receiver, thus very little to the total NF contribution of system, calculate final system noise F like following formula:
The designed reception machine needs most the noise factor that is noted that the prime device and will get well; Though the NF of ADC reaches 24dBc; But owing to be in the final stage of receiver, very little to the influence of whole system, the back can obtain ADC to the emulation of test data the lifting at the end of making an uproar is generally less than 0.4dBc.
For the input signal before the ADC, can test the global noise of ADC output noise and ADC output.
SNRFS when testing single ADC with make an uproar end power, the system that promptly opens does not send any signal, and is shown in figure 11; Effective BIT figure place ENOB of ADC is 12.3438 bits among Figure 11, and full scale root mean square is 3.9794dBm, and every Hz end of making an uproar is-153.8585dBFS; SNRFS-fft every Hz end of making an uproar of gaining, be-113.3476dBFS, ADC noise factor 24.4409dB, SNRFS (60MHz; The Nyquist noise) be-76.077dB that SNRFS (1.28MHz noise) is-92.7864dBFS.
SNRFS during the overall noise of test ADC output with make an uproar end power, the system that promptly opens does not send any signal, and is shown in figure 12; Effective BIT figure place ENOB of ADC is 10.0801 bits among Figure 12, and full scale root mean square is 3.9794dBm, and every Hz end of making an uproar is-140.2298dBFS; SNRFS-fft every Hz end of making an uproar of gaining, be-99.7188dBFS, ADC noise factor 38.0696dB, SNRFS (60MHz; The Nyquist noise) be-62.4483dB that SNRFS (1.28MHz noise) is-79.1577dBFS.
4. the signal to noise ratio of analog link and ADC are to the influence of sensitivity:
If there is not specified otherwise, following SNRFS is based on a TD carrier bandwidths integrates and calculates.Obtaining the noise SNRFS that ADC producesADCOverall noise SNRFS than ADC outputTOTALLow 13.6dBc:
SNRFSADC-SNRFSTOTAL=-92.78dB+79.16dB=-13.6dB,
Can calculate the noise SNRFS of radio frequency link this moment in ADC outputADC_analogThe size as follows:
At this moment just know influence (lifting at the end of the making an uproar) 0.11dBc of ADC to sensitivity:
NoiseADC=SNRFSADC_TOTAL-SNRFSADC_analog=-79.15dBFS+79.35dBFS=0.2dB
Know the signal to noise ratio snr FS of analog link full scaleADC_analogJust can know the system noise NFsys of analog link with the Gsys of analog link:
SNRFSADC_analog=-174dBm+10*log101280000+NFsys+Gsys
=-113dBm+NFsys+Gsys=-79.35dBFS
=-75.35dBm(rms=4dBm)
=>NFsys+Gsys=37.65dB
The above-mentioned systematic name numerical value of using and implication such as following table:
The DDC noise is introduced and was divided for 5 steps described:
The HB1 noise is introduced and is analyzed; The FIR3 noise is introduced and is analyzed; The HB2 noise is introduced and is analyzed; RRC is that the noise of PFIR+CIC is introduced analysis; DDC afterbody gain adjustment is analyzed.
The DDC of ADC back adopts the multiple-stage filtering drawing-out structure.The at first quadrature demodulation of the data of ADC, useful signal is positioned at zero-frequency, and subsequently through first order half-band filter HB1 filtering mirror image, 3 times of extractions eliminate spuiously behind the FIR3 filter filtering, and then partly are with HB2 through the second level.Get into RRC filter (PFIR+CIC) before, the adjustment that gains, the signal power in the adjustment passband satisfies receiver (RSL) index request.Through the filtering extraction of 12 times of combination RRC, signal is exported the baseband signal of 1.28MHZ at last, and DDC filtering extraction structure chart is shown in figure 13.
5.HB1 introducing, noise analyzes
After ADC finishes dealing with, send to DDC subsequently and handle, the Filtering Processing of at first carrying out HB after the entering DDC is following:
Filtering Processing is carried out 2 times of extractions after accomplishing, and the spectrogram after extracting is following, and the observation noise has increased 0.1dBc.Spectrogram behind the ADC-HB filtering extraction is shown in figure 14.
6.FIR3 introducing, noise analyzes
Accomplish after the HB filtering extraction, the Filtering Processing of signal demand FIR3 subsequently, treatment effect is shown in figure 15, and the end of making an uproar of lifting, is fully by effective filtering.
FIR3 filtering is carried out 3 times of extractions after accomplishing, and filtered signal is with respect to original input signal among Figure 16, and end lifting 0.12dBc makes an uproar.Figure 16 is the filtered spectrogram of ADC-HB-FIR, is 6 times of spectrograms after the extraction, i.e. 2 of HB1 times of extractions add 3 times of extractions of FIR3.
Spuious being suppressed>70dBc that SNRBOOST causes after 3 times of extractions of FIR3 filtering is so the signal that extracts after the filtering is spuious by filtering.
FIR to outer inhibition owing to reached 74dBc, spuiously be suppressed very totally, shown in figure 17 so band is outer, with respect to original ADC input signal, the outer effective filtering of spuious quilt of band.
7.HB2 introducing, noise analyzes
Carry out the HB2 filtering extraction after the FIR3 filtering extraction is accomplished again and handle, shown in figure 18, be the spectrogram behind the ADC-HB-FIR-HB filtering extraction, be 12 times of spectrograms after the extraction.
8.RRC (PFIR+CIC) noise is introduced and is analyzed
The decimation filter of afterbody is the RRC filter of a CIC and PFIR combination, mainly plays the effect of spectral shaping, effectively out-of-band spuious the and block signal of filtering.The spectral characteristic of RRC junction filter is shown in figure 19.
Through the filtering and the extraction of afterbody RRC filter, the spectrogram behind the ADC-DDC filtering extraction is shown in figure 20.
Attention: afterbody is because the RRC filter that TD-SCDMA adopts, and at 0.64MHZ the decay of 3dBc arranged, so overall noise possibly also can descend to some extent.
9.DDC afterbody gain adjustment is analyzed
In order to improve the signal to noise ratio of afterbody, improve RSL, through before the RRC filter, increasing a signal gain adjusting module signal is handled.Because the multiple-stage filtering extraction has been accomplished in the front, the signal power that increase this moment is the signal in the frequency band, rather than the gain of whole frequency band, so so not only can satisfy blocking performance but also can satisfy the RSL requirement.
Figure 21 is the sketch map that the spectrogram-prime behind the ADC-DDC filtering extraction increases the 10dBc gain, and the end of making an uproar that has increased the DDC output of 10dBc gain back has reduced 0.2dBc, and the RSL index promotes.
Figure 22 is that the spectrogram-prime behind the ADC-DDC filtering extraction increases 10dBc gain block signal by the sketch map of filtering.After having increased the 10dBc gain, block signal is by effectively filtering, and DDC output is not overflowed yet.
Receive link signal and only have the signal in the reception carrier later on through DDC, the signal outside the filter band is basically by filtering.So the peak signal that needs in the transfer of data afterwards to consider is exactly the signal that in band, possibly exist.
In sum, it is as shown in the table that noise is introduced analysis
The such scheme that the present invention proposes, ADC adopt the SNR_BOOST technology, and the output SNR of 11BIT signal equals 14BIT, general effect or 11BIT.Band is outer thinks it all is noise, and these noises are through the DDC filtering, and the inhibition of DDC surpasses 70dBc; The noise of projection just is suppressed like this; Make general effect satisfy system requirements, the overall deterioration of ADC+DDC makes TD-SCDMA system index RSL meet the demands less than 1dBc.The significant bit figure place of ADC can reach more than the 12BIT.
The such scheme that the present invention proposes, the processing of DDC and the processing of ADC are done as a whole, come the performance of the outer spuious ADC of making of filtering band can satisfy the index request of system receiver ACS degree through DDC.This ADC closes SNR_BOOST simultaneously, and whole ADC can be used as based on feedback link again, makes the sampling rate of system satisfy feedback request, can satisfy DPD to the signals sampling requirement.
The such scheme that the present invention proposes; Combination RRC filter is made up of PFIR+CIC, increases the adjusting module of signal gain before, extracts owing to accomplished the front multiple-stage filtering; The signal power that increase this moment is the signal in the frequency band; Rather than the gain of whole frequency band, so the index that this moment can elevator system receiver sensitivity RSL also satisfies the blocking performance requirement simultaneously.
One of ordinary skill in the art will appreciate that and realize that all or part of step that the foregoing description method is carried is to instruct relevant hardware to accomplish through program; Described program can be stored in a kind of computer-readable recording medium; This program comprises one of step or its combination of method embodiment when carrying out.
In addition, each functional unit in each embodiment of the present invention can be integrated in the processing module, also can be that the independent physics in each unit exists, and also can be integrated in the module two or more unit.Above-mentioned integrated module both can adopt the form of hardware to realize, also can adopt the form of software function module to realize.If said integrated module realizes with the form of software function module and during as independently production marketing or use, also can be stored in the computer read/write memory medium.
The above-mentioned storage medium of mentioning can be a read-only memory, disk or CD etc.
The above only is a preferred implementation of the present invention; Should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; Can also make some improvement and retouching, these improvement and retouching also should be regarded as protection scope of the present invention.