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CN102215074B - A device and method for detecting power and standing wave ratio - Google Patents

A device and method for detecting power and standing wave ratio
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CN102215074B
CN102215074BCN201110149677.8ACN201110149677ACN102215074BCN 102215074 BCN102215074 BCN 102215074BCN 201110149677 ACN201110149677 ACN 201110149677ACN 102215074 BCN102215074 BCN 102215074B
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朱加强
刘志
付敏
陈建国
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Comba Network Systems Co Ltd
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Comba Telecom Systems China Ltd
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Translated fromChinese

本发明提供一种功率和驻波检测的装置,所述装置具体包括:前向功率检测链路、DPD反馈链路以及反向功率检测链路,所述前向功率检测链路和DPD反馈链路是同一条链路。本发明还提供一种功率和驻波检测的方法,该方法中无论是功率检测,还是驻波检测,都采用先定标的方式,再进行检测,提高了检测精度,避免了烦琐的手动调式,减少了人为误差。

Figure 201110149677

The present invention provides a power and standing wave detection device, the device specifically includes: a forward power detection link, a DPD feedback link and a reverse power detection link, the forward power detection link and the DPD feedback chain The road is the same link. The present invention also provides a method for detecting power and standing waves. In this method, whether it is power detection or standing wave detection, the way of first calibration is adopted, and then the detection is carried out, which improves the detection accuracy and avoids cumbersome manual adjustment. , reducing human error.

Figure 201110149677

Description

Translated fromChinese
一种功率和驻波比检测的装置及方法A device and method for detecting power and standing wave ratio

技术领域technical field

本发明涉及无线通信领域,特别涉及一种功率和驻波比检测的装置及方法。The invention relates to the field of wireless communication, in particular to a device and method for detecting power and standing wave ratio.

背景技术Background technique

在无线通信领域中,驻波比、输出功率一直都是发射机的重要指标,驻波比直接体现了发射机末级端口的匹配状况,匹配不好时,会影响到信号的发射与接收,特别是在信号下行输出时,输出功率和驻波比都比较大时,很容易烧坏末级电路,甚至会烧坏功率放大器,所以输出功率和驻波比的检测,保证发射机末级端口匹配良好一直是通信设备的一个硬性指标。另一方面,从环保和网络规划的角度考虑,输出信号强度必须在一定的范围内,否则会直接影响到整个网络的信号质量。所以功率和驻波比的检测对通信设备中的功率放大器的保护非常重要。In the field of wireless communication, standing wave ratio and output power have always been important indicators of transmitters. Standing wave ratio directly reflects the matching status of the final port of the transmitter. When the matching is not good, it will affect the transmission and reception of signals. Especially when the signal is output downlink, when the output power and standing wave ratio are relatively large, it is easy to burn out the final stage circuit, or even burn out the power amplifier, so the detection of output power and standing wave ratio ensures that the final stage port of the transmitter Good matching has always been a hard indicator of communication equipment. On the other hand, from the perspective of environmental protection and network planning, the output signal strength must be within a certain range, otherwise it will directly affect the signal quality of the entire network. Therefore, the detection of power and standing wave ratio is very important for the protection of power amplifiers in communication equipment.

目前,驻波比和功率的检测主要用射频检波和基带检波两种检测方式来实现,其中射频检波主要借助于检波管以及一系列外围电路,这种检测方式的检测精度主要取决于检波管精度,而基带检波方式需要经过混频、ADC转换来实现。At present, the detection of VSWR and power is mainly realized by two detection methods: radio frequency detection and baseband detection. Among them, the radio frequency detection mainly relies on the detection tube and a series of peripheral circuits. The detection accuracy of this detection method mainly depends on the accuracy of the detection tube. , and the baseband detection method needs to be realized through frequency mixing and ADC conversion.

在现今2G和3G通信系统并存以及多模RRU系列产品诞生的情况下,相应的驻波检测、功率检测的方法也需要做相应的改善。With the coexistence of 2G and 3G communication systems and the birth of multi-mode RRU series products, the corresponding standing wave detection and power detection methods also need to be improved accordingly.

发明内容Contents of the invention

本发明的目的在于克服现有技术的缺点和不足,提供一种功率和驻波比检测的装置,该装置采用先定标后检测,提高了检测的精度。The object of the present invention is to overcome the shortcomings and deficiencies of the prior art, and provide a device for detecting power and standing wave ratio. The device adopts calibration before detection, which improves the detection accuracy.

本发明的另一个目的还在于提供一种功率和驻波比检测的方法。Another object of the present invention is to provide a method for detecting power and standing wave ratio.

本发明的目的通过下述技术方案实现:一种功率和驻波比检测的装置,所述装置具体包括第一模数转换器AD、FPGA模块、数模转换器DA、功率放大器PA、前向耦合器、多工器、反向耦合器、负载、射频滤波器、射频选择开关和混频链路,所述第一模数转换器AD的输出端与FPGA模块相连接,所述FPGA模块的输出端与数模转换器DA连接,所述数模转换器DA的输出端分别与功率放大器PA连接,所述的功率放大器PA的输出端接入多工器,所述多工器的输出端与负载相连接;The object of the present invention is achieved through the following technical solutions: a device for power and standing wave ratio detection, which specifically includes a first analog-to-digital converter AD, an FPGA module, a digital-to-analog converter DA, a power amplifier PA, a forward Coupler, multiplexer, reverse coupler, load, radio frequency filter, radio frequency selection switch and frequency mixing link, the output end of described first analog-to-digital converter AD is connected with FPGA module, the FPGA module The output end is connected with the digital-analog converter DA, and the output end of the digital-analog converter DA is respectively connected with the power amplifier PA, and the output end of the power amplifier PA is connected to a multiplexer, and the output end of the multiplexer connected to the load;

所述射频开关通过射频端口FWDn与前向耦合器相连接,所述前向耦合器与功率放大器PA和多工器之间的射频线进行连接,所述射频开关还与射频滤波器的输出端REV相连接;The radio frequency switch is connected with the forward coupler through the radio frequency port FWDn, and the forward coupler is connected with the radio frequency line between the power amplifier PA and the multiplexer, and the radio frequency switch is also connected with the output terminal of the radio frequency filter REV is connected;

所述射频滤波器通过射频线与反向耦合器相连接,所述反向耦合器与多工器和负载之间的射频线连接;The radio frequency filter is connected to the reverse coupler through the radio frequency line, and the reverse coupler is connected to the radio frequency line between the multiplexer and the load;

所述前向耦合器是以微带耦合的方式与功率放大器PA和多工器之间的射频线进行微带耦合连接。The forward coupler is microstrip coupled to the radio frequency line between the power amplifier PA and the multiplexer in a microstrip coupling manner.

所述反向耦合器是以微带耦合的方式与多工器和负载之间的射频线微带耦合连接。The reverse coupler is connected to the radio frequency line between the multiplexer and the load in a microstrip coupling manner.

所述射频开关的输出端与混频链路相连接;The output terminal of the radio frequency switch is connected to the mixing link;

所述混频链路包括依次相连的混频器、中频滤波器、中小功率放大器、第二模数转换器AD;The frequency mixing link includes a mixer connected in sequence, an intermediate frequency filter, a small and medium power amplifier, and a second analog-to-digital converter AD;

所述第二模数转换器AD的输出端接入FPGA模块。The output terminal of the second analog-to-digital converter AD is connected to the FPGA module.

所述前向耦合器是单向耦合器。The forward coupler is a one-way coupler.

所述反向耦合器是单向耦合器。The reverse coupler is a one-way coupler.

所述功率和驻波比检测的装置的工作原理如下:The working principle of the device for detecting power and standing wave ratio is as follows:

所述第一模数转换器AD中输出的前向功率进入FPGA模块中,在FPGA模块中进行前向功率统计后输出到数模转换器DA,通过功率放大器PA进行功率放大后,前向功率通过前向耦合器以微带耦合的方式耦合到射频线FWD中,所述耦合的前向功率称为前向反馈功率,前向反馈功率通过射频开关与混频链路相连接,进入FPGA模块进行前向反馈功率统计与计算,这样构成的链路是前向功率检测链路或者是DPD(digital Pre-distortion,数字预失真)反馈链路。The forward power output in the first analog-to-digital converter AD enters the FPGA module, and is output to the digital-to-analog converter DA after performing forward power statistics in the FPGA module. After power amplification by the power amplifier PA, the forward power Coupled to the radio frequency line FWD in the form of microstrip coupling through the forward coupler, the coupled forward power is called the forward feedback power, and the forward feedback power is connected to the frequency mixing link through the radio frequency switch and enters the FPGA module Perform forward feedback power statistics and calculations, and the link formed in this way is a forward power detection link or a DPD (digital Pre-distortion, digital pre-distortion) feedback link.

上述从功率放大器PA中的输出前向功率进入多工器,当前向功率进入负载后,有部分功率反射回来,所述反射回来的功率为反向功率,反向功率通过反向耦合器以微带耦合的方式耦合到射频滤波器中,所述耦合的反向功率称为反向反馈功率,反向反馈功率通过射频开关与混频链路相连接,进入FPGA模块进行反向反馈功率统计与计算,这样构成的链路是反向功率检测链路。The above-mentioned output forward power from the power amplifier PA enters the multiplexer. After the forward power enters the load, part of the power is reflected back. The reflected power is the reverse power, and the reverse power passes through the reverse coupler in micro Coupled into the RF filter in a coupling manner, the coupled reverse power is called reverse feedback power, the reverse feedback power is connected to the mixing link through the RF switch, and enters the FPGA module for reverse feedback power statistics and Calculated, the link formed in this way is the reverse power detection link.

对于同时对至少一种制式的信号进行功率和驻波比检测时,所述一种功率和驻波比检测的装置包括至少一个数模转换器DA、至少一个功率放大器PA和至少一个前向耦合器,所述射频开关通过射频端口FWD1、FWD2、...、FWDn分别与一个前向耦合器相连接,所述每个前向耦合器与每个功率放大器PA和多工器之间的射频线进行连接。When performing power and standing wave ratio detection on signals of at least one system at the same time, the device for detecting power and standing wave ratio includes at least one digital-to-analog converter DA, at least one power amplifier PA, and at least one forward coupling The radio frequency switch is respectively connected to a forward coupler through the radio frequency ports FWD1, FWD2, ..., FWDn, and the radio frequency between each forward coupler and each power amplifier PA and multiplexer line to connect.

一种功率和驻波比检测的方法,所述方法包括以下步骤:A method for detecting power and standing wave ratio, said method comprising the following steps:

(1)通过射频开关选择需要检测的前向功率检测链路的射频端口FWDn,使前向功率检测链路接通,调整功率放大器PA,使输出功率达到所需要的预设功率值Pout′;(1) Select the radio frequency port FWDn of the forward power detection link that needs to be detected through the radio frequency switch, make the forward power detection link connected, adjust the power amplifier PA, and make the output power reach the required preset power value Pout';

(2)前向功率的模拟信号通过第一模数转换器AD转化为数字信号进入FPGA模块,并记录进入FPGA模块中的信号功率值,记为P1;(2) The analog signal of the forward power is converted into a digital signal by the first analog-to-digital converter AD and enters the FPGA module, and records the signal power value entered in the FPGA module, which is denoted as P1;

(3)前向功率的数字信号从FPGA模块中输出,经过数模转换器DA进行数字信号和模拟信号转换以及功率放大器PA进行功率放大后,通过前向耦合器以微带耦合的方式将信号输入到混频链路中进行混频、滤波、功率放大以及模数转换处理,最后将处理过的信号提供给FPGA模块进行统计与计算;(3) The digital signal of the forward power is output from the FPGA module, after the digital signal and analog signal are converted by the digital-to-analog converter DA and the power amplifier PA is used for power amplification, the signal is coupled by the forward coupler in the form of microstrip coupling Input to the mixing link for mixing, filtering, power amplification and analog-to-digital conversion processing, and finally provide the processed signal to the FPGA module for statistics and calculation;

(4)在FPGA模块中记录从混频链路进入FPGA模块中的信号功率值,记为P2;(4) record the signal power value entering the FPGA module from the frequency mixing link in the FPGA module, denoted as P2;

(5)在FPGA模块中根据上述步骤统计的所述P1和P2计算定标功率P3和定标增益G1,即完成功率检测的定标,(5) calculate calibration power P3 and calibration gain G1 according to the described P1 and P2 of above-mentioned step statistics in FPGA module, promptly finish the calibration of power detection,

所述定标功率P3的计算公式为:P3=P2+反馈链路温度补偿值,The calculation formula of the calibration power P3 is: P3=P2+feedback link temperature compensation value,

所述定标增益G1的计算公式为:G1=P2+反馈链路温度补偿值-P1,The calculation formula of the calibration gain G1 is: G1=P2+feedback link temperature compensation value-P1,

所述反馈链路温度补偿值为反馈链路中由于温度变化使通路中的信号增益发生变化而补偿的功率值;The temperature compensation value of the feedback link is a power value compensated for by changing the signal gain in the path due to temperature changes in the feedback link;

(6)完成功率检测的定标后,计算最终输出功率值,记为Pout,所述Pout的计算公式为:(6) After completing the calibration of power detection, calculate the final output power value, which is denoted as Pout, and the calculation formula of said Pout is:

Pout=Pout′+P2+反馈链路温度补偿值-P3,所述Pout′和P3为常量;Pout=Pout'+P2+feedback link temperature compensation value-P3, the Pout' and P3 are constants;

(7)完成功率检测的定标和计算后,然后将射频开关拨到射频滤波器的输出端,使反向功率检测链路接通,前向功率的信号经过第一模数转换器AD、FPGA模块、数模转换器DA、功率放大器PA、多工器,再经过失配负载,部分信号从负载反射回来,反射回来的反向功率通过反向耦合器以微带耦合的方式耦合到射频滤波器中,通过射频开关进入混频链路经过混频、放大、模数转换,最后将反向反馈功率的数字信号提供给FPGA模块进行统计,所述负载的驻波比为VSWR′,即回波损耗为RL′;(7) After completing the calibration and calculation of the power detection, then the radio frequency switch is dialed to the output end of the radio frequency filter, so that the reverse power detection link is connected, and the signal of the forward power passes through the first analog-to-digital converter AD, FPGA module, digital-to-analog converter DA, power amplifier PA, multiplexer, and then through the mismatched load, part of the signal is reflected from the load, and the reflected reverse power is coupled to the RF through the reverse coupler in the form of microstrip coupling In the filter, the RF switch enters the frequency mixing link through frequency mixing, amplification, and analog-to-digital conversion. Finally, the digital signal of the reverse feedback power is provided to the FPGA module for statistics. The standing wave ratio of the load is VSWR′, namely The return loss is RL';

(8)在FPGA模块中,统计反向反馈功率统计值、回波损耗增益的统计值、当前回波损耗的统计值以及回波损耗的定标值,分别记为P4、G2、RL1以及RL2,所述G2的计算公式为:(8) In the FPGA module, statistical values of reverse feedback power, statistical value of return loss gain, statistical value of current return loss and calibration value of return loss are recorded as P4, G2, RL1 and RL2 respectively , the calculation formula of G2 is:

G2=P4+反馈链路温度补偿值-P1,G2=P4+feedback link temperature compensation value-P1,

所述RL1的计算公式为:RL1=G2-G1,The calculation formula of the RL1 is: RL1=G2-G1,

所述RL2的计算公式为:RL2=RL1-RL′,即完成回波损耗定标,所述G1和RL2为常量,P4、G2和RL1为变量;The calculation formula of the RL2 is: RL2=RL1-RL', that is, return loss calibration is completed, the G1 and RL2 are constants, and P4, G2 and RL1 are variables;

(9)回波损耗定标完成后,计算实际的回波损耗,记为RL,所述RL的计算公式为:RL=RL1-RL2;(9) After the return loss calibration is completed, calculate the actual return loss, denoted as RL, and the calculation formula of the RL is: RL=RL1-RL2;

(10)得到RL后,计算实际驻波比VSWR,所述VSWR的计算公式为:VSWR=(1+10S1120)/(1-10S1120),其中公式中的S11=-RL;(10) After obtaining RL, calculate actual standing wave ratio VSWR, the computing formula of described VSWR is: VSWR = ( 1 + 10 S 11 20 ) / ( 1 - 10 S 11 20 ) , wherein S11=-RL in the formula;

(11)得到驻波比VSWR值后,在FPGA模块中检测输出端的匹配状况,当检测得到驻波比超过功率放大器PA的门限值时,FPGA模块能及时给出告警信息,关闭功率放大器PA,通过FPGA模块使输出信号衰减,再打开功率放大器PA,使得功率放大器PA输出小信号,即使功率放大器PA处于全反射状态下也不至于烧坏功率放大器PA;在链路有信号传输的状态下,检查链路,直到驻波比正常,系统继续正常工作。(11) After obtaining the standing wave ratio VSWR value, detect the matching status of the output terminal in the FPGA module. When the detected standing wave ratio exceeds the threshold value of the power amplifier PA, the FPGA module can give an alarm message in time and turn off the power amplifier PA , the output signal is attenuated through the FPGA module, and then the power amplifier PA is turned on, so that the power amplifier PA outputs a small signal, even if the power amplifier PA is in a state of total reflection, it will not burn out the power amplifier PA; when the link has signal transmission , check the link until the VSWR is normal and the system continues to work normally.

本发明相对现有技术具有以下优点:The present invention has the following advantages relative to the prior art:

1、本发明所述的前向功率检测链路和DPD反馈链路是同一链路,从而降低了电路复杂度以及耦合器的指标要求,而且系统空间也进一步缩小,产品成本也进而降低。1. The forward power detection link and the DPD feedback link of the present invention are the same link, thereby reducing the circuit complexity and the index requirements of the coupler, and the system space is further reduced, and the product cost is further reduced.

2、本发明中无论是功率检测,还是驻波比检测,都采用先定标的方式,再进行检测,提高了检测精度,避免了烦琐的手动调式,减少了人为误差,方便了生产批量生产。2. In the present invention, whether it is power detection or standing wave ratio detection, the first calibration method is used, and then the detection is carried out, which improves the detection accuracy, avoids cumbersome manual adjustment, reduces human errors, and facilitates mass production .

3、FPGA直接检测出了实际输出端口的匹配状况,同时控制着功放的开关状态,可以有效、及时的保护功放,适应链路的稳定性。3. The FPGA directly detects the matching status of the actual output port, and at the same time controls the switching state of the power amplifier, which can effectively and timely protect the power amplifier and adapt to the stability of the link.

附图说明Description of drawings

图1是本发明所述的一种功率和驻波比检测的装置结构示意图;Fig. 1 is a kind of device structural representation of power and standing wave ratio detection of the present invention;

图2是本发明实施例2一种功率和驻波比检测的装置结构示意图;Fig. 2 is a schematic structural diagram of a device for detecting power and standing wave ratio in Embodiment 2 of the present invention;

图3是本发明实施例1和2功率检测流程框图;Fig. 3 is a block diagram of the power detection process of Embodiments 1 and 2 of the present invention;

图4是本发明实施例1和2驻波比检测流程框图。Fig. 4 is a block diagram of the standing wave ratio detection process in Embodiments 1 and 2 of the present invention.

具体实施方式Detailed ways

下面结合实施例及附图对本发明作进一步详细的描述,但本发明的实施方式不限于此。The present invention will be further described in detail below in conjunction with the embodiments and the accompanying drawings, but the embodiments of the present invention are not limited thereto.

实施例1Example 1

图1是一种功率和驻波比检测的装置示意图,所述装置具体包括第一模数转换器AD、FPGA模块、数模转换器DA、功率放大器PA、前向耦合器、多工器、反向耦合器、负载、射频滤波器、射频开关和混频链路,所述第一模数转换器AD的输出端与FPGA模块相连接,所述FPGA模块的输出端与模数转换器DA连接,所述模数转换器DA的输出端与功率放大器PA相连接,所述功率放大器PA的输出端接入多工器,所述多工器的输出端与负载相连接;Fig. 1 is a kind of device schematic diagram of power and standing wave ratio detection, and described device specifically comprises first analog-to-digital converter AD, FPGA module, digital-to-analog converter DA, power amplifier PA, forward coupler, multiplexer, Reverse coupler, load, radio frequency filter, radio frequency switch and frequency mixing link, the output end of described first analog-to-digital converter AD is connected with FPGA module, the output end of described FPGA module is connected with analog-to-digital converter DA connected, the output end of the analog-to-digital converter DA is connected to the power amplifier PA, the output end of the power amplifier PA is connected to a multiplexer, and the output end of the multiplexer is connected to the load;

所述射频开关通过射频端口FWDn与前向耦合器相连接,所述前向耦合器以微带耦合的方式与功率放大器PA和多工器之间的射频线进行微带耦合连接,所述射频开关还与射频滤波器的输出端REV相连接;The radio frequency switch is connected to the forward coupler through the radio frequency port FWDn, and the forward coupler is microstrip coupled with the radio frequency line between the power amplifier PA and the multiplexer in a microstrip coupling manner, and the radio frequency The switch is also connected to the output terminal REV of the radio frequency filter;

所述射频滤波器通过射频线与反向耦合器相连接,所述反向耦合器以微带耦合的方式与多工器和负载之间的射频线微带耦合连接;The radio frequency filter is connected to the reverse coupler through the radio frequency line, and the reverse coupler is connected to the radio frequency line microstrip coupling between the multiplexer and the load in a microstrip coupling manner;

所述射频开关的输出端与混频链路相连接;The output terminal of the radio frequency switch is connected to the mixing link;

所述混频链路包括依次相连的混频器、中频滤波器、中小功率放大器、第二模数转换器AD;The frequency mixing link includes a mixer connected in sequence, an intermediate frequency filter, a small and medium power amplifier, and a second analog-to-digital converter AD;

所述第二模数转换器AD的输出端接入FPGA模块。The output terminal of the second analog-to-digital converter AD is connected to the FPGA module.

所述前向耦合器是单向耦合器。The forward coupler is a one-way coupler.

所述反向耦合器是单向耦合器。The reverse coupler is a one-way coupler.

所述功率和驻波比检测的装置的工作原理如下:The working principle of the device for detecting power and standing wave ratio is as follows:

所述第一模数转换器AD中输出的前向功率进入FPGA模块中,在FPGA模块中进行前向功率统计后输出到数模转换器DA将数字信号转换为模拟信号,通过功率放大器PA进行功率放大后,前向功率通过前向耦合器以微带耦合的方式耦合到射频线FWD中,所述耦合的前向功率称为前向反馈功率,前向反馈功率通过射频开关与混频链路相连接,进入FPGA模块进行前向反馈功率统计与计算,这样构成的链路是前向功率检测链路或者是DPD(digital Pre-distortion,数字预失真)反馈链路。The forward power output in the first analog-to-digital converter AD enters the FPGA module, and after the forward power statistics are performed in the FPGA module, it is output to the digital-to-analog converter DA to convert the digital signal into an analog signal, which is carried out by the power amplifier PA. After the power is amplified, the forward power is coupled to the radio frequency line FWD in the form of microstrip coupling through the forward coupler. The coupled forward power is called the forward feedback power, and the forward feedback power passes through the radio frequency switch and the mixing chain The link is connected to the FPGA module for forward feedback power statistics and calculation. The link formed in this way is a forward power detection link or a DPD (digital Pre-distortion, digital pre-distortion) feedback link.

上述从功率放大器PA中的输出前向功率进入多工器,当前向功率进入负载后,有部分功率反射回来,所述反射回来的功率为反向功率,反向功率通过反向耦合器以微带耦合的方式耦合到射频滤波器中,所述耦合的反向功率称为反向反馈功率,反向反馈功率通过射频开关与混频链路相连接,进入FPGA模块进行反向反馈功率统计与计算,这样构成的链路是反向功率检测链路。The above-mentioned output forward power from the power amplifier PA enters the multiplexer. After the forward power enters the load, part of the power is reflected back. The reflected power is the reverse power, and the reverse power passes through the reverse coupler in micro Coupled into the RF filter in a coupling manner, the coupled reverse power is called reverse feedback power, the reverse feedback power is connected to the mixing link through the RF switch, and enters the FPGA module for reverse feedback power statistics and Calculated, the link formed in this way is the reverse power detection link.

采用上述功率和驻波比检测的装置进行功率和驻波比检测,所述检测的方法包括以下步骤,流程如图3和图4所示:Adopt the device of above-mentioned power and standing wave ratio detection to carry out power and standing wave ratio detection, the method for described detection comprises the following steps, flow process as shown in Figure 3 and Figure 4:

(1)通过射频开关选择需要检测的前向功率检测链路的射频线端口FWD,使前向功率检测链路接通,调整功率放大器PA,使输出功率达到所需要的预设功率值Pout′;(1) Select the radio frequency line port FWD of the forward power detection link to be detected through the radio frequency switch, make the forward power detection link connected, adjust the power amplifier PA, and make the output power reach the required preset power value Pout' ;

(2)前向功率的模拟信号通过第一模数转换器AD转化为数字信号进入FPGA模块,并记录进入FPGA模块中的信号功率值,记为P1;(2) The analog signal of the forward power is converted into a digital signal by the first analog-to-digital converter AD and enters the FPGA module, and records the signal power value entered in the FPGA module, which is denoted as P1;

(3)前向功率的数字信号从FPGA模块中输出,经过数模转换器DA进行数字信号和模拟信号转换以及功率放大器PA进行功率放大后,通过前向耦合器以微带耦合的方式将信号输入到混频链路中进行混频、滤波、功率放大以及模数转换处理,最后将处理过的信号提供给FPGA模块进行统计与计算;(3) The digital signal of the forward power is output from the FPGA module, after the digital signal and analog signal are converted by the digital-to-analog converter DA and the power amplifier PA is used for power amplification, the signal is coupled by the forward coupler in the form of microstrip coupling Input to the mixing link for mixing, filtering, power amplification and analog-to-digital conversion processing, and finally provide the processed signal to the FPGA module for statistics and calculation;

(4)在FPGA模块中记录从混频链路进入FPGA模块中的信号功率值,记为P2;(4) record the signal power value entering the FPGA module from the frequency mixing link in the FPGA module, denoted as P2;

(5)在FPGA模块中根据上述步骤统计的所述P1和P2计算定标功率P3和定标增益G1,即完成功率检测的定标,(5) calculate calibration power P3 and calibration gain G1 according to the described P1 and P2 of above-mentioned step statistics in FPGA module, promptly finish the calibration of power detection,

所述定标功率P3的计算公式为:P3=P2+反馈链路温度补偿值,The calculation formula of the calibration power P3 is: P3=P2+feedback link temperature compensation value,

所述定标增益G1的计算公式为:G1=P2+反馈链路温度补偿值-P1,The calculation formula of the calibration gain G1 is: G1=P2+feedback link temperature compensation value-P1,

所述反馈链路温度补偿值为反馈链路中由于温度变化使通路中的信号增益发生变化而补偿的功率值;The temperature compensation value of the feedback link is a power value compensated for by changing the signal gain in the path due to temperature changes in the feedback link;

(6)完成功率检测的定标后,计算最终输出功率值,记为Pout,所述Pout的计算公式为:(6) After completing the calibration of power detection, calculate the final output power value, which is denoted as Pout, and the calculation formula of said Pout is:

Pout=Pout′+P2+反馈链路温度补偿值-P3,所述Pout′和P3为常量;Pout=Pout'+P2+feedback link temperature compensation value-P3, the Pout' and P3 are constants;

(7)完成功率检测的定标和计算后,然后将射频开关拨到射频滤波器的输出端(反向耦合端),使反向功率检测链路接通,前向功率的信号经过第一模数转换器AD、FPGA模块、数模转换器DA、多工器,再经过失配负载,部分信号从负载反射回来,反射回来的反向功率通过反向耦合器以微带耦合的方式耦合到反向通路,经过射频滤波器和射频开关进入混频链路,经过混频、放大、模数转换,最后将反向反馈功率的数字信号提供给FPGA模块进行统计,所述负载的驻波比为VSWR′,即回波损耗为RL′;(7) After completing the calibration and calculation of the power detection, then turn the RF switch to the output terminal (reverse coupling terminal) of the RF filter, so that the reverse power detection link is connected, and the signal of the forward power passes through the first Analog-to-digital converter AD, FPGA module, digital-to-analog converter DA, multiplexer, and then through the mismatched load, part of the signal is reflected from the load, and the reflected reverse power is coupled through the reverse coupler in the form of microstrip coupling To the reverse path, enter the frequency mixing link through the RF filter and the RF switch, after frequency mixing, amplification, analog-to-digital conversion, and finally provide the digital signal of the reverse feedback power to the FPGA module for statistics, the standing wave of the load The ratio is VSWR', that is, the return loss is RL';

(8)在FPGA模块中,统计反向反馈功率统计值、回波损耗增益的统计值、当前回波损耗的统计值以及回波损耗的定标值,分别记为P4、G2、RL1以及RL2,所述G2的计算公式为:(8) In the FPGA module, statistical values of reverse feedback power, statistical value of return loss gain, statistical value of current return loss and calibration value of return loss are recorded as P4, G2, RL1 and RL2 respectively , the calculation formula of G2 is:

G2=P4+反馈链路温度补偿值-P1,G2=P4+feedback link temperature compensation value-P1,

所述RL1的计算公式为:RL1=G2-G1,The calculation formula of the RL1 is: RL1=G2-G1,

所述RL2的计算公式为:RL2=RL1-RL′,即完成回波损耗定标,所述G1和RL2为常量,P4、G2和RL1为变量;The calculation formula of the RL2 is: RL2=RL1-RL', that is, return loss calibration is completed, the G1 and RL2 are constants, and P4, G2 and RL1 are variables;

(9)回波损耗定标完成后,计算实际的回波损耗,记为RL,所述RL的计算公式为:RL=RL1-RL2;(9) After the return loss calibration is completed, calculate the actual return loss, denoted as RL, and the calculation formula of the RL is: RL=RL1-RL2;

(10)得到RL后,计算实际驻波比VSWR,所述VSWR的计算公式为:VSWR=(1+10S1120)/(1-10S1120),公式中的S11=-RL;(10) After obtaining RL, calculate actual standing wave ratio VSWR, the computing formula of described VSWR is: VSWR = ( 1 + 10 S 11 20 ) / ( 1 - 10 S 11 20 ) , S11=-RL in the formula;

(11)得到驻波比VSWR值后,在FPGA模块中检测输出端的匹配状况,当检测得到驻波比超过功率放大器PA的门限值时,FPGA模块能及时给出告警信息,关闭功率放大器PA,通过FPGA模块使输出信号衰减,再打开功率放大器PA,使得功率放大器PA输出小信号,即使功率放大器PA处于全反射状态下也不至于烧坏功率放大器PA;在链路有信号传输的状态下,检查链路,直到驻波比正常,系统继续正常工作。(11) After obtaining the standing wave ratio VSWR value, detect the matching status of the output terminal in the FPGA module. When the detected standing wave ratio exceeds the threshold value of the power amplifier PA, the FPGA module can give an alarm message in time and turn off the power amplifier PA , the output signal is attenuated through the FPGA module, and then the power amplifier PA is turned on, so that the power amplifier PA outputs a small signal, even if the power amplifier PA is in a state of total reflection, it will not burn out the power amplifier PA; when the link has signal transmission , check the link until the VSWR is normal and the system continues to work normally.

实施例2Example 2

图2是对于多种制式的信号进行功率和驻波比检测时的一种功率和驻波比检测的装置示意图,所述装置具体包括第一模数转换器AD、FPGA模块、若干个数模转换器DA、若干个功率放大器PA、若干个前向耦合器、多工器、反向耦合器、负载、射频滤波器、射频开关、混频器、中频滤波器、中小功率放大器以及第二模数转换器AD,所述第一模数转换器AD的输出端与FPGA模块相连接,所述FPGA模块的输出端分别与若干个模数转换器DA连接,每个模数转换器DA的输出端分别与一个功率放大器PA相连接,每个所述的每个功率放大器PA的输出端接入多工器,所述多工器的输出端与负载相连接;Fig. 2 is a schematic diagram of a device for power and standing wave ratio detection when performing power and standing wave ratio detection for signals of various formats, and the device specifically includes a first analog-to-digital converter AD, an FPGA module, several digital Converter DA, several power amplifiers PA, several forward couplers, multiplexers, reverse couplers, loads, radio frequency filters, radio frequency switches, mixers, intermediate frequency filters, small and medium power amplifiers and the second mode Digital converter AD, the output end of described first analog-to-digital converter AD is connected with FPGA module, and the output end of described FPGA module is connected with several analog-to-digital converters DA respectively, the output of each analog-to-digital converter DA terminals are respectively connected to a power amplifier PA, each output end of each power amplifier PA is connected to a multiplexer, and the output end of the multiplexer is connected to a load;

所述射频开关通过射频线FWD1、FWD2、...、FWDn分别与一个前向耦合器相连接,所述每个前向耦合器以微带耦合的方式与每个功率放大器PA和多工器之间的射频线进行微带耦合连接,所述射频开关还与射频滤波器的输出端REV相连接;The radio frequency switch is respectively connected to a forward coupler through radio frequency lines FWD1, FWD2, ..., FWDn, and each forward coupler is connected to each power amplifier PA and multiplexer in a microstrip coupling manner. The radio frequency line between carries out microstrip coupling connection, and described radio frequency switch is also connected with the output terminal REV of radio frequency filter;

所述射频滤波器通过射频线与反向耦合器相连接,所述反向耦合器以微带耦合的方式与多工器和负载之间的射频线微带耦合连接;The radio frequency filter is connected to the reverse coupler through the radio frequency line, and the reverse coupler is connected to the radio frequency line microstrip coupling between the multiplexer and the load in a microstrip coupling manner;

所述射频开关的输出端与混频器相连接;The output terminal of the radio frequency switch is connected with the mixer;

所述混频器、中频滤波器、中小功率放大器、第二模数转换器AD依次连接;The mixer, the intermediate frequency filter, the small and medium power amplifier, and the second analog-to-digital converter AD are connected in sequence;

所述第二模数转换器AD的输出端接入FPGA模块。The output terminal of the second analog-to-digital converter AD is connected to the FPGA module.

本实施例的功率和驻波比检测方法的流程和实施例1相同。The flow of the power and standing wave ratio detection method in this embodiment is the same as that in Embodiment 1.

上述实施例为本发明较佳的实施方式,但本发明的实施方式并不受上述实施例的限制,其他的任何未背离本发明的精神实质与原理下所作的改变、修饰、替代、组合、简化,均应为等效的置换方式,都包含在本发明的保护范围之内。The above-mentioned embodiment is a preferred embodiment of the present invention, but the embodiment of the present invention is not limited by the above-mentioned embodiment, and any other changes, modifications, substitutions, combinations, Simplifications should be equivalent replacement methods, and all are included in the protection scope of the present invention.

Claims (1)

Translated fromChinese
1.一种功率和驻波比检测的方法,其特征在于,所述方法包括以下步骤:1. a method for power and standing wave ratio detection, is characterized in that, described method comprises the following steps:(1)通过射频开关选择需要检测的前向功率链路的射频线端口FWD,接通前向功率检测链路,调整功率放大器PA,使输出功率达到所需要的预设功率值Pout′;(1) Select the RF line port FWD of the forward power link to be detected through the RF switch, connect the forward power detection link, and adjust the power amplifier PA so that the output power reaches the required preset power value Pout′;(2)前向功率的模拟信号通过第一模数转换器AD转化为数字信号进入FPGA模块,并记录进入FPGA模块中的信号功率值,记为P1;(2) The analog signal of the forward power is converted into a digital signal by the first analog-to-digital converter AD and enters the FPGA module, and records the signal power value entering the FPGA module, which is recorded as P1;(3)前向功率的数字信号从FPGA模块中输出,经过数模转换器DA进行数模转换以及功率放大器PA进行功率放大后,通过前向耦合器以微带耦合的方式将信号输入到混频链路中进行混频、滤波、功率放大以及模数转换处理,最后将处理过的信号提供给FPGA模块进行统计与计算;(3) The digital signal of the forward power is output from the FPGA module, after the digital-to-analog conversion by the digital-to-analog converter DA and the power amplification by the power amplifier PA, the signal is input to the hybrid through the forward coupler in the form of microstrip coupling. Mixing, filtering, power amplification, and analog-to-digital conversion are performed in the frequency link, and finally the processed signal is provided to the FPGA module for statistics and calculation;(4)在FPGA模块中记录从混频链路进入FPGA模块中的信号功率值,记为P2;(4) Record the signal power value entering the FPGA module from the frequency mixing link in the FPGA module, denoted as P2;(5)在FPGA模块中根据上述步骤统计的所述P1和P2计算定标功率P3和定标增益G1,即完成功率检测的定标,(5) Calculate the calibration power P3 and calibration gain G1 in the FPGA module according to the statistics of P1 and P2 in the above steps, that is, complete the calibration of power detection,所述定标功率P3的计算公式为:P3=P2+反馈链路温度补偿值,The calculation formula of the calibration power P3 is: P3=P2+feedback link temperature compensation value,所述定标增益G1的计算公式为:G1=P2+反馈链路温度补偿值﹣P1,The calculation formula of the calibration gain G1 is: G1=P2+feedback link temperature compensation value-P1,所述反馈链路温度补偿值为反馈链路中由于温度变化使通路中的信号增益发生变化而补偿的功率值;The temperature compensation value of the feedback link is a power value compensated for by changing the signal gain in the path due to temperature changes in the feedback link;(6)完成功率检测的定标后,计算最终输出功率值,记为Pout,所述Pout的计算公式为:(6) After the calibration of the power detection is completed, the final output power value is calculated and recorded as Pout. The calculation formula of Pout is:Pout=Pout′+P2+反馈链路温度补偿值﹣P3,所述Pout′和P3为常量;Pout=Pout'+P2+feedback link temperature compensation value-P3, the Pout' and P3 are constants;(7)完成功率检测的定标和计算后,然后接通反向功率检测链路,前向功率的信号经过第一模数转换器AD、FPGA模块、数模转换器DA、多工器,再经过失配负载,部分信号从负载反射回来,反射回来的反向功率通过反向耦合器以微带耦合的方式与射频滤波器耦合,通过射频开关进入混频链路经过混频、放大、模数转换,最后将反向反馈功率的数字信号提供给FPGA模块进行统计,所述负载的驻波比为VSWR′,即回波损耗为RL′;(7) After the calibration and calculation of the power detection are completed, the reverse power detection link is connected, and the forward power signal passes through the first analog-to-digital converter AD, FPGA module, digital-to-analog converter DA, and multiplexer. After passing through the mismatched load, part of the signal is reflected back from the load, and the reflected reverse power is coupled with the RF filter through the reverse coupler in a microstrip coupling manner, and enters the mixing link through the RF switch through mixing, amplification, Analog-to-digital conversion, finally the digital signal of the reverse feedback power is provided to the FPGA module for statistics, the standing wave ratio of the load is VSWR', that is, the return loss is RL';(8)在FPGA模块中,统计反向反馈功率统计值、回波损耗增益的统计值、当前回波损耗的统计值以及回波损耗的定标值,分别记为P4、G2、RL1以及RL2,所述G2的计算公式为:(8) In the FPGA module, count the statistical value of the reverse feedback power, the statistical value of the return loss gain, the statistical value of the current return loss and the calibration value of the return loss, which are recorded as P4, G2, RL1 and RL2 respectively , the calculation formula of G2 is:G2=P4+反馈链路温度补偿值﹣P1,G2=P4+feedback link temperature compensation value﹣P1,所述RL1的计算公式为:RL1=G2﹣G1,The calculation formula of the RL1 is: RL1=G2-G1,所述RL2的计算公式为:RL2=RL1﹣RL′,即完成回波损耗定标,所述G1和RL2为常量,P4、G2和RL1为变量;The calculation formula of the RL2 is: RL2=RL1-RL', that is, return loss calibration is completed, the G1 and RL2 are constants, and P4, G2 and RL1 are variables;(9)回波损耗定标完成后,计算实际的回波损耗,记为RL,所述RL的计算公式为:RL=RL1﹣RL2;(9) After the return loss calibration is completed, calculate the actual return loss and denote it as RL. The formula for calculating RL is: RL=RL1-RL2;(10)得到RL后,计算实际驻波比VSWR,所述VSWR的计算公式为:VSWR=(1+10S1120)/(1-10S1120),其中公式中的S11=-RL;(10) After obtaining RL, calculate the actual standing wave ratio VSWR, the calculation formula of the VSWR is: VSWR = ( 1 + 10 S 11 20 ) / ( 1 - 10 S 11 20 ) , Among them, S11=-RL in the formula;(11)得到驻波比VSWR值后,在FPGA模块中检测输出端的匹配状况。(11) After obtaining the standing wave ratio VSWR value, detect the matching condition of the output terminal in the FPGA module.
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