


技术领域technical field
本发明涉及光电器件领域,具体涉及一种具有p-GaN层表面粗化的GaN基LED芯片的制作方法。The invention relates to the field of optoelectronic devices, in particular to a method for manufacturing a GaN-based LED chip with roughened p-GaN layer surfaces.
背景技术Background technique
发光二极管(Light Emitting Diode,简称LED)是一种低压直流驱动的电致发光固态光源,它具有色纯度高,响应速度快,体积小,可靠性好,寿命长,环保等优点。LED光源的这些优点,将引发照明产业技术和应用的革命,如同半导体晶体管替代电子管一样,在若干年后,用LED作为新光源的固态照明灯,将有机会逐渐取代传统的照明灯而进入寻常百姓家。Light Emitting Diode (LED for short) is a low-voltage DC-driven electroluminescent solid-state light source. It has the advantages of high color purity, fast response, small size, good reliability, long life, and environmental protection. These advantages of LED light sources will trigger a revolution in lighting industry technology and applications. Just as semiconductor transistors replace electronic tubes, in a few years, solid-state lighting using LEDs as new light sources will have the opportunity to gradually replace traditional lighting and enter the ordinary world. Common people's home.
目前,一般采用蓝宝石衬底的外延片来制备高效率的GaN基LED。如何提高GaN基LED的发光效率是一直以来的研究重点。随着外延生长技术和多量子阱结构的发展,超高亮度发光二级管的内量子效率已有了非常大的提高,目前蓝光GaN基的LED内量子效率可达70%以上,但大功率LED芯片的外量子效率通常只有40%左右,大功率LED芯片的光提取效率较低影响了外量子效率的提高,影响了最终出光效率的提高。这是因为GaN材料的折射率(n=2.5)与空气(n=1)和蓝宝石衬底(n=1.75)相差较大,导致空气与GaN界面以及蓝宝石与GaN界面发生全反射的临界角分别只有23.6°和44.4°,有源区产生的光只有少数逃逸到材料体外。这就要求从芯片结构方面进行设计,减少全反射,增大逃逸光锥的临界角,提高大功率芯片的光提取效率。目前国内外采用的主要技术方案有:生长分布布喇格反射层(DBR)结构、表面粗化技术和光子晶体技术等。表面粗化技术制作工艺较DBR和光子晶体简单、成本低,是目前被普遍看好的技术。表面粗化分为湿法粗化和干法粗化两种。湿法粗化是利用强酸或强碱腐蚀GaN材料表面,形成自然的粗糙效果,如专利CN101248537和CN101409321。但是,湿法粗化存在各向同性、容易钻蚀和过蚀等缺点,粗化的尺寸和深度受到限制,对于光的有效提取作用不明显。干法粗化是通过掩膜掩蔽,采用ICP刻蚀GaN材料表面达到粗糙化的效果。干法粗化具有各项异性刻蚀、刻蚀速率快等优点。如何制作纳米量级的掩膜是干法粗化工艺的难点。专利CN101702419采用旋涂法涂覆Ni纳米颗粒作为干法刻蚀的掩膜,专利CN101656284采用ITO颗粒作为干法刻蚀的掩膜,这些方法都存在无法准确控制掩膜尺寸和均匀性的缺点,导致2英寸GaN片表面粗化的效果不一致,光提取效率的提高不均匀。而且掩膜的去除需要使用强酸类,强酸会使GaN材料表面氧化,导致器件正向电压升高。At present, high-efficiency GaN-based LEDs are generally prepared using epitaxial wafers on sapphire substrates. How to improve the luminous efficiency of GaN-based LEDs has always been the focus of research. With the development of epitaxial growth technology and multi-quantum well structure, the internal quantum efficiency of ultra-high brightness light-emitting diodes has been greatly improved. At present, the internal quantum efficiency of blue GaN-based LEDs can reach more than 70%, but high-power The external quantum efficiency of LED chips is usually only about 40%. The low light extraction efficiency of high-power LED chips affects the improvement of external quantum efficiency and the final light extraction efficiency. This is because the refractive index of GaN material (n=2.5) is quite different from that of air (n=1) and sapphire substrate (n=1.75), resulting in the critical angles of total reflection at the interface between air and GaN and the interface between sapphire and GaN, respectively. Only at 23.6° and 44.4°, only a small amount of light generated in the active region escapes outside the material. This requires designing the chip structure to reduce total reflection, increase the critical angle of the escaping light cone, and improve the light extraction efficiency of high-power chips. At present, the main technical solutions adopted at home and abroad include: growth distributed Bragg reflector (DBR) structure, surface roughening technology and photonic crystal technology. Compared with DBR and photonic crystal, the production process of surface roughening technology is simpler and lower in cost, and it is currently generally favored technology. Surface roughening is divided into wet roughening and dry roughening. Wet roughening is to use strong acid or strong alkali to corrode the surface of GaN material to form a natural rough effect, such as patents CN101248537 and CN101409321. However, wet roughening has disadvantages such as isotropy, easy undercutting and over-etching, etc., the size and depth of roughening are limited, and the effective extraction of light is not obvious. The dry roughening is masked by a mask, and the surface of the GaN material is etched by ICP to achieve the roughening effect. Dry roughening has the advantages of anisotropic etching and fast etching rate. How to make a nanoscale mask is a difficult point in the dry roughening process. Patent CN101702419 uses spin coating to coat Ni nanoparticles as a mask for dry etching, and patent CN101656284 uses ITO particles as a mask for dry etching. These methods have the disadvantage of being unable to accurately control the size and uniformity of the mask. As a result, the effect of roughening the surface of the 2-inch GaN sheet is inconsistent, and the improvement of light extraction efficiency is not uniform. Moreover, the removal of the mask requires the use of strong acids, which will oxidize the surface of the GaN material, resulting in an increase in the forward voltage of the device.
发明内容Contents of the invention
针对现有干法粗化P-GaN材料掩膜存在的缺陷和不足,本发明提供了一种具有p-GaN层表面粗化的GaN基LED芯片的制作方法,该方法具有工艺简单,成本低,粗化效果好,光提取效率高。经表面粗化后的GaN-LED比常规GaN-LED的光功率提高70%以上。Aiming at the defects and deficiencies existing in the existing dry roughened P-GaN material mask, the present invention provides a method for manufacturing a GaN-based LED chip with roughened p-GaN layer surface. The method has the advantages of simple process and low cost. , the coarsening effect is good, and the light extraction efficiency is high. The optical power of the roughened GaN-LED is more than 70% higher than that of the conventional GaN-LED.
本发明提供一种具有p-GaN层表面粗化的GaN基LED芯片的制作方法,包括如下步骤:The invention provides a method for manufacturing a GaN-based LED chip with a roughened p-GaN layer surface, comprising the following steps:
步骤1:采用金属有机化学气相沉积的方法,在半导体衬底上依次生长低温GaN缓冲层、不掺杂GaN层、N-GaN层、多量子阱层和P-GaN层,形成GaN外延片;Step 1: Using metal-organic chemical vapor deposition to sequentially grow a low-temperature GaN buffer layer, an undoped GaN layer, an N-GaN layer, a multi-quantum well layer, and a P-GaN layer on a semiconductor substrate to form a GaN epitaxial wafer;
步骤2:将GaN外延片放入蒸发台,在P-GaN层的表面蒸镀CsCl或氯化物;Step 2: Put the GaN epitaxial wafer into the evaporation table, and evaporate CsCl or chloride on the surface of the P-GaN layer;
步骤3:蒸镀结束后,向蒸发台腔室中充入水汽,控制相对湿度使P-GaN层表面的CsCl或氯化物吸收水分逐渐长大形成CsCl或氯化物的纳米岛;Step 3: After the evaporation is completed, fill the chamber of the evaporation table with water vapor, and control the relative humidity so that the CsCl or chloride on the surface of the P-GaN layer absorbs water and gradually grows to form nano-islands of CsCl or chloride;
步骤4:将CsCl或氯化物纳米岛作为刻蚀掩膜,对GaN外延片进行刻蚀,形成表面粗化的GaN外延片;Step 4: Using CsCl or chloride nano-islands as an etching mask, etching the GaN epitaxial wafer to form a roughened GaN epitaxial wafer;
步骤5:再将GaN外延片的一侧进行刻蚀,形成台面;Step 5: Etching one side of the GaN epitaxial wafer to form a mesa;
步骤6:在GaN外延片的上表面蒸镀一层ITO薄膜;Step 6: Evaporating a layer of ITO film on the upper surface of the GaN epitaxial wafer;
步骤7:在GaN外延片的上表面制作P电极,在台面上制作N电极,完成器件制备。Step 7: Fabricate P electrodes on the upper surface of the GaN epitaxial wafer, fabricate N electrodes on the mesa, and complete device preparation.
其中所述半导体衬底1为蓝宝石、硅、碳化硅或金属。Wherein the
其中纳米岛的直径为100-20000纳米。Wherein the diameter of the nano-island is 100-20000 nanometers.
其中对GaN外延片进行刻蚀时使用Cl2/BCl3/Ar2作为刻蚀气体,BCl3流量为3-20sccm,Ar2流量为3-25sccm,Cl2流量为30-100sccm;刻蚀功率为300-700W;射频功率为50-200W;刻蚀时间为10s-10min。Among them, when etching GaN epitaxial wafers, Cl2 /BCl3 /Ar2 is used as the etching gas, the flow rate of BCl3 is 3-20 sccm, the flow rate of Ar2 is 3-25 sccm, and the flow rate of Cl2 is 30-100 sccm; the etching power 300-700W; RF power 50-200W; etching time 10s-10min.
其中表面粗化的GaN外延片的粗糙度为5nm-50nm。The roughness of the surface-roughened GaN epitaxial wafer is 5nm-50nm.
其中台面的刻蚀深度到达N-GaN层内。The etching depth of the mesa reaches into the N-GaN layer.
其中对P-GaN层进行表面粗化时,所刻蚀的深度小于厚度的1/2。Wherein, when the surface of the P-GaN layer is roughened, the etched depth is less than 1/2 of the thickness.
附图说明Description of drawings
为进一步说明本发明的技术内容,以下结合附图对本发明作进一步说明,其中:In order to further illustrate the technical content of the present invention, the present invention will be further described below in conjunction with accompanying drawing, wherein:
图1是常规GaN基LED的结构示意图。FIG. 1 is a schematic diagram of the structure of a conventional GaN-based LED.
图2是本发明通过P-GaN层表面粗化提高出光效率的GaN基LED的结构示意图。FIG. 2 is a schematic structural diagram of a GaN-based LED that improves light extraction efficiency by roughening the surface of the P-GaN layer in the present invention.
图3是本发明与现有技术的GaN基LED电流电压关系对比曲线图。Fig. 3 is a comparative graph of the current-voltage relationship between the GaN-based LED of the present invention and the prior art.
图4是本发明与现有技术的GaN基LED电流功率关系对比曲线图。Fig. 4 is a comparative graph of the current-power relationship between the GaN-based LEDs of the present invention and the prior art.
具体实施方式Detailed ways
请参阅图2所示,本发明提供一种具有p-GaN层表面粗化的GaN基LED芯片的制作方法,包括如下步骤:Please refer to Fig. 2, the present invention provides a method for making a GaN-based LED chip with a roughened p-GaN layer surface, comprising the following steps:
步骤1:采用金属有机化学气相沉积(MOCVD)的方法,在半导体衬底1上依次生长1μm低温GaN缓冲层2、1μm不掺杂GaN层3、3μmN-GaN层4、150nm多量子阱发光层5和300nmP-GaN层6,形成GaN外延片,其中所述半导体衬底1为蓝宝石、硅、碳化硅或金属;Step 1: Using metal-organic chemical vapor deposition (MOCVD), sequentially grow a 1 μm low-temperature
步骤2:将GaN外延片放入蒸发台,在P-GaN层6的表面蒸镀刻蚀用掩膜CsCl或氯化物,该氯化物是LiCl、KCl、NaCl、AgCl、TiCl等;Step 2: Put the GaN epitaxial wafer into the evaporation table, and vapor-deposit an etching mask CsCl or chloride on the surface of the P-
步骤3:蒸镀结束后,向蒸发台腔室中充入水汽,控制相对湿度使P-GaN层6表面的CsCl或氯化物吸收水分逐渐长大形成CsCl或氯化物的纳米岛,该纳米岛的直径为100-20000纳米,占空比1∶1;Step 3: After the evaporation is completed, fill the chamber of the evaporation table with water vapor, and control the relative humidity so that the CsCl or chloride on the surface of the P-
步骤4:将CsCl或氯化物纳米岛作为刻蚀掩膜,对GaN外延片进行ICP(感应耦合等离子体)刻蚀,使用Cl2、BCl3、Ar2作为刻蚀气体,其中Cl2流量为30-100sccm,BCl3流量为3-20sccm,Ar2流量为3-25sccm;刻蚀功率为300-700W;射频功率为50-200W;刻蚀时间为10s-10min。刻蚀结束后将GaN外延片上的CsCl或氯化物掩膜用去离子水去除干净,P-GaN表面粗糙度为5nm-50nm,由此形成表面粗化的GaN外延片,目的是为了增大出射光面积,增加光的出射几率,减少全反射的发生。对P-GaN层进行表面粗化时,所刻蚀的深度小于厚度的1/2;Step 4: Using CsCl or chloride nano-islands as an etching mask, perform ICP (inductively coupled plasma) etching on GaN epitaxial wafers, using Cl2 , BCl3 , Ar2 as etching gases, where the Cl2 flow rate is 30-100sccm, BCl3 flow rate is 3-20sccm, Ar2 flow rate is 3-25sccm; etching power is 300-700W; RF power is 50-200W; etching time is 10s-10min. After etching, remove the CsCl or chloride mask on the GaN epitaxial wafer with deionized water. The surface roughness of P-GaN is 5nm-50nm, thus forming a GaN epitaxial wafer with a roughened surface. The light emitting area increases the probability of light emission and reduces the occurrence of total reflection. When roughening the surface of the P-GaN layer, the etched depth is less than 1/2 of the thickness;
步骤5:再将GaN外延片进行光刻图形制备,选用AZ4620光刻胶作为掩膜,对GaN外延片的一侧进行ICP刻蚀,去除一侧的P-GaN、量子阱以及部分N-GaN,形成台面41,该台面41的刻蚀深度700nm-1500nm;Step 5: Prepare the GaN epitaxial wafer by photolithography patterning, select AZ4620 photoresist as a mask, and perform ICP etching on one side of the GaN epitaxial wafer to remove P-GaN, quantum wells and part of N-GaN on one side , forming a
步骤6:在GaN外延片的上表面使用电子束蒸发的方法蒸镀ITO薄膜7,厚度选用AZ6130光刻胶和小王水(3HCl:HNO3)光刻腐蚀出ITO图形,去除P-GaN 6上的部分ITO薄膜和台面41上的ITO薄膜,在P型台面上形成ITO透明电极。ITO透明电极与P-GaN可以形成良好的欧姆接触,可以降低接触电压,从而降低器件的工作电压;Step 6: Evaporate an
步骤7:在P-GaN层6、ITO层7和N-GaN层41上选用负型光刻胶L-300光刻P、N电极,采用电子束蒸发法蒸镀金属CrPtAu(100/500/),剥离后形成P电极8和N电极9。P、N电极金属的厚度较厚,便于封装芯片时打线测试;Step 7: On the P-
步骤8:将片子的蓝宝石衬底减薄至150um,划裂成单独芯片,进行器件的I-V特性测试和P-I特性测试。Step 8: Thin the sapphire substrate of the chip to 150um, split it into individual chips, and conduct the I-V characteristic test and P-I characteristic test of the device.
图3给出了本发明与现有技术的GaN基LED电流电压关系对比曲线图。图4出了本发明与现有技术的GaN基LED电流功率关系对比曲线图。Fig. 3 shows a comparative graph of the current-voltage relationship between the GaN-based LEDs of the present invention and the prior art. Fig. 4 is a comparative graph of the current-power relationship between the GaN-based LEDs of the present invention and the prior art.
以上所述的具体实施例,对本发明的目的、技术方案和有益效果进行了进一步详细说明,所应理解的是,以上所述仅为本发明的具体实施例而已,并不用于限制本发明,凡在本发明的精神和原则之内,所做的任何修改、等同替换、改进等,均应包含在本发明的权利要求范围之内。The specific embodiments described above have further described the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above descriptions are only specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the scope of the claims of the present invention.
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| CN2011100643002ACN102157640B (en) | 2011-03-17 | 2011-03-17 | Method for manufacturing gallium nitride (GaN)-based light-emitting diode (LED) chip with p-GaN layer subjected to surface roughening | 
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| CN2011100643002ACN102157640B (en) | 2011-03-17 | 2011-03-17 | Method for manufacturing gallium nitride (GaN)-based light-emitting diode (LED) chip with p-GaN layer subjected to surface roughening | 
| Publication Number | Publication Date | 
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| CN102157640A CN102157640A (en) | 2011-08-17 | 
| CN102157640Btrue CN102157640B (en) | 2012-11-21 | 
| Application Number | Title | Priority Date | Filing Date | 
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| CN2011100643002AExpired - Fee RelatedCN102157640B (en) | 2011-03-17 | 2011-03-17 | Method for manufacturing gallium nitride (GaN)-based light-emitting diode (LED) chip with p-GaN layer subjected to surface roughening | 
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| CN101226977A (en)* | 2007-12-18 | 2008-07-23 | 西安电子科技大学 | Treatment method for surface roughening of GaN-based light-emitting diodes | 
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| CN101702419A (en)* | 2009-10-30 | 2010-05-05 | 华南师范大学 | Surface roughening method of p-GaN layer or ITO layer in a GaN-based LED chip structure | 
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| CN102157640A (en) | 2011-08-17 | 
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| CF01 | Termination of patent right due to non-payment of annual fee | Granted publication date:20121121 |