CN102141969B - Data transmission method and system in serial circuit - Google Patents
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- CN102141969B CN102141969BCN 201110049632CN201110049632ACN102141969BCN 102141969 BCN102141969 BCN 102141969BCN 201110049632CN201110049632CN 201110049632CN 201110049632 ACN201110049632 ACN 201110049632ACN 102141969 BCN102141969 BCN 102141969B
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Abstract
Translated fromChineseDescription
Translated fromChinese技术领域technical field
本发明涉及集成电路，尤其涉及串行电路中的一种数据传输方法及系统。The invention relates to integrated circuits, in particular to a data transmission method and system in serial circuits.
背景技术Background technique
随着集成电路技术的飞速发展，为了更好地满足用户的需求，串行电路的数据传送量要求越来越大，速度要求也越来越高。高速大数据的串行电路一方面满足了对速度和数据量的需求，适应了电路应用的发展，但是另一方面也降低了电路的稳定性，增加了电路布局布线的难度。With the rapid development of integrated circuit technology, in order to better meet the needs of users, the data transmission volume of serial circuits is required to be larger and higher, and the speed requirements are also higher and higher. On the one hand, the high-speed big data serial circuit meets the demand for speed and data volume, and adapts to the development of circuit applications, but on the other hand, it also reduces the stability of the circuit and increases the difficulty of circuit layout and wiring.
串行电路上传输的数据量的增加，一般而言也就增加了电路的线路数量，增加了电路的版图设计难度，同时也对时钟信号的稳定性和电路的可控制性提出了更高的要求。The increase in the amount of data transmitted on the serial circuit generally increases the number of circuit lines, increases the difficulty of circuit layout design, and also puts higher demands on the stability of the clock signal and the controllability of the circuit. Require.
随着需求的多样化发展以及串行电路应用的日益广泛，串行电路上数据传输的控制难度也日益增大，业内开始出现了难以对串行电路上数据传输进行有效控制的现象，需要对此加以研究并着手解决。With the diversification of demand and the increasingly wide application of serial circuits, the difficulty of controlling data transmission on serial circuits is also increasing. The industry has begun to find it difficult to effectively control data transmission on serial circuits. Research this and work on it.
发明内容Contents of the invention
本发明所要解决的技术问题是需要提供串行电路中的数据传输技术，克服现有串行电路上难以对数据传输进行有效控制的不足。The technical problem to be solved by the present invention is to provide the data transmission technology in the serial circuit, so as to overcome the deficiency that it is difficult to effectively control the data transmission in the existing serial circuit.
为了解决上述技术问题，本发明提供了一种串行电路中的数据传输方法，包括如下步骤：In order to solve the above technical problems, the invention provides a data transmission method in a serial circuit, comprising the steps of:
第一设备与第二设备之间通过在时钟通道中发送时钟信号进行时钟握手；performing a clock handshake between the first device and the second device by sending a clock signal in a clock channel;
若该时钟握手成功，则该第一设备与该第二设备之间通过数据通道进行数据传输；If the clock handshake is successful, data transmission is performed between the first device and the second device through a data channel;
若该时钟握手未成功和/或该数据传输过程中的数据校验不合格，则通过在该时钟通道中发送复位信号再次进行时钟握手。If the clock handshake is not successful and/or the data verification in the data transmission process fails, the clock handshake is performed again by sending a reset signal in the clock channel.
优选地，该第一设备与第二设备之间通过在该时钟通道中发送该时钟信号进行该时钟握手的步骤，包括：Preferably, the step of performing the clock handshake between the first device and the second device by sending the clock signal in the clock channel includes:
该第一设备向该第二设备发送第一时钟信号，该第二设备向该第一设备发送第二时钟信号；The first device sends a first clock signal to the second device, and the second device sends a second clock signal to the first device;
该第二设备对该第一时钟信号进行有效性检测，该第一设备对该第二时钟信号进行有效性检测。The second device performs validity detection on the first clock signal, and the first device performs validity detection on the second clock signal.
优选地，该第一设备与第二设备之间通过该数据通道进行该数据传输的步骤，包括：Preferably, the step of performing the data transmission between the first device and the second device through the data channel includes:
该第一设备向该第二设备发送第一数据信号，该第二设备对该第一数据信号进行所述数据校验；和/或The first device sends a first data signal to the second device, and the second device performs the data check on the first data signal; and/or
该第二设备向该第一设备发送第二数据信号，该第一设备对该第二数据信号进行所述数据校验。The second device sends a second data signal to the first device, and the first device performs the data check on the second data signal.
优选地，该数据传输过程中的数据校验不合格，则通过在该时钟通道中发送该复位信号再次进行该时钟握手的步骤，包括：Preferably, if the data verification in the data transmission process fails, the step of performing the clock handshake again by sending the reset signal in the clock channel includes:
该数据传输过程中所有数据通道的数据校验均不合格，则通过在该时钟通道中发送该复位信号再次进行该时钟握手；During the data transmission process, the data verification of all data channels is unqualified, and the clock handshake is performed again by sending the reset signal in the clock channel;
其中，该第一设备与该第二设备之间通过冗余的数据通道进行该数据传输。Wherein, the data transmission is performed between the first device and the second device through a redundant data channel.
为了解决上述技术问题，本发明还提供了一种串行电路中的数据传输系统，包括第一设备与第二设备，其中：In order to solve the above technical problems, the present invention also provides a data transmission system in a serial circuit, including a first device and a second device, wherein:
该第一设备与该第二设备，用于通过在时钟通道中发送时钟信号进行时钟握手，并用于在该时钟握手成功后通过数据通道进行数据传输；The first device and the second device are configured to perform a clock handshake by sending a clock signal in a clock channel, and to perform data transmission through a data channel after the clock handshake is successful;
其中，若该时钟握手未成功和/或该数据传输过程中的数据校验不合格，则该第一设备及该第二设备用于通过在该时钟通道中发送复位信号再次进行时钟握手。Wherein, if the clock handshake is unsuccessful and/or the data verification in the data transmission process fails, the first device and the second device are used to perform clock handshake again by sending a reset signal in the clock channel.
优选地，该第一设备包括：Preferably, the first device comprises:
发送端，用于向该第二设备发送第一时钟信号；a sending end, configured to send a first clock signal to the second device;
接收端，用于接收第二时钟信号；a receiving end, configured to receive a second clock signal;
检测电路，用于对该第二时钟信号进行有效性检测；a detection circuit, configured to detect the validity of the second clock signal;
该第二设备包括：The second device includes:
发送端，用于向该第一设备发送该第二时钟信号；a sending end, configured to send the second clock signal to the first device;
接收端，用于接收该第一时钟信号；a receiving end, configured to receive the first clock signal;
检测电路，用于对该第一时钟信号进行有效性检测。The detection circuit is used to detect the validity of the first clock signal.
优选地，该第一设备进一步包括：Preferably, the first device further comprises:
校验电路，用于对第二数据信号进行所述数据校验；a verification circuit, configured to perform the data verification on the second data signal;
该第二设备进一步包括：The second device further includes:
校验电路，用于对第一数据信号进行所述数据校验；a verification circuit, configured to perform the data verification on the first data signal;
其中，in,
该第一设备中的发送端用于向该第二设备发送该第一数据信号，该第一设备中的接收端用于接收该第二数据信号；The sending end in the first device is used to send the first data signal to the second device, and the receiving end in the first device is used to receive the second data signal;
该第二设备中的发送端用于向该第一设备发送该第二数据信号，该第二设备中的接收端用于接收该第一数据信号。The sending end in the second device is used to send the second data signal to the first device, and the receiving end in the second device is used to receive the first data signal.
优选地，该第一设备及该第二设备用于在该数据传输过程中所有数据通道的数据校验均不合格时，通过在该时钟通道中发送该复位信号再次进行该时钟握手；Preferably, the first device and the second device are used to perform the clock handshake again by sending the reset signal in the clock channel when the data verification of all data channels fails during the data transmission process;
其中，该第一设备与该第二设备之间通过冗余的数据通道进行该数据传输。Wherein, the data transmission is performed between the first device and the second device through a redundant data channel.
与现有技术相比，本发明的技术方案，通过对时钟信号和复位信号进行复用，保证了数据传输只能在时钟握手成功后进行，克服了现有串行电路上难以对数据传输进行有效控制的不足。Compared with the prior art, the technical solution of the present invention, by multiplexing the clock signal and the reset signal, ensures that the data transmission can only be carried out after the clock handshake is successful, and overcomes the difficulty in data transmission on the existing serial circuit. Lack of effective control.
本发明的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
附图说明Description of drawings
附图用来提供对本发明技术方案的进一步理解，并且构成说明书的一部分，与本发明的实施例一起用于解释本发明的技术方案，并不构成对本发明技术方案的限制。在附图中：The accompanying drawings are used to provide a further understanding of the technical solution of the present invention, and constitute a part of the description, and are used together with the embodiments of the present invention to explain the technical solution of the present invention, and do not constitute a limitation to the technical solution of the present invention. In the attached picture:
图1是本发明实施例一串行电路中的数据传输方法的流程示意图。FIG. 1 is a schematic flowchart of a data transmission method in a serial circuit according to an embodiment of the present invention.
具体实施方式Detailed ways
以下将结合附图及实施例来详细说明本发明的实施方式，借此对本发明如何应用技术手段来解决技术问题，并达成技术效果的实现过程能充分理解并据以实施。The implementation of the present invention will be described in detail below in conjunction with the accompanying drawings and examples, so as to fully understand and implement the process of how to apply technical means to solve technical problems and achieve technical effects in the present invention.
首先，如果不冲突，本发明实施例以及实施例中的各个特征的相互结合，均在本发明的保护范围之内。另外，在附图的流程图示出的步骤可以在诸如一组计算机可执行指令的计算机系统中执行，并且，虽然在流程图中示出了逻辑顺序，但是在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤。First of all, if there is no conflict, the embodiment of the present invention and the combination of various features in the embodiment are within the protection scope of the present invention. In addition, the steps shown in the flow diagrams of the figures may be performed in a computer system, such as a set of computer-executable instructions, and, although a logical order is shown in the flow diagrams, in some cases, the sequence may be different. The steps shown or described are performed in the order herein.
实施例一、串行电路中的数据传输方法Embodiment 1. Data transmission method in serial circuit
图1为本实施例的流程示意图。Fig. 1 is a schematic flow chart of this embodiment.
如图1所示，本实施例主要包括如下步骤：As shown in Figure 1, this embodiment mainly includes the following steps:
步骤S110，第一设备A的发送端（TX）向第二设备B的接收端（RX）发送第一时钟信号，转步骤S120；Step S110, the transmitting end (TX) of the first device A sends the first clock signal to the receiving end (RX) of the second device B, then go to step S120;
步骤S115，第二设备B的发送端（TX）向第一设备A的接收端（RX）发送第二时钟信号，转步骤S125；Step S115, the transmitting end (TX) of the second device B sends a second clock signal to the receiving end (RX) of the first device A, and then go to step S125;
步骤S120，第二设备B接收到该第一时钟信号后，采用内部的检测电路（detect）对该第一时钟信号进行有效性检测；Step S120, after receiving the first clock signal, the second device B uses an internal detection circuit (detect) to detect the validity of the first clock signal;
步骤S125，第一设备A接收到该第二时钟信号后，也采用内部的检测电路（detect）对该第二时钟信号进行有效性检测；Step S125, after the first device A receives the second clock signal, it also uses an internal detection circuit (detect) to detect the validity of the second clock signal;
步骤S130，步骤S120中该第二设备B对该第一时钟信号的有效性检测获得通过，并且步骤S125中该第一设备A对该第二时钟信号的有效性检测也获得通过，则第一设备A和第二设备B的时钟握手成功，转步骤S140；否则，时钟握手未成功（步骤S120中该第二设备B对该第一时钟信号的有效性检测未获通过，或者步骤S125中该第一设备A对该第二时钟信号的有效性检测未获通过，或者步骤S120中该第二设备B对该第一时钟信号的有效性检测未获通过并且步骤S125中该第一设备A对该第二时钟信号的有效性检测也未获通过），转步骤S150；In step S130, in step S120, the second device B passes the validity detection of the first clock signal, and in step S125, the first device A also passes the validity detection of the second clock signal, then the first The clock handshake between device A and the second device B is successful, go to step S140; otherwise, the clock handshake is unsuccessful (in step S120, the second device B failed to pass the validity check of the first clock signal, or in step S125 the The validity detection of the second clock signal by the first device A fails, or the validity detection of the first clock signal by the second device B in step S120 fails and the first device A does not pass the validity detection of the first clock signal in step S125 The validity test of the second clock signal is also not passed), go to step S150;
步骤S140，第一设备A与第二设备B之间通过数据通道进行数据传输（包括第一设备A向第二设备B发送第一数据信号，和/或第二设备B向第一设备A发送第二数据信号）；其中，在某一确定的瞬间，第一设备A与第二设备B中其一为数据传输的发送方，另一为数据传输的接收方（适用于第一设备A与第二设备B之间单向的数据传输和双向传输等各种情形），而且在第一设备A及第二设备B内部，数据信号发送给对方是通过各自的发送端实现的，接收对方发送的数据信号是通过各自的接收端实现的；转步骤S160；Step S140, data transmission between the first device A and the second device B through the data channel (including the first device A sending the first data signal to the second device B, and/or the second device B sending the first data signal to the first device A second data signal); wherein, at a certain moment, one of the first device A and the second device B is the sender of the data transmission, and the other is the receiver of the data transmission (applicable to the first device A and the second device B One-way data transmission and two-way transmission between the second device B, etc.), and inside the first device A and the second device B, the data signal is sent to the other party through the respective sending end, and the receiving party sends The data signals are realized through their respective receiving ends; go to step S160;
步骤S150，有效性检测未获得通过的一方（该第一设备A对该第二时钟信号的有效性检测未获通过则为该第一设备A，该第二设备B对该第一时钟信号的有效性检测未获通过则为该第二设备B）将内部的复位信号（时钟复位信号）置为“1”，以此来表示对时钟信号的检测未通过，然后通过时钟通道将该复位信号发送给对方（比如，将内部的复位信号置“1”的状态通过时钟信号传递给对方），返回步骤S110和/或步骤S115继续执行（该第一设备A对该第二时钟信号的有效性检测未获通过则返回步骤S115，该第二设备B对该第一时钟信号的有效性检测未获通过则返回步骤S110，该第二设备B对该第一时钟信号的有效性检测未获通过并且该第一设备A对该第二时钟信号的有效性检测也未获通过，则同时返回步骤S110及步骤S115继续执行）；Step S150, the party whose validity test fails (the first device A fails to pass the validity test of the second clock signal, the first device A, the second device B's test of the first clock signal If the validity detection fails, the second device B) sets the internal reset signal (clock reset signal) to "1" to indicate that the detection of the clock signal has not passed, and then the reset signal is passed through the clock channel Send it to the other party (for example, the state of setting the internal reset signal to "1" is transmitted to the other party through the clock signal), return to step S110 and/or step S115 to continue execution (the validity of the first device A to the second clock signal If the detection fails, return to step S115, and if the second device B fails to pass the validity detection of the first clock signal, then return to step S110, and the second device B fails to pass the validity detection of the first clock signal And the validity detection of the second clock signal by the first device A also fails, then return to step S110 and step S115 to continue execution);
步骤S160，数据传输的接收方对所接收的数据进行校验（包括第二设备B对第一设备A发送的第一数据信号进行数据校验，和/或第一设备A对第二设备B发送的第二数据信号进行数据校验）；Step S160, the receiver of the data transmission checks the received data (including the second device B performing data verification on the first data signal sent by the first device A, and/or the first device A checking the second device B send the second data signal for data verification);
步骤S170，数据校验合格转步骤S180，否则转步骤S190；Step S170, if the data verification is successful, go to step S180, otherwise go to step S190;
步骤S180，完成本次数据传输，进入下一个状态以进行下一次数据传输，返回步骤S110及步骤S115，重新进行时钟握手；Step S180, complete the current data transmission, enter the next state for the next data transmission, return to step S110 and step S115, and perform the clock handshake again;
步骤S190，数据传输的接收方将内部的复位信号置为“1”，以此来表示数据校验不合格，并通过时钟通道将该复位信号发送给数据传输的发送方，返回步骤S110和/或步骤S115继续执行（该第一设备A对该第二设备B发送的数据校验不合格则返回步骤S115，此时，该第二设备B为数据传输的发送方而该第一设备A为数据传输的接收方；该第二设备B对该第一设备A发送的数据检验不合格则返回步骤S110，此时，该第一设备A为数据传输的发送方而该第二设备B为数据传输的接收方；该第一设备A对该第二设备B发送的数据校验不合格且该第二设备B对该第一设备A发送的数据检验也不合格，则同时返回步骤S110及步骤S115继续执行）。Step S190, the receiver of the data transmission sets the internal reset signal to "1" to indicate that the data verification is unqualified, and sends the reset signal to the sender of the data transmission through the clock channel, and returns to step S110 and/or Or step S115 continues to execute (the first device A returns to step S115 if the data sent by the second device B fails the verification, at this time, the second device B is the sender of the data transmission and the first device A is The receiver of the data transmission; the second device B returns to step S110 if the data sent by the first device A fails the inspection. At this time, the first device A is the sender of the data transmission and the second device B is the data transmission The receiver of the transmission: the data sent by the first device A to the second device B is not qualified and the data sent by the second device B to the first device A is also not qualified, then return to step S110 and step S110 at the same time S115 continues execution).
需要说明的是，无论是第一设备还是第二设备，时钟信号的检测未获得通过以及数据校验不合格，均是通过复位信号通知对方重新进行时钟握手，因此获知引起重新进行时钟握手的具体原因（时钟信号的检测未获得通过或者数据校验不合格），并不是必须的。当然，在本发明的其他实施例中，在向对方发送复位信号以重新进行时钟握手时，携带具体的原因（时钟信号的检测未获得通过或者数据校验不合格）也是可行的。It should be noted that no matter whether it is the first device or the second device, if the clock signal detection fails and the data verification fails, the reset signal is used to notify the other party to re-handshake the clock. The reason (the detection of the clock signal is not passed or the data verification is not qualified) is not necessary. Of course, in other embodiments of the present invention, it is also feasible to carry a specific reason (the clock signal detection fails or the data verification fails) when sending a reset signal to the other party to perform clock handshake again.
在本实施例中，上述步骤S110至步骤S125，可以概述为第一设备A与第二设备B之间通过在时钟通道中发送时钟信号进行时钟握手，并由步骤S130对时钟握手是否成功进行判断。In this embodiment, the above step S110 to step S125 can be summarized as clock handshake between the first device A and the second device B by sending a clock signal in the clock channel, and step S130 judges whether the clock handshake is successful .
在本实施例的数据传输过程中，由时钟信号来进行数据传输的有效性控制，只有数据传输的发送方和接收方时钟握手成功之后才能进行数据传输。在这其中，如果时钟握手不成功或者数据传输过程中的数据校验不合格，则启动复位信号进行时钟信号的重传。In the data transmission process of this embodiment, the effectiveness of the data transmission is controlled by the clock signal, and the data transmission can only be performed after the clock handshake between the sender and the receiver of the data transmission is successful. Among them, if the clock handshake is unsuccessful or the data verification in the data transmission process fails, the reset signal is started to retransmit the clock signal.
本实施例中，时钟信号的有效性检测时通过第一设备A及第二设备B各自内部的检测电路来进行的，数据校验则是通过第一设备A及第二设备B各自内部的校验电路（利用数据校验位）来进行的。In this embodiment, the validity detection of the clock signal is carried out through the respective internal detection circuits of the first device A and the second device B, and the data verification is carried out through the respective internal calibration circuits of the first device A and the second device B. verification circuit (using the data parity bit) to carry out.
本实施例通过冗余数据通道进行数据传输（第一设备A与第二设备B之间的数据通道采用冗余设计），也即在不止一条数据通道中同时传输相同的数据，而各个数据通道（包括冗余数据通道）由统一的时钟信号和内部复位信号的控制，并且各个数据通道分别进行各自的数据校验，也即对应每条数据通道，都有独立的校验电路进行数据信号的校验，因此只要是有一个数据通道的数据校验合格，则数据传输即告正确完成，从而可以进入下一个状态以继续进行数据传输。也即，只有在所有数据通道的数据校验均不合格时，才会重新进行时钟握手。In this embodiment, data transmission is performed through redundant data channels (the data channel between the first device A and the second device B adopts a redundant design), that is, the same data is transmitted in more than one data channel at the same time, and each data channel (including redundant data channels) is controlled by a unified clock signal and internal reset signal, and each data channel performs its own data verification, that is, corresponding to each data channel, there is an independent verification circuit for data signal verification Therefore, as long as the data verification of one data channel is qualified, the data transmission is completed correctly, so that the next state can be entered to continue the data transmission. That is, only when the data verification of all data channels fails, the clock handshake will be performed again.
实施例二、一种串行电路中的数据传输系统Embodiment 2. A data transmission system in a serial circuit
本实施例的数据传输系统，包括第一设备与第二设备，其中：The data transmission system of this embodiment includes a first device and a second device, wherein:
该第一设备与该第二设备，用于通过在时钟通道中发送时钟信号进行时钟握手，并用于在该时钟握手成功后通过数据通道进行数据传输；The first device and the second device are configured to perform a clock handshake by sending a clock signal in a clock channel, and to perform data transmission through a data channel after the clock handshake is successful;
其中，若该时钟握手未成功和/或该数据传输过程中的数据校验不合格，则该第一设备及该第二设备用于通过在该时钟通道中发送复位信号再次进行时钟握手。Wherein, if the clock handshake is unsuccessful and/or the data verification in the data transmission process fails, the first device and the second device are used to perform clock handshake again by sending a reset signal in the clock channel.
上述第一设备包括：The above-mentioned first device includes:
发送端，用于向该第二设备发送第一时钟信号；a sending end, configured to send a first clock signal to the second device;
接收端，用于接收第二时钟信号；a receiving end, configured to receive a second clock signal;
检测电路，与接收端相连，用于对该第二时钟信号进行有效性检测；A detection circuit, connected to the receiving end, for detecting the validity of the second clock signal;
上述该第二设备包括：The above-mentioned second device includes:
发送端，用于向该第一设备发送该第二时钟信号；a sending end, configured to send the second clock signal to the first device;
接收端，用于接收该第一时钟信号；a receiving end, configured to receive the first clock signal;
检测电路，与接收端相连，用于对该第一时钟信号进行有效性检测。The detection circuit is connected with the receiving end and is used for detecting the validity of the first clock signal.
该第一设备及该第二设备用于在该数据传输过程中所有数据通道的数据校验均不合格时，通过在该时钟通道中发送该复位信号再次进行该时钟握手；其中，该第一设备与该第二设备之间通过冗余的数据通道进行该数据传输。The first device and the second device are used to perform the clock handshake again by sending the reset signal in the clock channel when the data verification of all data channels fails during the data transmission process; wherein, the first The data transmission is performed between the device and the second device through a redundant data channel.
其中，在上述数据传输过程中，第一设备及第二设备进行的数据校验是通过各设备内部的校验电路利用数据校验位进行的，其中，第一设备内部的校验电路对第二设备发送的第二数据信号进行校验，而第二设备内部的校验电路对第一设备发送的第一数据信号进行校验。在各设备内部，校验电路连接设备内部的接收端，且数据是通过发送端发送给对方的并由接收端接收对方发送的数据。第一设备发送给第二设备的第一数据信号，通过第一设备内部的发送端进行发送，第二设备发送给第一设备的第二数据信号，通过第二设备内部的发送端进行发送；第二设备通过内部的接收端接收第一设备发送的第一数据信号，第一设备通过内部的接收端接收第二设备发送的第二数据信号。Wherein, in the above-mentioned data transmission process, the data verification performed by the first device and the second device is performed by the verification circuit inside each device using the data verification bit, wherein the verification circuit inside the first device checks the first device The second data signal sent by the second device is verified, and the verification circuit inside the second device is verified by the first data signal sent by the first device. Inside each device, the verification circuit is connected to the receiving end inside the device, and the data is sent to the other party through the sending end, and the data sent by the other party is received by the receiving end. The first data signal sent by the first device to the second device is sent through the sending end inside the first device, and the second data signal sent by the second device to the first device is sent through the sending end inside the second device; The second device receives the first data signal sent by the first device through the internal receiving end, and the first device receives the second data signal sent by the second device through the internal receiving end.
本发明的技术方案，是考虑到时钟复位电路设计对串行电路设计的稳定性的影响，从而将时钟信号和复位信号利用同一个通道即时钟通道进行传输，而数据则利用单独的通道及数据通道进行传输，这是根据时钟信号、复位信号以及数据信号的传送方式提出来的，因为时钟信号是按照“0”“1”的方式来传递时钟波动，而复位信号的启动和关闭也是由“0”“1”来控制的，这样就保证了时钟信号和复位信号能够对数据传输进行有效的控制。The technical solution of the present invention is to take into account the impact of the clock reset circuit design on the stability of the serial circuit design, so that the clock signal and the reset signal are transmitted using the same channel, that is, the clock channel, while the data is transmitted using a separate channel and data channel. Channel transmission, which is proposed according to the transmission method of clock signal, reset signal and data signal, because the clock signal transmits clock fluctuations in the way of "0" and "1", and the startup and shutdown of the reset signal is also determined by " 0" and "1" to control, so as to ensure that the clock signal and reset signal can effectively control the data transmission.
由于串行电路中数据传输既要受时钟信号的控制，同时也要受内部复位信号的控制，因此本发明的技术方案将时钟信号和复位信号通过一条通道进行复用，减少了布线通道和走线长度，降低了版图设计难度，节省了版图空间，便于布局布线，提高了串行电路的速度，增加了串行电路数据传输等的稳定性。这种设计所具有的上述优点，使得其弥补了传统串行电路设计结构的不足，使其更适应于高速大数据量串行电路，因而具有非常广阔的发展前景，具有很高的技术价值。Since the data transmission in the serial circuit is controlled by both the clock signal and the internal reset signal, the technical solution of the present invention multiplexes the clock signal and the reset signal through one channel, reducing the number of wiring channels and routes. The line length reduces the difficulty of layout design, saves layout space, facilitates layout and wiring, improves the speed of serial circuits, and increases the stability of serial circuit data transmission. The above-mentioned advantages of this design make it make up for the shortcomings of the traditional serial circuit design structure, making it more suitable for high-speed and large-data serial circuits, so it has very broad development prospects and high technical value.
本领域的技术人员应该明白，上述的本发明系统中的各组成部分或本发明方法中的各步骤可以用通用的计算装置来实现，它们可以集中在单个的计算装置上，或者分布在多个计算装置所组成的网络上，可选地，它们可以用计算装置可执行的程序代码来实现，从而，可以将它们存储在存储装置中由计算装置来执行，或者将它们分别制作成各个集成电路模块，或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。这样，本发明不限制于任何特定的硬件和软件结合。Those skilled in the art should understand that each component in the above-mentioned system of the present invention or each step in the method of the present invention can be realized by a general-purpose computing device, and they can be concentrated on a single computing device, or distributed in multiple Optionally, they can be implemented with executable program codes of computing devices, thus, they can be stored in storage devices and executed by computing devices, or they can be made into individual integrated circuits modules, or multiple modules or steps among them are fabricated into a single integrated circuit module. As such, the present invention is not limited to any specific combination of hardware and software.
虽然本发明所揭露的实施方式如上，但所述的内容只是为了便于理解本发明而采用的实施方式，并非用以限定本发明。任何本发明所属技术领域内的技术人员，在不脱离本发明所揭露的精神和范围的前提下，可以在实施的形式上及细节上作任何的修改与变化，但本发明的专利保护范围，仍须以所附的权利要求书所界定的范围为准。Although the embodiments disclosed in the present invention are as above, the described content is only an embodiment adopted for the convenience of understanding the present invention, and is not intended to limit the present invention. Anyone skilled in the technical field to which the present invention belongs can make any modifications and changes in the form and details of the implementation without departing from the spirit and scope disclosed by the present invention, but the patent protection scope of the present invention, The scope defined by the appended claims must still prevail.
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