Embodiment
Hardware block diagram of the present invention as shown in Figure 1, by amplification filtering circuit, analog to digital converter (ADC1), analog to digital converter (ADC2), voltage-reference, voltage follower, current source, differential amplifier, analog to digital converter (ADC3), analog drive circuit, digital signal processor (DSP), extend out SRAM, extend out EEPROM, man-machine interface, the output of 4~20mA electric current and pulse output, power module form.
The course of work of the present invention as shown in Figure 2.After system powered on, on the one hand, the vibrator of analog drive system excitation Coriolis mass flowmeter primary instrument made flowtube with natural frequency vibration; On the other hand, digital signal processor DSP is finished the initialization of each module of system and the initialization of algorithmic variable.Be positioned at two magnetoelectric sensor output two-way sinusoidal signals of flowtube both sides, after the modulate circuit amplification that this two paths of signals process two-way parameter is identical, the filtering, by two analog to digital converter ADC1, analog to digital converter ADC2 samplings that model is identical, sampled result is sent in the digital signal processor DSP by the multichannel buffered serial port McBSP of digital signal processor DSP; Digital signal processor DSP adopts the frequency and the phase differential that calculate signal based on the zero passage detection method of Lagrange's interpolation again to the filtering of the advanced line number word of sampled data, obtains mass rate; Digital signal processor DSP reads the numerical value of analog to digital converter ADC3, is converted into temperature, and flow is carried out temperature compensation; Finally, flow measurement is the result be presented on the LCD, and by 4~20mA and pulse output module, exports corresponding electric current and pulse signal.
After system powers on, mimic channel produces the vibration that drives signal excitation Coriolis flowmeter on the one hand, digital signal processor DSP is finished the initialization of system's various piece on the other hand, starts also the sample conversion of two-way analog to digital converter ADC1 and analog to digital converter ADC2 synchronously then.After analog to digital converter ADC1 data-switching is good, trigger interruption by GPIO to digital signal processor DSP.Consider that analog to digital converter ADC1, analog to digital converter ADC2 open synchronously, data-switching is finished in theory simultaneously, therefore, does not open analog to digital converter ADC2 and interrupts, by the state of inquiry analog to digital converter ADC2 in ADC1 interrupts, judge whether analog to digital converter ADC2 converts.After converting, digital signal processor DSP provides clock by McBSP-A, McBSP-B to analog to digital converter ADC1, analog to digital converter ADC2, transformation result is moved to the receiving register (DRR) of McBSP; It then is to finish by direct memory access (DMA) (DMA) module that data in the McBSP receiving register are specified the transfer in random-access memory (ram) space to the user.During initialization DMA, thepassage 1 of DMA, the source address pointer ofpassage 2 are respectively the receiving register of McBSP-A and McBSP-B, the purpose pointer is interim array bufferL, the bufferR of directed towards user definition then, and then DMA automatically stores the ADC transformation result into bufferL and bufferR from DRR.When interim array deposit full after, produce DMA and interrupt, in the interrupt service routine, DMA changes the purpose pointer earlier, prepares for transmitting next time, the content in the ephemeral data is copied in two circulation arrays in the external SRAM again, waits for calling of algorithm.Like this, leaving alone under the situation of CPU, finishing reading of ADC sampled result.Whole signals collecting, transport process as shown in Figure 3, ADC break in service flow process as shown in Figure 4, DMA break in service flow process is as shown in Figure 5.
As shown in Figure 2, after having produced 500 new point data, namely begin to call algorithm.Detection signal amplitude size at first if signal amplitude, represents then that sensor does not open fully less than setting value and shake, continues to wait for; After signal amplitude is greater than setting value, allow 500 point data pass through the IIR bandpass filter of a passband width and depth-adjustment earlier, carry out pre-service, adopt the frequency, the mistiming that allow the zero passage detection method of day interpolation calculate signal based on glug afterwards, draw instantaneous mass flow in conjunction with instrument coefficient; Read temperature, flow is carried out temperature compensation.The whether set of inquiry keyboard zone bit is if set is then called keyboard and handled subroutine.By regularly 1s interruption of cputimer0, in interrupt service routine, the instantaneous delivery that adds up obtains integrated flow; In addition, according to the instantaneous delivery value, by DA or outwardsoutput 4~20mA electric current and the pulse of ePWM module.Refresh LCD, show each measurement result.
There is multiple noise in the actual industrial scene, disturb as a certain fixed frequency that random noise, power frequency interference, motor and pipe vibration etc. cause, the frequency band of these noise distributes very wide, for this reason, the present invention adopts a kind of IIR bandpass filter with trapper structure that sensor signal is carried out filtering.Filter transfer function is:
In the formula,
,
Be the trap frequency,
,
Will
With
Substitution formula (1) can get its gain at trap frequency place and is:
When
,
Be in close proximity to 1, and
During not 0, near π, 2 π, formula (2) can be reduced to:
As seen, when
The time, the trap place is decay; When
The time, the trap place is for amplifying.Trap depth by
Determine, and be subjected to
Influence very little.During designing filter, can fix earlier
, by regulating
Change the trap width of trapper, its value is more close to 1, and the trap width is more narrow; Regulate again
, change trap depth.This bandpass filter passband is narrower, and in working in the reality, when fluid media (medium) was full of flowtube, the natural frequency basic fixed of Coriolis mass flowmeter was feasible so with this wave filter the Coriolis mass flowmeter output signal is carried out pre-service.
Zero passage detection obtained the time interval between zero crossing, and then asks for signal frequency, phase differential, as shown in Figure 6 by the moment of tracer signal zero crossing.As seen, signal frequency is
, the two paths of signals mistiming is
, phase differential is
In the actual operation, DSP handles is discrete signal after the sampling.Because ADC can not sample cycle signal zero-cross point just, this just need carry out curve fitting to sampled data, obtains signal zero crossing, as shown in Figure 7.The present invention adopts Lagrangian quadratic interpolation match.If sample sequence
, work as appearance
The time, namely show at [n-1, n] to have a zero point constantly.Generate the quadratic interpolation polynomial expression
, by Lagrangian computing formula:
Simplify:
(4)
(5)
Therefore, can obtain by solving an equation
The time moment corresponding
t, i.e. zero crossing.To give up that root outside [n-1, n] in the equation in actual applications.
Finding in implementation procedure, is that situations between [n-1, n] not of two roots that the match quadratic equation obtains all can appear in 3 matches of Lagrange's interpolation or 5 matches of least square method.When this situation occurring, find the solution null position again with approach based on linear interpolation, find the solution flow process as shown in Figure 8.
After 500 signal datas find zero point, just signal parameter can have been calculated.Ask phase differential to need the zero point of two paths of signals, this takes place to misplace to subtract each other easily, as shown in Figure 6, if 500 do not comprise just
, will produce
Therefore such dislocation, need be judged.Suppose that two paths of signals respectively calculates
,
Individual zero point is because the phase range of little curved Coriolis mass flowmeter is no more than
10 °, so do as judging:
(1) if
, L road signal lag then is described and dislocation can take place and subtract each other modification method: should be
To zero point, the mistiming by
Try to achieve;
(2) if
, R road signal lag then is described and dislocation can take place and subtract each other modification method: should be
To zero point, the mistiming by
Try to achieve;
(3) if
No matter illustrate to be
LStill
RDislocation can not take place road signal lag subtracts each other, and has
To zero point, the mistiming directly by
Try to achieve.
The zero passage detection method is simple, and calculated amount is little, but when DSP realizes, is subjected to the influence that DSP computing number of significant digit is limited, there is biasing in hardware circuit easily.So, must take corresponding measure to guarantee the realization precision of algorithm.
Use 32 float categorical variable when carrying out interpolation arithmetic, the coefficient number of significant digit that is obtained by formula (4)~(6) is few, and the error of calculation is big.For this reason, intermediate variable must use 64 double types of variables when interpolation arithmetic.
Algorithm is transplanted to when DSP goes up test and is found, when the used sampled value of Lagrange's interpolation
Very near 0 o'clock, the resultant error of calculating can be very big, and when separating the quadratic polynomial equation, along with
nIncrease, increasing by the equation root error that formula (4)~(6) solve, these all are the limited and truncation errors that cause of DSP computing number of significant digit.The method that solves is that the sampled value that Lagrange's interpolation is used is amplified 100 times earlier, and subscript unification is constantly carried out interpolation calculation by (n-2), (n-1), n normalizing to 0,1,2 again, and formula (4)~(6) become:
Through after the above-mentioned processing, the number of significant digit of result of calculation is improved, and has guaranteed the realization precision of algorithm.
Because the hardware circuit parameter can not accomplish to mate fully, the modulate circuit of two-way sensor signal is symmetry fully, and this just causes the signal after the two-way conditioning to have biasing, is not strict with 0 symmetry, and the biasing difference of two paths of signals.Be cycle signal zero-cross point and algorithm detects, therefore, must take measures on customs clearance overcomes circuit bias to the influence of algorithm.
Suppose that left road sensor signal just is biased to, the right wing sensor signal is biased to negative, the zero crossing of algorithm detection signal, as shown in Figure 9.
During calculated rate, be example with left road, [L1, L2] between the time interval less than the half period of signal, and [L2, L3] between the half period interval greater than signal, so, if only with L1, L2Or L2, L3Calculating signal frequency must introduce than the computation error.For the influence that reduces to setover to frequency computation part, should use L1, L3Ask for signal frequency, the zero point that namely guarantees to ask for frequency and be employed zero point a signal period is right.
When calculating phase differential, because the two paths of signals biasing is different, make from L1, R1, L road signal lag is from L2, R2, L road signal is leading.In the reality, biasing may not can so obviously (allows one road signal in negative edge hysteresis at zero point, leading zero point at rising edge) to the influence of algorithm, allows one road signal in negative edge hysteresis at zero point, in rising edge leading trend at zero point, if only with L but can produce one1, R1Or L2, R2For primitive calculates phase differential, calculating the result will inevitably fluctuate.For this reason, should be with L1, R1And L2, R2Be primitive, namely comprise two groups of zero points of rising edge and negative edge to calculating phase differential.When adopting said method calculated rate and phase differential, the fluctuation of result of calculation obviously reduces.
After calculating signal frequency, phase differential, result of calculation is sorted, and abandon maximum, smallest point, get rid of singular point, after intermediate point is averaged, again the result is sent into second level running mean.The numerical values recited of the average array length MeanN of macro definition in the software, and open up a TimeDiffAarry[MeanN] array, then each running mean is calculated as:
TimeDiffMean=TimeDiffMean+(TimeDiff-TimeDiffAarry[mean_cur])/MeanN;
TimeDiffAarry[mean_cur]=TimeDiff;
mean_cur++;
if(mean_cur>= MeanN)
{mean_cur=0;}
As seen, only by the size of macro definition MeanN, can change the length of running mean array, take into account algorithm response speed and response accuracy, and do not need to change the internal algorithm program.
In cputimer0 interrupts, flow need be converted to electric current output.Send 12 bit serial data with GPIO simulation SPI sequential to DA7513, finish digital quantity to the conversion of analog voltage amount by D/A, again by a V/I translation circuit, be 4~20mA with voltage transitions, be that DSP needs earlier instantaneous delivery to be converted to electric current, be voltage with current conversion again, write the corresponding digital quantity of voltage therewith to D/A at last.
It then is to finish by the ePWM module that instantaneous delivery is converted to pulse, and the present invention has designed a kind of software and realized the quantitatively method of output pulse.In the 1s that cputimer0 produces interrupts, the flow rate conversion that is accumulated in this 1s is become will export the number of pulse, and stipulate these pulses output when cputimer0 interrupts next time finish (in 1s, export and finish).The flow value out_flow that exports gets the integral part of integrated flow in this 1s, and fraction part left_flow is added to next time and calculates.If pulse equivalency is the 1g/ pulse, then in 1s, export N=out_flow pulse, the frequency of pulse is fPwmSo=N is the periodic quantity PRD=f of general purpose timerTBCLK/ fPwm, base when TBCLK is the input of timer, its frequency is fTBCLK=HSPCLK/DIV, HSPCLK=75MHz is the high-frequency clock of DSP, and DIV is divide ratio, and value is 1,2,4,8,16,32,64,128.Because of (fTBCLK/ fPwm) the possibility of result be decimal, and PRD only gets result's integral part, maximum error is-1.Therefore, pwm pulse of every output, timer can be counted a TBCLK pulse at most more, so in 1s, timer at most can many meter fPwmIndividual TBCLK pulse, but as long as guarantee CMP〉fpwm, the part of many meters just can not produce new pwm pulse.In cputimer0 interrupts next time, can be earlier with timer count value CNT zero clearing, the part of many meters can not add up, as shown in figure 10.
As seen, a certain number of pulses switch of output becomes the PWM ripple of output certain frequency in 1s.The main task of upgrading the PWM output valve namely is according to different fPwm, select corresponding divide ratio DIV, guaranteeing PRD between 0~65535, and CMP fPwmAt HSPCLK=75MHz, under the CMP=PRD/2 situation, the frequency range that DSP can export is 8.94~6123Hz, at the sensor of different bores, can revise pulse equivalency, cooperates pulse output.At this, Figure 11 provides the concrete allocation scheme of a kind of DIV.
It is unusual to occur some in the measuring process, the situation that for example external device initialization error, transmitter do not have that input signal, measurement result go beyond the scope, Array Bound, data cover etc., for the ease of monitoring these mistakes, also debugging for convenience simultaneously, in system software, add error module, be used for the abnormal conditions that produce in mark and the logging program implementation.Definition ERROR structure and global variable cmf_error:
typedef struct
{ int16 ad_error;
int16 no_signal_error;
int16 array_overflow_error;
int16 zero_cross_error;
int16 eeprom_error;
int16 ad_temp_error;
int16 error_flag; }
ERROR;
ERROR cmf_error;
When the configuration peripheral hardware, to peripheral hardware operate, when algorithm process is made mistakes, the number of times that corresponding module will be made mistakes at corresponding program segment adds 1, and the error_flag of set simultaneously, inquiry cmf_error variable state, and take corresponding error handling processing measure.