CN102006084A - CRC (Cyclic Redundancy Check) coding method suitable for OFDM-UWB (Orthogonal Frequency Division Multiplexing- Ultra Wideband) system - Google Patents

Abstract

The invention discloses a CRC (Cyclic Redundancy Check) coding method suitable for an OFDM-UWB (Orthogonal Frequency Division Multiplexing-Ultra Wideband) system. The CRC coding method is characterized by comprising the following steps of: (1) judging the data effective bit according to the speed rate, feeding back the data effective bit and outputting the effective bit and parallelism degree; (2) respectively realizing CRC coding with parallelism degrees of 1, 2, 3, 4, 5 and 6 in the same module; and (3) judging the work mode of a feedback shift register according to the speed rate for carrying out the feedback shift with the parallelism degrees of 1, 2, 3, 4, 5 and 6. The parallelism degree variable CRC coding method has the characteristics of saving hardware resources and realizing simply and conveniently.

Description

A kind of CRC coding method that is applicable to the OFDM-UWB system

Technical field

The present invention relates to technical field of data transmission, be specifically related to CRC coding method in the transmitter physical layer.

Background technology

In communication system, for the code word of finding or correcting a mistake, generally all can after information data, increase the CRC check sign indicating number, carry out same CRC at receiving terminal and calculate, relatively whether both CRC are consistent, judge whether that with this transfer of data is errorless.

Particularly in OFDM-UWB, because the restriction of chip clock frequency, this just requires transmitter need adopt parallel mode when deal with data, in addition, because OFDM-UWB has adopted multiple transmission rate, and different transmission rates has different separately requirements to handled bit numbers of module unit clock such as encoder for convolution codes (punching speed) and interleavers, therefore, need be as CRC module foremost according to the different different degree of parallelism deal with data of speed employing, the needs of module below satisfying after reading of data.Look-up table is generally adopted in traditional Parallel CRC coding method, needs the outer hardware resource of occupying volume.

Summary of the invention

Goal of the invention: the objective of the invention is to deficiency, the CRC coding method that can adjust degree of parallelism with transmitter speed of a kind of OFDM-UWB of being applicable to system is provided at existing coding method.

Technical scheme: the CRC coding method that is applicable to the OFDM-UWB system of the present invention, be to adopt the shift register method to realize, saved and set up the required hardware resource of look-up table, comprise the steps: that specifically (1) judge input data significance bit by speed, the feedback data significance bit, output significance bit and degree of parallelism; (2) realize respectively that in same module degree of parallelism is 1,2,4,5,6 CRC coding; (3) by speed judge the displacement feedback register working method, be respectively 1,2,4,5,6 feedback shift to carry out degree of parallelism.

The present invention compared with prior art, its beneficial effect is: the CRC coding method of variable degree of parallelism disclosed by the invention have realize easy, the economize on hardware characteristics of resources; This method is applicable to that the frame check module (FCS) of physical layer transmitter in the OFDM-UWB system and other need carry out the system of variable degree of parallelism (degree of parallelism is 1,2,4,5,6) CRC coding;

We use the modolsim 6.5se of hardware language simulation software to test, choose test data 0000_0000_0000_0001_0000_0010_0000_0011_0000_0100, test to 7 with regard tospeed 0 respectively, and gained result and matlab simulation result compared: under the situation ofspeed 0 and 1, export 1 bit CRC check sign indicating number at every turn; Speed 2 and 3 (degree of parallelism is 2) is exported 2 bit CRC check sign indicating numbers at every turn; Eachoutput 5 bit CRC check sign indicating numbers of speed 4 and 6 (degree of parallelism is 5); Speed 5 (degree of parallelism is 4) is exported 4 bit CRC check sign indicating numbers at every turn; Speed 7 (degree of parallelism is 6) is exported 6 bit CRC check sign indicating numbers at every turn, and each speed gained result all conforms to the matlab simulation result.

Description of drawings

Accompanying drawing is a CRC coder structure block diagram.

Embodiment

Below in conjunction with accompanying drawing, most preferred embodiment is elaborated, but protection scope of the present invention is not limited to described embodiment.

Embodiment 1: a kind of CRC coding method that is applicable to the OFDM-UWB system, at first, calculate the bit number that the desired unit clock of each speed is handled according to different rates, and this is the degree of parallelism of CRC encoder; Secondly, derive the structure of the CRC encoder of multidiameter delay by the generator polynomial of CRC coding.

The generator polynomial of CRC is in the OFDM-UWB system

g(x)＝x³²+x²⁶+x²³+x²²+x¹⁶+x¹²+x¹¹+x¹⁰+x⁸+x⁷+x⁵+x⁴+x²+x+1

Wherein, x represents a time-delay.

As shown in table 1, input din is 6 Bit datas, and wherein, speed is 0 and 1 o'clock, have only preceding 1 effectively; Speed is 2 and 3 o'clock, preceding 2 effectively; Speed is 4 and 6 o'clock, preceding 5 effectively; Speed is 5 o'clock, preceding 4 effectively; Speed is 7 o'clock, and 6 all effective.Shift register shift_reg[31:0] initial all sets, feedback bits feed_back[5:0]=din[5:0] ^shift_reg[31:26], " ^ " represent XOR, wherein, speed is 0 and 1 o'clock, have only preceding 1 effective; Speed is 2 and 3 o'clock, preceding 2 effectively; Speed is 4 and 6 o'clock, preceding 5 effectively; Speed is 5 o'clock, preceding 4 effectively; Speed is 7 o'clock, and 6 all effective.

The parameter declaration of table 1UWB system different rates

Speed (label)	Convolutional code rate	Clock number (6 symbols)	The bit number of interleaver	The bit number that unit clock is handled
					53.3Mbps (0)	1/3	242	300	1
80Mbps (1)	1/2	242	300	1
					106.7Mbps(2)	1/3	242	600	2
160Mbps (3)	1/2	242	600	2
					200Mbps (4)	5/8	242	600	5
320Mbps (5)	1/2	242	1200	4
					400Mbps (6)	5/8	242	1200	5
480Mbps (7)	3/4	242	1200	6

After the CRC enable signal is effective, send in the CRC module by mode shown in the accompanying drawing bit of input and the feedback computing that is shifted, behind the input ED, shift register begins to move to left, the bit number that the figure place that each clock moves and unit clock are handled is identical, with shift_reg[31:26] with 6 bits " 1 " XOR after as exporting dout[5:0], wherein, speed is 0 and 1 o'clock, have only preceding 1 effectively; Speed is 2 and 3 o'clock, preceding 2 effectively; Speed is 4 and 6 o'clock, preceding 5 effectively; Speed is 5 o'clock, preceding 4 effectively; Speed is 7 o'clock, and 6 all effective.

The personage who knows this area will understand, though described specific embodiment for the ease of explaining here, can make various changes under the situation that does not deviate from spirit and scope of the invention.Therefore, except claims, can not be used to limit the present invention.

Claims (1)

Translated fromChinese

1.一种适用于OFDM-UWB系统的CRC编码方法，其特征在于包括如下步骤：(1)由速率判断出输入数据有效位，反馈数据有效位，输出有效位以及并行度；(2)在同一模块内分别实现并行度为1，2，4，5，6的CRC编码；(3)由速率判断出移位反馈寄存器的工作方式，以进行并行度分别为1，2，4，5，6的反馈移位。1. a kind of CRC coding method that is applicable to OFDM-UWB system is characterized in that comprising the steps: (1) judges input data effective bit by rate, feedback data effective bit, output effective bit and degree of parallelism; (2) in In the same module, CRC codes with parallel degrees of 1, 2, 4, 5, and 6 are respectively realized; (3) the working mode of the shift feedback register is judged by the rate, so that the parallel degrees are respectively 1, 2, 4, 5, 6 feedback shifts.

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