Summary of the invention
The technical problem to be solved in the present invention is: overcome the problem that prior art exists, a kind of storage battery non-damage fast uniform charger is provided, and utilize this charger to follow the tracks of the dynamic change of internal storage battery parameter immediately according to set control strategy, adopt the method and the positive negative pulse stuffing quick charge technology of secondary copped wave segmentation control, the charging object of storage battery is controlled to the unit individuality, accomplished the charging of not damaged fast uniform.
The technical scheme that the present invention solves its technical problem employing is: the not damaged fast uniform charger of this storage battery; comprise commercial power interface; protective circuit; filter circuit; charging inlet; rectification circuit; filtering voltage regulation current stabilization circuit and microprocessing unit; it is characterized in that: also comprise circuit of power factor correction; intelligence half-bridge chopper circuit; the antipole discharge circuit; the dynamic sample circuit of accumulator parameter; commercial power interface links to each other with protective circuit; protective circuit links to each other with filter circuit; filter circuit links to each other with rectification circuit; rectification circuit links to each other with circuit of power factor correction; circuit of power factor correction links to each other with intelligent half-bridge chopper circuit; intelligence half-bridge chopper circuit links to each other with the filtering voltage regulation current stabilization circuit; the filtering voltage regulation current stabilization circuit links to each other with charging inlet; charging inlet links to each other with the antipole discharge circuit with the dynamic sample circuit of accumulator parameter; the dynamic sample circuit of accumulator parameter links to each other with microprocessing unit, and microprocessing unit links to each other with intelligent half-bridge chopper circuit with the antipole discharge circuit.
Described intelligent half-bridge chopper circuit, comprise microprocessing unit, a chopper circuit, multichannel secondary chopping switch, circuit controling switch K,secondary chopper circuit 1 ... secondary chopper circuit n, secondary chopper circuit control switch Kj, secondary chopper circuit K switch n,capacitor C 1 ... Cn, microprocessing unit links to each other with multichannel secondary chopping switch with circuit controling switch K, multichannel secondary chopping switch and the anodal andsecondary chopper circuit 1 of chopper circuit ... secondary chopper circuit n links to each other, circuit controling switch K one end links to each other with multichannelsecondary chopper circuit 1, the other end and anodal linking to each other of chopper circuit, No. one time the chopper circuit negative pole links to each other with multichannel secondary chopper circuit n.
A kind of aforesaid right requires the control strategy of 1 described storage battery non-damage fast uniform charger, it is characterized in that: after commercial power interface inserts civil power, and charger self check, hardware circuit initialization, microprocessing unit initialization; Microprocessing unit comprises each monomer state-of-charge, temperature rise rate of change and terminal voltage by the dynamic sample circuit collection of accumulator parameter batteries information after confirming circuit safety; After sample information obtained, microprocessing unit carried out preliminary treatment with sample information, judged and whether carried out preliminary filling; If do not need preliminary filling, then the calculating accumulator group this allow maximum initial charge current constantly; If need precharge, then preliminary filling is after a period of time, and the calculating accumulator group allows maximum initial charge current again; After maximum initial charge current value obtains, microprocessing unit carries out the quick charge of batteries, the dynamic sample circuit immediate feedback of accumulator parameter information is given microprocessing unit between charge period, and microprocessing unit is controlled the action moment of antipole discharge circuit in view of the above, has reached the purpose of quick charge; Some parameter such as temperature rise rate of change in each monomer parameter information of storage battery that microprocessing unit obtains, state-of-charge and terminal voltage, when exceeding default charge in batteries during each other maximum magnitude of monomer parameter tolerance, microprocessing unit sends control signal, open multichannel secondary chopping switch, carry out the isolation charging of each cell batteries, charging principle is identical during with whole charging, cuts off the power supply after stopping the condition of filling through satisfied after the microprocessing unit preliminary treatment until each cell batteries sample information.
Compared with prior art, the beneficial effect that storage battery non-damage fast uniform charger and control strategy of the present invention are had is: at first, adopt the way of microprocessing unit according to charge information control antipole discharge circuit, can suppress the polarization phenomena that occur in the charging process timely, and keep the first ability that begins to accept electric current of storage battery simultaneously, accelerated charging rate;
Once more, microprocessing unit is monitored the multidate information of each cell parameter in advance in the maximum initial charge current of calculating accumulator group and the charging process at any time, suppresses the generation of high gassing rate and thermal runaway phenomenon, has guaranteed the health of storage battery;
At last, adopt secondary multichannel chopper segmentation control to carry out the isolation charging of storage battery, farthest guaranteed the harmony of battery charging, reduced the frequency that behindhand battery produces, guaranteed the power performance of batteries.
Description of drawings
Fig. 1 not damaged fast uniform of the present invention charger circuit structured flowchart;
The inner intelligent half-bridge chopper circuit structured flowchart of Fig. 2 not damaged fast uniform of the present invention charger;
Fig. 3 not damaged fast uniform of the present invention charger circuit schematic diagram;
Fig. 4 not damaged fast uniform of the present invention charger is integrated with the secondary chopper circuit schematic diagram of antipole discharge circuit;
Fig. 5 not damaged fast uniform of the present invention charger storage battery dynamic parameter sample circuit schematic diagram;
The control strategy schematic diagram of Fig. 6 not damaged fast uniform of the present invention charger.
Fig. 1-the 6th, most preferred embodiment of the present invention.Among Fig. 3: J1 commercial power interface, U1 protective circuit module, U2, U3 filter rectification module, the U4 power factor correction module, U5 half-bridge circuit driver module, U6, U7, the dynamic sampling module of U8 accumulator parameter, U9, U10, U11 are integrated with the secondary chopper circuit module of antipole discharge circuit, U12, U15, U16, U17, U19, U20, U21 isolating device; U13 power switch tube drives chip; The load of U14 controlled electron; The U18 operational amplifier; K1, K2, K3, K4, K5, K6 gate-controlled switch module, VCC accessory power supply, MCU1-13 microprocessing unit pin and module controls end interface, BAT1, BATN single battery, the some batteries of BATK (>=1), R1-34 resistance, the WR1-2 potentiometer, Q1, Q2, Q5, Q6, Q7 driving power pipe, Q3, Q4, Q8, Q9 triode, C1-C15 electric capacity, D1, D2, D5-8, D10, D11 Zener diode, D3, D4, D9, the D12-16 Schottky diode, EC1-7 electrochemical capacitor, L1 common mode filtering inductance, L2-4 voltage stabilizing afterflow inductance, T1 half-bridge transformer.
Embodiment
Be described in further detail below in conjunction with Fig. 1-6 pair of not damaged fast uniform charger of the present invention:
Be illustrated in figure 1 as not damaged fast uniform charger internal structure block diagram of the present invention, comprise commercial power interface, protective circuit, filter circuit, rectification circuit, circuit of power factor correction, intelligence half-bridge chopper circuit, filtering voltage regulation current stabilization circuit, charging inlet, the antipole discharge circuit, dynamic sample circuit of accumulator parameter and microprocessing unit; Wherein, commercial power interface links to each other with protective circuit; protective circuit links to each other with filter circuit; filter circuit links to each other with rectification circuit; rectification circuit links to each other with circuit of power factor correction; circuit of power factor correction links to each other with intelligent half-bridge chopper circuit; intelligence half-bridge chopper circuit links to each other with microprocessing unit with the filtering voltage regulation current stabilization circuit; the filtering voltage regulation current stabilization circuit links to each other with charging inlet; charging inlet links to each other with the antipole discharge circuit with the dynamic sample circuit of accumulator parameter; the dynamic sample circuit of accumulator parameter links to each other with microprocessing unit, and microprocessing unit links to each other with the antipole discharge circuit.Wherein, intelligent half-bridge circuit comprises the copped wave module one the tunnel one time, multichannel secondary copped wave module; The dynamic sample circuit of accumulator parameter is made up of the dynamic sampling module of multipath accumulator parameter; The antipole discharge circuit is made up of multichannel antipole discharge circuit module, and is integrated in multichannel secondary copped wave module and the copped wave module.
Be illustrated in figure 2 as the inner intelligent half-bridge chopper circuit structured flowchart of not damaged fast uniform charger of the present invention, comprise a chopper circuit, multichannel secondary chopper circuit, a chopper circuit control switch K, multichannel secondary chopper circuit control switch J, switch L,capacitor C 1, Cn etc.Wherein microprocessing unit is according to the dynamic sample information of accumulator parameter, control switch K, and whether switch J and switch L isolate charging with decision, all are connected tostraight capacitor C 1 of lattice and Cn between the multichannel secondary copped wave modular circuit, guarantee that the safety of isolating charging carries out.
Be illustrated in figure 3 as not damaged fast uniform charger circuit schematic diagram of the present invention, civil power inserts through commercial power interface J1, and U1 carries out over-current detection by the protective circuit module, if over-current phenomenon avoidance occurs, then cuts off civil power; Otherwise enter filter rectification module U2, U3 through conjugation filter inductance L1, enter power factor correction module U4 after the rectification output, power factor correction finishes and enters intelligent half-bridge copped wave module;
Intelligence half-bridge copped wave module comprises a copped wave module, multichannel secondary copped wave module U9, U10, U11, K switch 1-K6, each road module accessory power supply all adopts VCC, microprocessing unit MCU3 output signal control switch K1, microprocessing unit MCU4 output signal control switch K2, microprocessing unit MCU5 output signal control switch K4, microprocessing unit MCU6 output signal control switch K5, microprocessing unit MCU7 output signal control switch K6, microprocessing unit MCU1 output signal control switch K3, microprocessing unit MCU2 output signal control antipole discharge circuit module U12;
Copped wave module and multichannel secondary copped wave module all adopt the semibridge system framework, with the half-bridge circuit in the copped wave module is example, comprise half-bridge drive circuit module U5, two power switch pipe Q1, Q2 and filtering thereof absorb circuit, half-bridge transformer and back level rectification circuit.Resistance R 5 is attempted by power switch pipe Q1 two ends with the diodeD3 capacitor C 1 that is connected in series in parallel as absorbing circuit, andresistance R 6 is attempted by power switch pipe Q2 two ends with the diodeD4 capacitor C 2 that is connected in series in parallel as absorbing circuit; Difference series resistor R3 andresistance R 4 between the control utmost point of power switch pipe Q1 and Q2 and the emitter, the half-bridge driven module U5 control utmost point of series resistor R1 andresistance R 2 access power switching tube Q1 and power switch pipe Q2 respectively drives, and the two ends of power switch pipe Q1 and Q2 also are connected to Zener diode D1 and D2; Be connected in the loop after two power switch pipe Q1 and the Q2 serial connection; Electrochemical capacitor EC1 and EC2 respectively and connecting resistance R7 and R8, and with the serial connection form and in the two ends, loop, the elementary end of the same name of half-bridge transformer T1 is received the negative pole end of electrochemical capacitor EC1 bycapacitor C 3, opposite side is received the emitter of power switch pipe Q1; End of the same name (non-centre tap) the series resistor R9 and thecapacitor C 4 of half-bridge transformer T1 secondary, resistance R 9 andcapacitor C 4 two ends also meet Zener diode D5; Opposite side (non-centre tap) series resistor R10 andcapacitor C 5, resistance R 10 andcapacitor C 5 two ends also meet Zener diode D6, Zener diode D5 is serially connected with the loop positive terminal with D6 and is connected the filtering voltage regulation current stabilization circuit, and the centre tap of half-bridge transformer T1 connects power supply ground; The framework of multichannel secondary chopper circuit module is identical with it, and only each device parameters changes.
The filtering voltage regulation current stabilization circuit is byinductance L 2, L3, and electrochemical capacitor EC3, EC4 and Zener diode D7, D8 forms;Inductance L 2, L3 is serially connected with the outlet side of Zener diode D5 and D6, between the output ofinductance L 2 and L3 and the power supply ground and meet electrochemical capacitor EC3, EC4; Zener diode D7, D8 and connect after be serially connected with the output ofinductance L 3.
Filtering voltage regulation current stabilization circuit output is connected to gate-controlled switch K3-K6 respectively, and 3 pin of gate-controlled switch K3 connect the side of the positive electrode of charge in batteries interface; Also connect 3 pin of antipole discharge module U12 in addition;Output 1 pin of gate-controlled switch K4-K6 connects 2 pin of secondary chopper circuit module U9, U10, U11 respectively, 1 pin of secondary chopper circuit module U9, U10, U11 is the side of the positive electrode of order accumulator body interface respectively, and string has capacitance C6 between earth terminal between the gate-controlled switch K4-K6 and 1 pin, C7, serial connection gate-controlled switch K1 and K2 between the storage battery interface; All be integrated with the antipole discharge circuit among secondary chopper circuit module U9, U10, the U11; In addition, the side of the positive electrode of cell batteries interface inserts the dynamic sampling module of accumulator parameter.
The dynamic sampling module of accumulator parameter comprises U6, U7, U8, and its 2 pin all inserts storage battery interface side of the positive electrode.
Microprocessing unit MCU is by each pin of its 1-10, feedback information according to the dynamic sampling module U6 of accumulator parameter, U7, U8, the switch opportunity of control switch K1-K6, determined the action moment of multichannel secondary copped wave module U9, U10, U11, and their inner integrated antipole discharge circuits and the action moment of a copped wave antipole discharge circuit module U12.
Be illustrated in figure 4 as the secondary chopper circuit schematic diagram that not damaged fast uniform charger of the present invention is integrated with the antipole discharge circuit;
Wherein arbitrary road secondary chopper circuit comprises resistance R 11-R18, triode Q3, Q4, Q8, Q9, power switch pipe Q5, Q6, capacitor C 8-C11, electrochemical capacitor EC6, EC7,inductance L 4, Schottky diode D9, D12, D13, D14, Zener diode D10, D11, power switch tube drives chip U13, optical isolator spare U12, U15, microprocessing unit interface MCU11, MCU12 and power supply VCC;
The antipole discharge circuit comprises resistance R 19-R21, triode Q10, Q11, power switch pipe Q7, controlled electron load U14, power supply VCC and microprocessing unit interface MCU13;
Microprocessing unit MCU passes through pin 11 via isolating device U12 connecting resistance R11 arriving signal ground, the PWM square wave that produces, adopt totem pillar way of output driving power switching tube chip for driving U13, totem is made up of triode Q3, Q4, the collector electrode of triode Q3 meets VCC, links to each other with 1 pin of power switch tube drives chip U13 simultaneously; The emitter of triode Q3 links to each other with the emitter of triode Q4, and 2 pin of access power switching tube chip for driving U13, triode Q3 links to each other with the base stage of triode Q4, and connect power supply ground via resistance R 12, the collector electrode of triode Q4 connects power supply ground, also connect 3 pin of power switch tube drives chip U13 simultaneously, between 1 pin of power switch tube drives chip U13 and 3 pin and connect electrochemical capacitor EC6 andcapacitor C 8, meet Schottky diode D9 between 1 pin of power switch tube drives chip U13 and 8 pin, 6 pin and 8 pin of power switch tube drives chip U13 connect capacitor C 9, be connected to Zener diode D10 between 7 pin of power switch tube drives chip U13 and 6 pin, D11, be connected to reverse Schottky diode D14 between 6 pin of power switch tube drives chip U13 and the power supply ground, Schottky diode D12, capacitor C 10, resistance R 13 parallel connections, 7 pin of the reverse termination power switch tube drives of Schottky diode D12 chip U13, the gate pole of forward termination power switch pipe Q5 connects 6 pin of power switch tube drives chip U13 simultaneously by resistance R 14; The termination power VCC of power switch pipe Q5, the other end is via filter inductance L4, Schottky diode D13 connects the side of the positive electrode of storage battery, the negative side of storage battery is connected to power switch pipe Q6, between battery positive voltage and the negative pole and connect electrochemical capacitor EC7 and capacitor C 11, power switch pipe Q6 also adopts totem pillar output to drive, and totem is made up of triode Q8 and triode Q9, resistance R 16-R18 and power supply VCC and isolating device U15; The pin 12 of microprocessing unit MCU connects signal ground via isolating device U15 by resistance R 15; The positive pole of storage battery and negative side also are serially connected with controlled electron load U14 and power switch pipe Q7, power switch pipe Q7 also adopts the output of totem pillar to drive, totem is by triode Q10, triode Q11, and resistance R 20-22 and power supply VCC and isolating device U16 form; The pin 13 of microprocessing unit MCU passes through resistance R 19 ground connection via confinement period U16.
Be illustrated in figure 5 as not damaged fast uniform charger storage battery dynamic parameter sample circuit schematic diagram of the present invention; Wherein only provided the current-voltage sampling schematic diagram, temperature sampling adopts classical temperature sampling circuit, and except that the transducer that adopts corrosion resistant, sample circuit and indifference no longer describe in detail; The side of the positive electrode of storage battery is connected to voltage sampling circuit, and negative side is connected to current sampling circuit, and two kinds of sample circuits all have isolating device.
Voltage sampling circuit comprises resistance R 28-R34, capacitor C 14-C17, potentiometer WR1,5 pin of operational amplifier U18,6 pin and 7 pin, optical isolator spare U20, U21, power supply VCC, + 5V and microprocessing unit interface MCUk, voltage sampling circuit is divided into two-way one road series resistor R23, resistance R 25 inserts the positive feedback end of computing discharger U18, another road series resistor R26 connects the negative feedback end of operational amplifier U18, the positive feedback end of operational amplifier U18 and negative feedback end are also and be connected to resistance R 24, capacitor C 12 1 end ground connection, the output of other end connecting resistance R23, the power supply of operational amplifier U18 meets VCC, 4 pin connect power supply ground, 1 pin series resistor R27 connects power supply ground via two-way isolating device U17 and isolating device U19, go back and be connected to capacitor C 13 between 1 pin of operational amplifier U18 and 2 pin, isolating device U17 is excited the side joint power supply VCC that makes a start, 2 pin of another side joint operational amplifier U18; Isolating device U19 is excited the side joint power supply+5V that makes a start, opposite side connects signal ground by serial connection potentiometer WR2, the middle terminating resistor R33 of potentiometer WR2, link to each other with thepin 8,9 or 10 of microprocessing unit from the voltage signal of resistance R 33 output, and between pin and signal ground and connect capacitor C 16.
Current sampling circuit comprises resistance R 28-R34, capacitor C 14-C17, potentiometer WR1,5 pin of operational amplifier U18,6 pin and 7 pin, optical isolator spare U20, U21, power supply VCC, + 5V and microprocessing unit interface MCUk, current sampling circuit is divided into two-way, one road series resistor R31, the positive feedback end of access computing discharger U18, the negative feedback end that another road meets operational amplifier U18 via two the power resistor R28 and the R29 series resistor R30 of parallel connection, capacitor C 14 1 end ground connection, another termination battery terminal negative side, the 7 pin series resistor R32 of operational amplifier U18 are via two-way isolating device U20, U21 connects power supply ground, also and be connected to capacitor C 15, isolating device U20 is excited the side joint power supply VCC that makes a start, 6 pin of another side joint operational amplifier between 7 pin of operational amplifier U18 and 6 pin; Isolating device U21 is excited the side joint power supply+5V that makes a start, opposite side connects signal ground by serial connection potentiometer WR1, the middle terminating resistor R34 of potentiometer WR1, link to each other with thepin 8,9 or 10 of microprocessing unit from the voltage signal of resistance R 34 output, and and pin and signal ground between and connect capacitor C 17.
Be illustrated in figure 6 as not damaged fast uniform charger control strategy flow chart of the present invention, concrete control strategy is: begin to power on and carry out system initialization, software initialization, hardware initialization, operations such as overcurrent inspection, then cut off civil power if the warning of system exception or overcurrent occurs, otherwise microprocessing unit sends control signal starts accumulator parameter dynamic acquisition circuit, obtain storage battery initial condition parameter, microprocessing unit judges whether to carry out storage battery precharge according to sampled value, if need precharge, then be introduced into pre-charge state, otherwise the maximum initial charge of storage battery that microprocessing unit calculates according to sampled value can be accepted electric current and begins big electric current quick charge; In the quick charge process, microprocessing unit calculates according to sampled value at any time and judges whether each cell batteries parameter exceeds the default coherence request upper limit, if then start multichannel secondary chopper circuit switch, isolates charging, otherwise, continue whole charging process; Isolate in the charging process, microprocessing unit is monitored the dynamic sampled value of accumulator parameter at any time, if the dynamic sampled value of each cell batteries parameter satisfies and stops filling requirement and then stop charging process, otherwise, continue to isolate charging process.
The description of some details of control strategy: when storage battery carries out big electric current quick charge and isolates charging, the storage battery parameters, as terminal voltage, temperature rise rate of change etc. all needs to satisfy the certain upper limit threshold value just can reach the not damaged charging, be limited to the gassing rate on the general terminal voltage and be 0.05% battery open-circuit voltage, be limited on the temperature rise rate of change and be no more than 1-6 temperature rise variation unit; In big electric current quick charge and the isolation charging process, the empirical value that microprocessing unit obtains according to experiment carries out the positive negative pulse stuffing charging, and the one, solve the rapid polarization problem that rises in the charging process; The 2nd, keep storage battery and allow initial maximum chargeable current value, accelerate charging process.
The above only is preferred embodiment of the present invention, is not to be the restriction of the present invention being made other form, and any those skilled in the art may utilize the technology contents of above-mentioned announcement to be changed or be modified as the equivalent embodiment of equivalent variations.But every technical solution of the present invention content that do not break away to any simple modification, equivalent variations and remodeling that above embodiment did, still belongs to the protection range of technical solution of the present invention according to technical spirit of the present invention.