CN101854744A - GSM (Global System for Mobile Communication) digital multichannel frequency-selecting repeater and multichannel digital frequency-selecting digital signal processing method adopted thereby - Google Patents

Abstract

The invention discloses a GSM (Global System for Mobile Communication) digital multichannel frequency-selecting repeater used in a mobile communication system and a multichannel frequency-selecting digital signal processing method adopted thereby, wherein the GSM digital multichannel frequency-selecting repeater comprises a downlink, an uplink, a first duplexer module (117), a second duplexer module (109) and a control unit (108); the downlink and the uplink comprise a low-noise amplification module, a first analog frequency-mixing module, an analog-to-digital conversion module, a digital channel frequency-selecting module, a digital-to-analog conversion module, a second analog frequency-mixing module and a power amplification module. The multichannel frequency-selecting digital signal processing method comprises the following steps of: 1. obtaining a zero-frequency signal through the frequency mixing of a numerically controlled oscillator (NCO); 2. extracting by a cascade integral comb (CIC) filter; 3. carrying out FIR (Finite Impulse Response) low-pass filtering processing; 4. interpolating by the CIC filter; and 5. carrying out frequency mixing by the NCO. The invention can effectively lower the cost of the system and improve the parameter index, the adaptability and the maintainability of the system.

Description

GSM digital multichannel frequency selecting repeater and the multi-channel digital frequency selection signal processing method that is adopted thereof

Technical field

The invention belongs to the mobile communication technology field, more particularly, relate to a kind of GSM numeral multiselect frequency repeater in the mobile communication system and multi-channel digital frequency selection signal processing method that is adopted thereof of being applied to.

Background technology

From role communication network, the major function of repeater amplifies exactly from the base station that (descending) and travelling carriage (up) receive the useful signal of coming, and the signal after will amplifying sends through antenna (or other coupled modes).Improve the covering power of system base-station by this mode.In this amplification process, suppress the interference signal that receives into useful signal as far as possible, also to avoid producing simultaneously new interference.

Traditional wireless frequency selecting repeater adopts the analogue device design fully, each channel uses independently intermediate-frequency channel, finishes frequency-selecting with the intermediate frequency Surface Acoustic Wave Filter, and is bulky based on the simulation frequency-selective system of hardware, and analog signal is affected by environment bigger, is disturbed easily.The multiselect that 4,8,12,16 channels are arranged at present commonly used is the repeater frequently, and along with the cabinet volume that increases the components and parts cost and take, the power consumption of the number of channel all is multiplied with the increase of the number of channel, and production complexity, maintenance difficulties also increase.

Summary of the invention

The present invention is intended to overcome the deficiencies in the prior art part and a kind of effectively conserve system resources is provided and improves system environments adaptability, and cost advantage is obvious, reliability height, receiving sensitivity height, the GSM numeral multiselect frequency repeater that operation and maintenance cost are low.

The present invention also provides a kind of multi-channel digital frequency selection signal processing method that matches with said GSM numeral multiselect frequency repeater.

For achieving the above object, the present invention is achieved in that

GSM digital multichannel frequency selecting repeater, it comprises: down link, up link, first duplexer module, second duplexer module and control unit; Described down link comprises descending low noise amplification module, the descending first analog frequency mixing module, descending analog-to-digital conversion module, descending digital channel frequency-selecting module, descending D/A converter module, the descending second analog frequency mixing module and descending power amplifier module; Described up link comprises up low noise amplification module, the up first analog frequency mixing module, up analog-to-digital conversion module, upstream digital channel frequency-selecting module, up D/A converter module, the up second analog frequency mixing module and up power amplifier module;

The port of described descending analog-to-digital conversion module, descending digital channel frequency-selecting module, descending D/A converter module, up analog-to-digital conversion module, upstream digital channel frequency-selecting module and up D/A converter module connects the port of control unit;

Donor antenna receives the base station down signal, after first duplexer module send downstream signal descending low noise amplification module to amplify, be down-converted to analog if signal by the descending first analog frequency mixing module, after descending analog-to-digital conversion module conversion, enter into descending digital channel frequency-selecting module again and finish the frequency-selecting function, the frequency-selecting signal is after descending D/A converter module is carried out digital-to-analogue conversion, upconvert to radiofrequency signal through the descending second analog frequency mixing module again, after descending power amplifier module amplifies by second duplexer module) be sent to cable and distribution system, by retransmitting antenna to area of coverage radiation;

Retransmitting antenna receiving mobile upward signal, after second duplexer module is served upward signal capable low noise amplification module amplification, be down-converted to analog if signal by the up first analog frequency mixing module, after up analog-to-digital conversion module conversion, enter into upstream digital channel frequency-selecting module again and finish the frequency-selecting function, the frequency-selecting signal is after up mould modular converter carries out digital-to-analogue conversion, upconvert to radiofrequency signal through the up second analog frequency mixing module again, after up power amplifier module amplifies, be sent to donor antenna, send to the base station through donor antenna by first duplexer module.

As a kind of preferred version, descending digital channel frequency-selecting module of the present invention and upstream digital channel frequency-selecting module can adopt the EP3C55F484FPGA chip.

As another kind of preferred version, up D/A converter module of the present invention and descending D/A converter module can adopt the AD9779 chip.

Further, descending analog-to-digital conversion module of the present invention and up analog-to-digital conversion module can adopt the AD80141 chip.

Further, control unit of the present invention can adopt the ATMEGAL128 chip.

In addition, the phase-locked loop of the descending first analog frequency mixing module of the present invention, the descending second analog frequency mixing module, the up first analog frequency mixing module and the up second analog frequency mixing module can adopt the ADF4118 chip.

With the multichannel frequency-selecting digital signal processing method that said GSM digital multichannel frequency selecting repeater matches, it comprises the steps:

(1) obtains zero frequency signal after the same frequency cosine signal that produces with digital controlled oscillator respectively of digital intermediate frequency input signal and the sinusoidal signal mixing;

(2) described zero frequency signal extracts through integral comb filter;

(3) zero frequency signal after the extraction carries out the FIR low-pass filtering treatment again;

(4), carry out interpolation through integral comb filter by the zero frequency signal after the FIR low-pass filtering treatment;

(5) after the zero frequency signal after the described interpolation carries out the digital controlled oscillator mixing again, obtain the digital intermediate frequency output signal.

As a kind of preferred version, digital controlled oscillator of the present invention can adopt the directly frequency synthesis of numeral based on DSP algorithm ROM structure.

As another kind of preferred version, FIR filter of the present invention can adopt heterogeneous decomposition texture.

Digital frequency-selecting of the present invention has partly adopted the multi-channel digital frequency-selecting device based on FPGA, multichannel frequency-selecting function is finished in digital signal processor fully, the channel of intermediate frequency is selected, filtering realizes with software, it gives full play to the technical advantage of jumbo field programmable gate array (FPGA) device aspect Digital Signal Processing, uses FPGA and realizes the multi-channel digital frequency-selecting device.Increase based on the digitized multichannel frequency-selector number of channel can not bring being multiplied of device cost, and the number of channel is many more, and cost advantage is obvious more, simultaneously, power consumption, consistency of product, reliability definitely are guaranteed, for complete machine has brought many-sided benefit.The digital frequency-selecting device, the up-downgoing isolation is very high, can not produce self-excitation.Can carry out the functions of the equipments interpolation by software flexibly at different systems (CDMA, GSM, DCS, PCS, WCDMA, TD-SCDMA, CDMA2000) and network demand, the market response is rapid, and the device upgrade cost is lower.

The present invention compares with existing simulation frequency-selecting technology has following characteristics:

1, the increase of the number of channel can not bring being multiplied of device cost, and the number of channel is many more, and cost advantage is big more.

2, consistency of product, reliability definitely are guaranteed.

3, multichannel only needs a hardware module just can realize, can reduce volume and Overall Power Consumption exponentially.

4, digital form is realized, the up-downgoing isolation is very high, can not produce self-excitation.

5, digital system adopts general, modular hardware platform, can adapt to various communication service requirements (as language, image, data etc.), can be multiplexing at an easy rate when different systems and upgrading, can follow the tracks of turn of the market quickly, reduce the cost that updates.

6, the reliability height of digital system, the operation and maintenance cost in later stage thereby reduction.

Description of drawings

The invention will be further described below in conjunction with the drawings and specific embodiments.Protection scope of the present invention not only is confined to the statement of following content.

Fig. 1 is GSM numeral multiselect frequency of the present invention repeater structural representation;

Fig. 2 is analog-to-digital conversion module circuit theory diagrams of the present invention;

Fig. 3 is D/A converter module circuit theory diagrams of the present invention;

Fig. 4 is a control unit modular circuit schematic diagram of the present invention;

Fig. 5-1 is an analog frequency mixing modular circuit schematic diagram of the present invention;

Fig. 5-2 is an analog frequency mixing modular circuit schematic diagram of the present invention;

Fig. 6 is the implementation structure figure that the present invention is based on Digital Signal Processing in the multi-channel digital frequency-selecting module of FPGA;

Fig. 7 is the digital controlled oscillator NCO implementation structure figure in the Digital Signal Processing in the multi-channel digital frequency-selecting module of the present invention;

Fig. 8 is the implementation structure figure of the FIR filter in the multi-channel digital frequency-selecting module Digital Signal Processing of the present invention;

Fig. 9 is 4 grades of structure charts that extract cic filter in the multi-channel digital frequency-selecting module Digital Signal Processing of the present invention;

Figure 10 is the structure chart of 4 grades of interpolation CIC wave filters in the multi-channel digital frequency-selecting module Digital Signal Processing of the present invention.

Embodiment

As shown in the figure, GSM digital multichannel frequency selecting repeater, it comprises: down link, up link, first duplexer module 117,second duplexer module 109 andcontrol unit 108; Described down link comprises descending lownoise amplification module 101, the descending first analogfrequency mixing module 102, descending analog-to-digital conversion module 103, descending digital channel frequency-selecting module 104, descending D/A converter module 105, the descending second analogfrequency mixing module 106 and descendingpower amplifier module 107; Described up link comprises up lownoise amplification module 110, the up first analogfrequency mixing module 111, up analog-to-digital conversion module 112, upstream digital channel frequency-selecting module 113, up D/A converter module 114, the up second analogfrequency mixing module 115 and uppower amplifier module 116;

The port of described descending analog-to-digital conversion module 103, descending digital channel frequency-selecting module 104, descending D/A converter module 105, up analog-to-digital conversion module 112, upstream digital channel frequency-selecting module 113 and up D/A converter module 114 connects the port ofcontrol unit 108;

Donor antenna receives the base station down signal, after first duplexer module 117 send downstream signal descending lownoise amplification module 101 to amplify, be down-converted to analog if signal by the descending first analogfrequency mixing module 102, after descending analog-to-digital conversion module 103 conversions, enter into descending digital channel frequency-selecting module 104 again and finish the frequency-selecting function, the frequency-selecting signal is after descending D/A converter module 105 is carried out digital-to-analogue conversion, upconvert to radiofrequency signal through the descending second analogfrequency mixing module 106 again, after descendingpower amplifier module 107 amplifies, be sent to cable and distribution system bysecond duplexer module 109, by retransmitting antenna to area of coverage radiation;

Retransmitting antenna receiving mobile upward signal, aftersecond duplexer module 109 is served upward signal capable lownoise amplification module 110 amplifications, be down-converted to analog if signal by the up first analogfrequency mixing module 111, after up analog-to-digital conversion module 112 conversions, enter into upstream digital channel frequency-selecting module 113 again and finish the frequency-selecting function, the frequency-selecting signal is after up mouldmodular converter 114 carries out digital-to-analogue conversion, upconvert to radiofrequency signal through the up second analogfrequency mixing module 115 again, after uppower amplifier module 116 amplifies, be sent to donor antenna, send to the base station through donor antenna by first duplexer module 117.Descending digital channel frequency-selecting module 104 of the present invention and upstream digital channel frequency-selecting module 113 adopt the EP3C55F484FPGA chip; Described up D/A converter module and descending D/A converter module adopt the AD9779 chip; Described descending analog-to-digital conversion module 103 and up analog-to-digital conversion module 112 adopt the AD80141 chip; Described control unit adopts the ATMEGAL128 chip; The phase-locked loop of the described descending first analogfrequency mixing module 102, the descending second analogfrequency mixing module 106, the up first analogfrequency mixing module 111 and the up second analogfrequency mixing module 115 adopts the ADF4118 chip;

The multichannel frequency-selecting digital signal processing method that said GSM digital multichannel frequency selecting repeater is adopted, it comprises the steps:

(1) obtains zero frequency signal after the same frequency cosine signal that produces with digital controlled oscillator NCO respectively of digital intermediate frequency input signal and the sinusoidal signal mixing;

(2) described zero frequency signal extracts through integral comb filter CIC;

(3) zero frequency signal after the extraction carries out the FIR low-pass filtering treatment again;

(4), carry out interpolation through integral comb filter CIC by the zero frequency signal after the FIR low-pass filtering treatment;

(5) after the zero frequency signal after the described interpolation carries out digital controlled oscillator (NCO) mixing again, obtain the digital intermediate frequency output signal.

Digital controlled oscillator NCO of the present invention adopts the directly frequency synthesis of numeral based on DSP algorithm ROM structure, and described FIR filter adopts heterogeneous decomposition texture.

As shown in Figure 1, for the present invention possesses the digital frequency-selecting repeater that can select 16 channel functions at most, it comprises donor antenna, first duplexer, down link, up link, second duplexer, retransmitting antenna, control unit.Down link of the present invention comprises descending low noise amplifier module, the first analog frequency mixing module, analog-to-digital conversion module, digital frequency-selecting module, D/A converter module, the second analog frequency mixing module, power amplifier module.Up link of the present invention comprises up low noise amplifier module, the first analog frequency mixing module, analog-to-digital conversion module, digital frequency-selecting module, D/A converter module, the second analog frequency mixing module, power amplifier module.Up link of the present invention links to each other with donor antenna by first duplexer with down link, links to each other with retransmitting antenna by second duplexer.

Down link:

Descending lownoise amplification module 101 amplifies the downstream signal that donor antenna receives, and front end links to each other with first Duplexer Unit 117, and the rear end links to each other with the first analogfrequency mixing unit 102.

The first analogfrequency mixing unit 102 will be down-converted to analog intermediate frequency 75MHz through the radiofrequency signal that low noise amplifies, and provide it to descendingAD conversion unit 103.

DescendingAD conversion unit 103, analog signal conversion is digital signal after, send to descending digital frequency-selecting unit 104 and carry out frequency-selecting.

Descending digital frequency-selecting unit 104, digital signal after analog-to-digital conversion, after selecting required channel signals after the Digital Signal Processing, send to descending D/A conversion unit 105 in descending digital frequency-selecting unit 104, the digital signal processing of digital frequency-selecting unit is described in detail in accompanying drawing 6.

Descending D/Aconversion unit 105 after the digital signal after descending digital frequency-selecting unit 104 handled is converted to analog signal, is input to the descending second analogfrequency mixing module 106.

The descending second analogfrequency mixing module 106, the analog if signal after the digital-to-analogue conversion upconverted to radiofrequency signal after, send to descendingpower amplifier module 107.

Descendingpower amplifier module 107, the downstream signal power amplification after frequency-selecting etc. handled, and send to retransmitting antenna throughsecond Duplexer Unit 109.

Receive the upward signal of coming through retransmitting antenna, its processing procedure is with the downstream signal processing procedure.

Second Duplexer Unit 109 and first Duplexer Unit 117, being used for I/O filtering and uplink and downlink signals isolates, can select general cavity or dielectric duplexer according to the working frequency range scope, require the port standing-wave ratio less than 1.2, passband fluctuation is less than 0.7dB, isolation is greater than 80dB, and the present invention selects the vertical cavity duplexer of AW.DLX900-24-B model, and bandwidth range is 24MHz.

Up lownoise amplification module 110 and descending lownoise amplification module 101 have very strong amplification to small-signal, and its noise factor is very little simultaneously, and the prime that is used to amplify link, characteristics are low-noise factors, high-gain, low-power.Parameter index comprises: power output is 0dBm; Gain comprises a plurality of magnitudes such as 40dB, 45dB, 50dB, 55dB; Passband fluctuation is less than 1.0dB, and intermodulation is less than-60dBc, spuious dispersing in frequency band less than-70dBm; Standing-wave ratio is less than 1.3; Noise factor is less than 1.5.It is LNA900D-50 and LNA900U-50 uplink and downlink LNA that the present invention can select model.

Descendingpower amplifier module 107 and uppower amplifier module 116 place the final stage of amplifying link, thereby provide bigger power output to satisfy the power requirement of machine product.Parameter index comprises: output power value, select this parameter according to machine requirement; Yield value is generally the output power levels value and adds 10dB; Passband fluctuation is less than 1.5dB, and intermodulation is less than-45dBc; Standing-wave ratio is less than 1.3.It is PA900DY-33-43 and PA900UY-33-43 uplink and downlink power amplifier that the present invention can select model.

Control unit 108 is controlled up-downgoing analog-to-digital conversion module, digital frequency-selecting module, D/A converter module.

As shown in Figure 2, be analog-to-digital conversion module circuit theory diagrams of the present invention, this circuit adopts high-speed AD converter spare AD80141 chip.Major parameter: single channel, maximum sample frequency are Fs=145MSPS, 11 of dateouts.

As shown in Figure 3, be D/A converter module circuit theory diagrams of the present invention, circuit adopts high-speed A/D converter spare AD9779 chip, major parameter: IQ binary channels, maximum sample frequency is 1GSPS, the input significance bit is 16, and 2,4,8 times of interpolation operations can be selected for the input data in inner integrated PLL and VCO unit.

As shown in Figure 4, be control unit modular circuit schematic diagram of the present invention, circuit adopts the little process chip of ATMEGAL128 as control chip, and ATmega128L is 8 AVR singlechip microprocessor, have 64 pins, wherein 8 ports totally 53 programmable I/O pins.

Shown in Fig. 5-1 and Fig. 5-2, be analog frequency mixing modular circuit schematic diagram of the present invention, the phase-locked loop in the circuit adopts the ADF4118 chip.

As shown in Figure 6, be multi-channel digital signal processing implementation structure figure based on the descending digital frequency-selecting unit 104 of FPGA.The digital frequency-selecting unit hardware is made of the EP3C55F484FPGA chip.Its frequency-selecting function realizes that by hardware programming language VHDL programming being implemented as follows of frequency-selecting function is described.

Digital mixing unit 201, the accurate cosine signal mixing that digital medium-frequency signal that descendingAD conversion unit 103 is sent and digital controlledoscillator NCO1 unit 206 produce, finish the frequency-selecting function, and digital medium-frequency signal is down-converted to zero-frequency, send integralcomb filter Unit 202, finish the frequency-selecting and the digital zero frequency conversion function on the Q road of channel 1.The frequency-selecting and the digital zero frequency conversion function on the accurate sinusoidal signal mixing that produces of the digital medium-frequency signal that sends of descendingAD conversion unit 103 and digital controlledoscillator NCO1 unit 206 in like manner,, I road thatchannel 1 is finished in frequency conversion.

Integral comb filterCIC extracting unit 202, to the signal through frequency-selecting extract, filtering, realizing that band is outer suppresses.

FIR filter cell 203, the further Filtering Processing of signal to after extracting through CIC realizes filtering in the band.

Integral comb filterCIC interpolating unit 204 is carried out interpolation with the filtered signal of FIR filter low pass, and sends into Digital UpConvert unit 205.

The conversion of zero frequency signal to digital medium-frequency signal finished in Digital UpConvert unit 205.

Adder unit 207 is finished the I ofchannel 1, the summation of Q two paths of signals.

In like manner, the frequency-selecting of each channel and Filtering Processing process are identical.

Adder unit 208 is finished the summation of multi-channel signal, forms wideband digital intermediate frequency output signal, is sent to the descending D/A conversion unit 105 shown in the accompanyingdrawing 1.

Referring to accompanying drawing 7, be the digital controlled oscillator NCO implementation structure figure in the Digital Signal Processing in the multi-channel digital frequency-selecting module of the present invention.

The implementation of NCO has based on full ROM structure, CORDIC structure, 1/4ROM structure and based on several versions such as ROM structure of DSP algorithm.Realize using the situation of FPGA resource and the effect that reaches to compare according to these several structures, adopt ROM structure based on the DSP algorithm.Based on the ROM structure of DSP algorithm as shown in Figure 7, numeral directly frequency synthesis adopts four ROM look-up tables, and two ROM search the output that is used to realize the SIN waveform, the output of two ROM look-up tables'implementation COS waveforms, and the specific implementation principle analysis is as follows:

If unit circle is divided into N (N=2ⁿ) five equilibrium, every five equilibrium represents that with Φ every five equilibrium is divided into the little five equilibrium of N again, represents with θ, then arbitrarily angled just can be that (n Φ+n θ) represents.

sin(nΦ+nθ)＝sin(nΦ)cos(nθ)+cos(nΦ)sin(nθ) (1)

cos(nΦ+nθ)＝cos(nΦ)cos(nθ)-sin(nΦ)sin(nθ) (2)

By formula (1), (2) as can be known, need finish by four look-up tables based on the ROM table of this structure, sin (n Φ), cos (n Φ) and sin (n θ), cos (n θ) look-up table also needs two DSP modules in addition.

Participate in accompanying drawing 8, be the implementation structure figure of the FIR filter in the multi-channel digital frequency-selecting module Digital Signal Processing of the present invention.

Owing to cic filter as first order filter, is realized extracting and the low-pass filtering effect, adopts the FIR filter in the second level, this moment, they were operated under the lower frequency, and the parameter of filter has obtained optimization, and is therefore easier of the realization of lower-order number, saved resource.

Heterogeneous being illustrated in when realizing extraction and interpolation of FIR filter can be improved computational efficiency.Heterogeneous expression is called heterogeneous decomposition again, and it is meant the group that the transfer function H (z) of digital filter is resolved into several outs of phase.In the FIR filter, transfer function is expressed as:

$H\left(z\right)=\underset{n=0}{\overset{N-1}{\mathrm{\Σ}}}h\left(n\right)z^{-n}---\left(3\right)$

(3) N represents the length of filter in the formula.If impulse function is responded h (n) be divided into D group, and establish the integral multiple that N is D by following arrangement, i.e. N/D=Q, Q is an integer, then

$\begin{array}{ccc}H\left(z\right)=h\left(0\right)z^0& +h\left(D\right)z^{-D}& +\·\·\·+h\left[(Q-1)D\right]z^{-(Q-1)D}\end{array}$

$\begin{array}{ccc}+h\left(1\right)z^{-1}& +h(D+1)z^{-(D+1)}& +\·\·\·+h[(Q-1)D+1]z^{-(Q-1)D-1}\end{array}-$

$\begin{array}{ccc}+h\left(2\right)z^{-2}& +h(D+2)z^{-(D+2)}& +\·\·\·+h[(Q-1)D+2]z^{-(Q-1)D-2}\end{array}-$

$\begin{array}{ccc}\·\·\·& \·\·\·& \·\·\·\end{array}$

$\begin{array}{ccc}+h(D-1)z^{-(D-1)}& +h(2D-1)z^{-(2D-1)}& +\·\·\·+h[(Q-1)D+D-1]z^{-(Q-1)D-(D-1)}\end{array}$

$=\underset{n=0}{\overset{Q-1}{\mathrm{\Σ}}}h(\mathrm{nD}+0){\left(2^D\right)}^{-n}+z^{-1}\underset{n=0}{\overset{Q-1}{\mathrm{\Σ}}}h(\mathrm{nD}+1){\left(2^D\right)}^{-n}+\·\·\·$

$+z^{-(D-1)}\underset{n=0}{\overset{Q-1}{\mathrm{\Σ}}}h(\mathrm{nD}+D-1){\left(2^D\right)}^{-n}---\left(4\right)$

Order$E_k\left(2^D\right)=\underset{n=0}{\overset{Q-1}{\mathrm{\Σ}}}h(\mathrm{nD}+k){\left(2^D\right)}^{-n},k=\mathrm{0,1,2},\·\·\·D-1---\left(5\right)$

Then$h\left(z\right)=\underset{k=0}{\overset{D-1}{\mathrm{\Σ}}}{z}^{-k}{E}_k\left(2^D\right)---\left(6\right)$

Based on this principle, the implementation structure of FIR filter can be by accompanying drawing 8 expressions.

Referring to accompanying drawing 9 and accompanying drawing 10, be the structure chart of cic filter in the multi-channel digital frequency-selecting module Digital Signal Processing of the present invention.

Cic filter has following impulse response:

$h\left(n\right)=\left\{\begin{array}{cc}1& 0\≤n\≤D-1\\ 0& \mathrm{others}\end{array}\right.---\left(7\right)$

According to the definition of Z-transformation, the Z-transformation of cic filter is:

$H\left(z\right)=\underset{n=0}{\overset{D-1}{\mathrm{\Σ}}}h\left(n\right)z^{-n}=\frac{1-z^{-D}}{1-z^{-1}}=H_1\left(z\right)H_2\left(z\right)---\left(8\right)$

$H_1\left(z\right)=\frac{1}{{1-z}^{-1}};$H₂(z)＝1-z^-D；

H1 is an integrator, and the frequency response of H2 resembles a comb, so it is called comb filter visually.Single-stage cic filter sidelobe level is bigger, and only than the low 13.46dB of main lobe level, this just means that decay is very poor.In order to reduce sidelobe level, usually adopt the method for multistage CIC cascade to solve.Accompanying drawing 9 is depicted as 4 grades of structures that extract cic filter, and accompanying drawing 10 is depicted as the structure of 4 grades of interpolation CIC wave filters.

Be with being appreciated that, more than about specific descriptions of the present invention, only be used to the present invention is described and be not to be subject to the described technical scheme of the embodiment of the invention, those of ordinary skill in the art is to be understood that, still can make amendment or be equal to replacement the present invention, to reach identical technique effect; Use needs as long as satisfy, all within protection scope of the present invention.

Claims (9)

1.GSM the digital multichannel frequency selecting repeater is characterized in that, comprising: down link, up link, first duplexer module (117), second duplexer module (109) and control unit (108); Described down link comprises descending low noise amplification module (101), the descending first analog frequency mixing module (102), descending analog-to-digital conversion module (103), descending digital channel frequency-selecting module (104), descending D/A converter module (105), the descending second analog frequency mixing module (106) and descending power amplifier module (107); Described up link comprises up low noise amplification module (110), the up first analog frequency mixing module (111), up analog-to-digital conversion module (112), upstream digital channel frequency-selecting module (113), up D/A converter module (114), the up second analog frequency mixing module (115) and up power amplifier module (116);

The port of described descending analog-to-digital conversion module (103), descending digital channel frequency-selecting module (104), descending D/A converter module (105), up analog-to-digital conversion module (112), upstream digital channel frequency-selecting module (113) and up D/A converter module (114) connects the port of control unit (108);

Donor antenna receives the base station down signal, after first duplexer module (117) send downstream signal descending low noise amplification module (101) to amplify, be down-converted to analog if signal by the descending first analog frequency mixing module (102), after descending analog-to-digital conversion module (103) conversion, enter into descending digital channel frequency-selecting module (104) again and finish the frequency-selecting function, the frequency-selecting signal is after descending D/A converter module (105) is carried out digital-to-analogue conversion, upconvert to radiofrequency signal through the descending second analog frequency mixing module (106) again, after descending power amplifier module (107) amplifies, be sent to cable and distribution system by second duplexer module (109), by retransmitting antenna to area of coverage radiation;

Retransmitting antenna receiving mobile upward signal, after second duplexer module (109) is served upward signal capable low noise amplification module (110) amplification, be down-converted to analog if signal by the up first analog frequency mixing module (111), after up analog-to-digital conversion module (112) conversion, enter into upstream digital channel frequency-selecting module (113) again and finish the frequency-selecting function, the frequency-selecting signal is after up D/A converter module (114) is carried out digital-to-analogue conversion, upconvert to radiofrequency signal through the up second analog frequency mixing module (115) again, after up power amplifier module (116) amplifies, be sent to donor antenna, send to the base station through donor antenna by first duplexer module (117).

2. GSM numeral multiselect according to claim 1 is the repeater frequently, and it is characterized in that: described descending digital channel frequency-selecting module (104) and upstream digital channel frequency-selecting module (113) adopt the EP3C55F484FPGA chip.

3. GSM numeral multiselect according to claim 1 and 2 is the repeater frequently, and it is characterized in that: described up D/A converter module and descending D/A converter module adopt the AD9779 chip.

4. GSM numeral multiselect according to claim 3 is the repeater frequently, and it is characterized in that: described descending analog-to-digital conversion module (103) and up analog-to-digital conversion module (112) adopt the AD80141 chip.

5. GSM numeral multiselect according to claim 4 is the repeater frequently, and it is characterized in that: described control unit (108) adopts the ATMEGAL128 chip.

6. GSM numeral multiselect according to claim 5 is the repeater frequently, and it is characterized in that: the phase-locked loop of the described descending first analog frequency mixing module (102), the descending second analog frequency mixing module (106), the up first analog frequency mixing module (111) and the up second analog frequency mixing module (115) adopts the ADF4118 chip.

7. the multichannel frequency-selecting digital signal processing method that is adopted according to claim 1 or 2 described GSM digital multichannel frequency selecting repeaters is characterized in that, comprises the steps:

(1) obtains zero frequency signal after the same frequency cosine signal that produces with digital controlled oscillator (NCO) respectively of digital intermediate frequency input signal and the sinusoidal signal mixing;

(2) described zero frequency signal extracts through integral comb filter (CIC);

(3) zero frequency signal after the extraction carries out the FIR low-pass filtering treatment again;

(4) by the zero frequency signal after the FIR low-pass filtering treatment, (CIC) carries out interpolation through integral comb filter;

(5) after the zero frequency signal after the described interpolation carries out digital controlled oscillator (NCO) mixing again, obtain the digital intermediate frequency output signal.

8. according to the described GSM of the claim 7 numeral multiselect multi-channel digital frequency selection signal processing method that adopts of repeater frequently, it is characterized in that: described digital controlled oscillator (NCO) adopts the directly frequency synthesis of numeral based on DSP algorithm ROM structure.

9. the multi-channel digital frequency selection signal processing method that adopt described according to Claim 8 GSM numeral multiselect frequency repeater, it is characterized in that: described FIR filter adopts heterogeneous decomposition texture.

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