

技术领域technical field
本发明涉及通信领域,尤其涉及一种网络处理器、网络处理器访问数据结构的方法及系统。 The invention relates to the communication field, in particular to a network processor, a method and a system for accessing a data structure by the network processor. the
背景技术Background technique
随着网络带宽的飞速增长和各种新的网络应用不断涌现,原有的基于通用处理器和专用集成电路ASIC(Application Specific Integrated Circuit)的互联网架构已经不能满足新的需求。兼具强大处理能力和灵活可编程配置能力的网络处理器NP(Network Processor)逐渐得到广泛的应用,比如包处理、协议分析、路由查找、声音/数据的汇聚、防火墙、QOS等等。目前的NP一般指综合业务的网络处理器,即完成各种转发功能的网络处理器。 With the rapid growth of network bandwidth and the continuous emergence of various new network applications, the original Internet architecture based on general-purpose processors and application specific integrated circuits (ASICs) can no longer meet the new needs. The network processor NP (Network Processor), which has both powerful processing capabilities and flexible programmable configuration capabilities, has gradually been widely used, such as packet processing, protocol analysis, routing lookup, voice/data aggregation, firewall, QOS, etc. The current NP generally refers to a network processor for integrated services, that is, a network processor that completes various forwarding functions. the
网络处理器主要包括转发引擎(FE,Forwarding Engine)、协处理器和交换接口。转发引擎负责报文的转发处理,该转发引擎内设置有内部寄存器,通常多个转发引擎并行处理,通过软件来实现转发控制处理流程;协处理器主要用以对网络处理器的硬件单元进行操作和控制;交换接口主要用以与外部网络进行交互。网络处理器外部还包括有外围存储器(如Sram、Dram等),用以存储数据结构(Data Structure)等信息并与网络处理器相通信。 The network processor mainly includes a forwarding engine (FE, Forwarding Engine), a coprocessor and a switching interface. The forwarding engine is responsible for the forwarding and processing of messages. The forwarding engine is equipped with internal registers. Usually, multiple forwarding engines process in parallel, and the forwarding control process is realized through software; the coprocessor is mainly used to operate the hardware unit of the network processor. and control; the switching interface is mainly used to interact with the external network. The outside of the network processor also includes peripheral memories (such as Sram, Dram, etc.), which are used to store information such as data structures (Data Structure) and communicate with the network processor. the
在实现本发明过程中,发明人发现现有技术中至少存在如下问题: In the process of realizing the present invention, the inventor finds that there are at least the following problems in the prior art:
网络处理器在进行信息处理的过程中需要访问大量的数据结构,高速的网络处理器在发起对数据结构的访问指令后,需要等待慢速的外围存储器返回数据结构,才能将数据结构读至网络处理器内,进行修改处理后,再写回外围存储器中。由于网络处理器与外围的存储器执行速率不匹配,影响网络处理器的 处理性能。 The network processor needs to access a large number of data structures in the process of information processing. After the high-speed network processor initiates the access command to the data structure, it needs to wait for the slow peripheral memory to return the data structure before reading the data structure to the network. In the processor, after modification processing, it is written back to the peripheral memory. The processing performance of the network processor is affected due to the mismatch between the execution speed of the network processor and the peripheral memory. the
发明内容Contents of the invention
本发明实施例在于提供一种网络处理器、网络处理器访问数据结构的方法及系统,保证网络处理器访问数据结构的快速性,同时也保证网络处理器的内部寄存器空间的有效利用。 Embodiments of the present invention provide a network processor, a method and a system for accessing a data structure by the network processor, to ensure the speed of the network processor's access to the data structure, and to ensure the effective use of the internal register space of the network processor. the
本发明实施例提出的一种网络处理器访问数据结构的方法,包括:获取需要访问的数据结构的特征值; A method for accessing a data structure by a network processor proposed in an embodiment of the present invention includes: obtaining a characteristic value of a data structure to be accessed;
根据所述需要访问的数据结构的特征值查找寻址存储器,如果在所述寻址存储器中查询到所述需要访问的数据结构的特征值,则内部寄存器存在所述需要访问的数据结构,从所述内部寄存器中访问所述数据结构。 Find the addressable memory according to the characteristic value of the data structure that needs to be accessed, if the characteristic value of the data structure that needs to be accessed is found in the addressable memory, the internal register has the data structure that needs to be accessed, from The data structure is accessed in the internal register. the
本发明实施例提出的一种网络处理器,包括:获取单元,用于获取需要访问的数据结构的特征值;内部寄存器,用于寄存所述需要访问的数据结构;寻址存储器,用于存储和所述内部寄存器中的所述需要访问的数据结构对应的特征值;查找单元,用于根据所述需要访问的数据结构对应的特征值查找所述寻址存储器和/或外围存储器;访问单元,用于从内部寄存器中访问所述数据结构。 A network processor proposed by an embodiment of the present invention includes: an acquisition unit, configured to acquire the characteristic value of the data structure that needs to be accessed; an internal register, used to register the data structure that needs to be accessed; an addressable memory, used to store A feature value corresponding to the data structure that needs to be accessed in the internal register; a search unit, configured to search the addressable memory and/or peripheral memory according to the feature value corresponding to the data structure that needs to be accessed; an access unit , used to access the data structure from an internal register. the
本发明实施例提出的一种网络处理器访问数据结构的系统,包括:外围存储器和网络处理器,其中,所述网络处理器包括内部寄存器和寻址存储器;所述网络处理器获取需要访问的数据结构的特征值,根据所述需要访问的数据结构的特征值查找所述寻址存储器,如果在所述寻址存储器中查询到所述需要访问的数据结构的特征值,则内部寄存器存在所述需要访问的数据结构,则所述网络处理器从所述内部寄存器中访问所述数据结构。 A system for a network processor accessing a data structure proposed by an embodiment of the present invention includes: a peripheral memory and a network processor, wherein the network processor includes an internal register and an addressing memory; According to the characteristic value of the data structure, the addressable memory is searched according to the characteristic value of the data structure that needs to be accessed. If the characteristic value of the data structure that needs to be accessed is found in the addressable memory, the internal register has all If the above data structure needs to be accessed, the network processor accesses the data structure from the internal register. the
本发明实施例通过将数据结构预先读入内部寄存器,并动态地在外围存储器和内部寄存器之间进行数据结构的搬移,保证网络处理器访问数据结构的快速性,同时保证了对内部寄存器空间的有效利用。In the embodiment of the present invention, by pre-reading the data structure into the internal register, and dynamically moving the data structure between the peripheral memory and the internal register, the speed of accessing the data structure by the network processor is ensured, and at the same time, the access to the internal register space is ensured. use efficiently.
附图说明Description of drawings
图1是本发明实施例网络处理器访问数据结构的方法流程示意图; Fig. 1 is a schematic flow diagram of a method for accessing a data structure by a network processor according to an embodiment of the present invention;
图2是本发明的实施例数据结构更新的方法流程示意图; Fig. 2 is a schematic flow chart of the method for updating the data structure of an embodiment of the present invention;
图3是本发明实施例用于网络处理器访问数据结构的系统结构示意图。 FIG. 3 is a schematic diagram of a system structure for a network processor to access a data structure according to an embodiment of the present invention. the
具体实施方式Detailed ways
本发明实施例提供一种网络处理器、网络处理器访问数据结构的方法及系统,下面结合附图详细说明本发明的优选实施例。 Embodiments of the present invention provide a network processor, a method and a system for accessing a data structure by the network processor, and preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings. the
请参考图1所示,在本发明的实施例中,网络处理器访问数据结构的方法包括: Please refer to shown in Fig. 1, in the embodiment of the present invention, the method for network processor access data structure comprises:
11:为数据结构设置特征值; 11: Set the characteristic value for the data structure;
在本发明的实施例中,为数据结构预先设置特征值,每个数据结构对应一个特征值; In an embodiment of the present invention, the characteristic value is preset for the data structure, and each data structure corresponds to a characteristic value;
12:将至少一数据结构添加到内部寄存器,该数据结构对应的特征值添加到寻址存储器; 12: Add at least one data structure to the internal register, and add the characteristic value corresponding to the data structure to the addressable memory;
通常是在系统初始化阶段进行此12,在此12中,并不一定要把所有的数据结构都预先读入,较优的是选择其中常用的数据结构读入内部寄存器,例如对网络流量做CAR(commit access rate,即流量限制),如果对应索引为1~100的CAR表是经常被查找的,那么就把这些CAR表读入内部寄存器,而不太使用的CAR表仍然留在外围存储器。 This 12 is usually performed during the system initialization phase. In this 12, it is not necessary to read all the data structures in advance. It is better to select the commonly used data structures and read them into the internal registers, such as doing CAR for network traffic. (commit access rate, that is, flow limit), if the CAR tables corresponding to indexes 1 to 100 are frequently searched, then these CAR tables are read into the internal registers, and the less used CAR tables are still left in the peripheral memory. the
13:网络处理器需要访问某一数据结构时,获取需要访问的数据结构的特征值,根据该所需数据结构的特征值在寻址存储器和/或外围存储器中查找该所需数据结构; 13: When the network processor needs to access a certain data structure, obtain the characteristic value of the data structure that needs to be accessed, and search the required data structure in the addressable memory and/or peripheral memory according to the characteristic value of the required data structure;
在此13中,首先查找寻址存储器中是否存在与所需数据结构相对应的特征值;如果寻址存储器中存在该所需数据结构相对应的特征值,则表明在内部寄存器中存在该所需数据结构;如果寻址存储器中不存在该所需数据结构相对应的特征值,则表明在内部寄存器中不存在该所需数据结构;当寻址存储器中不 存在该所需数据结构相对应的特征值,需要继续查找外围存储器,然后内部寄存器从外围存储器中获取所需数据结构,寻址存储器获取所需数据结构对应的特征值; In this 13, at first search whether there is a characteristic value corresponding to the required data structure in the addressable memory; required data structure; if there is no characteristic value corresponding to the required data structure in the addressing memory, it indicates that the required data structure does not exist in the internal register; when the required data structure does not exist in the addressing memory eigenvalue, need to continue to search the peripheral memory, then the internal register obtains the required data structure from the peripheral memory, and addresses the memory to obtain the eigenvalue corresponding to the required data structure;
在此13中,由于网络处理器的内部寄存器的空间有限,较优的是,在有新的数据结构添加到内部寄存器后,可以选择将不常访问的数据结构和该不常访问的数据结构对应的特征值从内部寄存器和寻址存储器移至外围存储器,例如可以基于最近一次被访问的时间记录,来判断不常访问的数据结构,当有新的数据结构添加到内部寄存器后,可以将不常访问的数据结构替换出去。 In this 13, due to the limited space of the internal registers of the network processor, preferably, after a new data structure is added to the internal registers, it is possible to select the infrequently accessed data structure and the infrequently accessed data structure The corresponding eigenvalues are moved from the internal register and addressable memory to the peripheral memory. For example, based on the time record of the latest access, it is possible to judge the data structure that is not frequently accessed. When a new data structure is added to the internal register, it can be Infrequently accessed data structures are replaced. the
14:网络处理器从内部寄存器中访问该所需数据结构。 14: The network processor accesses the required data structure from an internal register. the
经过上面的方法,保证网络处理器所需要访问的数据结构在内部寄存器中,即网络处理器能够从内部寄存器中直接访问该所需数据结构。 Through the above method, ensure that the data structure that the network processor needs to access is in the internal register, that is, the network processor can directly access the required data structure from the internal register. the
在本发明实施例中,将经常被访问的数据结构预先读入内部寄存器,并动态地在外围存储器和内部寄存器之间进行数据结构的搬移,保证网络处理器访问数据结构的快速性,同时保证了对内部寄存器空间的有效利用。 In the embodiment of the present invention, the frequently accessed data structures are read into the internal registers in advance, and the data structures are dynamically moved between the peripheral memory and the internal registers to ensure the speed of the network processor accessing the data structures, while ensuring efficient use of the internal register space. the
数据结构会有被控制层面刷新的情况,外围存储器会根据控制层面刷新的情况对数据结构进行更新,并根据数据结构更新的情况,对网络处理器的内部寄存器中存储的数据结构进行及时更新,在本发明的实施例中,请参考图2所示,方法如下: The data structure will be refreshed by the control plane, and the peripheral memory will update the data structure according to the refresh of the control plane, and update the data structure stored in the internal register of the network processor in time according to the update of the data structure. In an embodiment of the present invention, please refer to that shown in Figure 2, the method is as follows:
21:接收更新数据结构的特征值; 21: Receive the characteristic value of the updated data structure;
该更新数据结构的特征值可以由控制层面向网络处理器传递,也可以由外围存储器向网络处理器传递。 The characteristic value of the updated data structure may be transmitted from the control plane to the network processor, or may be transmitted from the peripheral memory to the network processor. the
22:查找寻址存储器中是否存在该更新数据结构的特征值; 22: Find whether the characteristic value of the updated data structure exists in the addressable memory;
如果寻址存储器中不存在该更新数据结构的特征值,则表明在内容寄存器中不存在对应的数据结构,即无需进行更新处理; If the characteristic value of the updated data structure does not exist in the addressable memory, it indicates that there is no corresponding data structure in the content register, that is, no update process is required;
如果寻址存储器中存在该更新数据结构的特征值,则表明在内部寄存器中存在相对应的没有被更新的数据结构,执行步骤23; If there is a characteristic value of the updated data structure in the addressable memory, it indicates that there is a corresponding data structure that has not been updated in the internal register, and step 23 is performed;
23:将外围存储器中的更新数据结构添加到内部寄存器,并替换原数据结 构。 23: Add the updated data structure in the peripheral memory to the internal register, and replace the original data structure. the
在本发明实施例中,确保内部寄存器中的数据结构能够被及时更新,进一步保证了网络处理器访问数据结构的快速性。 In the embodiment of the present invention, it is ensured that the data structure in the internal register can be updated in time, which further ensures the speed of accessing the data structure by the network processor. the
请参考图3所示,本发明的实施例提供了一种网络处理器以及用于网络处理器访问数据结构的系统,其中该系统包括网络处理器和外围存储器。 Referring to FIG. 3 , an embodiment of the present invention provides a network processor and a system for the network processor to access a data structure, wherein the system includes a network processor and a peripheral memory. the
网络处理器包括: Network processors include:
设置单元111,用于为数据结构设置特征值; Setting
添加单元112,用于将至少一数据结构添加到内部寄存器,并将添加到内部寄存器中的数据结构对应的特征值添加到寻址存储器; The adding
内部寄存器113,用于寄存数据结构,网络处理器访问该内部寄存器113获取所需要的数据结构; The
寻址存储器114,用于存储和内部寄存器113中所寄存的数据结构对应的特征值; The
查找单元115,用于根据数据结构对应的特征值查找寻址存储器114和/或外围存储器,其中,首先查找寻址存储器114,如果在寻址存储器114查找到,则表明在内部寄存器113中存在该数据结构,如果没有在寻址存储器114中查找到,则表明在内部寄存器113中不存在该所需数据结构,而需要进一步查找外围存储器,将所需数据结构从外围存储器搬移到内部寄存器113,并将该所需数据结构对应的特征值添加到寻址存储器114; The
访问单元116,用于从内部寄存器113中访问数据结构。 The
该网络处理器还包括: The network processor also includes:
获取单元117:用于获取特征值,其中, Acquisition unit 117: for obtaining feature values, wherein,
该特征值可能是网络处理器需要访问的数据结构对应的特征值,当该获取单元117获取该需要访问的数据结构对应的特征值后,查找单元115根据获取的该需要访问的数据结构对应的特征值查找寻址存储器114和/或外围存储器,访问单元116从内部寄存器113读取所需要访问的数据结构; The eigenvalue may be the eigenvalue corresponding to the data structure that the network processor needs to access. After the
该特征值也可能是更新的数据结构对应的特征值,当该获取单元115获取 该更新的数据结构对应的特征值后,查找单元115根据获取的该更新的数据结构对应的特征值查找寻址存储器114和/或外围存储器,根据查找结果判断是否需要更新内部寄存器113中的数据结构,即如果在寻址存储器114中没有查找到该更新的数据结构对应的特征值时,则内部寄存器113中没有和该更新的数据结构对应的原数据结构,内部寄存器113无需更新,如果在寻址存储器114中查找到该更新的数据结构对应的特征值时,则内部寄存器113有和该更新的数据结构对应的原数据结构,该内部寄存器113从所述外围存储器中获取所述更新的数据结构,替换内部寄存器113中的原数据结构。 The eigenvalue may also be the eigenvalue corresponding to the updated data structure. After the
本领域普通技术人员可以理解实现上述实施例方法中的全部或部分步骤是可以通过程序来指令相关的转发平面完成,所述的程序可以存储于计算机可读存储介质中,所述存储介质可以是ROM/RAM,磁盘或光盘等。 Those of ordinary skill in the art can understand that all or part of the steps in the method of the above embodiments can be implemented by instructing the relevant forwarding plane through a program, and the program can be stored in a computer-readable storage medium, and the storage medium can be ROM/RAM, disk or CD, etc. the
以上所揭露的仅为本发明实施例中的一种较佳实施例而已,当然不能以此来限定本发明之权利范围,因此依本发明权利要求所作的等同变化,仍属本发明所涵盖的范围。What is disclosed above is only a preferred embodiment of the embodiments of the present invention, and of course it cannot limit the scope of the present invention. Therefore, the equivalent changes made according to the claims of the present invention are still covered by the present invention. scope.
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008102162753ACN101677293B (en) | 2008-09-18 | 2008-09-18 | Network processor and method and system for network processor to access data structure |
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008102162753ACN101677293B (en) | 2008-09-18 | 2008-09-18 | Network processor and method and system for network processor to access data structure |
| Publication Number | Publication Date |
|---|---|
| CN101677293A CN101677293A (en) | 2010-03-24 |
| CN101677293Btrue CN101677293B (en) | 2012-12-12 |
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008102162753AExpired - Fee RelatedCN101677293B (en) | 2008-09-18 | 2008-09-18 | Network processor and method and system for network processor to access data structure |
| Country | Link |
|---|---|
| CN (1) | CN101677293B (en) |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1320867A (en)* | 2000-04-10 | 2001-11-07 | 国际商业机器公司 | Method and system for managing memory in network processing system |
| US6687803B1 (en)* | 2000-03-02 | 2004-02-03 | Agere Systems, Inc. | Processor architecture and a method of processing |
| CN1666185A (en)* | 2002-07-09 | 2005-09-07 | 英特尔公司 | Configurable multi-port multi-protocol network interface to support packet processing |
| WO2007036067A1 (en)* | 2005-09-28 | 2007-04-05 | Intel Corporation | Updating entries cached by a network processor |
| CN101221538A (en)* | 2008-01-24 | 2008-07-16 | 杭州华三通信技术有限公司 | System and method for implementing fast data search in caching |
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6687803B1 (en)* | 2000-03-02 | 2004-02-03 | Agere Systems, Inc. | Processor architecture and a method of processing |
| CN1320867A (en)* | 2000-04-10 | 2001-11-07 | 国际商业机器公司 | Method and system for managing memory in network processing system |
| CN1666185A (en)* | 2002-07-09 | 2005-09-07 | 英特尔公司 | Configurable multi-port multi-protocol network interface to support packet processing |
| WO2007036067A1 (en)* | 2005-09-28 | 2007-04-05 | Intel Corporation | Updating entries cached by a network processor |
| CN101221538A (en)* | 2008-01-24 | 2008-07-16 | 杭州华三通信技术有限公司 | System and method for implementing fast data search in caching |
| Publication number | Publication date |
|---|---|
| CN101677293A (en) | 2010-03-24 |
| Publication | Publication Date | Title |
|---|---|---|
| US10719463B1 (en) | Hardware handling memory write request during memory data migration | |
| US9871727B2 (en) | Routing lookup method and device and method for constructing B-tree structure | |
| US9116800B2 (en) | Block-based storage device with a memory-mapped interface | |
| US7200713B2 (en) | Method of implementing off-chip cache memory in dual-use SRAM memory for network processors | |
| US20120173840A1 (en) | Sas expander connection routing techniques | |
| US8423689B2 (en) | Communication control device, information processing device and computer program product | |
| CN109522243A (en) | Metadata cache management method, device and storage medium in a kind of full flash memory storage | |
| CN116192740B (en) | Flow table unloading method, device, electronic device and readable storage medium | |
| CN117714398A (en) | A data transmission system, method, electronic device and storage medium | |
| US6629195B2 (en) | Implementing semaphores in a content addressable memory | |
| CN114258533A (en) | Optimizing access to page table entries in processor-based devices | |
| CN101770485A (en) | Method and device for adding table items, and method, device and system for processing table items | |
| US7155576B1 (en) | Pre-fetching and invalidating packet information in a cache memory | |
| WO2014190700A1 (en) | Method of memory access, buffer scheduler and memory module | |
| CN115357525A (en) | Snoop filter, processing unit, computing device and related methods | |
| US20060136694A1 (en) | Techniques to partition physical memory | |
| CN115203211A (en) | A method and system for generating a unique hash sequence number | |
| CN107967273A (en) | Data capture method, back end and system | |
| US6947971B1 (en) | Ethernet packet header cache | |
| CN101677293B (en) | Network processor and method and system for network processor to access data structure | |
| CN117749762B (en) | DNS access request processing method, device, equipment and storage medium | |
| US10255213B1 (en) | Adapter device for large address spaces | |
| JP7109583B2 (en) | DATA PROCESSING METHOD, APPARATUS AND COMPUTER-READABLE STORAGE MEDIUM | |
| CN109117288B (en) | Message optimization method for low-delay bypass | |
| JP7010922B2 (en) | Forwarding entry access |
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee | Granted publication date:20121212 Termination date:20160918 |