CN101504618A - Multi-core processor oriented real-time thread migration method - Google Patents

Abstract

Translated fromChinese

本发明公开了一种面向多核处理器的实时线程迁移方法。本发明是充分利用了共享二级cache和内存的多核硬件体系架构的特点从而有效地实现了多核处理器上的实时线程迁移方法。本发明实现了硬件支持的线程迁移初始化和处理器核之间的线程迁移，在线程运行时不需要花任何时间来轮询系统变量，减少了线程迁移时处理器核之间的数据传输，明显提高了线程执行时的性能和缩短了线程迁移的时间。本发明可以用在各种多核处理器上。

The invention discloses a multi-core processor-oriented real-time thread migration method. The present invention makes full use of the characteristics of the multi-core hardware system framework of shared secondary cache and memory, thereby effectively realizing the real-time thread migration method on the multi-core processor. The present invention realizes hardware-supported thread migration initialization and thread migration between processor cores, does not need to spend any time polling system variables when threads are running, reduces data transmission between processor cores during thread migration, and obviously Improved thread execution performance and shortened thread migration time. The present invention can be used on various multi-core processors.

Description

Real-time thread migration method towards polycaryon processor

Technical field

The present invention relates to carry out between the processor core on the multinuclear hardware systems framework method of thread migration.

Background technology

Because the growth of processor clock frequency, constantly riseing of processor energy consumption and temperature caused the limit of processor manufacturer in the speed competition.Face the limit of this growth, microprocessor manufacturer has invested the bosom of polycaryon processor technology one after another.The polycaryon processor technology is that processor performance promotes the new prospect of having opened up.Some company just claims that the processor of its production will use multi-core system structure comprehensively.

The polycaryon processor chip provides than the better concurrency of single core processor chip, better unit watt system performance.Concurrency is a control system, and equipment such as network route provide higher performance expansion.If these systems make full use of the concurrency that the polycaryon processor chip provides, can on performance, have greatly improved.Yet most software developer and software engineer lack corresponding experience and technological accumulation for this concurrency programming pattern, so this is a very big obstacle for the advantage of utilizing the polycaryon processor technology.

This technical obstacle is clearly, such as the management of the shared resource on the multi core chip is exactly a very big technological challenge.In most cases, each nuclear in the multi core chip has independently a level cache and a shared L2 cache, and memory subsystem interrupts subsystem and peripherals.Like this, system designer just must be guaranteed some resource of visit of each nuclear mutual exclusion.Consideration in this design has just brought higher design complexity.Such as the program of moving on different nuclear cooperates with each other if desired, so just needs a feasible Inter-Process Communication mechanism, the synchronization primitives mechanism of shared drive mechanism and guarantee shared resource.The every aspect of operating system all need be transformed just at multi-core system can make full use of the performance boost that multi-core technology is brought.

Therefore, operating system can reduce the design difficulty that multi-core technology is brought to a great extent to the support of multinuclear.Support the operating system of multinuclear to make full use of the advantage of multinuclear hardware platform for one, key is the support of operating system to multinuclear.Operating system can be brought more performance in the thread rank to the support of multinuclear.

Thread migration has carried out a large amount of research in distributed system.Distributed system is to finish calculation task jointly by collaborative each node.Distribute load to be difficult to reach load balance statically by prior task placement.In computation process, the load meeting of each node dynamically changes, and thread migration is one of method that realizes the distributed system balancing dynamic load.Thread migration is the thread that moves on a node to be transferred on the other node move.It can be retained in the result who has carried out on the source node and needn't re-execute this thread.In the middle of the thread migration mechanism that has realized at present, major part is based on the checkpoint and preserves that the mechanism that restarts realizes, promptly before migrating processes, the state of a process data are saved in check point file, this check point file is transferred on the other node then, after treating that destination node is received whole check point file, recover to move thread again according to check point file again.Each node is not share local internal memory in the distributed system, and each thread migration all will transmit lot of data.

Equally, in order to realize the balancing dynamic load of polycaryon processor, or, reduce the energy consumption of polycaryon processor, be necessary between processor core, to carry out thread migration in order to improve the performance of polycaryon processor.

Summary of the invention

The object of the present invention is to provide a kind of real-time thread migration method towards polycaryon processor.

The technical scheme that the present invention solves its technical matters employing is as follows:

1) carry out thread migration between processor core, all processor cores all have privately owned one-level cache, shared secondary cache and internal memory;

2) the thread migration initialization of hardware supported:

The first step, after each thread brought into operation, all migration point addresses of this thread all were recorded in the operating system;

Second step, operating system is saved in all migration point addresses in each thread data structure separately, and the migration point address of the thread that is moving on each processor core write in the debug registers on the nuclear, when the context switching took place, operating system was just upgraded the data in the debug registers;

In the 3rd step, in the time of thread of operating system decision migration, the zone bit that operating system just is provided with in the debug registers on this thread place processor core activates debug registers;

In the 4th step, when the thread execution instruction arrives the migration point address of thread, will produce a hardware interrupts and begin thread migration;

3) thread migration method:

When the beginning thread migration, operating system is waken the target processor nuclear of thread migration up, then according to the instruction execution result of source processor nuclear target processor nuclear is trained; After training process finishes, operating system is the thread on the source of release processor core and empty the streamline of source processor nuclear at first, then the data among the one-level cache of source processor nuclear are write back among the secondary cache, then the data in the source processor nuclear register are examined to target processor by bus transfer.The ideal processor core begins to carry out the thread that produces then receiving data storage in register on target processor nuclear.

Compared with prior art, the invention has the beneficial effects as follows:

(1) high efficiency.The present invention has realized a kind of real-time thread migration method towards polycaryon processor, wanting continuous land wheel to ask system variable in the thread implementation based on the thread migration method of checkpoint determines whether to carry out thread migration, and the thread migration initial method of hardware supported does not need flower to come the polling system variable any time, the performance when therefore obviously having improved thread execution.Data transmission procedure during owing to thread migration on polycaryon processor only need write back to the data among the one-level cache among the secondary cache, then the data in the register on the source processor nuclear are examined to target processor by bus transfer, therefore obviously shortened the time of thread migration.

(2) reliability.The present invention carries out careful analysis by the process to thread migration in the distributed system, suitably changed the process of thread migration, data transmission procedure when carefully having designed thread migration initialization and thread migration between source processor nuclear and the target processor nuclear, guaranteed that thread can normally move between processor core, made thread migration after target processor nuclear is gone up, can continue normal operation.

(3) practicality.A kind of real-time thread migration method towards polycaryon processor that the present invention proposes can be used on the various polycaryon processors.

Description of drawings

Fig. 1 is the synoptic diagram of the thread migration initialization procedure of hardware supported.

Fig. 2 is the synoptic diagram of thread migration process.

Embodiment

1) carry out thread migration between processor core, all processor cores all have privately owned one-level cache, shared secondary cache and internal memory:

In the present most polycaryon processor architectural framework, processor core all has privately owned one-level cache, and shared secondary cache and internal memory.All processor cores are shared drive all, so does not need to transmit code and data in the shared drive during thread migration.All processor cores are all shared secondary cache, and the data during thread migration among the one-level cache of source processor nuclear only need write back among the secondary cache and need not write back in the internal memory.

2) the thread migration initialization of hardware supported:

Most of modern processors all contain a series of debug registers.The PowerPC405 processor comprises 4 32 instruction address comparand register.When equaling a value in the instruction address comparand register that is activated, the value in the program counter register will produce a hardware interrupts.Similarly, in other processor, when equaling a value in the debug registers that is activated, the value in the program counter register also can produce a hardware interrupts.Utilize the thread migration initial method of this machine-processed hardware supported to make thread not need the colored variable that comes any time in the polling system in the process of implementation.The thread migration initial method of hardware supported as shown in Figure 1, comprises following four steps:

The first step, after a thread brought into operation, all migration point addresses of this thread all were recorded in the operating system;

Second step, operating system is saved in all migration point addresses in each thread data structure separately, and the migration point address of the thread that is moving on each processor core write in the debug registers on the nuclear, when context taking place switch, the data in the debug registers are upgraded in the migration point address that operating system is just used the thread that will carry out;

The 3rd step, when operating system according to thread of explorer decision migration to the another one processor core the time, the zone bit that operating system just is provided with in the debug registers on this thread place processor core activates debug registers;

In the 4th step, when the migration point address in the debug registers that is activated on the processor core of thread execution instruction arrival thread place, will produce a hardware interrupts and begin thread migration;

3) thread migration method:

As shown in Figure 2, when the beginning thread migration, if the target processor of thread migration nuclear has been closed, operating system need be waken the target processor nuclear of thread migration up, then according to the instruction execution result of source processor nuclear cache and fallout predictor on the target processor nuclear is trained.After training process finished, operating system is the thread on the source of release processor core and empty the streamline of source processor nuclear at first, then the data among the one-level cache of source processor nuclear is write back among the secondary cache.When source processor nuclear writes back to the data among the one-level cache among the secondary cache, target processor nuclear visit secondary cache just can obtain correct data.Operating system stores the data in the source processor nuclear register in the shared drive into by bus transfer then, and target processor nuclear just can be visited these data like this.At last, operating system is created a new thread on the target processor nuclear of thread migration, target processor nuclear is by the data in the visit shared drive acquisition source processor nuclear register, and these data storage in the register of oneself, then target processor nuclear just begins to carry out the thread of new establishment.

Claims (1)

1. real-time thread migration method towards polycaryon processor is characterized in that:

1) carry out thread migration between processor core, all processor cores all have privately owned one-level cache, shared secondary cache and internal memory;

2) the thread migration initialization of hardware supported:

The first step, after each thread brought into operation, all migration point addresses of this thread all were recorded in the operating system;

Second step, operating system is saved in all migration point addresses in each thread data structure separately, and the migration point address of the thread that is moving on each processor core write in the debug registers on the nuclear, when the context switching took place, operating system was just upgraded the data in the debug registers;

In the 3rd step, in the time of thread of operating system decision migration, the zone bit that operating system just is provided with in the debug registers on this thread place processor core activates debug registers;

In the 4th step, when the thread execution instruction arrives the migration point address of thread, will produce a hardware interrupts and begin thread migration;

3) thread migration method:

When the beginning thread migration, operating system is waken the target processor nuclear of thread migration up, then according to the instruction execution result of source processor nuclear target processor nuclear is trained; After training process finishes, operating system is the thread on the source of release processor core and empty the streamline of source processor nuclear at first, then the data among the one-level cache of source processor nuclear are write back among the secondary cache, then the data in the source processor nuclear register are examined to target processor by bus transfer.The ideal processor core begins to carry out the thread that produces then receiving data storage in register on target processor nuclear.

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