CN101487962A

Movatterモバイル変換

Info

Publication number: CN101487962A
Application number: CNA2009100056330A
Authority: CN
Inventors: 江怡禛; 石志鸿; 陈茂松; 何子维; 林敬桓; 李宇轩; 谢曜任; 许雅婷; 洪集茂; 陈耿铭; 陈昱丞
Original assignee: AU Optronics Corp
Current assignee: AUO Corp
Priority date: 2009-01-20
Filing date: 2009-01-20
Publication date: 2009-07-22
Anticipated expiration: 2029-01-20
Also published as: CN101487962B

Abstract

一种具窄型边框区结构的显示装置，其包含基板、多条数据线、多条栅极线、多条辅助栅极线以及驱动模块。基板具有影像显示区及边框区。多条数据线、多条栅极线与多条辅助栅极线设置于影像显示区，驱动模块设置于边框区。多条栅极线与多条数据线互相垂直，多条辅助栅极线则平行于多条数据线。每一条辅助栅极线电连接于对应栅极线。多条数据线与多条辅助栅极线以交错模式电连接于驱动模块。另公开一种驱动方法，将驱动模块所提供的多个栅极信号，经多条辅助栅极线馈入至多条栅极线。

A display device with a narrow frame region structure, which includes a substrate, a plurality of data lines, a plurality of gate lines, a plurality of auxiliary gate lines and a driving module. The substrate has an image display area and a frame area. A plurality of data lines, a plurality of gate lines and a plurality of auxiliary gate lines are arranged in the image display area, and the driving module is arranged in the frame area. The plurality of gate lines and the plurality of data lines are perpendicular to each other, and the plurality of auxiliary gate lines are parallel to the plurality of data lines. Each auxiliary gate line is electrically connected to the corresponding gate line. A plurality of data lines and a plurality of auxiliary gate lines are electrically connected to the driving module in a staggered mode. A driving method is also disclosed, in which multiple gate signals provided by the drive module are fed into multiple gate lines via multiple auxiliary gate lines.

Description

The display device of tool narrow frame structure and its driving method

Technical field

The present invention designs a kind of display device and its driving method, refers to a kind of display device and its driving method of tool narrow frame structure especially.

Background technology

Flat-panel screens (Flat Panel Display) is at present main popular display, wherein LCD more because have that external form is frivolous, power saving and feature such as radiationless, and be widely used on the electronic products such as computer screen, mobile phone, PDA(Personal Digital Assistant), flat-surface television.The principle of work of LCD changes the ordered state of the liquid crystal molecule in the liquid crystal layer for the voltage difference that utilize to change the liquid crystal layer two ends, in order to change the light transmission of liquid crystal layer, to cooperate backlight module again the light source that provided with show image.

Fig. 1 is the synoptic diagram of known LCD.As shown in Figure 1, LCD 100 comprisesinfrabasal plate 110 andupper substrate 190, and liquid crystal layer (not illustrating) promptly is folded betweeninfrabasal plate 110 and the upper substrate 190.Upper substrate 190 is a colored filter, is used for the display color picture.Infrabasal plate 110 comprisesmany data lines 130,many gate lines 150, many supplementary gatepolar curves 155,first rim area 180,second rim area 185,image viewing area 195 and driver modules 101.Many data line 130 is arranged atimage viewing area 195 with many gate lines 150.Many supplementary gatepolar curve 155 is arranged atfirst rim area 180 and second rim area 185.Driver module 101 is electrically connected on many supplementary gatepolar curves 155, is fed intomany gate lines 150 in order to a plurality of signals that will be provided through many supplementary gate polar curves 155.Driver module 101 is electrically connected onmany data lines 130 in addition, is fed into a plurality of pixel cell (not shown)s in order to a plurality of data-signals that will be provided through many data lines 130.LCD 100 is promptly controlled a plurality of data-signals according to a plurality of signals and is write to a plurality of pixel cells, in order to show image.

Because in the structure of known LCD 100, the number of supplementary gatepolar curve 155 equals the number ofgate line 150 in fact, soinfrabasal plate 110 just need provide enough widefirst rim area 180 andsecond rim area 185, in order to many supplementary gatepolar curves 155 to be set.Yet, because the display that most of portable electronic devices is installed is small-sized LCD, so how to reduce the rim area area to reduce the important topic that the infrabasal plate size is the small design LCD.

Summary of the invention

According to embodiments of the invention, the liquid crystal indicator that it discloses a kind of tool narrow frame structure comprises substrate, many data lines, many gate lines, many supplementary gate polar curves and driver module.Substrate has image viewing area (Image Display Area) and rim area (Border Area), and wherein rim area is substantially around the image viewing area.Many data line is parallel to each other, is arranged at the image viewing area of substrate.Many gate line is parallel to each other, is arranged at the image viewing area of substrate, and orthogonal with many data lines substantially.Many the supplementary gate polar curve is parallel to each other, is arranged at the image viewing area of substrate, and parallel to each other with many data lines substantially.Each bar supplementary gate polar curve is electrically connected on corresponding gate line.Drive module setting is in the rim area of substrate, and is electrically connected on many data lines and many supplementary gate polar curves.

According to embodiments of the invention, it discloses a kind of driving method in addition, and comprise: a display device is provided, and this display device comprises a substrate, has an image viewing area, one first rim area, one second rim area and one the 3rd rim area; Many data line bits are arranged at this image viewing area on this substrate; One first group of gate line, one second group of gate line and one the 3rd group of gate line are arranged at this image viewing area; Many first supplementary gate polar curves are arranged at this image viewing area, and each bar first supplementary gate polar curve is electrically connected on a corresponding gate line of this first group of gate line; Many second supplementary gate polar curves are arranged at this first rim area, and each bar second supplementary gate polar curve is electrically connected on a corresponding gate line of this second group of gate line; Many articles the 3rd supplementary gate polar curves are arranged at this second rim area, and each article the 3rd supplementary gate polar curve is electrically connected on a corresponding gate line of the 3rd group of gate line; An and driver module, have a plurality of data-out ports, a plurality of first output ports, a plurality of second output ports and a plurality of the 3rd output port, be arranged at the 3rd rim area, each data-out port is electrically connected on a corresponding data line, each first output port is electrically connected on corresponding second a supplementary gate polar curve, each second output port is electrically connected on corresponding first a supplementary gate polar curve, each the 3rd output port is electrically connected on corresponding the 3rd a supplementary gate polar curve, and wherein said data-out port and described second output port are arranged at this driver module with interleaving mode; The order that a plurality of first grid signals are complied with a first direction from described first output port exports the described second supplementary gate polar curve to; The order that a plurality of second grid signals are complied with a second direction from described second output port exports the described first supplementary gate polar curve to; And the order that a plurality of the 3rd signals are complied with this second direction from described the 3rd output port exports described the 3rd supplementary gate polar curve to.

According to embodiments of the invention, it discloses a kind of driving method in addition, and comprise: a display device is provided, and this display device comprises a substrate, has an image viewing area, one first rim area and one second rim area; Many data line bits are arranged at this image viewing area on this substrate; One first group of gate line and one second group of gate line are arranged at this image viewing area; Many first supplementary gate polar curves are arranged at this image viewing area, and each bar first supplementary gate polar curve is electrically connected on a corresponding gate line of this first group of gate line; Many second supplementary gate polar curves are arranged at this first rim area, and each bar second supplementary gate polar curve is electrically connected on a corresponding gate line of this second group of gate line; An and driver module, have a plurality of data-out ports, a plurality of first output port and a plurality of second output port, be arranged at this second rim area, each data-out port is electrically connected on a corresponding data line, each first output port is electrically connected on corresponding second a supplementary gate polar curve, each second output port is electrically connected on corresponding first a supplementary gate polar curve, and wherein said data-out port and described second output port are arranged at this driver module with interleaving mode; The order that a plurality of first grid signals are complied with a first direction from described first output port exports the described second supplementary gate polar curve to; And the order that a plurality of second grid signals are complied with a second direction from described second output port exports the described first supplementary gate polar curve to.

Description of drawings

Fig. 1 is the synoptic diagram of known LCD;

Fig. 2 is the synoptic diagram of the LCD of first embodiment of the invention;

Fig. 3 is the synoptic diagram of the LCD of second embodiment of the invention;

Fig. 4 is the signal waveform synoptic diagram of the LCD work of Fig. 3, and wherein transverse axis is a time shaft;

Fig. 5 is the synoptic diagram of the LCD of third embodiment of the invention;

Fig. 6 is the synoptic diagram of the LCD of fourth embodiment of the invention;

Fig. 7 is the signal waveform synoptic diagram of the LCD work of Fig. 6, and wherein transverse axis is a time shaft;

Fig. 8 is the synoptic diagram of the LCD of fifth embodiment of the invention;

Fig. 9 is the signal waveform synoptic diagram of the LCD work of Fig. 8, and wherein transverse axis is a time shaft;

Figure 10 is the synoptic diagram of the LCD of sixth embodiment of the invention;

Figure 11 is the signal waveform synoptic diagram of the LCD work of Figure 10, and wherein transverse axis is a time shaft;

Figure 12 is the synoptic diagram of the LCD of seventh embodiment of the invention;

Figure 13 is the signal waveform synoptic diagram of the LCD work of Figure 12, and wherein transverse axis is a time shaft;

Figure 14 is the synoptic diagram of the LCD of eighth embodiment of the invention;

Figure 15 is the synoptic diagram of the LCD of ninth embodiment of the invention;

Figure 16 is the synoptic diagram of the LCD of tenth embodiment of the invention;

Figure 17 is the synoptic diagram of the LCD of eleventh embodiment of the invention;

Figure 18 is the synoptic diagram of the LCD of twelveth embodiment of the invention;

Figure 19 is the synoptic diagram of the LCD of thriteenth embodiment of the invention;

Figure 20 is arranged at the LCD of many second supplementary gate polar curves of identical layer along the diagrammatic cross-section of dotted line AA ' for the tool of Figure 19;

Figure 21 is arranged at the LCD of many second supplementary gate polar curves of dissimilar layer along the diagrammatic cross-section of dotted line AA ' for the tool of Figure 19;

Figure 22 is the synoptic diagram of the LCD of fourteenth embodiment of the invention;

Figure 23 is the synoptic diagram of the LCD of fifteenth embodiment of the invention;

Figure 24 is arranged at the LCD of many second supplementary gate polar curves of identical layer along the diagrammatic cross-section of dotted line BB ' for the tool of Figure 23;

Figure 25 is arranged at the LCD of many second supplementary gate polar curves of dissimilar layer along the diagrammatic cross-section of dotted line BB ' for the tool of Figure 23;

Figure 26 is the synoptic diagram of the LCD of sixteenth embodiment of the invention;

Figure 27 is arranged at the LCD of many second supplementary gate polar curves of dissimilar layer along the diagrammatic cross-section of dotted line CC ' for the tool of Figure 26;

Figure 28 is the synoptic diagram of the LCD of seventeenth embodiment of the invention.

Wherein, Reference numeral

100,200,300,500,596,597,598,599,600,696,700,796,797,798,799,893,895 LCD

101,201,501,601,701 driver modules

110,210,310,510,610,710 infrabasal plates

130,230,530,630,730 data lines

150,250,550,650,750 gate lines

155,255 supplementary gate polar curves

180,280,580,680,780,880 first rim area

185,285,585,685,785,881,882,883,884,885 second rim area

190,290,390,590,690,790 upper substrates

195,295,595,695,795 image viewing areas

205,505,605,705 drivers

260,560,660,760 first pixel cells

261 first data switches

263 first storage elements

265,565,665,765 second pixel cells

266 second data switches

268 second storage elements

269 pixel cells

288,588,688,788 the 3rd rim area

541,641,741 first interior zones

542,642,742 second interior zones

543 the 3rd interior zones

555,655,755 first supplementary gate polar curves

556,658,759 second supplementary gate polar curves

557 the 3rd supplementary gate polar curves

560 first pixel cells

565 second pixel cells

770 common electrode lines

775,873,875 openings

776 first insulation courses

777 second insulation courses

781,786,787,887,888,889 adjust layer

DL1, DL2, DLt-1, DLt, DLn-1～DLn+2 data line

DO1, DO2, DOt-1, DOt data-signal

GAm-1～GAm+1 supplementary gate polar curve

GAx+1, GAx+2, the GAw-1 first supplementary gate polar curve

G1, G2, Gx-1, Gx, Gx+1, Gx+2, Gw-1, Gw, Gw+1, Gu-1, Gu, Gm-1～Gm+3 gate line

GO1, GO2, GOx-1, GOx first grid signal

GOx+1, GOx+2, GOw-1 second grid signal

GOw, GOw+1, GOu-1, GOu the 3rd signal

P1, P2, Px-1, Px first output port

Px+1, Px+3, Py-2, Py data-out port

Px+2, Px+4, Py-1 second output port

Py+1, Py+2, Pz-1, Pz the 3rd output port

P (m-1) x (n-1)～P (m+2) x (n+1) first pixel cell

P (m-1) y (n-1)～P (m+2) y (n+1) second pixel cell

SDn-1～SDn+2 data-signal

SG1, SG2, SGx-1, SGx, SGx+1, SGx+2, SGw-1, SGw, SGw+1, SGu-1, SGu, SGm-1～SGm+3 signal

T1, T2, T3, T4, T5, T6 period

The Vcom common voltage

Embodiment

For making the present invention more apparent and understandable, hereinafter, cooperate appended accompanying drawing to elaborate especially exemplified by embodiment according to display device and its driving method of tool narrow frame structure of the present invention, but the scope that the embodiment that is provided is not contained in order to restriction the present invention.

Fig. 2 is the synoptic diagram of the LCD of first embodiment of the invention.As shown in Figure 2, LCD 200 comprises infrabasal plate 210 and upper substrate 290, and liquid crystal layer promptly is folded between infrabasal plate 210 and the upper substrate 290.Upper substrate 290 can be colored filter, is used for the display color picture.Infrabasal plate 210 comprises many data lines that be arranged in parallel 230, many gate lines that be arranged in parallel 250, many supplementary gate polar curves that be arranged in parallel 255, first rim area 280, second rim area 285, the 3rd rim area 288, image viewing area 295 and driver modules 201.First rim area 280, second rim area 285, with the 3rd rim area 288 substantially around image viewing area 295, rim area to small part around image viewing area 295, for example, first rim area 280, second rim area 285, be adjacent to three sides of image viewing area 295 substantially with the 3rd rim area 288.Many data lines 230, many gate lines 250 are arranged at image viewing area 295 with many supplementary gate polar curves 255, and driver module 201 is arranged at the 3rd rim area 288.Many gate line 250 is orthogonal with many data lines 230 substantially.Many 255 of supplementary gate polar curves are parallel to many data lines 230.Each bar supplementary gate polar curve 255 is electrically connected on corresponding gate line 250.In the embodiment shown in Figure 2, only from driver module 201 cablings to corresponding gate line 250, in another embodiment, each bar supplementary gate polar curve 255 extends to the edge of image viewing area 295 to each bar supplementary gate polar curve 255.Driver module 201 is electrically connected on many supplementary gate polar curves 255, is fed into many gate lines 250 in order to a plurality of signals that will be provided through many supplementary gate polar curves 255.Driver module 201 is electrically connected on many data lines 230 in addition, is fed into a plurality of pixel cell (not shown)s in order to a plurality of data-signals that will be provided through many data lines 230.LCD 200 is promptly controlled a plurality of data-signals according to a plurality of signals and is write to a plurality of pixel cells, in order to show image.

In one embodiment,driver module 201 comprises at least onedriver 205, is used to provide a plurality of data-signals bar data line 230 at the most, and a plurality of signals bar supplementary gatepolar curve 255 at the most is provided.In another embodiment,driver module 201 comprises a plurality ofdrivers 205, and a plurality ofdrivers 205 comprise at least one source electrode driver and at least one gate drivers.Source electrode driver is electrically connected onmany data lines 230, in order to a plurality of data-signals to be provided.Gate drivers is electrically connected on many supplementary gatepolar curves 255, in order to a plurality of signals bargate line 250 at the most to be provided.

Because many supplementary gatepolar curves 255 all are arranged atimage viewing area 295, that isfirst rim area 280 andsecond rim area 285 do not need in order to any supplementary gatepolar curve 255 to be set, therefore can significantly dwindle the size of the width offirst rim area 280 andsecond rim area 285 with reduction infrabasal plate 210.So LCD 200 is particularly suitable as the miniscope that portable electron device is installed.

Fig. 3 is the synoptic diagram of the LCD of second embodiment of the invention.As shown in Figure 3,LCD 300 comprisesinfrabasal plate 310 andupper substrate 390, and liquid crystal layer promptly is folded betweeninfrabasal plate 310 and the upper substrate 390.Upper substrate 390 can be colored filter, is used for the display color picture.The circuit structure ofinfrabasal plate 310 is similar to the circuit structure of infrabasal plate shown in Figure 2 210.Infrabasalplate 310 is with half data driver (HalfSource Driver, HSD) technology is provided with a plurality ofpixel cells 269, that is in the array of a plurality ofpixel cells 269,many data lines 230 are not to be coupled directly to allpixel cells 269, and have only the strange ordering of each row or a plurality ofpixel cells 269 of idol ordering to be coupled directly to many data lines 230.So compared to known LCD 100, the number ofdata line 230 can be reduced to half of number ofdata line 130 in fact, and the cabling zone of omitteddata line 230 is promptly in order to be provided with supplementary gatepolar curve 255.

A plurality ofpixel cells 269 comprise a plurality offirst pixel cells 260 and a plurality of second pixel cells 265.Eachfirst pixel cell 260 comprisesfirst data switch 261 and first storage element 263.First data switch 261 comprises first end, second end and gate terminal, and wherein first end is electrically connected onrespective data lines 230, the second ends and is electrically connected on correspondingsecond pixel cell 265, and gate terminal is electrically connected on corresponding gate line 250.First data switch 261 is thin film transistor (TFT) (Thin Film Transistor) or metal-semiconductor field effect metal-semiconductor field effect transistor (Metal Oxide Semiconductor Field Effect Transistor).First storage element 263 comprises first end and second end, and wherein first end offirst storage element 263 is electrically connected on second end of correspondingfirst data switch 261, and second end offirst storage element 263 is in order to receive common voltage Vcom.First storage element 263 comprises liquid crystal capacitance (Liquid Crystal Capacitor).

Eachsecond pixel cell 265 comprisessecond data switch 266 and second storage element 268.Second data switch 266 comprises first end, second end and gate terminal, wherein first end ofsecond data switch 266 is electrically connected on second end of correspondingfirst data switch 261, the gate terminal that second end ofsecond data switch 266 is electrically connected on corresponding second storage element, 268, the second data switches 266 is electrically connected on corresponding gate line 250.Second data switch 266 is thin film transistor (TFT) or metal-semiconductor field effect transistor.Second storage element 268 comprises first end and second end, and wherein first end ofsecond storage element 268 is electrically connected on second end of correspondingsecond data switch 266, and second end ofsecond storage element 268 is in order to receive common voltage Vcom.Second storage element 268 comprises liquid crystal capacitance.Please note, each bar supplementary gatepolar curve 255 is arranged between correspondingfirst pixel cell 260 and correspondingsecond pixel cell 265, that is in firstadjacent pixel cell 260 and the cabling zone betweensecond pixel cell 265, ifdata line 230 is not set, just can be in order to supplementary gatepolar curve 255 to be set.

Please continue with reference to figure 3, eachfirst pixel cell 260 all is coupled directly torespective data lines 230, so 230 data signals transmitted of each bar data line can write correspondingfirst storage element 263 through corresponding first data switch 261.As for 265 of each second pixel cells through correspondingfirst pixel cell 260 and indirect coupling inrespective data lines 230, so 230 data signals transmitted of each bar data line are through correspondingfirst data switch 261 and correspondingsecond data switch 266 and write correspondingsecond storage element 268.

Fig. 4 is the signal waveform synoptic diagram of the LCD work of Fig. 3, and wherein transverse axis is a time shaft.In Fig. 4, basipetal signal is respectively signal SGm-1, signal SGm, signal SGm+1 and signal SGm+2.In period T1, signal SGm-1 and signal SGm are high level, in order to a plurality of first data switches 261 and a plurality of second data switches 266 of conducting (m-1) row, so a plurality of data-signal just can write a plurality of second storage elements 268 of (m-1) row from many data lines 230.For example, the signal SGm-1 of high level can be through supplementary gate polar curve GAm-1 and gate lines G m-1 and is transferred to first pixel cell P (m-1) x (n-1) with its first data switch 261 of conducting, the signal SGm of high level can be through supplementary gate polar curve GAm and gate lines G m and is transferred to second pixel cell P (m-1) y (n-1) with its second data switch 266 of conducting, so data-signal SDn just can write to second storage element 268 of second pixel cell P (m-1) y (n-1) from data line DLn.At this moment, though data-signal SDn also can write to first storage element 263 of first pixel cell P (m-1) x (n-1) from data line DLn, can be covered by the data-signal that the period write subsequently.

In period T2, signal SGm-1 remains on high level, signal SGm then switches to low level, in order to keep the conducting state of a plurality of first data switches 261 of (m-1) row, and a plurality of second data switches 266 that (m-1) is listed as switch to cut-off state, so a plurality of data-signals just can write a plurality offirst storage elements 263 of (m-1) row frommany data lines 230, and keep a plurality of data-signals of a plurality ofsecond storage elements 268 of (m-1) row.Note that the data-signal of a plurality offirst storage elements 263 that in period T2, write (m-1) row, can be covered in the data-signal of a plurality offirst storage elements 263 that write (m-1) row in the period T1.

In period T3, signal SGm and signal SGm+1 are high level, and signal SGm-1 is a low level, in order to a plurality of first data switches 261 and a plurality of second data switches 266 of conducting m row, so a plurality of data-signal just can write a plurality ofsecond storage elements 268 of m row from many data lines 230.For example, the signal SGm of high level can be through supplementary gate polar curve GAm and gate lines G m and is transferred to the first pixel cell Pmxn with itsfirst data switch 261 of conducting, the signal SGm+1 of high level can be through supplementary gate polar curve GAm+1 and gate lines G m+1 and is transferred to the second pixel cell Pmyn with itssecond data switch 266 of conducting, so data-signal SDn just can write tosecond storage element 268 of the second pixel cell Pmyn from data line DLn.At this moment, though data-signal SDn also can write tofirst storage element 263 of the first pixel cell Pmxn from data line DLn, can be covered by the data-signal that the period write subsequently.

In period T4, signal SGm remains on high level, signal SGm+1 then switches to low level, conducting state in order to a plurality of first data switches 261 of keeping m row, and a plurality of second data switches 266 that m is listed as switch to cut-off state, so a plurality of data-signals just can write a plurality offirst storage elements 263 of m row frommany data lines 230, and keep a plurality of data-signals of a plurality ofsecond storage elements 268 of m row.Note that in period T4 the data-signal of a plurality offirst storage elements 263 of the m that writes row, can be covered in the data-signal of a plurality offirst storage elements 263 that the m that writes of institute is listed as in the period T3.

In period T5, signal SGm+1 and signal SGm+2 are high level, in order to a plurality of first data switches 261 and a plurality of second data switches 266 of conducting (m+1) row, so a plurality of data-signal just can write a plurality ofsecond storage elements 268 of (m+1) row from many data lines 230.In period T6, signal SGm+1 remains on high level, signal SGm+2 then switches to low level, in order to keep the conducting state of a plurality of first data switches 261 of (m+1) row, and a plurality of second data switches 266 that (m+1) is listed as switch to cut-off state, so a plurality of data-signals just can write a plurality offirst storage elements 263 of (m+1) row frommany data lines 230, and keep a plurality of data-signals of a plurality ofsecond storage elements 268 of (m+1) row.

Fig. 5 is the synoptic diagram of the LCD of third embodiment of the invention.As shown in Figure 5, LCD 500 comprises infrabasal plate 510 and upper substrate 590, and liquid crystal layer promptly is folded between infrabasal plate 510 and the upper substrate 590.Upper substrate 590 can be colored filter, is used for the display color picture.Infrabasal plate 510 comprises many data lines that be arranged in parallel 530, many gate lines that be arranged in parallel 550, many first supplementary gate polar curves 555 that be arranged in parallel, many second supplementary gate polar curves 556 that be arranged in parallel, many 3rd supplementary gate polar curves 557 that be arranged in parallel, a plurality of first pixel cell 560, a plurality of second pixel cell 565, first rim area 580, second rim area 585, the 3rd rim area 588, image viewing area 595 and driver modules 501.First rim area 580, second rim area 585, with the 3rd rim area 588 substantially around image viewing area 595, for example, first rim area 580, second rim area 585, be adjacent to three sides of image viewing area 595 substantially with the 3rd rim area 588.Many data lines 530, many gate lines 550, a plurality of first pixel cell 560, a plurality of second pixel cells 565 are arranged at image viewing area 595 with many first supplementary gate polar curves 555, and driver module 501 is arranged at the 3rd rim area 588.Many gate line 550 is orthogonal with many data lines 530 substantially.

Many gate lines 550 comprise first group of gate line 550, second group of gate line 550 and the 3rd group of gate line 550.Second group of gate line 550 is arranged at first interior zone 541 of image viewing area 595.First interior zone 541 is adjacent to the 3rd rim area 588.The 3rd group of gate line 550 is arranged at second interior zone 542 of image viewing area 595.First group of gate line 550 is arranged at the 3rd interior zone 543 of image viewing area 595, first interior zone 541 be positioned at the 3rd interior zone 543, first rim area 580, second rim area 585, with the 3rd rim area 588 around the zone that goes out, the 3rd interior zone 543 be positioned at second interior zone 542, first rim area 580, second rim area 585, with the 3rd rim area 588 around the zone that goes out.Many first supplementary gate polar curves 555 are parallel to the corresponding gate line 550 that many data lines 530, the first supplementary gate polar curves 555 are electrically connected on first group of gate line 550 respectively.Many second supplementary gate polar curves 556 are arranged at first rim area 580, and are parallel to the corresponding gate line 550 that many data lines 530, the second supplementary gate polar curves 556 are electrically connected on second group of gate line 550 respectively.Many articles the 3rd supplementary gate polar curves 557 are arranged at second rim area 585, and are parallel to the corresponding gate line 550 that many data lines 530, the three supplementary gate polar curves 557 are electrically connected on the 3rd group of gate line 550 respectively.In other words, each bar gate line 550 is electrically connected on the first supplementary gate polar curve 555, the second supplementary gate polar curve 556 or the 3rd supplementary gate polar curve 557.

Driver module 501 is electrically connected onmany data lines 530, is fed into a plurality offirst pixel cells 560 and a plurality ofsecond pixel cells 565 in order to a plurality of data-signals that will be provided through many data lines 530.Driver module 501 is electrically connected on many first supplementary gatepolar curves 555, many second supplementary gatepolar curves 556 and many articles the 3rd supplementary gatepolar curves 557 in addition, is fed intomany gate lines 550 in order to a plurality of signals that will be provided through many first supplementary gatepolar curves 555, many second supplementary gatepolar curves 556 and many articles the 3rd supplementary gate polar curves 557.LCD 500 is promptly controlled a plurality of data-signals according to a plurality of signals and is write to a plurality offirst pixel cells 560 and a plurality ofsecond pixel cell 565, in order to show image.

In one embodiment, driver module 501 comprises at least one driver 505, be used to provide a plurality of data-signals bar data line 530 at the most, and a plurality of signals the bar first supplementary gate polar curve 555, many second supplementary gate polar curves 556 and many articles the 3rd supplementary gate polar curves 557 at the most are provided.In another embodiment, driver module 501 comprises a plurality of drivers 505, and a plurality of drivers 505 comprise at least one source electrode driver and at least one gate drivers.Source electrode driver is electrically connected on many data lines 530, in order to a plurality of data-signals to be provided.Gate drivers is electrically connected on many first supplementary gate polar curves 555, many second supplementary gate polar curves 556 and many articles the 3rd supplementary gate polar curves 557, in order to a plurality of signals bar gate line 550 at the most to be provided.Perhaps, a plurality of drivers 505 comprise at least one source electrode driver, at least one first grid driver, at least one second grid driver and at least one the 3rd gate drivers, the first grid driver provides the bar first supplementary gate polar curve 555 at the most with a plurality of first grid signals, the second grid driver provides a plurality of second grid signals at the most, and the bar second supplementary gate polar curve 556, the three gate drivers provide article the 3rd supplementary gate polar curve 557 at the most with a plurality of the 3rd signals.Grid wave during LCD 500 work is just as in signal waveform shown in Figure 4, so repeat no more its principle of work.

Because many first supplementary gatepolar curves 555 are arranged atimage viewing area 595, that is the set second supplementary gatepolar curve 556 offirst rim area 580 andsecond rim area 585 and the number of the 3rd supplementary gatepolar curve 557 can significantly reduce, and therefore can significantly dwindle the size of the width offirst rim area 580 andsecond rim area 585 with reduction infrabasalplate 510.So LCD 500 also is suitable as the miniscope that portable electron device is installed.

Fig. 6 is the synoptic diagram of the LCD of fourth embodiment of the invention.As shown in Figure 6, the circuit structure of LCD 596 is similar to LCD shown in Figure 5 500.Driver module 501 comprises first group of output port, second group of output port and the 3rd group of output port in addition.First group of output port comprises a plurality of first output port P1～Px to send a plurality of first grid signal GO1～GOx, second group of output port comprises a plurality of data-out port Px+1, Px+3～Py-2, Py to send a plurality of data-signal DO1, DO2～DOt-1, Dot, and a plurality of second output port Px+2, Px+4～Py-1 to be to send a plurality of second grid signal GOx+1, GOx+2～GOw-1, and the 3rd group of output port comprises a plurality of the 3rd output port Py+1, Py+2～Pz-1, Pz to send a plurality of the 3rd signal GOw, GOw+1～GOu-1, GOu.First group of output port is electrically connected on 556, the second groups of output ports of many second supplementary gate polar curves and is electrically connected on many first supplementary gate polar curves 555 and is electrically connected on many articles the 3rd supplementary gate polar curves 557 with 530, the three groups of output ports of many data lines.That is, first group of gate line is electrically connected to second group of output port through many first supplementary gate polar curves 555, second group of gate line is electrically connected to first group of output port through many second supplementary gate polar curves 556, and the 3rd group of gate line is electrically connected to the 3rd group of output port through many articles the 3rd supplementary gate polar curves 557.

Please continue with reference to figure 6, a plurality of data-out port Px+1～Py of second group of output port and a plurality of second output port Px+2～Py-1 are with interleaving mode and be arranged at driver module 501 according to first direction, that is many data line DL1～DLt reach a plurality of data-out port Px+1～Py and a plurality of second output port Px+2～Py-1 that is electrically connected on second group of output port according to first direction respectively with many first supplementary gate polar curve GAx+1～GAw-1 with interleaving mode.For example, data-out port Px+1 is electrically connected on data line DL1, the second output port Px+2 is electrically connected on gate lines G x+1 through the first supplementary gate polar curve GAx+1, data-out port Px+3 is electrically connected on data line DL2, the second output port Px+4 is electrically connected on gate lines G x+2 through the first supplementary gate polar curve GAx+2, data-out port Py-2 is electrically connected on data line DLt-1, the second output port Py-1 is electrically connected on gate lines G w-1 through the first supplementary gate polar curve GAw-1, and data-out port Py is electrically connected on data line DLt.Many gate lines G 1～Gx of second group of gate line are electrically connected on a plurality of first output port Px～P1 of first group of output port in regular turn according to second direction.For example, the first output port P1 is electrically connected on gate lines G x, and the first output port P2 is electrically connected on gate lines G x-1, and the first output port Px-1 is electrically connected on gate lines G 2, the first output port Px and is electrically connected on gate lines G 1.Many gate lines G w～Gu of the 3rd group of gate line are electrically connected on a plurality of the 3rd output port Py+1～Pz of the 3rd group of output port in regular turn according to first direction.For example, the 3rd output port Py+1 is electrically connected on gate lines G w, and the 3rd output port Py+2 is electrically connected on gate lines G w+1, and the 3rd output port Pz-1 is electrically connected on gate lines G u-1, and the 3rd output port Pz is electrically connected on gate lines G u.

Fig. 7 is the signal waveform synoptic diagram of the LCD work of Fig. 6, and wherein transverse axis is a time shaft.In Fig. 7, basipetal signal be respectively first grid signal GOx (SG1), first grid signal GOx-1 (SG2) ..., first grid signal GO2 (SGx-1), first grid signal GO1 (SGx), second grid signal GOx+1 (SGx+1), second grid signal GOx+2 (SGx+2) ..., second grid signal GOw-1 (SGw-1), the 3rd signal GOw (SGw), the 3rd signal GOw+1 (SGw+1) ..., the 3rd signal GOu-1 (SGu-1) and the 3rd signal GOu (SGu).Basically, the driving ofmany gate lines 550 in proper order for to be urged to the last item gate lines G u in regular turn from article onegate lines G 1, be that is to say thatdriver module 501 is in order to be fed intogate lines G 1～Gu in regular turn with enable signal.

According to a plurality of output port P1～Pz of Fig. 6 and the electrical connection of a plurality ofgate lines G 1～Gu, for carrying out the running of driving in regular turn of article onegate lines G 1 to the last item gate lines G u, first group of output port exported a plurality of first grid signal GOx～GO1 from a plurality of first output port Px～P1 in regular turn according to second direction, and is sent to second group of gate line through a plurality of second supplementary gatepolar curves 556; Second group of output port exported a plurality of second grid signal GOx+1～GOw-1 from a plurality of second output port Px+2～Py-1 in regular turn according to first direction, and is sent to first group of gate line through a plurality of first supplementary gatepolar curves 555; The 3rd group of output port exported a plurality of the 3rd signal GOw～GOu from a plurality of the 3rd output port Py+1～Pz in regular turn according to first direction, and is sent to the 3rd group of gate line through a plurality of the 3rd supplementary gatepolar curves 557.

Fig. 8 is the synoptic diagram of the LCD of fifth embodiment of the invention.As shown in Figure 8, the circuit structure ofLCD 597 is similar to LCD shown in Figure 6 596, and main difference is the electrical connection between manygate lines G 1～Gx of a plurality of first output port P1～Px of first group of output port and second group of gate line.Basically,LCD 597 all is electrically connected to first group of output port through many second supplementary gatepolar curves 556 with second group of gate line of LCD 596.Yet inLCD 597, manygate lines G 1～Gx of second group of gate line are electrically connected on a plurality of first output port P1～Px of first group of output port in regular turn according to first direction.For example, the first output port P1 is electrically connected ongate lines G 1, the first output port P2 and is electrically connected ongate lines G 2, the first output port Px-1 and is electrically connected on gate lines G x-1, and the first output port Px is electrically connected on gate lines G x.Except above-mentioned points, all the other structures ofLCD 597 and the circuit relation of coupling is same as LCD shown in Figure 6 596, so repeat no more.

Fig. 9 is the signal waveform synoptic diagram of the LCD work of Fig. 8, and wherein transverse axis is a time shaft.In Fig. 9, basipetal signal be respectively first grid signal GO1 (SG1), first grid signal GO2 (SG2) ..., first grid signal GOx-1 (SGx-1), first grid signal GOx (SGx), second grid signal GOx+1 (SGx+1), second grid signal GOx+2 (SGx+2) ..., second grid signal GOw-1 (SGw-1), the 3rd signal GOw (SGw), the 3rd signal GOw+1 (SGw+1) ..., the 3rd signal GOu-1 (SGu-1) and the 3rd signal GOu (SGu).In like manner, still for to be urged to the last item gate lines G u in regular turn from article onegate lines G 1, that isdriver module 501 is in order to be fed intogate lines G 1～Gu in regular turn with enable signal to the driving ofmany gate lines 550 order.

According to a plurality of output port P1～Pz of Fig. 8 and the electrical connection of a plurality ofgate lines G 1～Gu, for carrying out the work of driving in regular turn of article onegate lines G 1 to the last item gate lines G u, first group of output port exported a plurality of first grid signal GO1～GOx from a plurality of first output port P1～Px in regular turn according to first direction, and is sent to second group of gate line through a plurality of second supplementary gatepolar curves 556; Second group of output port exported a plurality of second grid signal GOx+1～GOw-1 from a plurality of second output port Px+2～Py-1 in regular turn according to first direction, and is sent to first group of gate line through a plurality of first supplementary gatepolar curves 555; The 3rd group of output port exported a plurality of the 3rd signal GOw～GOu from a plurality of the 3rd output port Py+1～Pz in regular turn according to first direction, and is sent to the 3rd group of gate line through a plurality of the 3rd supplementary gatepolar curves 557.

Figure 10 is the synoptic diagram of the LCD of sixth embodiment of the invention.As shown in figure 10, the circuit structure of LCD 598 is similar to LCD shown in Figure 6 596, and main difference is the electrical connection between many gate lines G w～Gu of a plurality of the 3rd output port Py+1～Pz of the 3rd group of output port and the 3rd group of gate line.Basically, LCD 598 all is electrically connected to the 3rd group of output port through many articles the 3rd supplementary gate polar curves 557 with the 3rd group of gate line of LCD 596.Yet in LCD 598, many gate lines G w～Gu of the 3rd group of gate line are electrically connected on a plurality of the 3rd output port Pz～Py+1 of the 3rd group of output port in regular turn according to second direction.For example, the 3rd output port Py+1 is electrically connected on gate lines G u, and the 3rd output port Py+2 is electrically connected on gate lines G u-1, and the 3rd output port Pz-1 is electrically connected on gate lines G w+1, and the 3rd output port Pz is electrically connected on gate lines G w.Except above-mentioned points, all the other structures of LCD 598 and the circuit relation of coupling is same as LCD shown in Figure 6 596, so repeat no more.

Figure 11 is the signal waveform synoptic diagram of the LCD work of Figure 10, and wherein transverse axis is a time shaft.In Figure 11, basipetal signal be respectively first grid signal GOx (SG1), first grid signal GOx-1 (SG2) ..., first grid signal GO2 (SGx-1), first grid signal GO1 (SGx), second grid signal GOx+1 (SGx+1), second grid signal GOx+2 (SGx+2) ..., second grid signal GOw-1 (SGw-1), the 3rd signal GOu (SGw), the 3rd signal GOu-1 (SGw+1) ..., the 3rd signal GOw+1 (SGu-1) and the 3rd signal GOw (SGu).In like manner, still for to be urged to the last item gate lines G u in regular turn from article onegate lines G 1, that isdriver module 501 is in order to be fed intogate lines G 1～Gu in regular turn with enable signal to the driving ofmany gate lines 550 order.

According to a plurality of output port P1～Pz of Figure 10 and the electrical connection of a plurality ofgate lines G 1～Gu, for carrying out the work of driving in regular turn of article onegate lines G 1 to the last item gate lines G u, first group of output port exported a plurality of first grid signal GOx～GO1 from a plurality of first output port Px～P1 in regular turn according to second direction, and is sent to second group of gate line through a plurality of second supplementary gatepolar curves 556; Second group of output port exported a plurality of second grid signal GOx+1～GOw-1 from a plurality of second output port Px+2～Py-1 in regular turn according to first direction, and is sent to first group of gate line through a plurality of first supplementary gatepolar curves 555; The 3rd group of output port exported a plurality of the 3rd signal GOu～GOw from a plurality of the 3rd output port Pz～Py+1 in regular turn according to second direction, and is sent to the 3rd group of gate line through a plurality of the 3rd supplementary gatepolar curves 557.

Figure 12 is the synoptic diagram of the LCD of seventh embodiment of the invention.As shown in figure 12, the circuit structure ofLCD 599 is similar to LCD shown in Figure 10 598, and main difference is the electrical connection between manygate lines G 1～Gx of a plurality of first output port P1～Px of first group of output port and second group of gate line.Basically,LCD 599 all is electrically connected to first group of output port through many second supplementary gatepolar curves 556 with second group of gate line of LCD 598.Yet inLCD 599, manygate lines G 1～Gx of second group of gate line are electrically connected on a plurality of first output port P1～Px of first group of output port in regular turn according to first direction.For example, the first output port P1 is electrically connected ongate lines G 1, the first output port P2 and is electrically connected ongate lines G 2, the first output port Px-1 and is electrically connected on gate lines G x-1, and the first output port Px is electrically connected on gate lines G x.Except above-mentioned points, all the other structures ofLCD 599 and the circuit relation of coupling is same as LCD shown in Figure 10 598, so repeat no more.

Figure 13 is the signal waveform synoptic diagram of the LCD work of Figure 12, and wherein transverse axis is a time shaft.In Figure 13, basipetal signal be respectively first grid signal GO1 (SG1), first grid signal GO2 (SG2) ..., first grid signal GOx-1 (SGx-1), first grid signal GOx (SGx), second grid signal GOx+1 (SGx+1), second grid signal GOx+2 (SGx+2) ..., second grid signal GOw-1 (SGw-1), the 3rd signal GOu (SGw), the 3rd signal GOu-1 (SGw+1) ..., the 3rd signal GOw+1 (SGu-1) and the 3rd signal GOw (SGu).In like manner, still for to be urged to the last item gate lines G u in regular turn from article onegate lines G 1, that isdriver module 501 is in order to be fed intogate lines G 1～Gu in regular turn with enable signal to the driving ofmany gate lines 550 order.

According to a plurality of output port P1～Pz of Figure 12 and the electrical connection of a plurality ofgate lines G 1～Gu, for carrying out the running of driving in regular turn of article onegate lines G 1 to the last item gate lines G u, first group of output port exported a plurality of first grid signal GO1～GOx from a plurality of first output port P1～Px in regular turn according to first direction, and is sent to second group of gate line through a plurality of second supplementary gatepolar curves 556; Second group of output port exported a plurality of second grid signal GOx+1～GOw-1 from a plurality of second output port Px+2～Py-1 in regular turn according to first direction, and is sent to first group of gate line through a plurality of first supplementary gatepolar curves 555; The 3rd group of output port exported a plurality of the 3rd signal GOu～GOw from a plurality of the 3rd output port Pz～Py+1 in regular turn according to second direction, and is sent to the 3rd group of gate line through a plurality of the 3rd supplementary gatepolar curves 557.

Figure 14 is the synoptic diagram of the LCD of eighth embodiment of the invention.As shown in figure 14, the circuit structure of LCD 593 is similar to LCD shown in Figure 5 500, main difference is that many strange ordering second supplementary gate polar curves 556 and many strange ordering the 3rd supplementary gate polar curves 557 are arranged at first rim area 580, and many idol ordering second supplementary gate polar curves 556 are arranged at second rim area 585 with many idol ordering the 3rd supplementary gate polar curves 557.Many the strange ordering second supplementary gate polar curves 556 are electrically connected on many strange ordering gate lines 550 of second group of gate line, and many idol ordering second supplementary gate polar curves 556 are electrically connected on many idol ordering gate lines 550 of second group of gate line.Many strange ordering the 3rd supplementary gate polar curves 557 are electrically connected on many strange ordering gate lines 550 of the 3rd group of gate line, and many idol ordering the 3rd supplementary gate polar curves 557 are electrically connected on many idol ordering gate lines 550 of the 3rd group of gate line.Except above-mentioned points, all the other structures of LCD 593 and the circuit relation of coupling is same as LCD shown in Figure 5 500, the signal driving method that can be provided according to the 4th to the 7th embodiment as for the signal driving method of LCD 593 and in like manner analogizing.

In another embodiment, many the strange ordering second supplementary gatepolar curves 556 are electrically connected on many idol orderinggate lines 550 of second group of gate line, many the idol ordering second supplementary gatepolar curves 556 are electrically connected on many strangeordering gate lines 550 of second group of gate line, many strange ordering the 3rd supplementary gatepolar curves 557 are electrically connected on many idol orderinggate lines 550 of the 3rd group of gate line, and many idol ordering the 3rd supplementary gatepolar curves 557 are electrically connected on many strangeordering gate lines 550 of the 3rd group of gate line.

Figure 15 is the synoptic diagram of the LCD of ninth embodiment of the invention.As shown in figure 15, LCD 600 comprises infrabasal plate 610 and upper substrate 690, and liquid crystal layer promptly is folded between infrabasal plate 610 and the upper substrate 690.Upper substrate 690 can be colored filter, is used for the display color picture.Infrabasal plate 610 comprises many data lines that be arranged in parallel 630, many gate lines that be arranged in parallel 650, many first supplementary gate polar curves 655 that be arranged in parallel, many second supplementary gate polar curves 658 that be arranged in parallel, a plurality of first pixel cell 660, a plurality of second pixel cell 665, first rim area 680, second rim area 685, the 3rd rim area 688, image viewing area 695 and driver modules 601.First rim area 680, second rim area 685, with the 3rd rim area 688 substantially around image viewing area 695, for example, first rim area 680, second rim area 685, be adjacent to three sides of image viewing area 695 substantially with the 3rd rim area 688, the 3rd rim area 688 is substantially between first rim area 680 and second rim area 685.Many data lines 630, many gate lines 650, a plurality of first pixel cell 660, a plurality of second pixel cells 665 are arranged at image viewing area 695 with many first supplementary gate polar curves 655, and driver module 601 is arranged at the 3rd rim area 688.Many gate line 650 is orthogonal with many data lines 630 substantially.

Many gate line 650 comprises first group of gate line and second group of gate line.Second group of gate line comprisesmany gate lines 650 of firstinterior zone 641 that is arranged at image viewing area 695.First interior zone 641 ofimage viewing area 695 is adjacent to the 3rd rim area 688.First group of gate line comprisesmany gate lines 650 of secondinterior zone 642 that is arranged at image viewing area 695.Second interior zone, 642 subtends ofimage viewing area 695 are in first interior zone 641.Many first supplementary gatepolar curves 655 are parallel tomany data lines 630, and each bar first supplementary gatepolar curve 655 is electrically connected on thecorresponding gate line 650 of first group of gate line.Many second supplementary gatepolar curves 658 are arranged atfirst rim area 680, and are parallel tomany data lines 630, and each bar second supplementary gatepolar curve 658 is electrically connected on thecorresponding gate line 650 of second group of gate line.In other words, eachbar gate line 650 is electrically connected on the first supplementary gatepolar curve 655 or the second supplementary gatepolar curve 658.

Driver module 601 is electrically connected onmany data lines 630, is fed into a plurality offirst pixel cells 660 and a plurality ofsecond pixel cells 665 in order to a plurality of data-signals that will be provided through many data lines 630.Driver module 601 is electrically connected on many first supplementary gatepolar curves 655 and many second supplementary gatepolar curves 658 in addition, is fed intomany gate lines 650 in order to a plurality of signals that will be provided through many first supplementary gatepolar curves 655 and many second supplementary gate polar curves 658.LCD 600 is promptly controlled a plurality of data-signals according to a plurality of signals and is write to a plurality offirst pixel cells 660 and a plurality ofsecond pixel cell 665, in order to show image, the signal driving method that can be provided according to the 4th to the 7th embodiment as for the signal driving method of LCD 600 and in like manner analogizing.

In one embodiment, driver module 601 comprises at least one driver 605, is used to provide a plurality of data-signals bar data line 630 at the most, and a plurality of signals bar first supplementary gate polar curve 655 and many second supplementary gate polar curves 658 at the most is provided.In another embodiment, driver module 601 comprises a plurality of drivers 605, and a plurality of drivers 605 comprise at least one source electrode driver and at least one gate drivers.Source electrode driver is electrically connected on many data lines 630, in order to a plurality of data-signals to be provided.Gate drivers is electrically connected on many first supplementary gate polar curves 655 and many second supplementary gate polar curves 658, in order to a plurality of signals bar gate line 650 at the most to be provided.Perhaps, a plurality of drivers 605 comprise at least one source electrode driver, at least one first grid driver and at least one second grid driver, the first grid driver provides the bar first supplementary gate polar curve 655 at the most with a plurality of first grid signals, and the second grid driver provides the bar second supplementary gate polar curve 658 at the most with a plurality of second grid signals.Grid wave during LCD 600 work is just as in signal waveform shown in Figure 4, so repeat no more its principle of work.

Because many first supplementary gatepolar curves 655 are arranged atimage viewing area 695, that is the number of the set second supplementary gatepolar curve 658 offirst rim area 680 can significantly reduce, and therefore can significantly dwindle the width of first rim area 680.In addition, 685 of second rim area are not provided with any supplementary gate polar curve, thus more can significantly dwindle its width, and the size ofinfrabasal plate 610 just can significantly be dwindled.So LCD 600 also is suitable as the miniscope that portable electronic devices is installed.

Figure 16 is the synoptic diagram of the LCD of tenth embodiment of the invention.As shown in figure 16, the circuit structure ofLCD 696 is similar to LCD shown in Figure 15 600, main difference is that many strange ordering second supplementary gatepolar curves 658 are arranged atfirst rim area 680, and many idol ordering second supplementary gatepolar curves 658 are arranged at second rim area 685.Many the strange ordering second supplementary gatepolar curves 658 are electrically connected on many strangeordering gate lines 650 of second group of gate line, and many idol ordering second supplementary gatepolar curves 658 are electrically connected on many idol orderinggate lines 650 of second group of gate line.Except above-mentioned points, all the other structures ofLCD 696 and the circuit relation of coupling is same as LCD shown in Figure 15 600, the signal driving method that can be provided according to the 4th to the 7th embodiment as for the signal driving method ofLCD 696 and in like manner analogizing.

In another embodiment, many strange ordering second supplementary gatepolar curves 658 are electrically connected on many idol orderinggate lines 650 of second group of gate line, and many idol ordering second supplementary gatepolar curves 658 are electrically connected on many strangeordering gate lines 650 of second group of gate line.

Figure 17 is the synoptic diagram of the LCD of eleventh embodiment of the invention.As shown in figure 17, LCD 700 comprises infrabasal plate 710 and upper substrate 790, and liquid crystal layer promptly is folded between infrabasal plate 710 and the upper substrate 790.Upper substrate 790 can be colored filter, is used for the display color picture.Infrabasal plate 710 comprises many data lines that be arranged in parallel 730, many gate lines that be arranged in parallel 750, many first supplementary gate polar curves 755 that be arranged in parallel, many second supplementary gate polar curves 759 that be arranged in parallel, a plurality of first pixel cell 760, a plurality of second pixel cell 765, first rim area 780, second rim area 785, the 3rd rim area 788, image viewing area 795 and driver modules 701.First rim area 780, second rim area 785, with the 3rd rim area 788 substantially around image viewing area 795, for example, first rim area 780, second rim area 785, be adjacent to three sides of image viewing area 795 substantially with the 3rd rim area 788.Many data lines 730, many gate lines 750, a plurality of first pixel cell 760, a plurality of second pixel cells 765 are arranged at image viewing area 795 with many first supplementary gate polar curves 755, and driver module 701 is arranged at the 3rd rim area 788.Many gate line 750 is orthogonal with many data lines 730 substantially.

Many gate line 750 comprises first group of gate line and second group of gate line.First group of gate line comprisesmany gate lines 750 of firstinterior zone 741 that is arranged at image viewing area 795.First interior zone 741 ofimage viewing area 795 is adjacent to the 3rd rim area 788.Second group of gate line comprisesmany gate lines 750 of secondinterior zone 742 that is arranged at image viewing area 795.Second interior zone, 742 subtends ofimage viewing area 795 are in first interior zone 741.Many first supplementary gatepolar curves 755 are parallel tomany data lines 730, and each bar first supplementary gatepolar curve 755 is electrically connected on thecorresponding gate line 750 of first group of gate line.Many second supplementary gatepolar curves 759 are arranged atsecond rim area 785, and are parallel tomany data lines 730, and each bar second supplementary gatepolar curve 759 is electrically connected on thecorresponding gate line 750 of second group of gate line.In other words, eachbar gate line 750 is electrically connected on the first supplementary gatepolar curve 755 or the second supplementary gatepolar curve 759.

Driver module 701 is electrically connected onmany data lines 730, is fed into a plurality offirst pixel cells 760 and a plurality ofsecond pixel cells 765 in order to a plurality of data-signals that will be provided through many data lines 730.Driver module 701 is electrically connected on many first supplementary gatepolar curves 755 and many second supplementary gatepolar curves 759 in addition, is fed intomany gate lines 750 in order to a plurality of signals that will be provided through many first supplementary gatepolar curves 755 and many second supplementary gate polar curves 759.LCD 700 is promptly controlled a plurality of data-signals according to a plurality of signals and is write to a plurality offirst pixel cells 760 and a plurality ofsecond pixel cell 765, in order to show image, the signal driving method that can be provided according to the 4th to the 7th embodiment as for the signal driving method ofLCD 700 and in like manner analogizing.

In one embodiment, driver module 701 comprises at least one driver 705, is used to provide a plurality of data-signals bar data line 730 at the most, and a plurality of signals bar first supplementary gate polar curve 755 and many second supplementary gate polar curves 759 at the most is provided.In another embodiment, driver module 701 comprises a plurality of drivers 705, and a plurality of drivers 705 comprise at least one source electrode driver and at least one gate drivers.Source electrode driver is electrically connected on many data lines 730, in order to a plurality of data-signals to be provided.Gate drivers is electrically connected on many first supplementary gate polar curves 755 and many second supplementary gate polar curves 759, in order to a plurality of signals bar gate line 750 at the most to be provided.Perhaps, a plurality of drivers 705 comprise at least one source electrode driver, at least one first grid driver and at least one second grid driver, the first grid driver provides the bar first supplementary gate polar curve 755 at the most with a plurality of first grid signals, and the second grid driver provides the bar second supplementary gate polar curve 759 at the most with a plurality of second grid signals.Grid wave during LCD 700 work is just as in signal waveform shown in Figure 4, so repeat no more its principle of work.

Because many first supplementary gatepolar curves 755 are arranged atimage viewing area 795, that is the number of the set second supplementary gatepolar curve 759 ofsecond rim area 785 can significantly reduce, and therefore can significantly dwindle the width of second rim area 785.In addition, 780 of first rim area are not provided with any supplementary gate polar curve, thus more can significantly dwindle its width, and the size ofinfrabasal plate 710 just can significantly bedwindled.So LCD 700 also is suitable as the miniscope that portable electronic devices is installed.

Figure 18 is the synoptic diagram of the LCD of twelveth embodiment of the invention.As shown in figure 18, the circuit structure ofLCD 796 is similar to LCD shown in Figure 17 700, main difference is that many strange ordering second supplementary gatepolar curves 759 are arranged atfirst rim area 780, and many idol ordering second supplementary gatepolar curves 759 are arranged at second rim area 785.Many the strange ordering second supplementary gatepolar curves 759 are electrically connected on many strangeordering gate lines 750 of second group of gate line, and many idol ordering second supplementary gatepolar curves 759 are electrically connected on many idol orderinggate lines 750 of second group of gate line.Except above-mentioned points, all the other structures ofLCD 796 and the circuit relation of coupling is same as LCD shown in Figure 17 700, the signal driving method that can be provided according to the 4th to the 7th embodiment as for the signal driving method ofLCD 796 and in like manner analogizing.

In another embodiment, many strange ordering second supplementary gatepolar curves 759 are electrically connected on many idol orderinggate lines 750 of second group of gate line, and many idol ordering second supplementary gatepolar curves 759 are electrically connected on many strangeordering gate lines 750 of second group of gate line.

Figure 19 is the synoptic diagram of the LCD of thriteenth embodiment of the invention.As shown in figure 19, the circuit structure of LCD 797 is similar to LCD shown in Figure 17 700.LCD 797 more comprises adjustment layer 781 and is positioned at first rim area 880, and adjust layer 786 and many second supplementary gate polar curves 759 are positioned at second rim area 881, a plurality of common electrode lines 770 are electrically connected on a plurality of first pixel cells 760 respectively and are positioned at image viewing area 795 with a plurality of second pixel cells 765.Many second supplementary gate polar curves 759 are for being arranged at many leads of identical layer or being crisscross arranged in many leads of dissimilar layer.Adjust layer 781 and 786 and be electrically connected on a plurality of common electrode lines 770 to transmit common voltage.Adjusting layer 781 and 786 can be lighttight metal level, also transparent electrode layer, such as ITO (Indium-Tin-Oxide) electrode layer.Between many second supplementary gate polar curves 759 and adjustment layer 786, be provided with insulation course, and the coupling capacitance between the second supplementary gate polar curve 759 and the adjustment layer 786 can be adjusted the time constant that transmits signal.The first supplementary gate polar curve 755 compared to image viewing area 795, if not corresponding to the coupling capacitance of adjusting layer 786, then the second supplementary gate polar curve 759 has less coupling capacitance, so make the transmission delay time of all signals identical to avoid scintillation with regard to utilizing corresponding to the coupling capacitance of adjusting layer 786.

Figure 20 is arranged at the LCD of many second supplementary gate polar curves of identical layer along the diagrammatic cross-section of dotted line AA ' for the tool of Figure 19.As shown in figure 20, many second supplementary gatepolar curves 759 are set oninfrabasal plate 710, between many second supplementary gatepolar curves 759 andadjustment layer 786, are provided withfirst insulation course 776 and second insulation course 777.Therefore, many second supplementary gatepolar curves 759 are the lead that is arranged at identical layer.In one embodiment, adjustinglayer 786 is the transparent electrode layer of about 400～800 dusts of thickness (Angstrom), the second supplementary gatepolar curve 759 is the lead of about 1000～3000 dusts of thickness, andfirst insulation course 776 andsecond insulation course 777 are the insulation course of about 2000～3000 dusts of thickness.

Figure 21 is arranged at the LCD of many second supplementary gate polar curves of dissimilar layer along the diagrammatic cross-section of dotted line AA ' for the tool of Figure 19.Diagrammatic cross-section shown in Figure 21 is similar to diagrammatic cross-section shown in Figure 20, and main difference is that many second supplementary gatepolar curves 759 are for to be crisscross arranged in the lead of dissimilar layer.As shown in figure 21, the part lead of many second supplementary gatepolar curves 759 is arranged between theinfrabasal plate 710 andfirst insulation course 776, and another part lead of many second supplementary gatepolar curves 759 is arranged betweenfirst insulation course 776 andsecond insulation course 777, adjustslayer 786 and is arranged on many second supplementary gatepolar curves 759.

Figure 22 is the synoptic diagram of the LCD of fourteenth embodiment of the invention.As shown in figure 22, the circuit structure of LCD 798 is similar to LCD shown in Figure 19 797, and main difference is theadjustment layer 787 ofsecond rim area 882, for be the conductive layer of step distribution pattern along third direction.Therefore, adjust the area thatlayer 787 is covered in the top of many second supplementary gatepolar curves 759, successively decrease successively, use so that the coupling capacitance between the second supplementary gatepolar curve 759 and theadjustment layer 787 successively decreases successively along third direction along third direction.Because the length of many second supplementary gatepolar curves 759 is increased progressively toward outermost (promptly along third direction) successively by the most inboard, so the resistance of many second supplementary gatepolar curves 759 is increased progressively toward outermost successively by the most inboard, yet the resistance difference of many second supplementary gatepolar curves 759 can cause transmitting the time constant difference of signal, therefore the coupling capacitance that just utilizes many second supplementary gatepolar curves 759 and adjust between thelayer 787 changes with compensating resistance difference, is used for making the transmission delay time of all signals identical to avoid scintillation.

Basically, many second supplementary gatepolar curves 759 of LCD 798 are for being arranged at many leads of identical layer.In another embodiment, many second supplementary gatepolar curves 759 of LCD 798 can be many leads that are crisscross arranged in dissimilar layer, yet be arranged at the second supplementary gatepolar curve 759 of lower floor and adjust between thelayer 787 and insert and put two layer insulatings, but be arranged at the second supplementary gatepolar curve 759 on upper strata and adjust between thelayer 787 and then only insert and put a layer insulating, so the second supplementary gatepolar curve 759 that is arranged at the upper strata has biggercapacitance adjusting layer 787 zone that is covered, theadjustment layer 787 that therefore is the step distribution pattern can reduce at the overlay length corresponding to the second supplementary gatepolar curve 759 on upper strata.In a word, can covering the length of each second supplementary gatepolar curve 759 so that the transmission delay time of all signals is identical, avoiding the purpose of glimmering and reach by adjust adjustinglayer 787.

Figure 23 is the synoptic diagram of the LCD of fifteenth embodiment of the invention.As shown in figure 23, the circuit structure ofLCD 799 is similar to LCD shown in Figure 19 797, main difference is that theadjustment layer 887 ofsecond rim area 883 has a plurality ofopenings 775, and in the zone ofopening 775, adjustlayer 887 and do not cover the second supplementary gatepolar curve 759, increase progressively successively along third direction as for the length/area of a plurality of openings 775.Therefore, adjust the length/area thatlayer 887 covers many second supplementary gatepolar curves 759, successively decrease successively along third direction, so the second supplementary gatepolar curve 759 and the coupling capacitance of adjusting between thelayer 787 successively decrease successively along third direction, also can compensate the resistance difference of many second supplementary gatepolar curves 759, be used for making the transmission delay time of all signals identical to avoid scintillation.

Basically, many second supplementary gatepolar curves 759 ofLCD 799 are for being arranged at many leads of identical layer.In another embodiment, many second supplementary gatepolar curves 759 ofLCD 799 can be many leads that are crisscross arranged in dissimilar layer, yet as mentioned above, the second supplementary gatepolar curve 759 that is arranged at the upper strata has biggercapacitance adjusting layer 887 zone that is covered, and therefore the length/area corresponding to theopening 775 of the second supplementary gatepolar curve 759 on upper strata can increase.In a word, can covering the length/area of each second supplementary gatepolar curve 759 so that the transmission delay time of all signals is identical, avoiding the purpose of glimmering and reach by adjust adjustinglayer 887.

Figure 24 is arranged at the LCD of many second supplementary gate polar curves of identical layer along the diagrammatic cross-section of dotted line BB ' for the tool of Figure 23.Diagrammatic cross-section shown in Figure 24 is similar to diagrammatic cross-section shown in Figure 20, and main difference is to adjust layer 887 a plurality ofopenings 775 directly over many second supplementary gatepolar curves 759.

Figure 25 is arranged at the LCD of many second supplementary gatepolar curves 759 of dissimilar layer along the diagrammatic cross-section of dotted line BB ' for the tool of Figure 23.Diagrammatic cross-section shown in Figure 25 is similar to diagrammatic cross-section shown in Figure 21, and main difference is to adjust layer 887 a plurality ofopenings 775 in the top of many second supplementary gatepolar curves 759.

Figure 26 is the synoptic diagram of the LCD of sixteenth embodiment of the invention.As shown in figure 26, the circuit structure of LCD 893 is similar to LCD shown in Figure 19 797, and main difference is that the adjustment layer 888 of second rim area 884 has a plurality of openings 873.Many the second supplementary gate polar curves 759 that second rim area 884 of LCD 893 is comprised are for to be crisscross arranged in many leads of dissimilar layer, only opening 873 is arranged and adjust layer 888 in cabling zone corresponding to the second supplementary gate polar curve 759 on upper strata, and will be than the opening 873 not in the cabling zone of the second supplementary gate polar curve 759 of lower floor, in Figure 27, the second supplementary gate polar curve 759 on so-called upper strata is meant the second supplementary gate polar curve 759 between first insulation course 776 and second insulation course 777, and the second supplementary gate polar curve 759 of lower floor is meant the second supplementary gate polar curve 759 between first insulation course 776 and infrabasal plate 710.Figure 27 is arranged at the LCD of many second supplementary gate polar curves of dissimilar layer along the diagrammatic cross-section of dotted line CC ' for the tool of Figure 26.Diagrammatic cross-section shown in Figure 27 is similar to diagrammatic cross-section shown in Figure 25, and main difference is to adjust layer 888 and does not have opening 873 in the top of the second supplementary gate polar curve 759 of lower floor.

Figure 28 is the synoptic diagram of the LCD of seventeenth embodiment of the invention.As shown in figure 28, the circuit structure of LCD 895 is similar to LCD shown in Figure 19 797, main difference is that the adjustment layer 889 of second rim area 885 is for being the conductor layer of step distribution pattern along third direction, and adjustment layer 889 has a plurality of openings 875, and in the zone of opening 875, adjust the top that layer 889 is not covered in the second supplementary gate polar curve 759, increase progressively successively along third direction as for the length/area of a plurality of openings 875.Therefore, adjust the length/area that layer 889 is covered in the top of many second supplementary gate polar curves 759, successively decrease successively along third direction, so the second supplementary gate polar curve 759 and the coupling capacitance of adjusting between the layer 889 successively decrease successively along third direction, also can compensate the resistance difference of many second supplementary gate polar curves 759, be used for making the transmission delay time of all signals identical to avoid scintillation.In addition, many second supplementary gate polar curves of LCD 895 759 are for being arranged at many leads of identical layer or being crisscross arranged in many leads of dissimilar layer, that is can be same as Figure 24 or diagrammatic cross-section shown in Figure 25 along the diagrammatic cross-section of dotted line DD '.In another embodiment, if many second supplementary gate polar curves 759 of LCD 895 are for to be crisscross arranged in many leads of dissimilar layer, then adjusting 889 on layer has opening 875 above the second supplementary gate polar curve 759 on upper strata, that is is same as diagrammatic cross-section shown in Figure 27 along the diagrammatic cross-section of dotted line DD '.

In the 3rd to the 12 embodiment of the invention described above LCD, be arranged at many supplementary gate polar curves of first rim area or second rim area, all can cooperate the arbitrary embodiment among the 13 embodiment to the 17 embodiment, adjust the time constant that transmits signal, with avoid scintillation so that the transmission delay time of all signals is identical.

In sum, in LCD of the present invention, owing to being arranged at the image viewing area, therefore can significantly dwindle the width of rim area to dwindle the size of infrabasal plate, so be suitable as the miniscope that portable electron device is installed to small part auxiliary grid line.

Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.