CN101416293B

Movatterモバイル変換

Info

Publication number: CN101416293B
Application number: CN2007800121574A
Authority: CN
Inventors: M·巴尔塞努; 夏立群; 石美仪; H·M'沙德
Original assignee: Applied Materials Inc
Current assignee: Applied Materials Inc
Priority date: 2006-03-31
Filing date: 2007-03-30
Publication date: 2011-04-20
Anticipated expiration: 2027-03-30
Also published as: KR20080106984A; WO2007118026A3; TW200816310A; TWI424498B; CN101416293A; TW201415551A; WO2007118026A2

Abstract

Translated fromChinese

本发明提供基板上膜层的阶梯覆盖性与图案加载(pattern loading)的控制方法。本发明一方面中，该方法包括使基板暴露在等离子体中的含硅前驱物下以沉积一膜层、使用一等离子体来处理所沉积的膜层以及重复该暴露步骤与处理步骤直到获得想要的膜层厚度。这些离子体可以是由含氧气体所生成。在另一方面中，该方法包括在其基板表面上具有至少一个已形成特征的基板上沉积一介电层，以及使用由含氧气体或含卤素气体所形成的等离子体来蚀刻该介电层，以在该特征上提供想要的介电层轮廓。可重复该沉积与蚀刻步骤多次循环直到提供期望的轮廓为止。

The invention provides a method for controlling step coverage and pattern loading of a film layer on a substrate. In one aspect of the invention, the method comprises exposing the substrate to a silicon-containing precursor in a plasma to deposit a film, treating the deposited film using a plasma, and repeating the exposing and treating steps until the desired desired film thickness. These ions may be generated by oxygen-containing gases. In another aspect, the method includes depositing a dielectric layer on a substrate having at least one formed feature on a surface of the substrate, and etching the dielectric layer using a plasma formed from an oxygen-containing gas or a halogen-containing gas , to provide the desired dielectric profile on the feature. This deposition and etching step can be repeated for multiple cycles until the desired profile is provided.

Description

Translated fromChinese

用于介电膜层的阶梯覆盖与图案加载For step coverage and pattern loading of dielectric layers

技术领域technical field

本发明的实施例大致上有关于半导体处理的方法及设备。更明确而言，本发明实施例是有关于沉积共形介电膜层的方法及设备。Embodiments of the invention generally relate to methods and apparatus for semiconductor processing. More specifically, embodiments of the present invention relate to methods and apparatus for depositing conformal dielectric films.

背景技术Background technique

通过数种气体的化学反应在一基板上形成介电层是当代半导体器件制造过程的主要步骤中的其中一个步骤。这些沉积处理包含化学气相沉积(CVD)与等离子体增强式化学气相沉积(PECVD)，其中等离子体增强化学气相沉积是结合等离子体与传统CVD技术的沉积处理。The formation of a dielectric layer on a substrate by the chemical reaction of several gases is one of the major steps in the fabrication process of contemporary semiconductor devices. These deposition processes include chemical vapor deposition (CVD) and plasma enhanced chemical vapor deposition (PECVD), wherein plasma enhanced chemical vapor deposition is a deposition process that combines plasma and conventional CVD techniques.

CVD以及PECVD介电层可做为半导体器件中的不同膜层。例如，这些介电层可以做为器件中导线或互连之间的层间介电层。或者，这些介电层可做为阻障层、蚀刻终止层或间隙壁以及其它膜层。CVD and PECVD dielectric layers can be used as different layers in semiconductor devices. For example, these dielectric layers can act as interlayer dielectrics between wires or interconnects in a device. Alternatively, these dielectric layers may serve as barrier layers, etch stop layers or spacers, among other layers.

用来做为阻障层与间隙壁的介电层通常沉积在图案化的基板中的特征上，例如沉积在用来形成后续线路的水平互连、垂直互连(通孔)、栅极堆栈层等特征上。较佳者，沉积处理提供一共形膜层(conformal layer)。然而，共形沉积通常是难以达成的。Dielectric layers used as barriers and spacers are usually deposited on features in the patterned substrate, such as horizontal interconnects, vertical interconnects (vias), gate stacks used to form subsequent circuits layers and other features. Preferably, the deposition process provides a conformal layer. However, conformal deposition is often difficult to achieve.

举例而言，将阻障层沉积在特征上时很难不产生表面缺陷或特征变形等情形。在沉积的过程中，阻障层材料可能形成凸块(overloaf)，也就是在通孔的肩部沉积过多材料却在通孔的底部沉积过少材料，而形成看起来像是面包侧边的凸块状造型。此种现象也因为该通孔底部的轮廓看起来像脚而被称为底脚现象(footing)。在极端的例子里，通孔的肩部会合拢而在通孔的顶部形成一接合密封表面。当整个晶片上的膜层厚度不均匀时，可能会对每个装置的驱动电流性质造成不良影响。仅仅调整处理参数并无法显著地改善阶梯覆盖与图案加载的问题。For example, it is difficult to deposit a barrier layer on a feature without creating surface defects or deformation of the feature. During deposition, the barrier layer material can form an overloaf, that is, deposit too much material on the shoulder of the via and deposit too little material on the bottom of the via, forming what looks like the side of a bread bump shape. This phenomenon is also called footing because the contour of the bottom of the via looks like a foot. In extreme cases, the shoulders of the through-holes may converge to form a joint sealing surface at the top of the through-hole. When the film thickness is not uniform across the wafer, it can adversely affect the drive current properties of each device. Just adjusting the processing parameters cannot significantly improve the problem of ladder coverage and pattern loading.

在栅极堆栈层上沉积将于后续用来形成间隙壁的共形膜层亦是一种挑战。虽然目前已发展出使用传统高温低压CVD来沉积作为间隙壁的氮化硅与氧化硅层的方法，然而此类技术的热预算过高而可能使半导体器件的几何形状持续收缩。虽然氮化硅的PECVD处理可以在较低的温度下执行，然而所得到的阶梯覆盖与图案加载结果却无法如利用高温低压CVD方法所形成的结果般地令人满意。Depositing a conformal layer on the gate stack layer that will later be used to form spacers is also a challenge. Although conventional high temperature and low pressure CVD methods have been developed to deposit silicon nitride and silicon oxide layers as spacers, the thermal budget of such techniques is too high and may continue to shrink the geometry of semiconductor devices. Although PECVD of silicon nitride can be performed at lower temperatures, the obtained step coverage and pattern loading results are not as satisfactory as those formed by using high temperature and low pressure CVD methods.

因此，目前需要一种能在图案化基板中已形成的特征上沉积共形膜层的方法。Accordingly, there is a need for a method of depositing conformal layers on features already formed in a patterned substrate.

发明内容Contents of the invention

本发明实施例提供一种在基板上形成介电膜层的方法，该方法包括如下步骤：将一表面上具有至少一个已形成的特征的基板放置于一反应室中；沉积一介电层；用等离子体处理该介电层；测定该介电层的厚度；以及重复执行上述沉积介电层的步骤，用等离子体处理该介电层并判断该介电层厚度。An embodiment of the present invention provides a method for forming a dielectric film layer on a substrate, the method comprising the following steps: placing a substrate having at least one formed feature on a surface in a reaction chamber; depositing a dielectric layer; Treating the dielectric layer with plasma; measuring the thickness of the dielectric layer; and repeating the steps of depositing the dielectric layer, treating the dielectric layer with plasma and judging the thickness of the dielectric layer.

在一实施例中，提供一种于一反应室内在一图案化基板上形成一膜层的方法。该方法包括使该图案化基板在存在有一等离子体的情况下暴露于一含硅的前驱物中(例如八甲基环四硅氧烷，octamethylcyclotetrasiloxane)以在该图案化基板上沉积一膜层，以及待沉积该膜层后，利用由诸如氧气等含氧气体所形成的等离子体来处理该膜层。重复执行该暴露步骤与处理步骤直到获得所期望的膜层厚度为止。该膜层可能是一氧化硅层或是一掺杂碳的氧化硅层。In one embodiment, a method for forming a film layer on a patterned substrate in a reaction chamber is provided. The method includes exposing the patterned substrate to a silicon-containing precursor (eg, octamethylcyclotetrasiloxane) in the presence of a plasma to deposit a film on the patterned substrate, And after the film layer is deposited, the film layer is treated with a plasma formed by an oxygen-containing gas such as oxygen. The exposing and processing steps are repeated until the desired film thickness is obtained. The film layer may be a silicon oxide layer or a carbon-doped silicon oxide layer.

在另一实施例中，于一反应室内在一图案化基板上形成一膜层的方法包括使该图案化基板在存在有一等离子体的情况下暴露于一含硅前驱物中以在该图案化基板上沉积一膜层，以及待沉积该膜层后，利用由一含氮气体所形成的等离子体来处理该膜层，以及重复该暴露步骤与处理步骤直到获得所期望的膜层厚度为止。In another embodiment, a method of forming a layer on a patterned substrate in a chamber includes exposing the patterned substrate to a silicon-containing precursor in the presence of a plasma to A film is deposited on the substrate, and after the film is deposited, the film is treated with plasma formed by a nitrogen-containing gas, and the exposing and processing steps are repeated until the desired film thickness is obtained.

本发明实施例亦提供一种控制基板上膜层的阶梯覆盖与图案加载的方法。在一实施例中，该方法包括将基板表面上具有至少一个已形成特征的基板放置于一反应室中；一介电层沉积在该基板上，并使用由含氧或含卤素气体所形成的等离子体来蚀刻该介电层，以在该至少一个已形成的特征上提供具有所期望轮廓的介电层，其中该含卤素气体选自于由氟、氯、溴及其组合所构成的群组中。The embodiment of the present invention also provides a method for controlling step coverage and pattern loading of a film layer on a substrate. In one embodiment, the method includes placing a substrate having at least one formed feature on a surface of the substrate in a reaction chamber; depositing a dielectric layer on the substrate and using a plasma to etch the dielectric layer to provide a dielectric layer with a desired profile on the at least one formed feature, wherein the halogen-containing gas is selected from the group consisting of fluorine, chlorine, bromine, and combinations thereof group.

在另一实施例中，该方法包括将一基板表面上具有至少一个已形成特征的基板放置于一反应室中，以及沉积一介电层在该基板上。该特征包含一顶面、一侧面以及一底面。该介电层沉积在顶面上的厚度比其沉积在底面与侧面上的厚度要厚。随后利用由含氧或含卤素气体所形成的等离子体来蚀刻该介电层，其中该含卤素气体选自于由氟、氯、溴及其组合物所构成的群组中。该介电层顶面上的蚀刻速率高于该介电层底面及侧面上的蚀刻速率。执行一次或多次的介电层沉积与蚀刻步骤，以在该至少一个已形成特征上提供具有所期望轮廓的介电层。In another embodiment, the method includes placing a substrate having at least one formed feature on a surface of the substrate in a reaction chamber, and depositing a dielectric layer on the substrate. The feature includes a top surface, a side surface and a bottom surface. The dielectric layer is deposited thicker on the top surface than on the bottom and side surfaces. The dielectric layer is then etched using a plasma formed from an oxygen-containing or halogen-containing gas selected from the group consisting of fluorine, chlorine, bromine, and combinations thereof. The etch rate on the top surface of the dielectric layer is higher than the etch rate on the bottom surface and sides of the dielectric layer. One or more dielectric layer deposition and etching steps are performed to provide a dielectric layer having a desired profile on the at least one formed feature.

在更进一步的实施例中，该方法包括将一基板表面上具有至少一个已形成特征的基板放置于一反应室中，以及沉积一氮化硅介电层在该基板上。该特征包含一顶面、一侧面与一底面。该氮化硅介电层沉积在顶面上的厚度比其沉积在底面与侧面上的厚度要厚。随后利用三氟化氮(NF₃)等离子体蚀刻该介电层，并且该NF₃等离子体在顶面上的蚀刻速率高于其在底面及侧面上的蚀刻速率，以在该至少一个已形成特征上提供具有所期望轮廓的氮化硅介电层。可执行一次或多次的氮化硅介电层沉积与蚀刻步骤，以提供所期望的轮廓。In still further embodiments, the method includes placing a substrate having at least one formed feature on a surface of the substrate in a reaction chamber, and depositing a silicon nitride dielectric layer on the substrate. The feature includes a top surface, a side surface and a bottom surface. The silicon nitride dielectric layer is deposited thicker on the top surface than on the bottom and side surfaces. The dielectric layer is then etched using nitrogen trifluoride (NF₃ ) plasma, and the etching rate of the NF₃ plasma on the top surface is higher than that on the bottom surface and side surfaces, so that the at least one formed A silicon nitride dielectric layer with a desired profile is characteristically provided. One or more steps of silicon nitride dielectric layer deposition and etching may be performed to provide the desired profile.

附图说明Description of drawings

为了能够详细了解本发明上述特征，可参照部分绘示于附图中的实施例来阅读整理于上方的本发明进一步叙述内容。需明白的是，所附图式所绘示的仅是本发明的代表性实施例，因此不应用来限定本发明范围，本发明亦允许其它的等效实施例。In order to understand the above features of the present invention in detail, the further description of the present invention organized above can be read with reference to some of the embodiments shown in the accompanying drawings. It should be understood that the accompanying drawings illustrate only representative embodiments of the invention and therefore should not be used to limit the scope of the invention, and the invention also allows other equivalent embodiments.

图1为一沉积处理实施例的流程图；Fig. 1 is a flow chart of a deposition treatment embodiment;

图2为沉积处理又一实施例的流程图；Fig. 2 is the flowchart of another embodiment of deposition process;

图3A为根据现有技术沉积在一基板特征上的介电层轮廓示意图；3A is a schematic diagram illustrating the outline of a dielectric layer deposited on a substrate feature according to the prior art;

图3B为根据本发明实施例而沉积在一基板特征上的介电层轮廓示意图；3B is a schematic diagram illustrating the outline of a dielectric layer deposited on a substrate feature according to an embodiment of the present invention;

图4系一图表，其显示根据本发明实施例在不同膜层蚀刻厚度下，在基板特征密集区与疏离区中所获得的特征底部厚度；4 is a graph showing the bottom thickness of features obtained in feature-dense regions and isolated regions of the substrate under different film layer etching thicknesses according to an embodiment of the present invention;

图5系一图表，其显示根据本发明实施例在不同膜层蚀刻厚度下，所获得的底部图案加载效应(patter nloading effect)；FIG. 5 is a graph showing the bottom pattern loading effect (patter nloading effect) obtained under different film layer etching thicknesses according to an embodiment of the present invention;

图6显示一沉积处理实施例的流程图；Figure 6 shows a flow diagram of an embodiment of a deposition process;

图7为一图表，其显示根据本发明实施例执行一沉积处理过程中的膜层厚度；FIG. 7 is a graph showing film thickness during a deposition process performed according to an embodiment of the present invention;

图8显示根据本发明实施例在一基板上沉积一膜层时，该膜层厚度对该基板暴露在前驱物中的时间做图的图表；8 shows a chart showing the thickness of the film layer as a graph of the time the substrate is exposed to the precursor when depositing a film layer on a substrate according to an embodiment of the present invention;

图9为根据本发明实施例在基板上的膜层沉积反应示意图；9 is a schematic diagram of a film deposition reaction on a substrate according to an embodiment of the present invention;

图10显示沉积处理另一实施例的流程图；Figure 10 shows a flow chart of another embodiment of a deposition process;

图11显示沉积处理又一实施例的流程图。Figure 11 shows a flow diagram of yet another embodiment of a deposition process.

具体实施方式Detailed ways

本发明提供一种在已形成的特征上沉积一共形介电层的方法与设备。可从此处理方法受益的膜层包含诸如氧化硅、氮氧化硅或氮化硅膜层等介电材料，这些膜层可做为间隙壁或蚀刻停止层等。这些膜层可能掺杂碳、掺杂氢或是含有其它化学物或元素，以修改其介电特性。该膜层也可掺杂碳或掺杂氮。举例而言，这些膜层可以是SiCN、SiOC、SiOCN、SiBN、SiBCN、SiC、BN或BCN膜层。在一方面中，由个别沉积且经过等离子体处理的数层薄膜所组成的组合膜层可提供比单一层厚介电层更加共形(conformal)的介电层。适合用于本文中所述处理方法的反应室包括

P3反应室、APF^TM PECVD反应室、

BLACKPECVD反应室、

PECVD反应室、

DARC PECVD反应室、PRODUCER HARP反应室、

PECVD反应室、PRODUCER SACVD反应室、

SE应力氮化物PECVD反应室以及

TEOS FSG PECVD反应室，上述每种反应室均可购自位于美国加州圣克拉拉市的应用材料公司(Applied Materials，Inc.of Santa Clara，California)。这些反应室可独立建构，但大部分会做为一集成工具(integrated tool)的一部分。这些处理方法可执行于任何基板上，例如200毫米或300毫米的基板或其它适合用于半导体或平面显示器制造上的材料。下述处理条件系针对SE应力氮化物PECVD反应室而提供的，此反应室具有两个隔离开来的处理区。因此，每个基板处理区个别经历的流速是流入该反应室中的流速的一半。The present invention provides a method and apparatus for depositing a conformal dielectric layer on formed features. Films that can benefit from this treatment include dielectric materials such as silicon oxide, silicon oxynitride, or silicon nitride films, which can be used as spacers or etch stop layers, among others. These layers may be doped with carbon, doped with hydrogen, or contain other chemicals or elements to modify their dielectric properties. The film layer can also be doped with carbon or doped with nitrogen. For example, these film layers may be SiCN, SiOC, SiOCN, SiBN, SiBCN, SiC, BN or BCN film layers. In one aspect, a composite film layer consisting of individually deposited and plasma-treated thin films can provide a more conformal dielectric layer than a single thick dielectric layer. Reaction chambers suitable for use in the processing methods described herein include

P3 reaction chamber, APF^TM PECVD reaction chamber,

BLACK PECVD reaction chamber,

PECVD reaction chamber,

DARC PECVD reaction chamber, PRODUCER HARP reaction chamber,

PECVD reaction chamber, PRODUCER SACVD reaction chamber,

SE stressed nitride PECVD chamber and

TEOS FSG PECVD chamber, each of which is commercially available from Applied Materials, Inc. of Santa Clara, California. These reaction chambers can be constructed independently, but most will be used as part of an integrated tool. These processes can be performed on any substrate, such as 200 mm or 300 mm substrates or other materials suitable for semiconductor or flat panel display manufacturing. The following processing conditions are for SE stress nitride PECVD reaction chamber is provided, this reaction chamber has two isolated processing zones. Thus, each substrate processing zone individually experiences a flow rate that is half the flow rate into the reaction chamber.

图1是沉积处理100的一实施例的流程图。沉积处理100的所有处理步骤可能在同一个反应室中执行。处理100始于步骤110，步骤110包括将一其表面上具有至少一个已形成特征的基板放置于一反应室中。该已形成的特征可以是任何种类的已形成特征，例如通孔、互连或栅极堆栈层。接着在薄介电层沉积步骤120中，利用CVD或PECVD处理来沉积一介电层。该薄介电层可能为例如氧化硅、氮氧化硅或氮化硅层。该膜层可掺杂碳或掺杂氮。该薄介电层的厚度可介于约1埃(

)至约8埃。反应室的压力约介于100毫托(mTorr)至8托，较佳介于2至8托。在沉积步骤120中，该薄介电层约沉积2-5秒，并且随后于步骤130中利用等离子体来处理该薄介电层。等离子体处理步骤130可能包括使用一惰性气体或一反应性气体。随后在厚度测定步骤140中分析或估计所沉积的膜层厚度。若所沉积的膜层厚度等于或大于指定的所期望厚度，则处理100终止于步骤160时。在该结束步骤160中，该基板接受额外的处理并从该反应室中移出。若所沉积的膜层厚度并不等于或不大于指定的所期望厚度，则于重复处理150的过程中，重复执行该沉积步骤120与等离子体处理步骤130。厚度测定步骤140与重复处理150可重复执行多次直到获得所期望的膜层厚度为止，例如可重复执行约1-6次。FIG. 1 is a flow diagram of one embodiment of adeposition process 100 . All process steps ofdeposition process 100 may be performed in the same reaction chamber.Process 100 begins atstep 110, which includes placing a substrate having at least one formed feature on its surface in a reaction chamber. The formed feature may be any kind of formed feature, such as a via, an interconnect, or a gate stack layer. Next, in a thin dielectriclayer deposition step 120, a dielectric layer is deposited using a CVD or PECVD process. The thin dielectric layer may be, for example, a silicon oxide, silicon oxynitride or silicon nitride layer. The film layer can be doped with carbon or doped with nitrogen. The thickness of the thin dielectric layer can be between about 1 Angstrom (

) to about 8 Angstroms. The pressure of the reaction chamber is about 100 mTorr to 8 Torr, preferably 2 to 8 Torr. Indeposition step 120 , the thin dielectric layer is deposited for about 2-5 seconds, and then instep 130 the thin dielectric layer is treated with plasma. Theplasma processing step 130 may include the use of an inert gas or a reactive gas. The thickness of the deposited film layer is then analyzed or estimated in athickness determination step 140 .Process 100 ends atstep 160 if the deposited film thickness is equal to or greater than the specified desired thickness. In theend step 160, the substrate is subjected to additional processing and removed from the reaction chamber. If the thickness of the deposited film layer is not equal to or greater than the specified desired thickness, then during therepeat process 150, thedeposition step 120 and theplasma treatment step 130 are repeatedly performed. Thethickness measuring step 140 and the repeatingprocess 150 can be repeated for several times until the desired film thickness is obtained, for example, it can be repeated for about 1-6 times.

图1是一个总括性的流程图，以提供绘于第2、6与10-11图中的各别处理的处理大纲。第2、6与10-11图中与图1相似的处理步骤皆以相同的组件符号来表示。然而，也可以有些许的处理变化。Figure 1 is a general flow chart to provide a process outline for the individual processes depicted in Figures 2, 6 and 10-11. The processing steps in Figures 2, 6 and 10-11 that are similar to those in Figure 1 are denoted by the same reference numerals. However, slight processing variations are also possible.

图2为沉积处理200的实施例的流程图。如步骤202所示，将一其表面上具有至少一个已形成特征的基板放置于一反应室中。该特征具有一顶面、一侧面与一底面。如步骤204所示，一介电层沉积在该基板上。可利用CVD或PECVD来该介电层。该介电层可以是诸如氮化硅、氧化硅或氮氧化硅层等膜层。或者，该膜层可以是任何掺杂有碳或氮的上述膜层。通常，该介电层的沉积处理形成在该顶面的介电层厚度会比形成在底面与侧面上的介电层厚度要厚。随后，如步骤206所示，利用由含氧气体或含卤素气体所形成的等离子体来蚀刻该介电层。该含卤素气体选自于由氟、氯、溴及其组合物所构成的群组中。可使用氧气(O₂)或其它含氧气气体来供应一氧等离子体。或可选择参考图1所述的厚度测定步骤来分析或估计该介电层的厚度，虽然此步骤并未显示于图2中。若蚀刻介电层的步骤206在该至少一个已形成特征上提供一所期望的介电层轮廓时，该处理方法终止于步骤208。所期望的轮廓可能一共形或实质共形的轮廓，其在该特征的侧面、顶面与底面上的厚度差异会比在沉积后且蚀刻前的介电层在这些面上的厚度差异要小。换句话说，也就是所期望的轮廓具有改善的阶梯覆盖性，即，该特征不同表面间的膜层厚度差的百分比较小。若蚀刻介电层的步骤206无法在该至少一个已形成特征上提供一所期望的介电层轮廓时，则执行一重复步骤210。该重复步骤210包括沉积一额外量的该介电层并且随后蚀刻该介电层的步骤。该重复步骤210可执行数次，举例而言可重复执行1次至100次，例如介于1次至6次之间，以在该至少一个已形成特征上获得所期望的介电层轮廓。FIG. 2 is a flow diagram of an embodiment of adeposition process 200 . As shown instep 202, a substrate having at least one formed feature on its surface is placed in a reaction chamber. The feature has a top surface, a side surface and a bottom surface. As shown instep 204, a dielectric layer is deposited on the substrate. The dielectric layer can be removed using CVD or PECVD. The dielectric layer can be a film layer such as silicon nitride, silicon oxide or silicon oxynitride. Alternatively, the film layer can be any of the above film layers doped with carbon or nitrogen. Typically, the deposition process of the dielectric layer results in a thicker dielectric layer on the top surface than on the bottom and side surfaces. Subsequently, as shown instep 206, the dielectric layer is etched using a plasma formed from an oxygen-containing gas or a halogen-containing gas. The halogen-containing gas is selected from the group consisting of fluorine, chlorine, bromine and combinations thereof. Oxygen plasma may be supplied using oxygen (O₂ ) or other oxygen-containing gas. Alternatively, the thickness determination step described with reference to FIG. 1 can be selected to analyze or estimate the thickness of the dielectric layer, although this step is not shown in FIG. 2 . If thestep 206 of etching the dielectric layer provides a desired dielectric layer profile on the at least one formed feature, the process ends atstep 208 . The desired profile may be a conformal or substantially conformal profile with less variation in thickness on the side, top, and bottom surfaces of the feature than the thickness variation of the post-deposited, pre-etch dielectric layer on these surfaces . In other words, the desired profile has improved step coverage, ie, a smaller percentage of film thickness difference between different surfaces of the feature. If thestep 206 of etching the dielectric layer fails to provide a desired dielectric layer profile on the at least one formed feature, then aniterative step 210 is performed. The repeatingstep 210 includes the steps of depositing an additional amount of the dielectric layer and then etching the dielectric layer. The repeatingstep 210 may be performed several times, for example, 1 to 100 times, such as 1 to 6 times, so as to obtain a desired dielectric layer profile on the at least one formed feature.

回到步骤206，可以在进行介电层沉积的同一个反应室中或是在不同反应室中蚀刻该介电层，而该不同的反应室与该沉积室可属于同一个集成工具中的一部分，且该不同的反应室可透过该集成工具的传送室而与该沉积室相连。含氧气体或含卤素气体可独立地引入该反应室中，或是合并一惰性气体一起引入该反应室中，而惰性气体可例如是氩气或氦气。可使用一原位生成或远程生成的等离子体来执行蚀刻步骤206。蚀刻步骤206的时间长度可至少为0.1秒，例如介于约0.1秒至约45秒之间，如介于约15秒至约45秒之间。可通过调整含卤素气体的流速与暴露时间来设计该蚀刻轮廓(etch profile)以配合该沉积轮廓(deposition profile)。例如，在该特征顶面上的蚀刻速率可能高于再该特征侧面或底面上的蚀刻速率。通常，顶面上的蚀刻速率比侧面或底面上的蚀刻速率要高约10％。在某些范例中，可能需要约50％的蚀刻速率。本文中定义50％的蚀刻速率系指一能移除掉50％的沉积介电层厚度的蚀刻处理。此外，沉积步骤204也可以是一个双阶段沉积处理(a two part deposition)，例如以具有第一功率与第一前驱物分压的等离子体执行两秒，并且以具有第二功率与第二前驱物分压的等离子体执行额外两秒。Returning to step 206, the dielectric layer can be etched in the same chamber where the dielectric layer is deposited or in a different chamber, which can be part of the same integrated tool as the deposition chamber , and the different reaction chambers can be connected to the deposition chamber through the transfer chamber of the integrated tool. Oxygen-containing gas or halogen-containing gas can be introduced into the reaction chamber independently, or combined with an inert gas such as argon or helium.Etching step 206 may be performed using an in situ generated or remotely generated plasma. The duration of theetching step 206 may be at least 0.1 seconds, such as between about 0.1 seconds and about 45 seconds, such as between about 15 seconds and about 45 seconds. The etch profile can be designed to match the deposition profile by adjusting the flow rate and exposure time of the halogen-containing gas. For example, the etch rate may be higher on the top surface of the feature than on the sides or bottom of the feature. Typically, the etch rate on the top surface is about 10% higher than the etch rate on the side or bottom surfaces. In some examples, an etch rate of about 50% may be desired. An etch rate of 50% is defined herein to mean an etch process that removes 50% of the thickness of the deposited dielectric layer. In addition, thedeposition step 204 can also be a two-stage deposition process (a two part deposition), such as performing two seconds with a plasma with a first power and a partial pressure of the first precursor, and with a plasma with a second power and a second precursor The partial pressure of the plasma performs an additional two seconds.

在使用远程生成等离子体来执行蚀刻步骤206的实施例中，可通过在一远程等离子体源中使氧气或一含卤素气体暴露于微波能量下来产生等离子体，其中该含卤素气体选自于由氟、氯、溴及其组合物所构成的群组中，并且该远程等离子体源连接至用来沉积介电层的反应室。例如，可利用能提供反应性氟物质的三氟化氮(NF₃)来产生这些离子体。可以介于约10sccm至约20slm之间的流速将三氟化氮导入反应室中。三氟化氮也可与诸如氩气或氦气等稀释气体一同导入反应室中。氩气与氦气亦有助于维持反应室中的等离子体。可以介于约100sccm至约20slm之间的流速将三氟化氮导入反应室中。蚀刻过程中的反应室压力可介于约10毫托至约760托之间，并且反应室中的基板支撑件温度可设定在介于约100℃至约650℃之间。In embodiments where remotely generated plasma is used to performetching step 206, the plasma may be generated by exposing oxygen or a halogen-containing gas selected from the group consisting of The group consisting of fluorine, chlorine, bromine and combinations thereof, and the remote plasma source is connected to the reaction chamber used to deposit the dielectric layer. For example, nitrogen trifluoride (_NF3 ), which provides reactive fluorine species, can be used to generate these ionic species. Nitrogen trifluoride can be introduced into the reaction chamber at a flow rate between about 10 seem to about 20 slm. Nitrogen trifluoride can also be introduced into the reaction chamber together with a diluent gas such as argon or helium. Argon and helium also help maintain the plasma in the chamber. Nitrogen trifluoride can be introduced into the reaction chamber at a flow rate between about 100 seem to about 20 slm. The reaction chamber pressure during etching may be between about 10 mTorr and about 760 Torr, and the substrate support temperature in the reaction chamber may be set between about 100°C and about 650°C.

在使用原位(即在反应室中)生成的等离子体来执行蚀刻步骤206的实施例中，可使用射频功率来产生这些离子体。射频功率可具有一高频率，例如介于约1百万赫(MHz)至约13.56百万赫之间，如介于约2百万赫至约13.56百万赫之间；可具有一介于约100千赫至约1百万赫之间的低频率，例如约介于100千赫至约400千赫之间；或者可具有一混合频率，其包含一介于1百万赫至13.56百万赫之间的频率(例如约2百万赫至约13.56百万赫)以及一介于约100千赫至约1百万赫之间的低频率(例如约100千赫至约400千赫)。作为蚀刻气体并选自于氟、氯、溴及其组合物所构成的群组中的含卤素气体可以是三氟化氮，或是一含碳及氟的气体，例如四氟化碳(CF₄)或八氟化二碳(C₄F₈)。可以介于约10sccm至约20slm的流速将氧或含卤素气体导入该反应室中。该氧或含卤素气体可与作为稀释气体的氩气或氦气一同导入该反应室中。氩气与氦气亦有助于维持反应室中的等离子体。可以介于约100sccm至约20slm的流速将氩气或氦气导入该反应室中。蚀刻过程中的反应室压力可能介于约10毫托至约760托之间，并且反应室中基板支撑件的温度可设定在介于约100℃至约650℃之间。反应室中，一喷头电极与一基板支撑件电极之间的间距可介于约100密耳(mil)至约3000密耳之间。可调整该间距来控制等离子体的稳定性。In embodiments whereetching step 206 is performed using an in situ (ie, in a reaction chamber) generated plasma, radio frequency power may be used to generate these plasmas. The RF power may have a high frequency, such as between about 1 megahertz (MHz) to about 13.56 megahertz, such as between about 2 megahertz to about 13.56 megahertz; may have a frequency between about Low frequency between 100 kHz and about 1 megahertz, such as between about 100 kHz and about 400 kHz; or may have a mixed frequency including a frequency between 1 megahertz and 13.56 megahertz A frequency in between (eg, about 2 megahertz to about 13.56 megahertz) and a low frequency between about 100 kilohertz to about 1 megahertz (eg, about 100 kilohertz to about 400 kilohertz). The halogen-containing gas selected from the group consisting of fluorine, chlorine, bromine, and combinations thereof as an etching gas may be nitrogen trifluoride, or a carbon- and fluorine-containing gas such as carbon tetrafluoride (CF₄ ) or dicarbon octafluoride (C₄ F₈ ). Oxygen or a halogen-containing gas can be introduced into the reaction chamber at a flow rate between about 10 seem to about 20 slm. The oxygen or halogen-containing gas can be introduced into the reaction chamber together with argon or helium as diluent gas. Argon and helium also help maintain the plasma in the chamber. Argon or helium can be introduced into the reaction chamber at a flow rate between about 100 seem to about 20 slm. The reaction chamber pressure during etching may be between about 10 mTorr and about 760 Torr, and the temperature of the substrate support in the reaction chamber may be set between about 100°C and about 650°C. In the reaction chamber, the spacing between a showerhead electrode and a substrate support electrode may be between about 100 mils and about 3000 mils. This spacing can be adjusted to control the stability of the plasma.

本发明的多个实施例包含这些具有单一沉积步骤204与单一蚀刻步骤206的处理方法，以及这些包含一重复步骤210的处理方法，其中该重复步骤210中包含多个沉积与蚀刻步骤。当一介电层，与该介电层在特征顶面上的蚀刻速率相比，其在特征侧面上具有高蚀刻速率时，执行一包含单一沉积步骤与单一蚀刻步骤的处理方法。例如，该侧面上的蚀刻速率可能至少约为该介电层从该顶面上蚀刻的速率的10％。可提供在特征侧面上的离子轰击低于在特征顶面上的离子轰击的介电沉积处理，能够造成该特征侧面上的介电蚀刻速率高于该特征底面或顶面上的介电蚀刻速率的结果。Embodiments of the invention include those processes having asingle deposition step 204 and asingle etch step 206, and those processes that include a repeatingstep 210 comprising multiple deposition and etching steps. When a dielectric layer has a high etch rate on the sides of the feature compared to the etch rate of the dielectric layer on the top surface of the feature, a process comprising a single deposition step and a single etch step is performed. For example, the etch rate on the sides may be at least about 10% of the rate at which the dielectric layer is etched from the top surface. Dielectric deposition processes that provide lower ion bombardment on the sides of a feature than ion bombardment on the top of a feature can result in a higher dielectric etch rate on the sides of the feature than on the bottom or top of the feature the result of.

通过使多个不同厚度的沉积介电层的蚀刻材料厚度保持固定，并进而改变这些进行蚀刻的介电层的百分比例，发现到对于这些厚度高达1000埃的介电层而言，这些包含单一沉积步骤与单一蚀刻步骤的处理方法的底部图案加载效应系与介电层厚度无关联。By keeping the etch material thickness constant for a number of deposited dielectric layers of different thicknesses, and thereby varying the percentage of these dielectric layers that were etched, it was found that for these dielectric layers up to 1000 Angstroms thick, these contained a single The bottom pattern loading effect of the deposition step and single etch step process is independent of the dielectric layer thickness.

针对一介电层(与该介电层在特征顶面上的蚀刻速率相比，其在特征侧面上具有较低蚀刻速率)，可执行一包含多个沉积与蚀刻步骤的处理方法。例如，该侧面上的蚀刻速率可能低于约该介电层从该顶面上蚀刻的速率的10％。可通过在蚀刻该介电层之前与之后，利用SEM或TEM断面来测定位在特征底面、侧面与顶面处的介电层厚度，并计算出单位蚀刻时间所移除的厚度，以测定出蚀刻速率。提高沉积与蚀刻的循环次数可改善图案加载效应。For a dielectric layer that has a lower etch rate on the sides of the feature compared to the etch rate of the dielectric layer on the top surface of the feature, a process may be performed that includes multiple deposition and etch steps. For example, the etch rate on the sides may be less than about 10% of the rate at which the dielectric layer is etched from the top surface. It can be determined by measuring the thickness of the dielectric layer at the bottom, side and top surfaces of the feature by using SEM or TEM sections before and after etching the dielectric layer, and calculating the thickness removed per unit etching time. etch rate. Increasing the number of cycles of deposition and etching can improve the pattern loading effect.

在一示范实施例中，可执行一包含两次或三次沉积与蚀刻循环的处理方法来形成欲做为蚀刻终止衬层且特征尺寸为90纳米或更小的介电层。每个循环可沉积厚度约介于300埃至约400埃之间的介电层，并且每个蚀刻循环可蚀刻介于约100埃至200埃之间的介电层厚度。In an exemplary embodiment, a process comprising two or three deposition and etch cycles may be performed to form a dielectric layer intended to be an etch stop liner with a feature size of 90 nm or less. Each cycle can deposit a dielectric layer with a thickness between about 300 angstroms and about 400 angstroms, and each etch cycle can etch the dielectric layer with a thickness between about 100 angstroms and about 200 angstroms.

本发明实施例的示范性测试结果显示出，可控制蚀刻轮廓，使其配合提供在特征顶面上的蚀刻速率高于在特征底面与侧面上的蚀刻速率的沉积轮廓。图3A是根据现有技术而形成在基板306的特征304上的一介电层302的SEM示意图。该介电层具有不均匀的轮廓，其在特征顶面308上的厚度大于在特征侧面310与底面312的厚度。图3B显示根据本发明实施例而形成在特征304上的一介电层320的SEM示意图。在特征304上，该介电层320的轮廓比该介电层302的轮廓更加均匀一致。Exemplary test results of embodiments of the present invention show that the etch profile can be controlled to cooperate to provide a deposition profile with a higher etch rate on the top surface of the feature than on the bottom and sides of the feature. 3A is an SEM schematic of adielectric layer 302 formed on afeature 304 of asubstrate 306 according to the prior art. The dielectric layer has a non-uniform profile with a greater thickness on thetop surface 308 of the feature than on thesides 310 andbottom 312 of the feature. FIG. 3B shows a schematic SEM of a dielectric layer 320 formed on thefeature 304 according to an embodiment of the present invention. The profile of the dielectric layer 320 is more uniform than the profile of thedielectric layer 302 over thefeature 304 .

已形成的特征断面的扫描式电子显微照片亦显示出，以含有流量50sccm的NF₃、3公升(L)的氩气、频率350千赫的100瓦(W)低频射频功率、1.5托的反应室压力以及1000密耳的间隔距离的条件来执行NF₃等离子体蚀刻持续45秒，能使氮化硅介电层的底部图案加载效应(PLE)降低约30％(PLE从67％降低至41％)，并且此蚀刻处理可用来调整其它介电膜层沉积处理的阶梯覆盖性。该蚀刻处理不会影响膜应力。侧壁负载效应则从46％降至33％，以及顶面负载效应则从10％降至3％。当通过各部位(portion)上的膜层厚度之间的膜厚差异百分比，例如具有少量特征的基板区域(疏离区)中一特征的底面、顶面或侧面上的膜层厚度与具有高特征密度的基板区域(密集区)中一特征相应部位上的膜层厚度间的差异百分比，来测量图案加载效应时，较低图案加载效应百分比系反应出基板表面具有较高的膜厚均匀度。Scanning electron micrographs of the formed characteristic cross-sections also show that, with NF₃ at a flow rate of 50 sccm, 3 liters (L) of argon, 100 watts (W) of low frequency RF power at a frequency of 350 kHz, 1.5 Torr Performing NF₃ plasma etch for 45 seconds at chamber pressure and a standoff distance of 1000 mils can reduce the bottom pattern loading effect (PLE) of the silicon nitride dielectric layer by about 30% (PLE is reduced from 67% to 41%), and this etching process can be used to adjust the step coverage of other dielectric film deposition processes. This etching process does not affect film stress. The sidewall loading effect is reduced from 46% to 33%, and the top surface loading effect is reduced from 10% to 3%. When passing through the percentage of film thickness difference between the film thickness on each portion, for example, the film thickness on the bottom, top or side of a feature in a substrate area with few features (isolated area) and the film thickness on the bottom surface, top surface or side of a feature with high features When the pattern loading effect is measured by the percentage difference between the thickness of the film layer on a corresponding part of a feature in a dense substrate area (dense area), a lower percentage of the pattern loading effect reflects a higher film thickness uniformity on the substrate surface.

第4与5图显示出以50sccm的NF₃、3升(L)氩气、100瓦且350千赫的低频射频功率、1.5托的反应室压力以及1000密耳的间距的条件对具有特征疏离(iso)区与特征密集区的基板进行NF₃蚀刻时，蚀刻时间长度(可用膜层蚀刻厚度来表示)对于底面介电层厚度以及图案加载效应的个别影响。可使用约15至45秒的蚀刻时间(etch period)，其相当于约100埃至300埃的膜层蚀刻厚度。使用较长的蚀刻时间明显改善了该底面图案加载效应，即约30％。Figures 4 and 5 show that the conditions of 50 sccm of NF₃ , 3 liters (L) of argon, 100 W and 350 kHz of low-frequency RF power, 1.5 Torr of chamber pressure, and 1000 mils of separation have characteristic separation When performing NF₃ etching on the substrate in the (iso) area and the feature-dense area, the etching time length (expressed by the etching thickness of the film layer) has an individual influence on the thickness of the bottom dielectric layer and the pattern loading effect. An etch period of about 15 to 45 seconds can be used, which corresponds to a film etch thickness of about 100 angstroms to 300 angstroms. Using a longer etch time significantly improves the bottom pattern loading effect, ie about 30%.

使用三氟化氮(NF₃)做为施用在氮化硅介电层上的含氟蚀刻气体，来比较图案加载效应及底面厚度与该蚀刻种类之间的关系。以一包含沉积厚度400埃的氮化硅介电层、将该氮化硅介电层蚀刻掉200埃的厚度以及随后沉积450埃的氮化硅介电层的步骤的处理为例，来比较没有蚀刻、功率为100瓦的低频射频等离子体蚀刻、功率为50瓦的高频射频等离子体蚀刻以及远程等离子体源蚀刻对于该处理的影响。低频射频等离子体蚀刻以及高频射频等离子体蚀刻得到相同的图案加载效应结果，然而远程等离子体源蚀刻则造成更大的图案加载效应并且造成超过20％的蚀刻速率不均匀性。虽然在远程等离子体蚀刻方法中的蚀刻轮廓更具等向性，然而当使用原位射频方法中的鞘区电压(sheath voltage)方向性地加速蚀刻物质朝向基板表时，相较于远程等离子体蚀刻方法而言，相信原位射频等离子体蚀刻方法能更有效地提供与沉积轮廓相似的蚀刻轮廓，也就是说，原位射频等离子体蚀刻方法在特征顶面上的蚀刻速率较快且特征侧面上的蚀刻速率较慢。Nitrogen trifluoride (NF₃ ) was used as the fluorine-containing etching gas applied on the silicon nitride dielectric layer to compare the pattern loading effect and the relationship between the bottom thickness and the etching type. As an example, a process comprising the steps of depositing a silicon nitride dielectric layer to a thickness of 400 angstroms, etching the silicon nitride dielectric layer to a thickness of 200 angstroms, and subsequently depositing a silicon nitride dielectric layer of 450 angstroms will be compared No etching, low frequency RF plasma etching at 100 watts, high frequency RF plasma etching at 50 watts, and remote plasma source etching on the process. Low frequency RF plasma etching as well as high frequency RF plasma etching resulted in the same pattern loading effect, whereas remote plasma source etching caused a larger pattern loading effect and caused etch rate non-uniformity of more than 20%. Although the etch profile in the remote plasma etch method is more isotropic, when using the sheath voltage in the in situ RF method to directionally accelerate the etch species towards the surface of the substrate, compared to the remote plasma etch In terms of etching methods, it is believed that the in situ RF plasma etch method is more effective in providing an etch profile similar to the deposition profile, that is, the in situ RF plasma etch method has a faster etch rate on the top surface of the feature and a higher etch rate on the side of the feature. The etch rate is slower.

虽然图2的实施例主要以氮化硅(SiN)层来叙述，然而图2的实施例也可用于他种介电层，例如氧化硅(SiO)、氮化硅(SiN)、碳氮化硅(SiCN)、碳氧化硅(SiOC)、碳氮氧化硅(SiOCN)、硼氮化硅(SiBN)、硼碳氮化硅(SiBCN)、碳化硅(SiC)、氮化硼(BN)或碳氮化硼(BCN)等膜层。对于含有碳的膜层，蚀刻步骤206包含一含氧气体与一含卤素气体，该含氧气体能提供用来蚀刻含碳层的反应性氧物质。含卤素气体及含氧气体可同时使用或者先后使用。例如，可将膜层先暴露于含氧气体所形成的等离子体中，随后在暴露至含卤素气体所形成的等离子体中。Although the embodiment of FIG. 2 is mainly described with a silicon nitride (SiN) layer, the embodiment of FIG. 2 can also be used for other dielectric layers, such as silicon oxide (SiO), silicon nitride (SiN), carbonitride Silicon (SiCN), silicon oxycarbide (SiOC), silicon oxycarbonitride (SiOCN), silicon boron nitride (SiBN), silicon boron carbon nitride (SiBCN), silicon carbide (SiC), boron nitride (BN) or Boron carbon nitride (BCN) and other films. For carbon-containing layers, etchingstep 206 includes an oxygen-containing gas and a halogen-containing gas that provide reactive oxygen species for etching the carbon-containing layer. Halogen-containing gas and oxygen-containing gas can be used simultaneously or successively. For example, the film layer may be first exposed to a plasma formed by an oxygen-containing gas, and then exposed to a plasma formed by a halogen-containing gas.

图6为沉积处理600的实施例的流程图。沉积处理600的所有处理步骤可在同一个反应室中执行。处理600始于步骤610，步骤610包括将一其表面上具有至少一个已形成特征的基板(即，一图案化的基板)放置于一反应室中。该已形成特征可以是任何一种已形成的特征，例如通孔、互连或栅极堆栈层。FIG. 6 is a flow diagram of an embodiment of adeposition process 600 . All process steps ofdeposition process 600 may be performed in the same reaction chamber.Process 600 begins atstep 610, which includes placing a substrate having at least one formed feature on its surface (ie, a patterned substrate) in a reaction chamber. The formed feature can be any kind of formed feature, such as a via, an interconnect, or a gate stack layer.

在前驱物与等离子体步骤620的过程中，系于反应室中同时存在有等离子体与含硅前驱物的情况下，使该基板暴露至该含硅前驱物中，以执行介电层的沉积作用。该含硅前驱物可包括八甲基环四硅氧烷(octamethylcyclotetrasiloxane，OMCTS)、甲基二乙氧基硅烷(methyldiethoxysilane，MDEOS)、双(第三丁基胺基)硅烷(bis(tertiary-butylamino)silane，BTBAS)、三-二甲基胺基硅烷(tridimethylaminosilane，TriDMAS)、三-二甲基胺基硅烷(trisdimethylaminosilane，TrisDMAS)、硅烷(silane)、二硅烷(disilane)、二氯硅烷(dichlorosilane)、三氯硅烷(trichlorosilane)、二溴硅烷(dibromosilane)、四氯化硅(silicon tetrachloride)、四溴化硅(silicontetrabromide)或上述硅化物的组合物。在一方面中，OMCTS与硅烷为较佳的含硅前驱物。以介于约50瓦至3000瓦之间的功率以及13.56百万赫(MHz)及/或350千赫(kHz)的频率来提供这些离子体。这些选用性气体导入反应室的时间与含硅气体的时间相同，并且这些选用性气体包括氦、氮、氧、氧化亚氮(nitrous oxide，或称一氧化二氮，俗称笑气)与氩气。若需使用一额外气体时，导入反应室中的额外气体以氧气及/或氦气为佳。氦气与其它惰性气体可做为载气。During the precursor andplasma step 620, the substrate is exposed to the silicon-containing precursor in the presence of both the plasma and the silicon-containing precursor in the reaction chamber to perform deposition of a dielectric layer. effect. The silicon-containing precursor may include octamethylcyclotetrasiloxane (octamethylcyclotetrasiloxane, OMCTS), methyldiethoxysilane (methyldiethoxysilane, MDEOS), bis (tertiary-butylamino) silane (bis (tertiary-butylamino) ) silane, BTBAS), tri-dimethylaminosilane (tridimethylaminosilane, TriDMAS), tri-dimethylaminosilane (trisdimethylaminosilane, TrisDMAS), silane (silane), disilane (disilane), dichlorosilane (dichlorosilane ), trichlorosilane (trichlorosilane), dibromosilane (dibromosilane), silicon tetrachloride (silicon tetrachloride), silicon tetrabromide (silicon tetrabromide) or a combination of the above silicides. In one aspect, OMCTS and silane are preferred silicon-containing precursors. The ions are provided at a power of between about 50 watts and 3000 watts and a frequency of 13.56 megahertz (MHz) and/or 350 kilohertz (kHz). These optional gases are introduced into the reaction chamber at the same time as the silicon-containing gas, and these optional gases include helium, nitrogen, oxygen, nitrous oxide (nitrous oxide, or nitrous oxide, commonly known as laughing gas) and argon . If an additional gas is required, the additional gas introduced into the reaction chamber is preferably oxygen and/or helium. Helium and other inert gases can be used as carrier gas.

在步骤620将等离子体、前驱物以及选用性的数种额外气体通入反应室之后，接着在氧清洗步骤630中将诸如氧气或氧化亚氮等含氧气体导入反应室中。氧清洗步骤630的执行方式系将含氧气体通入反应室中持续一段时间并达到一选定的分压来清洗掉残留的含硅前驱物以及这些选用性的额外气体。接着，在氧等离子体处理步骤640中，将一含氧气体(例如氧气或氧化亚氮)通入反应室中。以约50瓦至约3000瓦的功率来提供这些离子体并且持续介于约0.1秒至约600秒之间的时间。After passing the plasma, precursors, and optionally several additional gases into the reaction chamber atstep 620 , an oxygen-containing gas such as oxygen or nitrous oxide is introduced into the reaction chamber at anoxygen purge step 630 . Theoxygen purge step 630 is performed by blowing an oxygen-containing gas into the reaction chamber for a period of time and at a selected partial pressure to purge residual silicon-containing precursors and the optional additional gases. Next, in the oxygenplasma treatment step 640, an oxygen-containing gas (such as oxygen or nitrous oxide) is passed into the reaction chamber. The plasmons are provided at a power of about 50 watts to about 3000 watts and for a time of between about 0.1 seconds to about 600 seconds.

回到步骤620，可以介于约5sccm至约1000sccm的流速将含硅前驱物导入反应室中。可以介于约100sccm至约20000sccm的流速将一选用性载气，例如氦，导入反应室中。当将含硅前驱物通入反应室中以沉积膜层时，导入反应室中的含硅前驱物(如八甲基环四硅氧烷)流速比上载气(如氦)流速的比例约为1:1或是更高，例如介于约1:1至约1:100之间。反应室压力可大于约5毫托，例如介于约1.8托至约10托之间，以及反应室中的基板支撑件温度可介于约125℃至约580℃之间。较佳者，该温度低于约500℃。该含硅前驱物可通入反应室中持续一段足以沉积出厚度介于约5埃至约2000埃间的膜层的时间。例如，该含硅前驱物可通入反应室中并持续约0.1秒至约120秒之间的时间。Returning to step 620, the silicon-containing precursor may be introduced into the reaction chamber at a flow rate between about 5 sccm and about 1000 sccm. An optional carrier gas, such as helium, can be introduced into the reaction chamber at a flow rate between about 100 seem and about 20,000 seem. When the silicon-containing precursor is passed into the reaction chamber to deposit a film layer, the ratio of the flow rate of the silicon-containing precursor (such as octamethylcyclotetrasiloxane) introduced into the reaction chamber to the carrier gas (such as helium) flow rate is about 1:1 or higher, such as between about 1:1 and about 1:100. The reaction chamber pressure can be greater than about 5 mTorr, for example, between about 1.8 Torr and about 10 Torr, and the substrate support temperature in the reaction chamber can be between about 125°C and about 580°C. Preferably, the temperature is less than about 500°C. The silicon-containing precursor may be passed into the reaction chamber for a period of time sufficient to deposit a film having a thickness ranging from about 5 Angstroms to about 2000 Angstroms. For example, the silicon-containing precursor may be passed into the reaction chamber for a time between about 0.1 second and about 120 seconds.

可利用功率介于约50瓦至约3000瓦间以及频率约为13.56百万赫或350千赫的射频功率来提供在步骤620中的等离子体。该射频功率可施加于反应室的一喷头(即，气体分配组件)以及/或基板支撑件。该喷头与基板支撑件之间的间距大于约230密耳，例如约介于350密耳至约800密耳之间。The plasma instep 620 may be provided using RF power at a power between about 50 watts and about 3000 watts and at a frequency of about 13.56 MHz or 350 kHz. The RF power may be applied to a showerhead (ie, gas distribution assembly) and/or substrate support of the reaction chamber. The spacing between the showerhead and the substrate support is greater than about 230 mils, such as between about 350 mils and about 800 mils.

随后，终止通入反应室中的含硅前驱物流以及射频功率，并且在步骤630中导入一含氧气体以清除掉任何残留在反应室中的含气前驱物，该含氧气体例如氧气、氧化亚氮或其组合物。该含氧气体可以介于100sccm至约20000sccm的流速通入反应室中。并且该含氧气体可持续通入反应室中一段时间，例如介于0.1秒至60秒之间。当含氧气体通入反应室中时，反应室压力可介于约5毫托至约10托之间，以及反应室中基板支撑件的温度可介于约125℃至约580℃之间。Subsequently, the flow of the silicon-containing precursor and the radio frequency power into the reaction chamber are terminated, and an oxygen-containing gas is introduced instep 630 to remove any remaining gas-containing precursor in the reaction chamber, the oxygen-containing gas such as oxygen, oxidizing Nitrous nitrogen or combinations thereof. The oxygen-containing gas may be passed into the reaction chamber at a flow rate ranging from 100 seem to about 20000 seem. And the oxygen-containing gas can be continuously passed into the reaction chamber for a period of time, such as between 0.1 second and 60 seconds. When the oxygen-containing gas is passed into the reaction chamber, the reaction chamber pressure may be between about 5 mTorr and about 10 Torr, and the temperature of the substrate support in the reaction chamber may be between about 125°C and about 580°C.

待清洗过反应室之后，如步骤640所述般，在反应室中执行氧等离子体处理，以处理该含硅前驱物沉积在基板上的膜层。可以介于100sccm至20000sccm之间的流速将含氧气体导入反应室中。含氧气体可持续通入反应室中一段时间，例如介于约0.1秒至约120秒之间。可在反应室中施加介于约50瓦至3000瓦以及约13.56百万赫及/或350千赫的射频功率来提供该氧气等离子体。当含氧气体流入反应室时，反应室压力可介于5毫托至约10托之间，且反应室中的基板支撑件温度可介于约125℃至约580℃之间。After the reaction chamber is cleaned, as described instep 640 , an oxygen plasma treatment is performed in the reaction chamber to treat the film layer deposited on the substrate by the silicon-containing precursor. The oxygen-containing gas may be introduced into the reaction chamber at a flow rate between 100 seem and 20000 seem. The oxygen-containing gas may continue to flow into the reaction chamber for a period of time, such as between about 0.1 second and about 120 seconds. The oxygen plasma may be provided by applying RF power between about 50 watts and 3000 watts and about 13.56 megahertz and/or 350 kHz in the reaction chamber. When the oxygen-containing gas flows into the reaction chamber, the reaction chamber pressure may be between 5 mTorr and about 10 Torr, and the substrate support temperature in the reaction chamber may be between about 125°C and about 580°C.

可通过中断RF功率以及通入反应室中的含氧气体流来停止氧等离子体处理。可选择性地，于厚度测定步骤650中分析或估计已沉积的介电层的厚度。若所沉积的膜层或多层薄膜的厚度等于或大于一所期望的指定厚度时，则处理600完成并止于该结束步骤660。在结束步骤660中，基板接受额外的处理并从反应室中移出。若厚度不等于或不大于所期望的指定厚度时，则在重复处理655中，重复执行沉积步骤620与等离子体处理步骤630。可令该厚度测定步骤650与该重复处理655反复执行数次，直到获得所期望的膜层厚度为止，例如可重复执行约1次至6次。Oxygen plasma treatment can be stopped by interrupting the RF power and flow of oxygen-containing gas into the reaction chamber. Optionally, the thickness of the deposited dielectric layer is analyzed or estimated inthickness determination step 650 . If the thickness of the deposited film or layers is equal to or greater than a desired specified thickness, then process 600 is complete and ends at theend step 660 . In anend step 660, the substrate is subjected to additional processing and removed from the reaction chamber. If the thickness is not equal to or greater than the desired specified thickness, then inrepeat process 655 , thedeposition step 620 and theplasma treatment step 630 are repeated. Thethickness measuring step 650 and the repeatingprocess 655 can be repeated several times until the desired film thickness is obtained, for example, it can be repeated about 1 to 6 times.

若膜层厚度不等于或不大于所期望的指定厚度，则继续将含硅前驱物气流通入反应室中以沉积一额外量的介电层。随后，清洗该反应室并执行如上所述的氧等离子体处理。可执行多次的沉积、清洗以及等离子体处理循环，直到获得所期望的介电层厚度为止。If the film thickness is not equal to or greater than the desired specified thickness, continue to flow the silicon-containing precursor gas into the reaction chamber to deposit an additional amount of the dielectric layer. Subsequently, the reaction chamber is cleaned and oxygen plasma treatment as described above is performed. Multiple cycles of deposition, cleaning, and plasma treatment may be performed until the desired dielectric layer thickness is achieved.

使用OMCTS作为含硅前驱物与氦气来执行类似于图6实施例的实验性处理测试。将膜层沉积速率以及所形成的膜层中的甲基：氧基的比例对等离子体功率做图。当使用0至400瓦的等离子体功率进行实验，沉积速率在等离子体功率约300瓦的时候达到稳定期(plateau)，以及该甲基：氧基的比例则在等离子体功率约400瓦的时候达到最低。An experimental processing test similar to the embodiment of FIG. 6 was performed using OMCTS as the silicon-containing precursor and helium. The film deposition rate and the ratio of methyl:oxyl groups in the formed film were plotted versus plasma power. When experiments were carried out using plasma powers from 0 to 400 watts, the deposition rate plateaued at about 300 watts of plasma power, and the methyl:oxyl ratios reached a plateau at about 400 watts of plasma power reach the minimum.

测试氦气与OMCTS的数种组合，以决定出其用来沉积介电层的最佳比例。当做为额外气体的氦气是做为含硅前驱物的OMCTS的两倍时，会得到具有最大厚度的膜层。此外，使用OMCTS所沉积的膜层、使用OMCTS与氧气等离子体在90毫托下所沉积的膜层、以及使用OMCTS和氧气等离子体在2托下所沉积的膜层的扫描式电子显微镜照片显示出，在三种膜层之中，以利用OMCTS和氧气等离子体在2托下所沉积的膜层能提供最佳的图案加载效应与阶梯覆盖效果。Several combinations of helium and OMCTS were tested to determine the optimum ratio for deposition of dielectric layers. When helium as the additional gas is twice as much as OMCTS as the silicon-containing precursor, the film with the maximum thickness is obtained. In addition, scanning electron micrographs of films deposited using OMCTS, films deposited using OMCTS and oxygen plasma at 90 mTorr, and films deposited using OMCTS and oxygen plasma at 2 Torr show It is shown that among the three kinds of film layers, the film layer deposited by using OMCTS and oxygen plasma under 2 Torr can provide the best pattern loading effect and step coverage effect.

比较氧化亚氮与氧气于氧等离子体处理步骤640中的使用效果。利用氧化亚氮等离子体所沉积的膜层以及利用氧化亚氮等离子体所沉积的膜层的扫描式电子显微镜照面显示出，该两种膜层之中，使用氧气等离子体所沉积出来的膜层具有较佳图案加载效应与阶梯覆盖效果。The effect of using nitrous oxide and oxygen in the oxygenplasma treatment step 640 is compared. Scanning electron microscopy of the film deposited by nitrous oxide plasma and the film deposited by nitrous oxide plasma shows that, of the two films, the film deposited by oxygen plasma It has better pattern loading effect and step coverage effect.

在一方面中，图6的实施例是一种脉冲膜层沉积处理(PLD)，也就是数次的含硅前驱物脉冲之间穿插以氧等离子体处理，以提供连续数层的沉积薄膜，而这些薄膜形成一完整的膜层。图7显示在执行多次上述的沉积与等离子体循环的介电层沉积过程中，膜层厚度对沉积时间或循环次数做图的图形。图中标示出执行等离子体处理的时间点。图7显示出一不含等离子体处理的类似处理，该不含等离子体处理的处理中具有数个沉积速率明显下降的时间区段，同时本发明所提供的处理则没有会出现此种沉积速率明显下降的时间区段。图8显示，该不含等离子体处理的类似处理中每一个有等离子体存在下将含硅前驱物(OMCTS)通入反应室的时间区段内(图8中的等离子体浸润时间，plasma soak time)所沉积的膜层厚度，会小于根据本发明实施例的具有等离子体处理的处理中每一个有等离子体存在下将含硅前驱物通入反应室的时间区段内所沉积的膜层厚度。并注意到根据本发明处理所得到的该沉积速率比原子层沉积(ALD)处理的沉积速率要高出将近10倍。此外，本文中所叙述的处理方法可在传统化学气相沉积反应室中执行，例如PRODUCER PECVDTM反应室。In one aspect, the embodiment of FIG. 6 is a pulsed layer deposition process (PLD), that is, several pulses of silicon-containing precursors are interspersed with oxygen plasma treatment to provide successive layers of deposited films, And these thin films form a complete film layer. FIG. 7 shows a graph of film thickness versus deposition time or number of cycles during a dielectric layer deposition process in which the above-described deposition and plasma cycles are performed multiple times. The time points at which the plasma treatment was performed are indicated in the figure. Figure 7 shows a similar treatment without plasma treatment with several time periods in which the deposition rate drops significantly, while the treatment provided by the present invention does not exhibit such deposition rate time period of significant decline. Figure 8 shows that in this similar process without plasma treatment, each of the time intervals in which the silicon-containing precursor (OMCTS) is introduced into the reaction chamber in the presence of plasma (plasma soak time in Figure 8, plasma soak time) the thickness of the deposited film will be less than the film deposited in the time interval of each time period when the silicon-containing precursor is passed into the reaction chamber in the presence of plasma in the treatment with plasma treatment according to the embodiment of the present invention thickness. It is noted that the deposition rate obtained with the treatment according to the invention is nearly 10 times higher than that obtained with the atomic layer deposition (ALD) treatment. Additionally, the processing methods described herein can be performed in conventional chemical vapor deposition chambers, such as PRODUCER PECVD™ chambers.

曾经观察到沉积膜层中出现甲基(-CH3)的话可能会阻碍进一步(后续)的沉积作用，而氧等离子体处理被认为能够通过移除留在沉积膜层中的甲基来提高沉积速率。如果沉积膜层中的甲基基团并不是很多的话，那么氧等离子体处理能将甲基取代成羟基(-OH)，羟基可在另一层含气前驱物的黏附过程中作为成核位置(nucleation sites)。图9显示在由八甲基环四硅氧烷(OMCTS)所沉积的膜层上执行一氧等离子体处理的作用效果。为了图标简单清楚，图中仅显示该膜层中的一个OMCTS分子。在图9的步骤902中，当有等离子体存在时，OMCTS会与含有Si-OH键的基板反应。等离子体会产生出OMCTS自由基。随后如步骤904所示，OMCTS自由基连接至基板的羟基。在步骤906中，含有氧气的氧等离子体处理将已沉积的OMCTS层中至少一个部份的甲基替换成羟基。It has been observed that the presence of methyl groups (-CH3) in the deposited film may hinder further (subsequent) deposition, and oxygen plasma treatment is thought to increase the deposition rate by removing the methyl groups remaining in the deposited film . If there are not many methyl groups in the deposited film, oxygen plasma treatment can replace the methyl groups with hydroxyl groups (-OH), which can serve as nucleation sites during the adhesion of another layer of gas-containing precursors (nucleation sites). Figure 9 shows the effect of an oxygen plasma treatment on a film deposited from octamethylcyclotetrasiloxane (OMCTS). For the simplicity and clarity of the diagram, only one OMCTS molecule in the film layer is shown in the figure. Instep 902 of FIG. 9 , the OMCTS reacts with the substrate containing Si-OH bonds in the presence of plasma. Plasma produces OMCTS radicals. Then, as shown instep 904, the OMCTS radicals are attached to the hydroxyl groups of the substrate. Instep 906, at least a portion of methyl groups in the deposited OMCTS layer are replaced with hydroxyl groups by oxygen plasma treatment containing oxygen.

发现到当使用一自我饱和前驱物(self-saturating precursor)作为沉积膜层的前驱物，并使用如上所述的射频功率大小、间距、压力以及流速比例时，能够可靠地沉积出厚度约介于3埃至25埃之间的均匀介电薄层。利用本文中所提供的处理条件可得到在300毫米的单一基板内厚度变化幅度约1埃的膜层。如本文中所定义者，「自我饱和前驱物(self-saturatingprecursor)」系指一种能够在基板上沉积出一薄层的前驱物，例如可在基板上沉积出一分子层者。该薄介电层的存在会阻碍来自该前驱物的介电材料在沉积该薄层的处理条件下形成额外膜层的进一步沉积作用。OMCTS是较佳的自我饱和前驱物，因为OMCTS含有大量的甲基而使其能产生膜层的自我饱和沉积作用。换句话说，由于下方基板的表面能尽快地覆满OMCTS分子，而已沉积的膜层表面上的Si-CH3键会实质阻碍进一步的沉积作用，直到通过上述氧等离子体处理来移除部份的甲基为止，从而能够由OMCTS沉积出一第一共形膜层。因此，能够良好地控制着每层OMCTS分子层的沉积作用，从而提高最终膜层的阶梯覆盖效果。It was found that when using a self-saturating precursor as the precursor to deposit the film layer, and using the RF power level, spacing, pressure and flow rate ratio as described above, it is possible to reliably deposit thickness between about Uniform dielectric thin layers between 3 angstroms and 25 angstroms. Using the processing conditions provided herein, a film layer with a thickness variation range of about 1 Angstrom within a single substrate of 300 mm can be obtained. As defined herein, a "self-saturating precursor" refers to a precursor capable of depositing a thin layer on a substrate, such as one capable of depositing a molecular layer on a substrate. The presence of the thin dielectric layer hinders further deposition of dielectric material from the precursor to form additional layers under the processing conditions used to deposit the thin layer. OMCTS is a better self-saturation precursor, because OMCTS contains a large amount of methyl groups so that it can produce self-saturation deposition of the film layer. In other words, since the surface of the underlying substrate can be covered with OMCTS molecules as soon as possible, the Si-CH3 bonds on the surface of the deposited film will substantially hinder further deposition until part of the OMCTS is removed by the above-mentioned oxygen plasma treatment. methyl group, so that a first conformal film layer can be deposited by OMCTS. Therefore, the deposition of each OMCTS molecular layer can be well controlled, thereby improving the step coverage effect of the final film layer.

由扫描式电子显微镜的影像可证实，相较于利用传统等离子体增强化学气相沉积处理所沉积出的膜层而言，根据第6-9图的处理方法能提供改善的阶梯覆盖与较低的图案加载效应。As evidenced by scanning electron microscope images, the process according to Figures 6-9 provides improved step coverage and lower Pattern loading effect.

测量多个具有高特征密度(密集区)与低特征密度区域(疏离区)的图案化基板中位在特征侧面、底面与顶面上根据本发明实施例所沉积的氧化物层的沉积情形。在密集区中达到75％的侧面/顶面覆盖(sidewall/topcoverage)，而疏离区中达到80％的侧面/顶面覆盖。在密集区中达到85％的底面/顶面覆盖(bottom/top coverage)，以及在疏离区中达到95％的底面/顶面覆盖。特征顶面处所观察到的图案加载效应(PLE)为0％，以及在特征侧面与底面处所观察到的图案加载效应仅有10％。在一范例中，一氧化层沉积在深宽比为3.5的特征中的顶面厚度为420埃。该膜层在侧面上的厚度为275埃，以及其在底面上的厚度为345埃。因此，侧面/顶面的阶梯覆盖为66％，底面/顶面的阶梯覆盖为83％，以及侧面/底面的阶梯覆盖为80％。在另一范例中，一低介电常数的碳掺杂氧化层沉积在深宽比为3.5的特征中的顶面厚度为340埃。该层在侧面上的厚度为125埃，以及该层在底面上的厚度为210埃。因此，侧面/顶面的阶梯覆盖为35％，底面/顶面的阶梯覆盖为60％，以及侧面/底面的阶梯覆盖为58％。The deposition of oxide layers deposited according to embodiments of the present invention on the side, bottom and top surfaces of features in a plurality of patterned substrates having high feature density (dense regions) and low feature density regions (isolated regions) was measured. A sidewall/top coverage of 75% is achieved in dense areas and a sidewall/top coverage of 80% is achieved in depopulated areas. A bottom/top coverage of 85% is achieved in dense regions and a bottom/top coverage of 95% is achieved in depopulated regions. The pattern loading effect (PLE) observed at the top of the feature was 0%, and only 10% was observed at the side and bottom of the feature. In one example, an oxide layer was deposited with a thickness of 420 angstroms on top of features with an aspect ratio of 3.5. The thickness of the film layer was 275 angstroms on the sides and 345 angstroms on the bottom. Thus, the side/top step coverage is 66%, the bottom/top step coverage is 83%, and the side/bottom step coverage is 80%. In another example, a low-k carbon-doped oxide layer is deposited with a thickness of 340 angstroms on top of features with an aspect ratio of 3.5. The layer has a thickness of 125 angstroms on the sides and a thickness of 210 angstroms on the bottom. Thus, the side/top step coverage is 35%, the bottom/top step coverage is 60%, and the side/bottom step coverage is 58%.

虽然主要是以使用OMCTS做为含硅前驱物来沉积氧化硅膜层或掺杂碳的氧化硅膜层为范例来讨论上述实施例与结果，然而亦可使用其它的含硅前驱物。也可使用其它包含硅-氧(Si-O)或硅-氮(Si-N)骨架以及一个或多个与硅原子键合的烷基的含硅前驱物。此外，可使用其它的等离子体处理来形成他种膜层。例如，可如下第10与11图所述般，使用含硅前驱物来沉积一膜层并以一氮气等离子体来处理该膜层，已形成一共形的氮化硅层(SiN)。Although the above embodiments and results are mainly discussed using OMCTS as a silicon-containing precursor to deposit a silicon oxide film or a carbon-doped silicon oxide film as an example, other silicon-containing precursors may also be used. Other silicon-containing precursors comprising a silicon-oxygen (Si-O) or silicon-nitrogen (Si-N) backbone and one or more alkyl groups bonded to silicon atoms may also be used. Additionally, other plasma treatments may be used to form other layers. For example, a conformal silicon nitride (SiN) layer can be formed by depositing a layer using a silicon-containing precursor and treating the layer with a nitrogen plasma as described in FIGS. 10 and 11 below.

图10为沉积处理1000的实施例的流程图。起始步骤610、膜厚测定步骤650、重复步骤655以及结束步骤660系如上图6所述般。在沉积步骤1010中，将一含硅前驱物导入该反应室中。含硅前驱物可包含八甲基环四硅氧烷(octamethylcyclotetrasiloxane，OMCTS)、甲基二乙氧基硅烷(methyldiethoxysilane，MDEOS)、双(第三丁基胺基)硅烷(bis(tertiary-butylamino)silane，BTBAS)、三(二甲基胺基硅烷)(tridimethylaminosilane，TriDMAS)，三-二甲基胺基硅烷(trisdimethylaminosilane，TrisDMAS)、硅烷(silane)、二硅烷(disilane)、二氯硅烷(dichlorosilane)、三氯硅烷(trichlorosilane)、二溴硅烷(dibromosilane)、四氯化硅(silicon tetrachloride)、四溴化硅(silicontetrabromide)或上述含硅化合物的组合物。硅烷为用于沉积处理1000中的较佳前驱物。沉积步骤1010可执行约2至5秒。接着在步骤1020中，将氮气导入反应室中以清洗反应室。随后，在步骤1030中，使用氨气用以在该反应室中提供等离子体。接续进行步骤1040，执行另一次氮气清洗步骤。从步骤1010至650的一次循环时间约为每循环60秒，并且沉机速率约为每循环2埃。处理1000提供共形覆盖，并且清洗效率(即，在氨气等离子体之前，清洗步骤移除含气前驱物的效率)能控制共形覆盖性。FIG. 10 is a flow diagram of an embodiment of a deposition process 1000 . Thestart step 610 , the filmthickness measurement step 650 , therepeat step 655 and theend step 660 are as described above in FIG. 6 . In deposition step 1010, a silicon-containing precursor is introduced into the reaction chamber. The silicon-containing precursor may include octamethylcyclotetrasiloxane (octamethylcyclotetrasiloxane, OMCTS), methyldiethoxysilane (methyldiethoxysilane, MDEOS), bis (tertiary-butylamino) silane (bis (tertiary-butylamino) silane, BTBAS), tri(dimethylaminosilane, TriDMAS), tri-dimethylaminosilane (TrisDMAS), silane, disilane, dichlorosilane ), trichlorosilane (trichlorosilane), dibromosilane (dibromosilane), silicon tetrachloride (silicon tetrachloride), silicon tetrabromide (silicon tetrabromide) or a combination of the above silicon-containing compounds. Silane is a preferred precursor for use in deposition process 1000 . The deposition step 1010 may be performed for about 2 to 5 seconds. Then in step 1020, nitrogen gas is introduced into the reaction chamber to clean the reaction chamber. Then, in step 1030, ammonia gas is used to provide plasma in the reaction chamber. Continue to step 1040 to perform another nitrogen purge step. The cycle time from steps 1010 to 650 is about 60 seconds per cycle, and the sink rate is about 2 Angstroms per cycle. The process 1000 provides conformal coverage, and the cleaning efficiency (ie, the efficiency of the cleaning step to remove the gas-containing precursor prior to the ammonia plasma) can control the conformal coverage.

图11为沉积处理1100的另一实施例的流程图。其起始步骤610、膜厚测定步骤650、重复步骤655以及结束步骤660系如上所述。在沉积步骤1110中，将一含硅前驱物导入该反应室中。在含硅前驱物步骤1110之后，可执行一选用性的氮气清洗步骤(未示出)。接着在等离子体步骤1120中，将一含氮前驱物的等离子体导入反应室中。含氮前驱物可包含氮、氨或氧化亚氮。氨是较佳的含氮前驱物。以沉积处理1100来说，从步骤1110至步骤650的一次循环时间约为30秒。沉积速率约为每循环3.5埃。FIG. 11 is a flow diagram of another embodiment of adeposition process 1100 . Itsstart step 610, filmthickness measurement step 650,repeat step 655 andend step 660 are as described above. In adeposition step 1110, a silicon-containing precursor is introduced into the reaction chamber. After the silicon-containingprecursor step 1110, an optional nitrogen purge step (not shown) may be performed. Next, in theplasma step 1120, a plasma containing a nitrogen precursor is introduced into the reaction chamber. Nitrogen-containing precursors may contain nitrogen, ammonia, or nitrous oxide. Ammonia is a preferred nitrogen-containing precursor. Taking thedeposition process 1100 as an example, the cycle time fromstep 1110 to step 650 is about 30 seconds. The deposition rate was approximately 3.5 Angstroms per cycle.

根据本发明实施例所提供的共形膜层可做为半导体器件中的不同膜层。举例而言，这些膜层可作为这些先沉积而后蚀柯以在晶体管栅极堆栈层周围形成间隙币的膜层，或者这些膜层可做为阻障层。The conformal film layer provided according to the embodiment of the present invention can be used as different film layers in a semiconductor device. For example, the layers can be used as the layers that are deposited and then etched to form spacers around the transistor gate stack, or the layers can be used as barrier layers.

上述处理的优点是这些处理可生产出具有较佳阶梯覆盖性与较低图案加载效应的膜层。并且可在同一个反应室中执行多个处理步骤循环，从而比这些需要多个反应室的处理需要更短的处理时间。并且总热预算与个别基板处理温度也比这些不使用等离子体的处理的热预算及温度要低。An advantage of the above treatments is that they produce films with better step coverage and lower pattern loading effects. And multiple cycles of processing steps can be performed in the same reaction chamber, thereby requiring shorter processing times than those that require multiple reaction chambers. Also, the overall thermal budget and individual substrate processing temperatures are lower than those for processes that do not use plasma.

虽然上述内容已说明本发明多个实施例，然而在不偏离本发明基本范围的情况下，仍可设计出其它与更尽一部的本发明实施例，并且本发明的范围当由权利要求所界定。Although the above description has described multiple embodiments of the present invention, other and more complete embodiments of the present invention can be designed without departing from the basic scope of the present invention, and the scope of the present invention should be defined by the claims defined.