CN101079241B - Data driver of flat panel display device and driving method thereof - Google Patents

Abstract

A data driver includes an input buffer, a ramp signal unit, a counter and a switch element. The input buffer outputs a most significant bit and the remaining N-1 bits of an N-bit digital image data respectively through a control signal. The ramp signal unit generates a ramp signal according to the most significant bit. The counter counts the clock and generates a switch element control signal after the clock counting time of the remaining N-1 bits of the N-bit digital image data. The switch element conducts the potential of the ramp signal to a data line in a flat panel display device according to the switch element control signal.

Description

Translated fromChinese

平面显示装置的数据驱动器及其驱动方法Data driver of flat panel display device and driving method thereof

技术领域technical field

本发明是有关于一种用于平面显示装置的数据驱动器，且特别是有关于一种可根据数字图像数据的特定位产生不同斜坡信号的数据驱动器及其驱动方法。 The present invention relates to a data driver for a flat panel display device, and in particular to a data driver capable of generating different ramp signals according to specific bits of digital image data and a driving method thereof. the

背景技术Background technique

随着科技进步，具有高画质、体积小、重量轻、低电压驱动、低消耗功率等优点的平面显示装置(Flat Panel Display；FPD)，已广泛地应用于电子产品显示装置中，而成为显示器的主流。例如：可携式电视、移动电话、摄录放影机、笔记型计算机、桌上型显示器及投影电视等消费性电子或计算机产品。 With the advancement of science and technology, Flat Panel Display (FPD), which has the advantages of high image quality, small size, light weight, low voltage drive, and low power consumption, has been widely used in display devices of electronic products, and has become Mainstream display. For example: consumer electronics or computer products such as portable TVs, mobile phones, camcorders, notebook computers, desktop monitors, and projection TVs. the

平面显示装置使用源极驱动器(Source Driver)，也称为数据驱动器(Data Driver)，将数字信号(即图像数据)转变为模拟电位值以供传送到平面显示装置上的显示单元。以液晶显示面板来说，穿透过液晶单元的光量与施加到此液晶单元上的模拟电位值呈现一非线性的关系，此即所谓的“珈玛曲线”关系。因此，源极驱动器通常必须通过珈玛参考电压产生电路，在数字图像数据转换成模拟电压(DAC，Digital to Analog Converter)的过程中，用以校正上述传送到液晶显示面板的模拟电位值，使液晶单元上的电位变化符合珈玛曲线的变化。 The flat panel display device uses a source driver (Source Driver), also known as a data driver (Data Driver), to convert digital signals (ie, image data) into analog potential values for transmission to the display unit on the flat panel display device. In the case of a liquid crystal display panel, the amount of light passing through the liquid crystal unit has a nonlinear relationship with the analog potential value applied to the liquid crystal unit, which is the so-called "gamma curve" relationship. Therefore, the source driver usually must use a gamma reference voltage generation circuit to correct the above-mentioned analog potential value transmitted to the liquid crystal display panel during the process of converting digital image data into an analog voltage (DAC, Digital to Analog Converter), so that The potential change on the liquid crystal cell conforms to the change of the gamma curve. the

图1绘示现有数据驱动器中数字图像数据转换成模拟电压的电路示意图。此模拟电压产生电路是以电阻串(Resister String)RS 1、RS2、RS3、...RS16组成，相邻电阻串间的参考电位VGAMA1、VGMA2...VGMA18用以稳定电压。其中每一电阻串包含一个以上的电阻，而可提供一个以上的电位。由此电阻串所包含的电阻与电阻间的连接点，可得到想要的电位V1、V2、V3...V512。在此图中，右半部为一数字模拟转换电路(DAC)，用以通过一N位的数字图像数据而选取左半部电阻串的上半部所提供的2^N个电位。比如说，此数字模拟转换电路可通过8位的 数字图像数据，选取左半部电阻串的上半部所提供的2⁸＝256个电位。数字图像数据的每一位用以控制一开关组，其中一开关组定义为如图中所有由最低位D1控制的所有的开关。通过每一位所控制的开关组的切换后，即可输出V1～V256或V257～V512中的任一电位作为输出电压180。 FIG. 1 is a schematic diagram of a circuit for converting digital image data into analog voltages in a conventional data driver. The analog voltage generating circuit is composed of resistor strings (Resister String) RS1, RS2, RS3, ... RS16, and reference potentials VGAMA1, VGMA2 ... VGMA18 between adjacent resistor strings are used to stabilize voltage. Each resistor string includes more than one resistor and can provide more than one potential. Thus, the resistors included in the resistor string and the connection points between the resistors can obtain desired potentials V1, V2, V3...V512. In this figure, the right half is a digital-to-analog conversion circuit (DAC), which is used to select 2^N potentials provided by the upper half of the left half resistor string through an N-bit digital image data. For example, the digital-to-analog conversion circuit can select 2⁸ =256 potentials provided by the upper half of the left half resistor string through 8-bit digital image data. Each bit of the digital image data is used to control a switch group, wherein a switch group is defined as all the switches controlled by the lowest bit D1 in the figure. After the switching of the switch group controlled by each bit, any potential among V1-V256 or V257-V512 can be output as theoutput voltage 180 .

图1中，数字图像数据的最低位(LSB即D1)110用以控制最左边的开关组，数字图像数据的最高位(MSB即D_N)150用以控制最右边的开关组，而中间的开关组则依序由LSB至MSB间的其它位D₂～D_N-1控制，依此方法即可输出V1～V256中的任一电位为输出电压。例如当D₁(LSB)～D_N(MSB)的数字图像数据使S₁、S₂...S_N都导通时，输出电压180即为V1。此种数字图像数据转换成模拟电压的设计，需要使用大量的电阻串与开关组，故需要大量的芯片面积，并增加芯片运作时的电能耗损。 In Fig. 1, the lowest bit (LSB or D1) 110 of the digital image data is used to control the leftmost switch group, the highest bit (MSB or D_N ) 150 of the digital image data is used to control the rightmost switch group, and the middle The switch group is sequentially controlled by other bits D₂ ～D_N-1 between LSB and MSB. In this way, any potential among V1 ～ V256 can be output as the output voltage. For example, when the digital image data of D₁ (LSB)˜D_N (MSB) make S₁ , S_{2 .} . ._SN all conduct, theoutput voltage 180 is V1. This design of converting digital image data into analog voltage requires the use of a large number of resistor strings and switch groups, which requires a large chip area and increases power consumption during chip operation.

另一种数字图像数据转换成模拟电压的设计是利用斜坡信号而得到。图2绘示现有斜坡信号产生器所输出的斜坡信号示意图。此斜坡信号210由一斜坡信号产生器产生，T_t为数字图像数据所代表的最大时脉计数时间，V_t为斜坡信号所能达到的最大电压值，而V_t可涵盖平面显示装置中驱动一液晶单元所需的模拟电压范围。因此，斜坡信号210便可在T_t时间内，根据数字图像数据所代表的时脉计数时间，产生液晶单元所需的模拟电压。例如，数字图像数据所代表的时脉计数时间为T₀时，斜坡信号210便输出模拟电压V₀。 Another design for converting digital image data to analog voltage is obtained by using a ramp signal. FIG. 2 is a schematic diagram of a ramp signal output by a conventional ramp signal generator. Theramp signal 210 is generated by a ramp signal generator, T_t is the maximum clock count time represented by the digital image data, V_t is the maximum voltage value that the ramp signal can reach, and V_t can cover the drive in the flat panel display device The analog voltage range required by a liquid crystal cell. Therefore, theramp signal 210 can generate the analog voltage required by the liquid crystal unit within the time T_t according to the clock count time represented by the digital image data. For example, when the clock counting time represented by the digital image data is T₀ , theramp signal 210 outputs an analog voltage V₀ .

此种从斜坡信号中取得数字图像数据的模拟电压的技术，由于其斜坡信号每一次均由低电压起始爬升至高电压，故当数字图像数据对应至高模拟电压时，则需要较多的时脉计数时间使斜坡信号能够爬升至高电压，如此将会需要较长的全页图像时间(frame time)。而且，当处理高分辨率画面的大量数据时，此种技术一般必须选用爬升速率较快的斜坡信号产生器。然而，此种快速斜坡信号产生器不但会增加设计与制造成本，而且其输出模拟电压的准确性也不佳。 This technique of obtaining the analog voltage of the digital image data from the ramp signal requires more clocks when the digital image data corresponds to a high analog voltage because the ramp signal climbs from a low voltage to a high voltage each time. The count time enables the ramp signal to ramp up to a high voltage, which would require a longer frame time. Moreover, when dealing with a large amount of data of high-resolution picture, this kind of technology generally must choose the ramp signal generator with faster climbing rate. However, such a fast ramp signal generator not only increases the design and manufacturing costs, but also has poor accuracy of the output analog voltage. the

发明内容Contents of the invention

因此本发明就是在提供一种平面显示装置的数据驱动器与驱动方法，根据数字图像数据的最高位(MSB)产生一斜坡信号。其中斜坡信号所能 达到的最大电压值，只涵盖平面显示装置中驱动一液晶单元所需模拟电压范围的一半。因此，同样的时脉计数时间内，变动的电压范围较小，故可得到较准确的模拟电压。 Therefore, the present invention provides a data driver and a driving method for a flat panel display device, which generates a ramp signal according to the most significant bit (MSB) of digital image data. Wherein the maximum voltage value that the ramp signal can reach only covers half of the analog voltage range required to drive a liquid crystal unit in the flat panel display device. Therefore, within the same clock counting time, the variable voltage range is small, so a more accurate analog voltage can be obtained. the

根据本发明的一实施例，此数据驱动器包括一输入缓存器、一斜坡信号单元、一计数器与一开关元件。输入缓存器用以接收一控制信号及一N位数字图像数据，其中控制信号控制输入缓存器分别输出该N位数字图像数据的一最高位以及所剩余的N-1位。斜坡信号单元用以接收最高位，并根据最高位产生一斜坡信号。斜坡信号单元包括一斜坡信号产生器以产生一第一待选斜坡信号；一反相电路用以将第一待选斜坡信号反相而产生一第二待选斜坡信号；以及一斜坡信号选择器用以根据最高位，而由第一待选斜坡信号与第二待选斜坡信号中选出其中之一为斜坡信号。计数器用以进行时脉计数，并在该N位数字图像数据所剩余的N-1位的时脉计数时间后，产生一开关元件控制信号。开关元件用以根据该开关元件控制信号以传导所述斜坡信号的电位至一平面显示装置中的一数据线。 According to an embodiment of the present invention, the data driver includes an input register, a ramp signal unit, a counter and a switch element. The input register is used for receiving a control signal and an N-bit digital image data, wherein the control signal controls the input register to output the highest bit and the remaining N-1 bits of the N-bit digital image data respectively. The ramp signal unit is used for receiving the highest bit and generating a ramp signal according to the highest bit. The ramp signal unit includes a ramp signal generator to generate a first ramp signal to be selected; an inversion circuit for inverting the first ramp signal to be selected to generate a second ramp signal to be selected; and a ramp signal selector for One of the first candidate ramp signal and the second candidate ramp signal is selected as the ramp signal according to the highest bit. The counter is used for clock counting, and generates a switching element control signal after the clock counting time of remaining N-1 bits of the N-bit digital image data. The switch element is used for conducting the potential of the ramp signal to a data line in a flat panel display device according to the switch element control signal. the

根据本发明的另一实施例，此驱动方法包括接收一控制信号及一N位数字图像数据。根据所述控制信号分别输出N位数字图像数据的一最高位以及所剩余的N-1位。根据最高位产生一斜坡信号，其中产生斜坡信号包括使用一斜坡信号产生器以产生一第一待选斜坡信号，使用一反相电路将第一待选斜坡信号反相而产生一第二待选斜坡信号，以及使用一斜坡信号选择器并根据最高位，在第一待选斜坡信号与第二待选斜坡信号中选出其中之一为所述斜坡信号。在N位数字图像数据所剩余的N-1位的时脉计数时间后，输出斜坡信号的电位至一平面显示装置中的一数据线。 According to another embodiment of the present invention, the driving method includes receiving a control signal and an N-bit digital image data. The highest bit and the remaining N-1 bits of the N-bit digital image data are respectively outputted according to the control signal. Generating a ramp signal according to the highest bit, wherein generating the ramp signal includes using a ramp signal generator to generate a first ramp signal to be selected, and using an inverting circuit to invert the first ramp signal to be selected to generate a second ramp signal to be selected A ramp signal, and using a ramp signal selector to select one of the first ramp signal to be selected and the second ramp signal to be selected as the ramp signal according to the highest bit. After the remaining N−1 bits of clock count time of the N-bit digital image data, the potential of the ramp signal is output to a data line in a flat panel display device. the

附图说明Description of drawings

为让本发明的上述和其它目的、特征、优点与实施例能更明显易懂，附图的详细说明如下： In order to make the above and other objects, features, advantages and embodiments of the present invention more obvious and understandable, the detailed description of the accompanying drawings is as follows:

图1绘示现有数据驱动器中数字图像数据转换成模拟电压的电路示意图。 FIG. 1 is a schematic diagram of a circuit for converting digital image data into analog voltages in a conventional data driver. the

图2绘示现有斜坡信号产生器所输出的斜坡信号示意图。 FIG. 2 is a schematic diagram of a ramp signal output by a conventional ramp signal generator. the

图3绘示本发明一较佳实施例的功能模块图。 FIG. 3 is a functional block diagram of a preferred embodiment of the present invention. the

图4绘示本发明一较佳实施例中斜坡信号单元的功能模块图。 FIG. 4 is a functional block diagram of a ramp signal unit in a preferred embodiment of the present invention. the

图5A绘示本发明一较佳实施例的斜坡信号示意图。 FIG. 5A is a schematic diagram of a ramp signal in a preferred embodiment of the present invention. the

图5B绘示本发明另一较佳实施例的斜坡信号示意图。 FIG. 5B is a schematic diagram of a ramp signal according to another preferred embodiment of the present invention. the

附图标记说明： Explanation of reference signs:

110：最低位 110: lowest bit

150：最高位 150: the highest bit

210、510、520：斜坡信号 210, 510, 520: Ramp signal

305：输入储存器 305: Input storage

306：控制信号 306: Control signal

307、308、309：数字图像数据 307, 308, 309: digital image data

317、318、319：N位数字图像数据的最高位 317, 318, 319: the highest bit of N-bit digital image data

327、328、329：剩余的N-1位 327, 328, 329: the remaining N-1 bits

337、338、339：斜坡信号单元 337, 338, 339: ramp signal unit

342：加载信号 342: load signal

344：时脉信号 344: clock signal

347、348、349：斜坡信号 347, 348, 349: Ramp signal

350：计数器 350: Counter

357、358、359：开关元件控制信号 357, 358, 359: switch element control signal

367、368、369：开关元件 367, 368, 369: switching elements

377、378、379：数据线 377, 378, 379: data lines

380：移位缓存器 380: Shift register

410：斜坡信号产生器 410: Ramp signal generator

415：第一待选斜坡信号 415: The first slope signal to be selected

420：反相电路 420: Inverting circuit

425：第二待选斜坡信号 425: The second slope signal to be selected

430：斜坡信号选择器 430: Ramp signal selector

440：第一晶体管 440: First Transistor

450：第二晶体管 450: second transistor

具体实施方式Detailed ways

图3绘示本发明一较佳实施例的功能模块图。此数据驱动器包括一输入缓存器305、多个对应不同颜色的数字图像数据的斜坡信号单元337、338与339、一计数350与多个对应不同颜色的数字图像数据的开关元件367、368与369。输入缓存器305接收一控制信号306及多个对应不同颜色的数字图像数据的N位数字图像数据307、308与309，其中控制信号306控制输入缓存器305分别输出这些N位数字图像数据的最高位(MSB)317、308与309，以及所剩余的N-1位327、328与329。斜坡信号单元337、338与339用以接收最高位，并根据不同颜色的最高位产生不同颜色的斜坡信号347、348与349。 FIG. 3 is a functional block diagram of a preferred embodiment of the present invention. The data driver includes an input buffer 305, a plurality oframp signal units 337, 338 and 339 corresponding to digital image data of different colors, a count 350 and a plurality of switching elements 367, 368 and 369 corresponding to digital image data of different colors . The input buffer 305 receives a control signal 306 and a plurality of N-bit digital image data 307, 308 and 309 corresponding to digital image data of different colors, wherein the control signal 306 controls the input buffer 305 to output the highest value of these N-bit digital image data respectively. bits (MSB) 317, 308, and 309, and the remaining N-1 bits 327, 328, and 329. Theramp signal units 337 , 338 and 339 are used to receive the highest bit and generateramp signals 347 , 348 and 349 of different colors according to the highest bit of different colors. the

计数器350用以进行时脉计数，并在不同颜色的N位数字图像数据所剩余的N-1位327、328与329的时脉计数时间后，产生不同颜色的开关元件控制信号357、358与359。不同颜色的开关元件367、368与369根据开关元件控制信号357、358与359传导斜坡信号347、348与349的电位至一平面显示装置中的数据线377、378、与349。其中加载信号342控制计数器350进行时脉计数，而时脉信号344则为进行时脉计数时的基本时间单位信号。 The counter 350 is used for clock counting, and after counting the clock time of the remaining N-1 bits 327, 328 and 329 of the N-bit digital image data of different colors, it generates switching element control signals 357, 358 and 359. The switching elements 367 , 368 and 369 of different colors conduct the potentials of the ramp signals 347 , 348 and 349 to the data lines 377 , 378 and 349 in a flat panel display device according to the switching element control signals 357 , 358 and 359 . The load signal 342 controls the counter 350 to count the clocks, and the clock signal 344 is a basic time unit signal when counting the clocks. the

上述本发明的较佳实施例分别针对单一颜色的N位数字图像数据做处理，而分别产生单一颜色的斜坡信号。以红色数字图像数据307(Data R)为例，通过控制信号306控制输入缓存器305分别输出Data R的最高位(MSB)317，以及所剩余的N-1位327。斜坡信号单元337则根据最高位317产生斜坡信号347(Ramp_R)。计数器则根据R的N-1位进行时脉计数，并产生开关元件控制信号357以导通开关元件367，并传导斜坡信号347的电位至一平面显示装置中的数据线377。 The above-mentioned preferred embodiments of the present invention respectively process N-bit digital image data of a single color to generate ramp signals of a single color. Taking the red digital image data 307 (Data R) as an example, the input buffer 305 is controlled by the control signal 306 to output theMSB 317 of Data R and the remaining N-1 bits 327. Theramp signal unit 337 generates a ramp signal 347 (Ramp_R) according to thehighest bit 317 . The counter performs clock counting according to the N−1 bits of R, and generates a switching element control signal 357 to turn on the switching element 367, and transmits the potential of theramp signal 347 to a data line 377 in a flat panel display device. the

此外，本发明的较佳实施例还包含一移位缓存器380，用以产生控制信号306。此外，本实施例的数字图像数据是红色(R)、绿色(G)与蓝色(B)。当使用更多颜色的数字图像数据时，可利用相同架构得到其它颜色的数字图像数据。 In addition, the preferred embodiment of the present invention further includes a shift register 380 for generating the control signal 306 . In addition, the digital image data of this embodiment are red (R), green (G) and blue (B). When digital image data of more colors is used, digital image data of other colors can be obtained using the same architecture. the

图4绘示本发明一较佳实施例中斜坡信号单元的功能模块图。斜坡信号单元337、338与339的功能模块图都相同。此处以红色的斜坡信号单元337举例说明，斜坡信号单元337包括一斜坡信号产生器410、一反相电路420与一斜坡信号选择器430。斜坡信号产生器410用以产生一第一待选斜坡信号415；反相电路420用以将第一待选斜坡信号415反相而产生一第二待选斜坡信号425。一斜坡信号选择器430用以根据最高位317，而由第一待选斜坡信号415与第二待选斜坡信号425中选出其中之一为斜坡信号347(Ramp_R)。FIG. 4 is a functional block diagram of a ramp signal unit in a preferred embodiment of the present invention. The functional block diagrams of theramp signal units 337 , 338 and 339 are the same. Here, the redramp signal unit 337 is used as an example. Theramp signal unit 337 includes aramp signal generator 410 , aninverting circuit 420 and aramp signal selector 430 . Theramp signal generator 410 is used to generate a first ramp signal to be selected 415 ; theinverting circuit 420 is used to invert the first ramp signal to be selected 415 to generate a second ramp signal to be selected 425 . Aramp signal selector 430 is used for selecting one of the firstcandidate ramp signal 415 and the secondcandidate ramp signal 425 to be the ramp signal 347 (Ramp_R) according to thehighest bit 317 .

斜坡信号选择器430包括一第一晶体管440与一第二晶体管450。第一晶体管440的源极耦接斜坡信号产生器410，第一晶体管440的栅极耦接最高位输入端以接收最高位317，第一晶体管的漏极耦接一斜坡信号输出端以输出斜坡信号347。第二晶体管450的源极耦接反相电路420，第二晶体管的栅极耦接最高位输入端以接收最高位317，第二晶体管的漏极耦接斜坡信号输出端以输出斜坡信号347。 Theramp signal selector 430 includes afirst transistor 440 and asecond transistor 450 . The source of thefirst transistor 440 is coupled to theramp signal generator 410, the gate of thefirst transistor 440 is coupled to the highest bit input end to receive thehighest bit 317, and the drain of the first transistor is coupled to a ramp signal output end to output theramp Signal 347. The source of thesecond transistor 450 is coupled to theinverting circuit 420 , the gate of the second transistor is coupled to the MSB input terminal to receive theMSB 317 , and the drain of the second transistor is coupled to the ramp signal output terminal to output theramp signal 347 . the

此外，第一晶体管440为一P型晶体管时，第二晶体管450为一N型晶体管。第一晶体管440为一N型晶体管时，第二晶体管450为一P型晶体管。斜坡信号347便可通过斜坡信号选择器430，而选取第一待选斜坡信号415或第二待选斜坡信号425中其中之一为输出信号。 In addition, when thefirst transistor 440 is a P-type transistor, thesecond transistor 450 is an N-type transistor. When thefirst transistor 440 is an N-type transistor, thesecond transistor 450 is a P-type transistor. Theramp signal 347 can pass through theramp signal selector 430 to select one of the firstcandidate ramp signal 415 or the secondcandidate ramp signal 425 as an output signal. the

图5A绘示本发明一较佳实施例的斜坡信号示意图。斜坡信号510在N位数字图像数据所剩余的N-1位所表示的最大时脉计数时间T_t内，是由最低电位上升至最高电位V_t。当图3中的计数器350进行时脉计数至时间T₁时，斜坡信号单元便输出斜坡信号510的电位V₁至平面显示装置中的数据线。此外，最高电位与该最低电位间的区间(V_t)涵盖该平面显示装置中驱动一液晶单元所需模拟电压范围的一半。因此，同样的时脉计数时间内，变动的电压范围较小，故可得到较准确的模拟电压。 FIG. 5A is a schematic diagram of a ramp signal in a preferred embodiment of the present invention. The ramp signal 510 rises from the lowest potential to the highest potential V_t within the maximum clock count time T_t represented by the remaining N−1 bits of the N-bit digital image data. When the counter 350 in FIG. 3 counts the clock until the time_T1 , the ramp signal unit outputs the potential_V1 of the ramp signal 510 to the data line in the flat panel display device. In addition, the interval (V_t ) between the highest potential and the lowest potential covers half of the analog voltage range required to drive a liquid crystal cell in the flat panel display device. Therefore, within the same clock counting time, the variable voltage range is small, so a more accurate analog voltage can be obtained.

图5B绘示本发明另一较佳实施例的斜坡信号示意图。斜坡信号520在N位数字图像数据所剩余的N-1位所表示的最大时脉计数时间T_t内，是由最高电位V_t下降至最低电位。当图3中的计数器350进行时脉计数至时间T₂时，斜坡信号单元便输出斜坡信号520的电位V₂至平面显示装置中的数据线。此外，最高电位与该最低电位间的区间(V_t)涵盖该平面显示装置中驱动一液晶单元所需模拟电压范围的一半。因此，同样的时脉计数时间内，变动的电压范围较小，故可得到较准确的模拟电压。 FIG. 5B is a schematic diagram of a ramp signal according to another preferred embodiment of the present invention. Theramp signal 520 drops from the highest potential V_t to the lowest potential within the maximum clock count time T_t represented by the remaining N−1 bits of the N-bit digital image data. When the counter 350 in FIG. 3 counts the clock until the time_T2 , the ramp signal unit outputs the potential_V2 of theramp signal 520 to the data line in the flat panel display device. In addition, the interval (V_t ) between the highest potential and the lowest potential covers half of the analog voltage range required to drive a liquid crystal cell in the flat panel display device. Therefore, within the same clock counting time, the variable voltage range is small, so a more accurate analog voltage can be obtained.

虽然本发明已以一较佳实施例公开如上，然其并非用以限定本发明，任何熟悉此技术者，在不脱离本发明的精神和范围内，当可作各种的改动与修饰，因此本发明的保护范围应以权利要求书所界定的为准。 Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any skilled person can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore The scope of protection of the present invention should be defined by the claims. the

Claims (10)

Translated fromChinese

1.一种平面显示装置的数据驱动器，其特征在于，包括：1. A data driver for a flat panel display device, comprising:一输入缓存器，用以接收一控制信号及一N位数字图像数据，其中，该控制信号控制输入缓存器分别输出该N位数字图像数据的一最高位以及所剩余的N-1位；An input buffer for receiving a control signal and an N-bit digital image data, wherein the control signal controls the input buffer to output the highest bit and the remaining N-1 bits of the N-bit digital image data respectively;至少一斜坡信号单元耦接所述输入缓存器，用以接收所述最高位，并根据该最高位产生一斜坡信号，其中，该斜坡信号单元包括：At least one ramp signal unit is coupled to the input buffer for receiving the highest bit and generating a ramp signal according to the highest bit, wherein the ramp signal unit includes:一斜坡信号产生器，用以产生一第一待选斜坡信号；a ramp signal generator, used to generate a first ramp signal to be selected;一反相电路耦接斜坡信号产生器，用以将第一待选斜坡信号反相而产生一第二待选斜坡信号，其中并未对该第一待选斜坡信号以及该第二待选斜坡信号进行分割；以及An inverting circuit is coupled to the ramp signal generator for inverting the first ramp signal to be selected to generate a second ramp signal to be selected, wherein the first ramp signal to be selected and the second ramp signal to be selected are not The signal is divided; and一斜坡信号选择器，用以根据所述最高位，而在第一待选斜坡信号与第二待选斜坡信号中选出其中之一为所述斜坡信号；a ramp signal selector, used for selecting one of the first ramp signal to be selected and the second ramp signal to be selected as the ramp signal according to the highest bit;一计数器耦接所述输入缓存器，用以进行时脉计数，并于该N位数字图像数据所剩余的N-1位的时脉计数时间后，产生一开关元件控制信号；以及A counter is coupled to the input register for clock counting, and generates a switching element control signal after the clock counting time of the remaining N-1 bits of the N-bit digital image data; and一开关元件耦接所述计数器与斜坡信号单元，根据该开关元件控制信号传导该斜坡信号的电位至一平面显示装置中的一数据线。A switch element is coupled to the counter and the ramp signal unit, and the potential of the ramp signal is transmitted to a data line in a flat panel display device according to a control signal of the switch element.2.如权利要求1所述的数据驱动器，其特征在于，所述第一待选斜坡信号或第二待选斜坡信号起始于一最高电位或一最低电位，该最高电位与最低电位间的区间涵盖所述平面显示装置中驱动一液晶单元所需模拟电压范围的一半。2. The data driver as claimed in claim 1, wherein the first ramp signal to be selected or the second ramp signal to be selected starts at a highest potential or a lowest potential, and the voltage between the highest potential and the lowest potential is The interval covers half of the analog voltage range required to drive a liquid crystal cell in the flat panel display device.3.如权利要求1所述的数据驱动器，其特征在于，所述斜坡信号选择器包括：3. The data driver according to claim 1, wherein the ramp signal selector comprises:一第一晶体管，该第一晶体管的源极耦接所述斜坡信号产生器，该第一晶体管的栅极耦接一最高位输入端以接收该最高位，该第一晶体管的漏极耦接一斜坡信号输出端以输出所述斜坡信号；以及A first transistor, the source of the first transistor is coupled to the slope signal generator, the gate of the first transistor is coupled to a highest bit input terminal to receive the highest bit, and the drain of the first transistor is coupled to a ramp signal output terminal to output the ramp signal; and一第二晶体管，该第二晶体管的源极耦接所述反相电路，该第二晶体管的栅极耦接所述最高位输入端以接收该最高位，该第二晶体管的漏极耦接所述斜坡信号输出端以输出所述斜坡信号。A second transistor, the source of the second transistor is coupled to the inverter circuit, the gate of the second transistor is coupled to the highest bit input terminal to receive the highest bit, and the drain of the second transistor is coupled to The slope signal output terminal is used to output the slope signal.4.如权利要求3所述的数据驱动器，其特征在于，当所述第一晶体管为一P型晶体管，则第二晶体管为一N型晶体管；而当所述第一晶体管为N型晶体管，则第二晶体管为P型晶体管。4. The data driver according to claim 3, wherein when the first transistor is a P-type transistor, the second transistor is an N-type transistor; and when the first transistor is an N-type transistor, Then the second transistor is a P-type transistor.5.一种平面显示装置的驱动方法，包括：5. A driving method for a flat panel display device, comprising:接收一控制信号及一N位数字图像数据；receiving a control signal and an N-bit digital image data;根据所述控制信号分别输出所述N位数字图像数据的一最高位以及所剩余的N-1位；Outputting a most significant bit and the remaining N-1 bits of the N-bit digital image data respectively according to the control signal;根据所述最高位产生一斜坡信号，其中，产生所述斜坡信号包括：Generating a ramp signal according to the highest bit, wherein generating the ramp signal includes:使用一斜坡信号产生器以产生一第一待选斜坡信号；以及using a ramp signal generator to generate a first candidate ramp signal; and使用一反相电路将所述第一待选斜坡信号反相而产生一第二待选斜坡信号，其中并未对该第一待选斜坡信号以及该第二待选斜坡信号进行分割；以及using an inversion circuit to invert the first candidate ramp signal to generate a second candidate ramp signal, wherein the first candidate ramp signal and the second candidate ramp signal are not divided; and使用一斜坡信号选择器并根据所述最高位，由所述第一待选斜坡信号与第二待选斜坡信号中选出其中之一为所述斜坡信号；以及using a ramp signal selector to select one of the first ramp signal to be selected and the second ramp signal to be the ramp signal according to the highest bit; and在所述N位数字图像数据所剩余的N-1位的时脉计数时间后，输出所述斜坡信号的电位至一平面显示装置中的一数据线。After the remaining N−1 bits of the N-bit digital image data are counted by the clock, the potential of the ramp signal is output to a data line in a flat panel display device.6.如权利要求5所述的驱动方法，其特征在于，根据所述最高位产生所述斜坡信号时，该斜坡信号起始于一最高电位或一最低电位，该最高电位与最低电位间的区间涵盖所述平面显示装置中驱动一液晶单元所需模拟电压范围的一半。6. The driving method according to claim 5, wherein when the ramp signal is generated according to the highest bit, the ramp signal starts at a highest potential or a lowest potential, and the distance between the highest potential and the lowest potential The interval covers half of the analog voltage range required to drive a liquid crystal cell in the flat panel display device.7.如权利要求5所述的驱动方法，其特征在于，使用一斜坡信号选择器还包括：7. The driving method according to claim 5, wherein using a ramp signal selector further comprises:使用一第一晶体管，耦接该第一晶体管的源极于所述斜坡信号产生器，耦接该第一晶体管的栅极于一最高位输入端以接收所述最高位，耦接该第一晶体管的漏极于一斜坡信号输出端以输出所述斜坡信号；以及Using a first transistor, coupling the source of the first transistor to the slope signal generator, coupling the gate of the first transistor to a highest bit input terminal to receive the highest bit, coupling the first The drain of the transistor is connected to a ramp signal output terminal to output the ramp signal; and使用一第二晶体管，耦接该第二晶体管的源极于所述反相电路，耦接该第二晶体管的栅极于所述最高位输入端以接收所述最高位，耦接该第二晶体管的漏极耦接所述斜坡信号输出端以输出所述斜坡信号。A second transistor is used, the source of the second transistor is coupled to the inverter circuit, the gate of the second transistor is coupled to the highest bit input terminal to receive the highest bit, and the second transistor is coupled to the highest bit input terminal. The drain of the transistor is coupled to the ramp signal output end to output the ramp signal.8.如权利要求7所述的驱动方法，其特征在于，还包括当使用一P型晶体管为所述第一晶体管，则使用一N型晶体管为所述第二晶体管；当使用所述N型晶体管为所述第一晶体管，则使用所述P型晶体管为所述第二晶体管。8. The driving method according to claim 7, further comprising: when using a P-type transistor as the first transistor, using an N-type transistor as the second transistor; when using the N-type transistor The transistor is the first transistor, and the P-type transistor is used as the second transistor.9.如权利要求5所述的驱动方法，其特征在于，在所述N位数字图像数据所剩余的N-1位所表示的最大时脉计数时间内，所述斜坡信号由所述最低电位上升至所述最高电位。9. The driving method according to claim 5, characterized in that, within the maximum clock count time represented by the remaining N-1 bits of the N-bit digital image data, the slope signal is changed from the lowest potential rise to the highest potential.10.如权利要求5所述的驱动方法，其特征在于，在所述N位数字图像数据所剩余的N-1位所表示的最大时脉计数时间内，所述斜坡信号由所述最高电位下降至所述最低电位。10. The driving method according to claim 5, wherein, within the maximum clock count time represented by the remaining N-1 bits of the N-bit digital image data, the ramp signal is changed from the highest potential down to the lowest potential.

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