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CN101001088B - A method and device for realizing decoding - Google Patents

A method and device for realizing decoding
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CN101001088B
CN101001088BCN200710002469ACN200710002469ACN101001088BCN 101001088 BCN101001088 BCN 101001088BCN 200710002469 ACN200710002469 ACN 200710002469ACN 200710002469 ACN200710002469 ACN 200710002469ACN 101001088 BCN101001088 BCN 101001088B
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荆涛
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HiSilicon Technologies Co Ltd
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Huawei Technologies Co Ltd
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一种实现译码的方法及装置,包括:获取乘积操作中所需的伽罗华数和二进制数;将伽罗华数从伽罗华域转换到二进制域,得到所述伽罗华数对应的二进制数;将所述伽罗华数对应的二进制数与乘积操作所需的二进制数相乘,得到乘积;利用所述乘积进行译码操作。本发明实施例使得二进制域与伽罗华域之间的转换大大减少,从而能够简化译码过程,提高译码速度,节约逻辑资源,降低功耗。

Figure 200710002469

A method and device for realizing decoding, comprising: obtaining the Galois number and binary number required in the product operation; converting the Galois number from the Galois field to the binary field, and obtaining the corresponding Galois number The binary number corresponding to the Galois number is multiplied by the binary number required by the product operation to obtain a product; using the product to perform a decoding operation. The embodiments of the present invention greatly reduce the conversion between the binary domain and the Galois domain, thereby simplifying the decoding process, increasing the decoding speed, saving logic resources, and reducing power consumption.

Figure 200710002469

Description

Translated fromChinese
一种实现译码的方法及装置A method and device for realizing decoding

技术领域technical field

本发明涉及电子通信技术领域,尤其涉及一种实现译码的方法及装置。The present invention relates to the technical field of electronic communication, in particular to a method and device for realizing decoding.

背景技术Background technique

在通信技术中,数据信息的接收方并不知道接收到的数据包是否正确,因此接收方需要采用纠错码技术来对接收到的数据包进行检错和纠错。纠错码技术为一种提高通信可靠性的技术,被广泛的应用于各种通信系统,比如:CDMA(码分多址)系统、GSM(全球移动通讯)系统以及数字电视。BCH码(一种码字,用于纠正多个随机错误的循环码)为常见的一类纠错码,其中的RS码(一种码字)以其很强的纠错能力、构造方便、编码简单的特点,成为一种广泛应用的纠错码,主要应用于数字通信系统领域。In communication technology, the receiver of data information does not know whether the received data packet is correct, so the receiver needs to use error correction code technology to detect and correct the received data packet. Error-correcting code technology is a technology to improve communication reliability, and is widely used in various communication systems, such as: CDMA (Code Division Multiple Access) system, GSM (Global Mobile Communications) system and digital TV. The BCH code (a codeword used to correct multiple random error cyclic codes) is a common type of error correction code, and the RS code (a codeword) is characterized by its strong error correction capability, convenient construction, The characteristics of simple coding have become a widely used error correction code, mainly used in the field of digital communication systems.

GF(伽罗华)数为GF域中的一个元素,GF数与二进制数相乘的方式应用于多种码字的译码实现中,下面结合图1和图2,以常见的RS码的译码过程为例,对现有的得到GF数与二进制数乘积的实现方式进行详细描述。The GF (Galois) number is an element in the GF field, and the method of multiplying the GF number and the binary number is applied to the decoding realization of various codewords. The following combines Figure 1 and Figure 2, using the common RS code Taking the decoding process as an example, the existing implementation of obtaining the product of the GF number and the binary number is described in detail.

常见的RS码译码过程如图1所示,包括如下步骤:The common RS code decoding process is shown in Figure 1, including the following steps:

步骤11:由接收多项式r(X)=r0+r1X+r2X2+…+rn-1Xn-1,以及生成多项式

Figure G2007100024699D00011
计算得出伴随式Sj(j=1,2,L,....2t),其中,X表示输入码元的前后顺序,ri表示具体的码元;Step 11: From the receiving polynomial r(X)=r0 +r1 X+r2 X2 +…+rn-1 Xn-1 , and the generator polynomial
Figure G2007100024699D00011
Calculate the accompanying formula Sj (j=1, 2, L, ... 2t), wherein, X represents the order before and after the input code element, ri represents the concrete code element;

步骤12:由Sj得出错误位置多项式σ(x);常见的由Sj得出错误位置多项式σ(x)的算法包括BM(迭代译码)算法和Euclid(欧基里德)算法;Step 12: Obtain the error position polynomial σ(x) from Sj; common algorithms for obtaining the error position polynomial σ(x) from Sj include BM (iterative decoding) algorithm and Euclid (Euclid) algorithm;

步骤13:计算σ(x)的根,其倒数即为错误位置数,得到错误位置;常见的计算σ(×)的根的算法包括Chien(钱)搜索法;Step 13: Calculate the root of σ(x), the reciprocal of which is the number of error positions to obtain the error position; common algorithms for calculating the root of σ(×) include the Chien (money) search method;

步骤14:由错误位置数计算错误值,从而得到错误图样

Figure G2007100024699D00021
Step 14: Calculate the error value from the number of error positions to obtain the error pattern
Figure G2007100024699D00021

步骤15:由接收多项式减去错误多项式,即,

Figure G2007100024699D00022
完成整个纠错过程。Step 15: Subtract the error polynomial from the received polynomial, i.e.,
Figure G2007100024699D00022
Complete the entire error correction process.

在上述步骤11至步骤15中,采用图2所述的在GF域相乘的方式得到GF数与二进制数乘积,并将得到的乘积相加的方法具体包括:In theabove steps 11 to 15, the multiplication method in the GF domain described in Figure 2 is used to obtain the product of the GF number and the binary number, and the method of adding the obtained products specifically includes:

步骤21:将二进制数从二进制域转换到GF域;Step 21: convert the binary number from the binary domain to the GF domain;

步骤22:在GF域,将步骤21得到的GF域的二进制数与GF数进行指数相加;Step 22: In the GF field, the binary number of the GF field obtained instep 21 and the GF number are added exponentially;

步骤23:将步骤22中相加得到的和值从GF域转换到二进制域;Step 23: Convert the sum value obtained by addition instep 22 from the GF domain to the binary domain;

步骤24:按照预定的规则,比如常用的异或操作,在二进制域,将得到的各个乘积值相加。Step 24: According to a predetermined rule, such as a commonly used XOR operation, in the binary field, add the obtained product values.

下面以图3所示的步骤11中得出伴随式Sj(j=1,2,L,....,2t)的具体过程来对现有技术中实现GF数与二进制数相乘的方式进行详细说明,具体包括:The specific process of obtaining the accompanying formula Sj (j=1, 2, L, ..., 2t) in thestep 11 shown in Figure 3 below realizes the mode of multiplying the GF number and the binary number in the prior art Describe in detail, including:

步骤31:将接收多项式所示的接收码元通过查表的方式由二进制域转换到GF域;Step 31: convert the received symbol shown by the received polynomial from the binary domain to the GF domain by means of table lookup;

步骤32:在GF域中,将接收码元与对应的生成多项式的根的指数次方进行相加;Step 32: In the GF domain, add the received symbol to the power of the root of the corresponding generator polynomial;

步骤33:将步骤32得到的相加后的值从GF域转换到二进制域;Step 33: converting the added value obtained instep 32 from the GF domain to the binary domain;

步骤34:按照预定的规则,比如常用的异或操作,在二进制域中,将得到的各个乘积值进行二进制域的加法。Step 34: According to a predetermined rule, such as a commonly used XOR operation, in the binary field, perform addition of each obtained product value in the binary field.

同样地,对步骤12、步骤13、步骤14中涉及获得GF数与二进制数的乘积的步骤,均是按照上述方式实现的。Similarly, the steps involved in obtaining the product of the GF number and the binary number instep 12,step 13, andstep 14 are all implemented in the above-mentioned manner.

在上述译码过程中,不管使用哪种方法得出伴随式、错误位置多项式、错误位置数以及错误值,凡是涉及获得GF数与二进制数的乘积的步骤均需要In the above decoding process, no matter which method is used to obtain the adjoint formula, error position polynomial, error position number and error value, all steps involving obtaining the product of the GF number and the binary number require

将二进制数从二进制域转换到GF域,在GF域中做加法,然后再将得到的和值从GF域转换到二进制域。Convert the binary number from the binary domain to the GF domain, do the addition in the GF domain, and then convert the resulting sum from the GF domain to the binary domain.

但是,发明人在采用上述方式实现译码的过程中发现,由于数据在GF域和二进制域来回转换,使得RAM(随机存储器)查询频繁,计算量增多,从而消耗了逻辑资源,影响了译码速度。However, the inventor found in the process of implementing the decoding in the above-mentioned manner that due to the data switching back and forth between the GF domain and the binary domain, RAM (random access memory) queries are frequent and the amount of calculation increases, thereby consuming logic resources and affecting decoding speed.

发明内容Contents of the invention

本发明实施例提供一种实现译码的方法及装置,能够简化译码过程,提高译码速度,节约逻辑资源。Embodiments of the present invention provide a decoding method and device, which can simplify the decoding process, increase the decoding speed, and save logic resources.

本发明实施例是通过以下技术方案实现的:Embodiments of the present invention are achieved through the following technical solutions:

本发明实施例提供一种实现译码的方法,所述方法包括:An embodiment of the present invention provides a method for implementing decoding, the method comprising:

获取乘积操作中所需的伽罗华数和二进制数;Obtain the Galois number and binary number required in the product operation;

将伽罗华数从伽罗华域转换到二进制域,得到所述伽罗华数对应的二进制数;Converting the Galois number from the Galois field to the binary field to obtain the binary number corresponding to the Galois number;

将所述伽罗华数对应的二进制数与乘积操作所需的二进制数相乘,得到乘积;Multiply the binary number corresponding to the Galois number with the binary number required for the product operation to obtain the product;

利用所述乘积进行译码操作。A decoding operation is performed using the product.

本发明实施例提供一种实现译码的装置,用于配合实现译码的方法,所述装置包括:An embodiment of the present invention provides a device for realizing decoding, which is used to cooperate with a method for realizing decoding, and the device includes:

伽罗华数和二进制数获取单元,用于获取伽罗华数和二进制数乘积操作中所需的伽罗华数和二进制数;Galois number and binary number obtaining unit, for obtaining Galois number and binary number required in the product operation of Galois number and binary number;

二进制域转换单元,用于将伽罗华数从伽罗华域转换到二进制域,得到伽罗华数对应的二进制数;Binary field conversion unit, for Galois number is converted into binary field from Galois field, obtains the binary number corresponding to Galois number;

二进制域乘积单元,用于将所述伽罗华数对应的二进制数与乘积操作所需的二进制数相乘,得到乘积;A binary field product unit, used to multiply the binary number corresponding to the Galois number with the binary number required for the product operation to obtain the product;

译码单元,用于利用所述乘积进行译码操作。A decoding unit, configured to use the product to perform a decoding operation.

由上述本发明实施例提供的技术方案可以看出,本发明实施例采用一种实现译码的方法及装置,使得二进制域与GF域之间的转换大大减少,从而能够简化译码过程,提高译码速度,节约逻辑资源,降低功耗。It can be seen from the technical solutions provided by the above-mentioned embodiments of the present invention that the embodiments of the present invention adopt a method and device for realizing decoding, so that the conversion between the binary domain and the GF domain is greatly reduced, thereby simplifying the decoding process and improving Decoding speed saves logic resources and reduces power consumption.

附图说明Description of drawings

图1为现有技术中实现RS译码的过程图;FIG. 1 is a process diagram for realizing RS decoding in the prior art;

图2为现有技术中实现GF数与二进制数的乘积的过程图;Fig. 2 is the process figure that realizes the product of GF number and binary number in the prior art;

图3为现有技术中由接收多项式计算得出伴随式的过程图;Fig. 3 is the process diagram of calculating the adjoint formula by receiving polynomial in the prior art;

图4为本发明实施例的方法的过程图;Fig. 4 is the process diagram of the method of the embodiment of the present invention;

图5为应用本发明实施例的方法的典型实施例;Fig. 5 is a typical embodiment of the method for applying the embodiment of the present invention;

图6为本发明实施例的装置的结构图。Fig. 6 is a structural diagram of a device according to an embodiment of the present invention.

具体实施方式Detailed ways

本发明实施例的一个方法的具体实现如图4所示,具体包括:The specific implementation of a method in the embodiment of the present invention is shown in Figure 4, specifically including:

步骤41:在译码的过程中,获取GF数和二进制数乘积操作中所需的GF数和二进制数;Step 41: In the process of decoding, obtain the GF number and the binary number required in the product operation of the GF number and the binary number;

步骤42:将GF数从GF域转换到二进制域,得到所述GF数对应的二进制数;具体可以通过查询GF域到二进制域的转换表来实现;Step 42: convert the GF number from the GF domain to the binary domain, and obtain the binary number corresponding to the GF number; specifically, it can be realized by querying the conversion table from the GF domain to the binary domain;

步骤43:在二进制域,将所述GF数对应的二进制数与乘积操作所需的二进制数相乘,得到乘积;所述二进制数与所述GF数对应的二进制数的具体值可以相同也可以不相同;所述二进制数包括确定的需要与GF数相乘,以得到乘积的二进制数,具体可以根据译码的要求事先确定所述二进制数,或者,在译码的过程中确定或者生成需要与GF数相乘的二进制数;所述相乘的方法包括:自然基相乘法;或者,查表法。Step 43: In the binary field, multiply the binary number corresponding to the GF number with the binary number required by the product operation to obtain the product; the specific values of the binary number and the binary number corresponding to the GF number can be the same or can be Not the same; the binary number includes the determined binary number that needs to be multiplied by the GF number to obtain the product. Specifically, the binary number can be determined in advance according to the requirements of decoding, or determined or generated during the decoding process. The binary number multiplied by the GF number; the multiplication method includes: natural basis multiplication; or, look-up table method.

步骤44:利用所述乘积进行译码操作。比如:若需要得到所述各个乘积的和值,则可以将得到的各个乘积值相加,相加具体的方法可以包括:二进制域中的异或操作。Step 44: Use the product to perform a decoding operation. For example, if it is necessary to obtain the sum of the various products, the obtained product values may be added, and the specific method of adding may include: an XOR operation in a binary field.

下面以RS码的译码方法作为本发明的一个具体实施例,对本发明的具体实施方式进行详细描述。The specific implementation manner of the present invention will be described in detail below by taking the RS code decoding method as a specific embodiment of the present invention.

在RS码译码方法的各个步骤中,涉及获得GF数与二进制数乘积的方法均可以用本发明实施例所述的方法完成,下面以图5所示的RS译码方法中采用本发明实施例所述的方法得到伴随式为一个具体实施例对本发明的具体实现进行详细描述。In each step of the RS code decoding method, the method related to obtaining the product of the GF number and the binary number can be completed by the method described in the embodiment of the present invention, and the RS decoding method shown in FIG. 5 is implemented by using the present invention below. The method described in the example obtains the accompanying formula and describes in detail the specific implementation of the present invention for a specific embodiment.

应用本发明方法的典型实施例如图5所示,图5为在RS译码过程中采用自然基乘法实现GF(28)上的乘法的过程图。对于GSM05.03协议中的RS(85,73)译码,其中,85是指待译码的码流共有85个码元,73是指待译码的85个码元中,前面73个是原始数据,后面12个是编码过程中额外添加的12个码元,用来做译码的。需要计算12个伴随式:A typical embodiment of applying the method of the present invention is shown in FIG. 5 , which is a process diagram of realizing multiplication on GF(28 ) by using the natural basis multiplication method in the RS decoding process. For RS(85,73) decoding in the GSM05.03 protocol, 85 means that the code stream to be decoded has 85 symbols in total, and 73 means that among the 85 symbols to be decoded, the first 73 are Original data, the latter 12 are additional 12 symbols added during the encoding process, which are used for decoding. 12 adjoints need to be calculated:

Si=r(αi+121)=r0+r1αi+121+r2i+121)2+…+r84i+121)84=r0+r1αi+121+r2α2*(i+121)+…+r84α84*(i+121)Si =r(αi+121 )=r0 +r1 αi+121 +r2i+121 )2 +...+r84i+121 )84 =r0 +r1 αi +121 +r2 α2*(i+121) +…+r84 α84*(i+121)

其中,i为0,1,2,....,11。Wherein, i is 0, 1, 2, ..., 11.

具体包括:Specifically include:

步骤51:通过查找GF域到二进制域的转换表,将GF域的生成多项式的根,例如αi+121、(αi+121)2等,转换为二进制域的表示方式;Step 51: Convert the roots of the generator polynomials in the GF domain, such as αi+121 , (αi+121 )2 , etc., into representations in the binary domain by looking up the conversion table from the GF domain to the binary domain;

步骤52:在二进制域内,采用自然基相乘法,将二进制域的接收码元与二进制域的生成多项式的根相乘,得出r1αi+121、r2i+121)2等算式的值;Step 52: In the binary domain, use the natural basis multiplication method to multiply the received symbols in the binary domain with the root of the generator polynomial in the binary domain to obtain r1 αi+121 , r2i+121 )2 the value of the equation;

步骤53:在二进制域内,将所述算式的值按照进行异或操作(即,加法)得到伴随式。Step 53: In the binary domain, perform an XOR operation (ie, addition) on the value of the formula to obtain the syndrome.

采用步骤51至步骤53所述的方法计算伴随式的速度较快,并且只需要进行一个查表操作,同时采用自然基相乘法的乘法器可以复用,占用的面积小。Using the method described in steps 51 to 53 can calculate the adjoint formula quickly, and only needs to perform a table lookup operation, and at the same time, the multiplier using the natural basis multiplication method can be reused, and the occupied area is small.

可以理解的是,在RS码译码方法涉及的其他各个步骤,例如,由伴随式Sj得出错误位置多项式σ(x),计算σ(x)的根,由错误位置数计算错误值的各个步骤中,涉及获得GF数与二进制的乘积的方法均可以用本发明实施例所述的方法完成。It can be understood that, in other steps involved in the RS code decoding method, for example, the error position polynomial σ(x) is obtained from the accompanying formula Sj, the root of σ(x) is calculated, and the error values are calculated from the number of error positions. In the steps, the method related to obtaining the product of the GF number and the binary number can be completed by the method described in the embodiment of the present invention.

本发明实施例还提供了一种用于配合本发明实施例所述方法的装置,如图6所示,所述装置具体包括:The embodiment of the present invention also provides a device for cooperating with the method described in the embodiment of the present invention, as shown in Figure 6, the device specifically includes:

伽罗华数和二进制数获取单元,用于获取GF数和二进制数乘积操作中所需的GF数和二进制数;Galois number and binary number obtaining unit, for obtaining GF number and binary number required in the product operation of GF number and binary number;

二进制域转换单元,用于将GF数从GF域转换到二进制域,得到GF数对应的二进制数;A binary domain conversion unit is used to convert the GF number from the GF domain to the binary domain to obtain a binary number corresponding to the GF number;

二进制域乘积单元,用于将所述GF数对应的二进制数与乘积操作所需的二进制数相乘,得到乘积;所述乘积操作所需的二进制数与所述GF数对应的二进制数的具体值可以相同也可以不相同;所述乘积操作所需的二进制数包括确定的需要与GF数相乘,以得到乘积的二进制数,具体可以根据译码的要求事先确定所述二进制数,或者,在译码的过程中确定或者生成需要与GF数相乘的二进制数;The binary field product unit is used to multiply the binary number corresponding to the GF number with the binary number required for the product operation to obtain a product; the specific binary number required for the product operation and the binary number corresponding to the GF number The values may be the same or different; the binary number required for the product operation includes the determined binary number that needs to be multiplied by the GF number to obtain the product, and the binary number may be determined in advance according to the decoding requirements, or, Determine or generate the binary number that needs to be multiplied by the GF number during the decoding process;

译码单元,用于利用所述乘积进行译码操作。A decoding unit, configured to use the product to perform a decoding operation.

若需要得到所述各个乘积的和值,则所述译码单元可以包括:If it is necessary to obtain the sum of the various products, the decoding unit may include:

二进制域相加单元,用将所述二进制域乘积单元得到的各个乘积相加,得到GF数与二进制数的乘积之和。The binary field addition unit is used to add the products obtained by the binary field product unit to obtain the sum of the products of the GF number and the binary number.

所述装置应用于BCH码的译码实现,具体可以包括RS码。The device is applied to the decoding of BCH codes, which may specifically include RS codes.

可以理解的是,涉及获得GF数与二进制数乘积的装置均可以用本发明实施例所述的装置完成。It can be understood that all the devices involved in obtaining the product of the GF number and the binary number can be completed by the device described in the embodiment of the present invention.

综上所述,本发明实施例能够应用于涉及获取GF数与二进制数乘积的各种译码实现中,能够将二进制域与GF域之间的转换大大减少,从而能够简化译码过程,提高译码速度,节约逻辑资源,降低功耗。To sum up, the embodiment of the present invention can be applied to various decoding implementations involving obtaining the product of GF numbers and binary numbers, and can greatly reduce the conversion between the binary domain and the GF domain, thereby simplifying the decoding process and improving Decoding speed saves logic resources and reduces power consumption.

以上所述,仅为本发明较佳的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到的变化或替换,都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应该以权利要求书的保护范围为准。The above is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed in the present invention can easily think of changes or Replacement should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be determined by the protection scope of the claims.

Claims (9)

1. a method that realizes deciphering is characterized in that, described method comprises:
Obtain required Jia Luohua number and binary number in the product operation;
The Jia Luohua number is transformed into binary field from galois field, obtains the binary number that described Jia Luohua counts correspondence;
Described Jia Luohua is counted the required binary number of the binary number of correspondence and product operation multiply each other, obtain product;
Utilize described product to carry out decoded operation.
2. the method for claim 1 is characterized in that, the method that the binary number that obtains in the binary number that described Jia Luohua counts correspondence and the decoded operation process multiplies each other comprises: basic naturally multiplication mutually or look-up table.
3. method as claimed in claim 1 or 2 is characterized in that, described decoded operation comprises: with described product addition.
4. method as claimed in claim 1 or 2 is characterized in that, described decoded operation comprises the decoded operation to the cyclic code BCH code of correcting a plurality of random errors.
5. method as claimed in claim 4 is characterized in that, described BCH code comprises: code word RS sign indicating number.
6. a device of realizing deciphering is used to cooperate the method that realizes decoding, it is characterized in that described device comprises:
Jia Luohua number and binary number acquiring unit are used for obtaining Jia Luohua number and required Jia Luohua number and the binary number of binary number product operation;
The binary field converting unit is used for the Jia Luohua number is transformed into binary field from galois field, obtains the binary number that Jia Luohua counts correspondence;
Binary field product unit is used for that described Jia Luohua is counted the required binary number of the binary number of correspondence and product operation and multiplies each other, and obtains product;
Decoding unit is used to utilize described product to carry out decoded operation.
7. device as claimed in claim 6 is characterized in that, if described decoded operation comprises that with described product addition, then described decoding unit can comprise:
The binary field addition unit is used each product addition that described binary field product unit is obtained, and obtains the sum of products of Jia Luohua number and binary number.
8. as claim 6 or 7 described devices, it is characterized in that described decoded operation comprises the decoded operation to BCH code.
9. device as claimed in claim 8 is characterized in that, described BCH code comprises: the RS sign indicating number.
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Citations (1)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN1599262A (en)*2004-08-062005-03-23南京邮电学院Method of realizing Reed Solomen convolution code in broadband radio insertion system

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* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
CN1599262A (en)*2004-08-062005-03-23南京邮电学院Method of realizing Reed Solomen convolution code in broadband radio insertion system

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
JP特开平7-200332A 1995.08.04
叶清贵,刘宇怀,莫霍德,刘锦高.R-S码纠错算法的软件实现.华东师范大学学报(自然科学版) 4.2005,(4),98-101.
叶清贵,刘宇怀,莫霍德,刘锦高.R-S码纠错算法的软件实现.华东师范大学学报(自然科学版) 4.2005,(4),98-101.*

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