CN100517743C - A radiation-resistant and highly reliable phase-change memory device unit and its manufacturing method - Google Patents

Abstract

Translated fromChinese

本发明涉及一种抗辐照高可靠的相变存储器器件单元及其制作方法。该相变存储器的外围电路制作在抗辐照加固的衬底上。存储单元由一个可逆相变电阻和一个pn结二极管构成，形成1D1R结构。利用SiO₂等介质材料把1D1R封装起来，加上1D1R器件单元小以及射线、粒子可作用的几率小等优点，从而实现了抗辐照的1D1R存储单元。存储单元通过上下电极散热，通过相变材料与电极材料之间热阻层的厚度调节热量平衡点。由抗辐照的1D1R存储单元构成存储阵列，加上SOI衬底上的外围电路，从而形成抗辐照的相变存储器。

The invention relates to a radiation-resistant and highly reliable phase-change memory device unit and a manufacturing method thereof. The peripheral circuit of the phase change memory is fabricated on a radiation-resistant and reinforced substrate. The memory cell is composed of a reversible phase-change resistor and a pn junction diode, forming a 1D1R structure. The 1D1R is packaged with SiO₂ and other dielectric materials, and the 1D1R device unit is small and the probability of radiation and particles acting on it is small, so that the anti-radiation 1D1R storage unit is realized. The storage unit dissipates heat through the upper and lower electrodes, and adjusts the heat balance point through the thickness of the thermal resistance layer between the phase change material and the electrode material. The storage array is composed of radiation-resistant 1D1R memory cells, and the peripheral circuits on the SOI substrate are added to form a radiation-resistant phase-change memory.

Description

Phase transformation memory device unit that a kind of anti-irradiation is highly reliable and preparation method thereof

Technical field

The present invention relates to highly reliable phase transformation memory device unit of a kind of anti-irradiation and preparation method thereof, relate to a kind of highly reliable New-type phase change memory that is used under the environment such as irradiation or rather.Belong to particular device and technology field in the microelectronics.

Background technology

In present various memory technologies, phase transition storage (chalcogenide based RAM based on sulphur based semiconductor material, C-RAM) it is low to have a cost, speed is fast, the storage density height, make simply, and have and the good outstanding advantage of current CMOS (complementary metal-oxide-semiconductor) ic process compatibility, be subjected to worldwide extensive concern.In addition, C-RAM has performances such as anti-irradiation (ability of resistant to total dose is greater than 1Mrad (Si)), high-low temperature resistant (55～125 ℃), against violent vibration are moving, anti-electronic jamming, in national defence and aerospace field important application prospects is arranged.From 2003, international semiconductor TIA thinks that always phase transition storage most possibly replaces present SRAM (static RAM), current main products such as DRAM (dynamic random access memory) and FLASH memory (flash memory) and become the semiconductor storage unit of future generation of following memory main product, USA space council issues a statement and thinks recently: the C-RAM technology is the breakthrough of the highly reliable computer chip material of high safety, the research of this memory technology provides unprecedented guarantee for war with computer chip, and this technology may cause the change of the revolution of computer.

Main in the world electronics and semiconductor company all is being devoted to the development of C-RAM at present.There are Ovonyx, Intel, Samsung, IBM, Bayer, ST Micron, AMD, Panasonic, Sony, Philips, British Areospace, Hitachi and Macronix etc. in main research unit.In May, 2005, American I BM, German Infineon science and technology, Taiwan Macronix International (Macronix International) are announced joint study exploitation phase transition storage, send 20～25 technical staff to participate in this research specially.3 companies provide the technology of being good at separately to study respectively, specifically, exactly with the relevant material that IBM is had and the basic research ability of physical characteristic, the research of the various internal memory products that Infineon has, exploitation and volume production technical capability, and the non-voltile memory technical capability of Macronix International is integrated in this research.

Performances such as anti-irradiation (ability of resistant to total dose is greater than 1Mrad (Si)), high-low temperature resistant (55-125 ℃), against violent vibration are moving though the C-RAM memory cell itself has, anti-electronic jamming, but, do not have the performance of anti-irradiation because the T of common C-RAM peripheral circuit and 1T1R structure memory cell prepares on common monocrystalline substrate.The present invention is exactly the integrity problem that exists at common C-RAM, proposes a kind of new phase change memory structure, and reversible transition resistance of the memory cell of this phase transition storage becomes the 1D1R structure with a pn structure.The memory cell of 1D1R structure itself has anti-radiation performance, peripheral control circuit on the SOI substrate also has anti-radiation performance, whole like this phase change memory chip just has anti-irradiation ability, has very big actual application prospect in fields such as irradiation such as military project, national defence and Aero-Space and electronic jamming.

Summary of the invention

The object of the present invention is to provide highly reliable phase transformation memory device unit of a kind of anti-irradiation and preparation method thereof, the phase transition storage that provides is used under the environment such as high irradiation, it is a kind of have high speed, low-power consumption, high erasable number of times, especially has the phase change memory structure of good anti-radiation performance.Specifically, the peripheral control circuit of described phase transition storage forms having on the SOI substrate of ability, memory cell is by a reversible transition resistance and a pn knot (diode, diode) constitute, form the 1D1R structure, the memory cell that is different from common 1T1R structure, wherein the pn knot replaces common transistor switch as switch.The T (transistor) that the highly reliable C-RAM that is provided has overcome common C-RAM peripheral circuit and 1T1R structure memory cell all be preparation on common monocrystalline substrate and do not have the shortcoming of anti-radiation performance, the storage chip field under environment such as anti-irradiation has great application prospect.

Under the condition of irradiation, though α particle, gamma-ray penetration capacity are very strong, because of the time that acts in the phase-change material very short, the heat that produces is little, the structure that can not cause material changes, and this is for the phase-change material based on structural change, and its resistance can not change.The pn knot is based on the switching device of material structure too, and performance does not change under the situation that structure does not change equally.

Main technique step of the present invention is as follows:

(1) on the SOI substrate that anti-irradiation is reinforced, utilizes the peripheral control circuit of CMOS prepared (comprise logical circuit, decoding circuit, write and wipe drive circuit and read amplifying circuit etc.) of standard;

(2), utilize the pn knot of the CMOS prepared 1D1R storage array of standard, and original position forms the hole of phase-change material, the degree of depth 50nm-150nm of hole, hole diameter 100-300nm at the respective regions of above-mentioned SOI substrate;

(3) utilize method deposit one deck electrode materials in hole such as CVD, ald (ALD), high vacuum magnetically controlled sputter method, electron beam evaporation, link to each other with the top of pn knot;

(4) it is flat to utilize CMP that the surface is thrown, and removes the metal material on surface, forms the metal electrode array of column, as the hearth electrode of phase change cells;

(5) the thick SiO of sputter growth 20nm-80nm on hearth electrode₂Or SiN_xDielectric layer;

(6) at SiO₂Or SiN_xThe relevant position of phase change cells hearth electrode on the dielectric layer, etching prepares the hole of 50-250nm, and the bottom of hole links to each other with the hearth electrode top;

(7) utilize technology such as magnetron sputtering in above-mentioned hole, to fill heating electrode materials such as W, TiN, fill up, then carry out CMP, remove the heating electrode material on surface, form column heating electrode array until hole;

(8) the thick SiO of sputter growth 50nm-200nm on the column heating electrode₂Or SiN_xDielectric layer;

(9) at SiO₂Or SiN_xThe relevant position of column heating electrode on the dielectric layer, etching prepares the hole of 50-200nm, and the bottom of hole links to each other with column heating electrode top;

(10) utilize methods such as magnetron sputtering in above-mentioned hole, to fill heating phase-change material;

(11) utilize CMP to throw and remove the phase change material film of hole, form the Prismatical phase transition material array, as the GeSbTe array with exterior domain;

(12) utilize CVD, ALD or method deposit one deck top electrode materials on the Prismatical phase transition material array such as high vacuum magnetically controlled sputter method, electron beam evaporation;

(13) carry out wet etching, thereby obtain the phase transformation memory device unit of the 1D1R structure on the SOI substrate; (Fig. 1)

(14) this phase transformation memory device unit is connected in the electrical measurement system, carries out the writing of phase transformation memory device unit, wiping, read operation, study its storage characteristics and fatigue properties etc.

(15) the 1D1R storage array adds logic, deciphers, writes peripheral circuits such as wipe driving and read amplification, constitutes the C-RAM chip with high reliability such as anti-irradiation based on SOI substrate and 1D1R structure storage array.(Fig. 2)

Substrate and insulating barrier wherein that described anti-irradiation is reinforced are unrestricted, can use as long as have the SOI material of anti-radiation performance, can be GSOI (germanium silicon on the insulating barrier), GOI (germanium on the insulating barrier) etc. as substrate, and the insulating barrier among the SOI can be SiO₂, SiN_x, air etc.

Described hearth electrode is unrestricted, can be conductor material commonly used such as aluminium, copper, and its thickness is 200-400nm.

1D1R structure between each unit of described storage array is separated by dielectric material, avoided between each unit string around.Spacer medium is SiO commonly used₂, material such as SiNx, also can be Al₂O₃, HfO₂Deng material, thickness 100nm-500nm.

Described peripheral circuit and pn knot are by the CMOS prepared of standard, and reversible transition resistance does not influence the CMOS standard technology by follow-up special process preparation.

The hole of the phase-change material that described pn ties can use any micro-nano processing method such as focused-ion-beam lithography method, electron beam exposure and reactive ion etching method to obtain.

The material of described heating electrode is the material that W etc. has certain resistivity, in addition can be again on W etc. heating material such as TiW, the TiAlN etc. of the high resistivity of the several nanometer thickness of deposition one deck, thereby improve heats, reduce operating current.

The surface smoothness that obtains after the described chemico-mechanical polishing (CMP) is very high, even can reach nanoscale, does not influence follow-up long membrane process.

Describedly between pn knot and IR, can add one deck Ta₂O₅, Al₂O₃, ZrO₂Deng dielectric material, thereby can strengthen the adhesive force of phase-change material effectively, improve the heats of phase-change material, also avoid the influence of heat or charge carrier simultaneously, improve reliability, improve memory property the pn knot.

Can handle top electrode, also can reinforce, further improve reliability pn knot and GST unit.

Described reversible transition resistance can be formed by chemico-mechanical polishing (CMP) or etching.

Under identical size, the electric current that the current ratio MOSFET mos field effect transistor that the pn knot provides provides is big 2 times, has strengthened reliability.

This shows that a kind of highly reliable phase transition storage provided by the invention is characterized in that:

(a) peripheral circuit is produced on the substrate of anti-irradiation reinforcing;

(b) (diode diode) constitutes memory cell, forms the 1D1R structure, and reversible transition resistance is as information storage medium, and pn ties as switch by a reversible transition resistance and pn knot;

(c) pn of each 1D1R structure knot and reversible transition resistance are vertically arranged, and the pn knot is following, and reversible transition resistance is last, and the 1D1R structure is separated by dielectric material on every side, to avoid the irradiation influence of ray or particle effectively;

(d) replace transistor with the pn knot, 1D1R structure memory cell size is little, and the probability that ray, particle can act in the radiation environment is little, has reduced the influence of irradiation effectively;

(e) 1D1R is become with the pn structure by the phase-change material based on structural change, and the time of ray, particle effect is very short, and the heat of generation is little, can not cause the variation of material structure.Under the situation that structure does not change, performance does not change;

(f) phase change memory array is made up of the little 1D1R structure memory cell of size, the array that the density of array is formed greater than common 1T1R structure memory cell.

The important applied field of a kind of highly reliable New-type phase change memory provided by the invention is fields such as irradiation such as military project, national defence and Aero-Space and electronic jamming.The peripheral control circuit of this phase transition storage that is provided forms on the SOI substrate, and memory cell becomes the 1D1R structure by the reversible transition resistance of an anti-irradiation with a pn structure, replaces common 1T1R structure.Because the memory cell of 1D1R structure itself has anti-radiation performance, the peripheral circuit on the SOI substrate also has anti-radiation performance, and the phase change memory chip of Xing Chenging then has good anti-radiation performance like this, has great application prospect.

Description of drawings

The storage array cross-sectional view that Fig. 1 is made up of the 1D1R structure

The storage chip block diagram that Fig. 2 is made up of 1D1R structure storage array and peripheral circuit thereof

1. diodes among the figure; 2. hearth electrode; 3. heating electrode; 4. phase-change material; 5. top electrode

Embodiment

Below by specific embodiment, further illustrate substantive distinguishing features of the present invention and obvious improvement, but the present invention only is confined to described embodiment by no means.

Embodiment 1:

(1) on the SOI substrate, utilizes the peripheral control circuit of CMOS prepared (comprise logical circuit, decoding circuit, write and wipe drive circuit and read amplifying circuit etc.) of standard;

(2) at the respective regions of above-mentioned SOI substrate, utilize the semiconductor technology of the deep-submicron of standard on the SOI substrate, to prepare the pn knot, the width of pn knot is at 200-500nm;

(3) utilize the PECVD technology to tie the thick SiO of deposit one deck 100-200nm at pn₂Film;

(4) at the thick SiO of above-mentioned 100-200nm₂On utilize the electron beam lithography technology to prepare nano aperture, hole bottom is tied end with pn and is linked to each other, hole diameter is in the 100-200nm scope;

(5) utilize CVD technology deposit W film in hole, reaction source is WF₆, SiH₄And H₂Three's mixture fills up until hole;

(6) utilize chemical Mechanical Polishing Technique (CMP) to throw and remove the W electrode material of hole with exterior domain;

(7) utilize PECVD technology thick SiO of deposit one deck 10-30nm on the W electrode₂Film;

(8) at the thick SiO of above-mentioned 10-30nm₂On utilize the electron beam lithography technology to prepare nano aperture, hole bottom links to each other with W electrode upper end, hole diameter is in the 50nm-150nm scope;

(9) utilize magnetron sputtering technique deposit TiN film in hole, fill up until hole;

(10) utilize CMP to throw and remove the TiN film of hole with exterior domain;

(11) utilize PECVD technology thick SiO of deposit one deck 50-100nm on the TiN film₂Film;

(12) at the thick SiO of above-mentioned 50-100nm₂On utilize the electron beam lithography technology to prepare nano aperture, hole bottom links to each other with TiN electrode upper end, hole diameter is in the 100-300nm scope;

(13) magnetron sputtering phase-change material GeSbTe, the about 80nm of thickness, base vacuum are 3 * 10^-6Torr, the sputter vacuum is 0.08Pa, power 100W;

(14) utilize CMP to throw and remove the GeSbTe film of hole, then prepare the Al top electrode, thereby obtain the phase transformation memory device unit of the 1D1R structure on the SOI substrate with exterior domain;

(15) this phase transformation memory device unit is connected in the electrical measurement system, carries out the writing of phase transformation memory device unit, wiping, read operation, study its storage characteristics and fatigue properties etc.

Embodiment 2:

With embodiment 1 the 7th step SiO₂The thickness of film is reduced to about 5nm, and the TiN film in the 9th step changes the ZrO about thickness 5nm into₂Film, other can obtain the 1 better heating result than embodiment with embodiment 1.

Embodiment 3:

Change the reversible transition material GeSbTe in the 13rd step of embodiment 1 into SiSbTe, perhaps change the GeSbTe of doping such as Sn, Ag, N and the SiSbTe that Sn, Ag, N etc. mix into, other step is with embodiment 1.Can obtain better device performance like this, as the operating current that reduces device or improve device speed etc.

Embodiment 4:

Suitable consolidation process is taked in the pn knot and the GST unit in the 13rd step of embodiment 1 to the 2nd step of embodiment 1, and other can obtain than performances such as embodiment 1 better anti-irradiation with embodiment 1.

Embodiment 5:

SOI substrate to embodiment 1 is taked suitable consolidation process, perhaps changes the insulating layer material in the SOI substrate, as utilizes DLC to replace SiO₂, other can improve other performance of device, as reducing self-heating effect etc. with embodiment 1 in the anti-radiation performance that improves device.

Claims (12)

1, a kind of manufacture method of anti-irradiation phase transformation memory device unit is characterized in that making step is:

(1) on the backing material that anti-irradiation is reinforced, utilize the peripheral control circuit of CMOS prepared of standard, described peripheral control circuit comprises control logic circuit, decoding circuit, writes and wipe drive circuit and read amplifying circuit;

(2) step 1 is manufactured with the respective regions of the backing material of peripheral control circuit, utilize the pn knot of the CMOS prepared 1D1R storage array of standard, and original position forms the hole of nano-scale phase-changing material, the degree of depth 50nm-150nm of hole, hole diameter 100-300nm; The bottom of hole is tied end with pn and is linked to each other;

(3) utilize chemical vapour deposition (CVD), ald, high vacuum magnetically controlled sputter method or electron beam evaporation method deposit one deck electrode material in hole, link to each other with the top of pn knot;

(4) it is flat to utilize cmp method that the surface is thrown, and removes the metal material on surface, forms the metal electrode array of column, as the hearth electrode of phase change cells;

(5) the thick SiO of sputter growth 10nm-80nm on hearth electrode₂, SiN_x, Al₂O₃Or HfO₂Dielectric layer;

(6) relevant position of phase change cells hearth electrode on the dielectric layer that step 5 is made, etching prepares the hole that diameter is 50-250nm, and the bottom of hole links to each other with the hearth electrode top;

(7) utilize magnetron sputtering technique in above-mentioned hole, to fill W or TiN heating electrode material, fill up, then carry out CMP, remove the heating electrode material on surface, form column heating electrode array until hole;

(8) the thick SiO of sputter growth 50nm-200nm on the column heating electrode₂Or SiN_xDielectric layer;

(9) at SiO₂Or SiN_xThe relevant position of column heating electrode on the dielectric layer, etching prepare the hole that diameter is 50-200nm, and the bottom of hole links to each other with column heating electrode top;

(10) utilize magnetically controlled sputter method in above-mentioned hole, to fill heating phase-change material;

(11) throw except that the phase-change material of hole, form column reversible transition material array with exterior domain;

(12) utilize chemical phase deposition, ald, high vacuum magnetically controlled sputter method or electron beam evaporation method deposit one deck top electrode material on the Prismatical phase transition material array;

(13) carry out wet etching, thereby obtain the phase transformation memory device unit of the 1D1R structure on the substrate that anti-irradiation reinforces;

(14) this phase transformation memory device unit is connected in the electrical measurement system, carries out the writing of phase transformation memory device unit, wiping, read operation;

(15) the 1D1R storage array adds logic, deciphers, writes and wipe driving and read the amplification peripheral circuit, constitutes based on the substrate of anti-irradiation reinforcing and the phase change memory chip with anti-irradiation of 1D1R structure storage array.

2, by the manufacture method of the described anti-irradiation phase transformation memory device unit of claim 1, it is characterized in that described hearth electrode is aluminium or copper, thickness is 200-400nm.

3, by the manufacture method of the described anti-irradiation phase transformation memory device unit of claim 1, it is characterized in that the material of described column heating electrode replaces with TiW or TiAlN.

4, by the manufacture method of the described anti-irradiation phase transformation memory device unit of claim 1, it is characterized in that the described reversible transition material of described step (11) array is formed by chemico-mechanical polishing or etching.

5, by the manufacture method of the described anti-irradiation phase transformation memory device unit of claim 1, it is characterized in that described phase-change material is GeSbTe or SiSbTe.

6, by the manufacture method of the described anti-irradiation phase transformation memory device unit of claim 1, it is characterized in that described phase-change material is the GeSbTe of doping Sn, Ag or N.

7, by the manufacture method of the described anti-irradiation phase transformation memory device unit of claim 1, it is characterized in that described phase-change material is the SiSbTe of doping Sn, Ag or N.

8, by the manufacture method of the described anti-irradiation phase transformation memory device unit of claim 1, the backing material that it is characterized in that described anti-irradiation is a germanium on germanium silicon or the insulating barrier on silicon, the insulating barrier on the insulating barrier.

9, by the manufacture method of the described anti-irradiation phase transformation memory device unit of claim 1, it is characterized in that the phase-change memory device of making:

(a) memory cell is made up of a reversible transition resistance and a pn junction diode, forms the 1D1R structure; Reversible transition resistance is as information storage medium, and pn ties as switch;

(b) pn of each 1D1R structure knot and reversible transition resistance are vertically arranged, and the pn knot is following, and reversible transition resistance is last, and the 1D1R structure periphery is a dielectric material;

(c) phase transformation memory device unit constitutes storage array and peripheral circuit and is produced on the backing material that anti-irradiation reinforces, and the phase change memory array of being made up of 1D 1R structure memory cell is positioned at the respective regions of backing material.

10, by the manufacture method of the described anti-irradiation phase transformation memory device unit of claim 9, it is characterized in that the 1D1R structure between each unit of described storage array is separated by dielectric material.

11, by the manufacture method of the described anti-irradiation phase transformation memory device unit of claim 10, it is characterized in that the dielectric material that separates is SiO₂, SiN_x, Al₂O₃And HfO₂In any; Thickness is 100nm-500nm.

12,, it is characterized in that between pn knot and reversible transition resistance, being added with one deck Ta by the manufacture method of the described anti-irradiation phase transformation memory device unit of claim 9₂O₅, Al₂O₃Or ZrO₂Layer of dielectric material.

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