CN100483161C - Slit arrangement and its preparing process - Google Patents

Abstract

Translated fromChinese

本发明涉及一种狭缝装置及其制作方法，其特征在于所述的狭缝装置是由位于中心的狭缝芯片和狭缝芯片辅助装置两部分构成，狭缝芯片安放在狭缝芯片辅助装置的中空结构中，狭缝芯片中心含有一定大小的狭缝，狭缝芯片铺助装置固定狭缝芯片。所述的狭缝是通过腐蚀工艺在硅衬底中间形成的，其尺寸由掩膜版曝光尺寸决定，改变掩膜版曝光尺寸可制成不同尺寸的狭缝。所述的狭缝芯片辅助装置是通过四角打孔螺钉对狭缝芯片进行夹持固定的。其制作方法包括狭缝芯片的整体设计、制作以及组装三步。所涉及的狭缝装置可依实际需要制作，便于光学检测仪器的微型化。

The invention relates to a slit device and a manufacturing method thereof, which is characterized in that the slit device is composed of a slit chip located in the center and a slit chip auxiliary device, and the slit chip is placed on the slit chip auxiliary device In the hollow structure of the invention, the center of the slit chip contains a slit of a certain size, and the slit chip laying auxiliary device fixes the slit chip. The slit is formed in the middle of the silicon substrate through an etching process, and its size is determined by the exposure size of the mask. Changing the exposure size of the mask can make slits of different sizes. The slit chip auxiliary device clamps and fixes the slit chip through four-corner perforated screws. The manufacturing method includes three steps of overall design, manufacturing and assembly of the slit chip. The involved slit device can be manufactured according to actual needs, which facilitates the miniaturization of optical detection instruments.

Description

A kind of slit arrangement method for making

Technical field

The present invention relates to a kind of slit arrangement and preparation method thereof, particularly relate to a kind of can being used for and carry out the slit arrangement that light path is chosen, and the method for making of this slit arrangement.

Background technology

In recent years, the continuous development of optical technology impelled the degree of accuracy of optical instrument, the microminiaturized requirement further to improve.Light slit, diaphragm belong to the service part in the Experiments of Optics, are the critical components during Experiments of Optics and Modern Optics Technology are measured.Traditional slit is to reach by regulating two gaps between the parallel blade, more this design now is used for light path and chooses, owing to its adjustability, can reach requirement (Pan Dejiang, the Yang Yuejun of most of light paths, Chen Dongying, the manufacturing process of slit blade, HeFei University of Technology's journal (natural science edition), 1998,21 (S1), 110-113).In high, intermediate spectral instrument, slit blade is the strength member of instrument, it is the accuracy requirement height not only, manufacture difficulty is big, processing technology complexity (generally include dash expect, mill, multiple tracks processes such as mill, boring, file, thermal treatment) is and directly influence the quality of line source and the sensitivity of whole instrument; Simultaneously, slit mechanism is made up of Width adjusting mechanism and reading mechanism two parts, and its type of belt drive divides spiral, lever, wedge shape frame and skewback transmission etc., and the slit mechanism volume is big, is difficult to realize saving the design in space, and the collimation franchise of blade requires very high; And owing to need specific anchor clamps or instrument in the process of assembling, the step ground number of assembling increases, and the operation of assembling can not be simplified.

Summary of the invention

The object of the present invention is to provide a kind of slit arrangement and preparation method thereof, to overcome the deficiency of existing slit designs and manufacturing technology.The present invention adopts MEMS (micro electro mechanical system) (MEMS) technology to make slit arrangement, and provides a cover to make the technological process of this slit arrangement.This slit arrangement is in two sub-sections: be positioned at the slit chip and the slit chip servicing unit at center, as shown in Figure 1.Slit arrangement is mainly used in optical filtering, the incident beam of choosing a certain size sees through, and the slit of certain size size is contained in slit chip center, and the slit part can allow light pass through, and the slit outside is to be made by lighttight material, is used for shielding and the unwanted incident beam of filtering; That slit chip servicing unit plays a part is fixing, install or regulate the slit chip.The big I of slit is chosen according to actual needs on the slit chip, and slit chip servicing unit also can improve according to actual light path.

Technical matters to be solved by this invention is: 1, slit chip body material chooses, anisotropic etch can take place in silicon materials in the KOH corrosive liquid, especially crystal face be that the silicon chip of (100) can corrode the formation groove structure under protect oxide layer in the KOH corrosive liquid; 2, the selection of single face corrosion and two-sided corrosion, in the KOH corrosive liquid, select ratio according to silicon dioxide and silicon, rationally utilize certain thickness oxide layer to corrode as the protective seam of slit, two-sided corrosion can be corroded fast again than single face, and required oxidated layer thickness will approach a lot; 3, the design of slit sizes and control, crystal face becomes 54.74 ° inclination angle for the inclined-plane of the silicon slice corrosion formation of (100) with silicon chip surface, so when carrying out slit designs, must calculate oxide layer perforate size, too big as the oxide layer bore size, the slit width that the corrosion back forms will be greater than incident beam, can not reach filter action, on the contrary, if too little just may the generation of oxide layer bore size can not be corroded the phenomenon of wearing; 4, the groove that can just in time block slit is produced in the design of slit chip servicing unit and adjusting on peripheral profile, the direction of utilizing the groove made on the profile can regulate slit adds screw retention around this servicing unit.

The method for making of the agent structure of slit arrangement among the present invention---slit chip has two kinds of methods.1, after crystal face was the silicon chip of (100), photoresist protection back side oxide layer was carried out the frontside oxide layer perforate; Carry out the back side then and aim at, photoresist protection frontside oxide layer is carried out back side oxide layer perforate; At last with the both sides oxide layer all the silicon chip of perforate put into uniform temperature and certain density potassium hydroxide (KOH) solution carries out anisotropic etch, until silicon chip is corroded and wears, just formed a certain size slit.2, after crystal face was the silicon chip of (100), photoresist was in the front, behind photoetching, development, the post bake, aimed at overleaf, photoetching, development, post bake again, carried out the oxide layer perforate then, carried out anisotropic etch at last in KOH solution.

Specifically, the manufacturing process of this slit arrangement can divide three big steps to carry out:

At first, with L-Edit layout design software (L-Edit Win32 9.00, A Division of TannerResearch, Inc. provides) the designed mask version, wherein relate to the size of the number of design slit and distribution, slit width and length, slit chip.Suppose that silicon wafer thickness is T, carry out that the required slit sizes that obtains is that (L is a slit length to L * W after the two-sided corrosion, W is a slit width), should calculate the oxide layer perforate according to the corrosion inclination angle [theta] earlier and be of a size of (L+T * ctg (θ)) * (W+T * ctg (θ)), the oxide layer bore size is exactly the size of design slit on the mask.The size of slit chip can design according to actual needs, and is changeable.

Then, figure on the mask is transferred to the silicon chip that oxidated layer thickness is 2 μ m by processes such as photoresist photoetching, development, post bakes, and (crystal face is (100), mount emei semiconductor material factory) on the front, and get rid of resist coating at the silicon chip back side and protect oxide layer, utilize then silica erosion liquid (such as, hydrofluorite: ammonium fluoride: the proportioning of water is 3ml:6g:9ml) corrosion, frontside oxide layer has just eroded away the preceding figure of slit moulding; Carry out same step at the silicon chip back side then, difference be to carry out with the front etch pattern aim at, can erode away figure before the slit moulding equally; Utilizing mass content at last is that 40% KOH corrosive liquid carries out anisotropic etch under 50 ℃ of conditions, and corrosion is worn whole silicon wafer and just can be formed pre-designed slit.Perhaps, after figure on the mask transferred to the silicon chip that oxidated layer thickness is 2 μ m (crystal orientation for (100)) front by processes such as photoresist photoetching, development, post bakes, get rid of resist coating at the silicon chip back side and carry out processes such as back side aligning, photoetching, development, post bake, utilize then silica erosion liquid (such as, hydrofluorite: ammonium fluoride: the proportioning of water is 3ml:6g:9ml) to carry out oxide layer graphical, and the tow sides oxide layer just forms figure before the slit moulding; At last, utilize the corrosion of KOH corrosive liquid to wear silicon chip equally and just can obtain slit.

At last, utilize polymeric material polymethylmethacrylate (PMMA according to the design size of slit chip servicing unit,) plate milling, cutting processing make the groove that contains certain depth, the formation hollow structure is emptied at PMMA plate center can make the light path direct irradiation on the slit chip, and four jiaos of plate punchings so that the slit chip is gripped, shown in Fig. 1 (3) and (4) with screw.

In sum: the slit arrangement of design is to be made of the slit chip that is positioned at the center and slit chip servicing unit two parts, the slit chip mount is in the hollow structure of slit chip servicing unit, and the slit chip is gripped with screw in Qi Sijiao punching, and a certain size slit is contained in slit chip center.This shows that slit arrangement provided by the invention and method for making have following five characteristics:

(1) slit arrangement made of the present invention is different with the design of traditional fabrication slit, avoided the Width adjusting mechanism and the reading mechanism of traditional slit repeatedly using the back that deviation takes place, and in the middle of silicon substrate, form slit by etching process, its edge need not to regulate, and its size is determined by the mask exposure size.

(2) the slit chip manufacture method among the present invention is different with the traditional fabrication method, slit chip of the present invention is that to utilize crystal face be the anisotropic etch of silicon substrate in KOH solution of (100), crystal face (100) reaches 400:1 with the corrosion rate ratio of crystal face (111), angle reaches 54.74 °, when corrosion process from the silicon substrate two sides simultaneously, substrate etching can be worn, the formation angle is 109.48 ° a cutting edge, and two parallel cutting edges form slits.

(3) by changing the slit that the mask exposure size can make different size, but autonomous Design, the slit degree of accuracy height of making, stability is strong, and is not fragile.

(4) slit chip servicing unit utilizes the PMMA polymer sheet to fix, install or regulate the slit chip among the present invention, makes simple possible, destroys little to slit.

(5) slit arrangement can be made according to actual needs among the present invention, and volume is little, assembling is simple, is convenient to the microminiaturization of optical detecting instrument.

Description of drawings

Fig. 1: slit arrangement and block diagram thereof

(1) contains the front elevational schematic of the slit chip of slit

(2) contain the schematic side view of the slit chip of slit

(3) front elevational schematic of slit chip servicing unit individual layer

(4) schematic side view of slit chip servicing unit individual layer

(5) front elevational schematic of slit arrangement

(6) schematic side view of slit arrangement

Fig. 2: making flow process one synoptic diagram of slit chip

(1) is the side view of chip in making flow process among the figure, and (2) are the front elevation of chip in making flow process

(a) and (b), (c), (d), (e), (f) and (g) be processing step are specially:

(a)-cleaning (100) silicon substrate (b)-two-sided oxidation of silicon chip

(c)-the positive photoetching (d) of silicon chip-photoresist protection frontside oxide layer perforate down

(e)-the silicon chip back side is aimed at, photoetching (f)-photoresist protection back side oxide layer perforate down

(g)-at the KOH solution corrosion, wear until corrosion

Fig. 3: making flow process two synoptic diagram of slit chip

(1) is the side view of chip in making flow process among the figure, and (2) are the front elevation of chip in making flow process

(a) and (b), (c), (d), (e), (f) and (g) be processing step are specially:

(a)-cleaning (100) silicon substrate (b)-two-sided oxidation of silicon chip

(c)-silicon chip positive photoetching (d)-aim at by the silicon chip back side, photoetching

(e)-and photoresist protection two-sided oxide layer perforate (f) down-at the KOH solution corrosion, wear until corrosion

1-slit chip, 2-slit

Hollow space on 3-slit chip servicing unit, 4-slit chip servicing unit

Bolt position on 5-slit chip servicing unit upper groove, 6-slit chip servicing unit

7-slit arrangement, 8-mask I

9-mask II 10-(100) silicon chip

11-monox, 12-positive photoresist

The monox of 13-perforate

Embodiment

Comprise three parts by following embodiment further to illustrate slit arrangement provided by the present invention and method for making:

1, slit arrangement agent structure---the global design of slit chip;

2, slit arrangement agent structure---the manufacture craft of slit chip;

3, the assembling of slit arrangement.

The embodiment width is respectively the making of 100 μ m, 150 μ m and 200 μ m slit arrangements

Consider following a plurality of parameters when designing this slit arrangement: the size of the adjusting of slit substructure height, the peripheral profile further groove size of slit and angle Selection, slit opening, mask bore size, slit die size, pros and cons photoetching alignment mark size or the like.The figure that designs is made mask I and II respectively, will be respectively applied for the photoetching of silicon chip front and back.100 μ m * 2000 μ m, 150 μ m * 2000 μ m and 200 μ m * 2000 μ m slit chip designs are produced at a slice silicon chip (crystal face is that (100), thickness are 450 μ m) and one-time process flow process, can calculate the mask bore size according to (L+T * ctg (θ)) * (W+T * ctg (θ)) and be respectively 420 μ m * 2320 μ m, 470 μ m * 2320 μ m and 520 μ m * 2320 μ m, single slit die size is 1cm * 1cm.Concrete manufacture craft comprises the following steps:

At first, make slit arrangement agent structure---slit chip, two kinds of methods arranged,

First method, as shown in Figure 2:

(1) base treatment: 4 inches silicon chips are pressed the semiconductor fabrication standard technology and are cleaned baking before the back, as Fig. 2 (a) as substrate;

(2) put into oxidation furnace and carry out surface oxidation, oxidated layer thickness is about 2 μ m, as Fig. 2 (b);

(3) get rid of in the silicon chip front after the oxidation and be coated with positive photoresist, 110 ℃ of hot plate baking ovens baking 1min utilize the mask I that makes to expose, as Fig. 2 (c);

(4) develop and behind post bake 1min on 120 ℃ of hot plates, silicon chip backsizing protection oxide layer, 120 ℃ of baking ovens are post bake 25min again, and (proportioning is the HF:NH of 3ml:6g:9ml with silica erosion liquid₄F:H₂The corrosive liquid of O) removes the monox that exposes, as Fig. 2 (d);

(5) back side silicon chip gets rid of resist coating, and 110 ℃ of hot plate baking oven baking 1min utilize the mask II that makes to carry out back side aligning and exposure, as Fig. 2 (e);

(6) develop and behind post bake 1min on 120 ℃ of hot plates, silicon chip front gluing protection oxide layer, 120 ℃ of baking ovens are post bake 25min again, and (proportioning is the HF:NH of 3ml:6g:9ml with silica erosion liquid₄F:H₂The corrosive liquid of O) removes the monox that exposes, as Fig. 2 (f)

(7) silicon chip that the oxide layer perforate is good is put into 50 ℃ KOH corrosive liquid (mass content is 40%) and is carried out etch stop, is corroded up to silicon chip and wears, as Fig. 2 (g);

Second method, as shown in Figure 3:

(8) base treatment: 4 inches silicon chips are pressed the semiconductor fabrication standard technology and are cleaned baking before the back, as Fig. 3 (a) as substrate;

(9) put into oxidation furnace and carry out surface oxidation, oxidated layer thickness is about 2 μ m, as Fig. 3 (b);

(10) get rid of in the silicon chip front after the oxidation and be coated with positive photoresist, 110 ℃ of hot plate baking ovens baking 1min utilize the mask I that makes to expose, as Fig. 3 (c);

(11) develop and behind post bake 1min on 120 ℃ of hot plates, silicon chip backsizing protection oxide layer is utilized that the mask II that makes carries out that the back side is aimed at, exposure, is developed, and at 120 ℃ of baking oven post bake 25min, as Fig. 3 (d);

(12) (proportioning is the HF:NH of 3ml:6g:9ml with silica erosion liquid₄F:H₂The corrosive liquid of O) removes the monox that exposes, as Fig. 3 (e);

(13) silicon chip that the oxide layer perforate is good is put into 50 ℃ KOH corrosive liquid (mass content is 40%) and is carried out etch stop, is corroded up to silicon chip and wears, as Fig. 3 (f);

At last, utilize the milling on the polymkeric substance engraving machine of PMMA plate to produce slit chip servicing unit, its further groove size is 1cm * 1cm, the degree of depth is 0.2mm, and groove center 8mm * 8mm zone is emptied, and the slit chip is put into groove and just in time blocked, and slit can not stopped by recess edge, after like this two identical profiles all being blocked from slit chip both sides, the slit chip will be fixed, and slit arrangement has just been made like this.If it is arbitrarily angled that the groove of slit chip servicing unit changes along the center in manufacturing process, just can regulate the position of slit chip and satisfy the light path needs.

Claims (5)

1, a kind of method for making of slit arrangement is characterized in that the manufacturing process of described slit arrangement is divided into three big steps:

At first, with L-Edit layout design software design mask, wherein relate to the size of the number of design slit and distribution, slit width and length, slit chip; Its method is that the hypothesis silicon wafer thickness is T, carry out that the required slit sizes that obtains is L * W after the two-sided corrosion, L is a slit length, W is a slit width, calculate the oxide layer perforate according to the corrosion inclination angle [theta] earlier and be of a size of (L+T * ctg (θ)) * (W+T * ctg (θ)), the oxide layer bore size is exactly the size of design slit on the mask;

Second step was, it is 2 μ m that figure on the mask is transferred to oxidated layer thickness by photoresist photoetching, development, post bake process, crystal face is on the silicon chip front of (100), and get rid of resist coating at the silicon chip back side and protect oxide layer, utilize the silica erosion corrosion then, frontside oxide layer has just eroded away the figure before the slit shaping; Carry out same step at the silicon chip back side then, and carry out with the front etch pattern aim at, erode away equally slit be shaped before figure; Utilizing the quality percentage composition at last is that 40% KOH corrosive liquid carries out anisotropic etch under 50 ℃ of conditions, and corrosion is worn whole silicon wafer and just can be formed pre-designed slit; Perhaps, it is 2 μ m that figure on the mask is transferred to oxidated layer thickness by photoresist photoetching, development, post bake process, after crystal face is the front of (100) silicon chip, get rid of resist coating at the silicon chip back side and carry out back side aligning, photoetching, development, post bake process, it is graphical to utilize silica erosion liquid to carry out oxide layer then, and the tow sides oxide layer just forms figure before the slit moulding; At last, utilize the corrosion of KOH corrosive liquid to wear silicon chip equally and just can obtain slit;

At last, utilize the milling of polymeric material polymethylmethacrylate plate, cutting processing to make the groove that contains certain depth according to the design size of slit chip servicing unit, again the formation hollow structure is emptied at the center of plate, the slit chip is put into hollow structure, make the light path direct irradiation on the slit chip, and four jiaos of plate punchings so that the slit chip is gripped with screw.

2,, it is characterized in that the first method making step in second step is by the method for making of the described slit arrangement of claim 1:

1. base treatment: as substrate, press the semiconductor fabrication standard technology and clean baking before the back with silicon chip;

2. put into oxidation furnace and carry out surface oxidation, oxidated layer thickness is about 2 μ m;

3. get rid of in the silicon chip front after the oxidation and be coated with positive photoresist, 110 ℃ of hot plate baking ovens bakings 1 minute utilize the mask I that makes to expose;

4. develop and on 120 ℃ of hot plates post bake after 1 minute, silicon chip backsizing protection oxide layer, 120 ℃ of baking ovens are post bake 25 minutes again, the monox that exposes with the removal of silica erosion liquid;

5. back side silicon chip gets rid of resist coating, and 110 ℃ of hot plate baking ovens dried by the fire 1 minute, utilizes the mask II that makes to carry out back side aligning and exposure;

6. develop and on 120 ℃ of hot plates post bake after 1 minute, silicon chip front resist coating protection oxide layer, 120 ℃ of baking ovens are post bake 25 minutes again, the monox that exposes with the removal of silica erosion liquid;

7. the silicon chip after the oxide layer perforate is put into the quality percentage composition and be 40% 50 ℃ KOH corrosive liquid and carry out etch stop, be corroded up to silicon chip and wear.

3,, it is characterized in that the second method making step in second step is by the method for making of the described slit arrangement of claim 1:

1. base treatment: as substrate, press the semiconductor fabrication standard technology and clean baking before the back with silicon chip;

2. put into oxidation furnace and carry out surface oxidation, oxidated layer thickness is 2 μ m;

3. get rid of in the silicon chip front after the oxidation and be coated with positive photoresist, 110 ℃ of hot plate baking ovens bakings 1 minute utilize the mask I that makes to expose;

4. develop and on 120 ℃ of hot plates post bake after 1 minute, silicon chip back side resist coating protection oxide layer is utilized that the mask II that makes carries out that the back side is aimed at, exposure, is developed, and 120 ℃ of baking oven post bakes 25 minutes,

5. remove the monox that exposes with silica erosion liquid;

6. the silicon chip after the oxide layer perforate is put into the quality percentage composition and be 40% 50 ℃ KOH corrosive liquid and carry out etch stop, be corroded up to silicon chip and wear.

4, by the method for making of claim 1,2 or 3 described slit arrangements, it is characterized in that described silica erosion liquid is hydrofluorite: ammonium fluoride: water=3ml:6g:9ml.

5, by the method for making of the described slit arrangement of claim 1, it is characterized in that described L-Edit layout design software is L-Edit Win329.00.

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