CN100472829C - Semiconductor light emitting element and method for manufacturing the same - Google Patents

Abstract

The invention discloses a semiconductor light-emitting element, which comprises a semiconductor substrate and a multilayer epitaxial structure arranged on the semiconductor substrate. The semiconductor substrate has a predetermined crystal lattice direction perpendicular to the upper surface of the semiconductor substrate such that the upper surface of the semiconductor substrate has at least two crystal planes, wherein the predetermined crystal lattice direction includes an angle inclined from [100] toward [011] or [011], or from [100] toward [011] or [011 ]. The multilayer epitaxial structure is arranged on the semiconductor substrate and has the given crystal lattice direction vertical to the upper surface of the multilayer epitaxial structure, wherein the upper surface of the multilayer epitaxial structure is a roughened surface.

Description

Semiconductor light-emitting elements and manufacture method thereof

Technical field

The present invention relates to a kind of semiconductor light-emitting elements manufacturing technology, relate in particular to a kind of semiconductor light-emitting elements and manufacture method thereof that light takes out efficient (extraction efficiency) that promote.

Background technology

Semiconductor light-emitting elements now, for example (light-emitting diode, characteristic such as LED), light weight, size are little because of possessing, low power consumption adds that its luminous efficiency constantly promotes to light-emitting diode, has become one of valued light source in recent years.Light-emitting diode is a kind of light-emitting component that converts electric energy to luminous energy, and its structure is essentially semiconductor p-n diode, after p-n connects the face two ends and applies bias voltage and feed electric current, utilizes electronics luminous with combining of hole.In order to make light-emitting diode have higher reliability and lower energy resource consumption, must promote its luminous efficiency.

Generally speaking, the luminous efficiency of light-emitting diode is called the external quantum efficiency (externalquantum efficiency) of element again, for element internal quantum efficiency (intemal quantum efficiency) and light take out the product of efficient.So-called internal quantum is the electro-optical efficiency of element, and it depends on the material behavior and the quality of element.In addition, light takes out structure, light absorption and the refractive index that efficient then depends on element.Traditionally, utilize and improve the extension quality or change epitaxial structure, make electric energy be difficult for changing into heat energy, to improve internal quantum.Yet in order further to promote the luminous efficiency of light-emitting diode, the light of lift elements takes out efficient just becomes another important consideration.

Past has the people to advise element-external shape alligatoring (roughing) is beneficial to reflection of light and scattering, and then the light of lift elements taking-up efficient, for example makes the element surface alligatoring with natural photoetching (natural lithography).This technology is to utilize the polystyrene of random alignment (polystyrene) spheroid as mask, carries out the ion beam milling (ion beam etching) of element surface.But aforesaid way causes luminescent layer (active layer) crystal structure that the element surface alligatoring is inhomogeneous or infringement is inner easily, reduces the optical output power of element.Another kind of mode is for carrying out the surface coarsening of element with known wet etch techniques, this technology is not pass through the growth of carrying out the light-emitting component epitaxial loayer on the substrate of special crystal face selection, at element surface with metal as mask, select suitable etching solvent (etchant) to carry out the element surface etching.Yet because wet etching is isotropic etching (isotropic etching), it laterally and etch-rate is roughly the same longitudinally.Therefore etching solvent not only can also have horizontal etch effect vertically carrying out etching when the etching epitaxial loayer, makes the mask figure can't effectively be transferred to the light-emitting component surface, and influences the surface coarsening degree.In addition, ion beam milling and wet etching all need the step of one formation mask, and be also comparatively complicated on technology.

Yet the light that the coarsening rate of element surface is proportional to element takes out efficient, therefore is necessary to seek a kind of manufacture method of new semiconductor light-emitting elements, and increasing the element surface coarsening rate, and then the light of lift elements takes out efficient.

Summary of the invention

In view of this, the object of the present invention is to provide a kind of semiconductor light-emitting elements and preparation method thereof, utilize epitaxial loayer different etch-rate characteristics to be arranged at different crystal faces, and set lattice direction growth epitaxial loayer and etching it, forming the epitaxial loayer that the surface has preferable coarsening rate and rule and stable alligatoring pattern, and then the light that promotes semiconductor light-emitting elements takes out efficient.

According to above-mentioned purpose, the invention provides a kind of semiconductor light-emitting elements, it comprises semiconductor substrate and setting multilayer epitaxial structure thereon.Semiconductor substrate has the set lattice direction vertical with its upper surface, wherein this set lattice direction comprise with III-family atom for its unit cell (unit cell) (0,0,0) position is an initial point, the angle that tilts towards [011] or [011] towards angle or oneself [100] of [011] or [011] inclination from [100], make the upper surface of semiconductor substrate have at least two kinds of crystal faces, and the crystal plane direction difference of this two crystal face.Therefore also set therewith lattice direction is vertical for the upper surface of the multilayer epitaxial structure on this semiconductor substrate of growing up, and wherein the upper surface of multilayer epitaxial structure is the surface through alligatoring.

Again according to above-mentioned purpose, the invention provides a kind of manufacture method of semiconductor light-emitting elements: provide semiconductor substrate, it has the set lattice direction of the upper surface of vertical semiconductor substrate, wherein this set lattice direction comprises the angle towards [011] or [011] inclination from [100], or the angle that tilts towards [011] or [011] from [100], make the upper surface of semiconductor substrate have at least two kinds of crystal faces, and the crystal plane direction difference of this two crystal face, on semiconductor substrate, form the multilayer epitaxial structure, by being etched with the multilayer epitaxial structure upper surface on the alligatoring semiconductor substrate.

Description of drawings

Figure 1A to Figure 1B shows the semiconductor light-emitting elements manufacture method generalized section according to the embodiment of the invention.

Fig. 1 C shows the enlarged drawing of multilayer epitaxial structure upper surface.

Fig. 1 D is a multilayer epitaxial structure upper surface SEM top view.

Fig. 2 shows the local amplification profile schematic diagram at the semiconductor-based end among Figure 1A and Figure 1B.

Fig. 3 A and 3B show the local crystal face schematic diagram of cubic crystal structure respectively.

Description of reference numerals

100～semiconductor substrate;

101～multilayer epitaxial structure;

102～n type semiconductor layer;

104～luminescent layer;

106～p type semiconductor layer;

108～etching;

110～top electrode;

112～bottom electrode;

D～alligatoring the degree of depth;

S1～upper surface of substrate of semiconductor;

The upper surface of S2, S3～multilayer epitaxial structure;

[abc]～set lattice direction.

Embodiment

Please refer to Figure 1B, it shows the semiconductor light-emitting elements generalized section according to the embodiment of the invention.Semiconductor light-emitting elements, for example light-emitting diode (LED) comprising:semiconductor substrate 100, multilayerepitaxial structure 101 and upper/lower electrode 110 and 112.In the present embodiment,semiconductor substrate 100 is for follow-up formation multilayerepitaxial structure 101 usefulness, and its material comprises III-V family semi-conducting material, for example: arsenic phosphide gallium (GaAsP), GaAs (GaAs), gallium phosphide (GaP) or other materials similar.Multilayerepitaxial structure 101 is arranged on thesemiconductor substrate 100, and it comprises: ntype semiconductor layer 102, ptype semiconductor layer 106 and the active layer betweensemiconductor layer 102 and 106 (active layer) 104.In other embodiments, ntype semiconductor layer 102 can be exchanged with the position configuration of p type semiconductor layer 106.That is ptype semiconductor layer 106 is positioned at the bottom of multilayerepitaxial structure 101 and ntype semiconductor layer 102 is positioned at the top layer of multilayer epitaxial structure 101.In the present embodiment, ntype semiconductor layer 102 and the coating (cladding layer) of ptype semiconductor layer 106 as LED, its material comprises III-V family semi-conducting material, for example: AlGaInP (AlGaInP), aluminum gallium arsenide (AlGaAs) or other known ternarys or quaternary III-V family semi-conducting material.The material ofactive layer 104 can be [Al_xGa_1-x]_0.5In_0.5P or other can mate the material that uses with ntype semiconductor layer 102 and p type semiconductor layer 106.Upper/lower electrode 110 and 112 is arranged at the upper surface S3 of multilayerepitaxial structure 101 and the lower surface ofsemiconductor substrate 100 respectively.

Please especially with reference to Fig. 2, it shows the local amplification profile schematic diagram ofsemiconductor substrate 100 among Figure 1A and Figure 1B.Semiconductor substrate 100 has set lattice direction [abc], in fact perpendicular to the upper surface S1 ofsemiconductor substrate 100, make the upper surface S1 ofsemiconductor substrate 100 expose at least two kinds of crystal faces, for example (100) reach (001) crystal face, and present uneven rough surface.In the present embodiment, set lattice direction [abc] is the angle that tilts towards [011] or [011] from [100], and wherein the angle of inclination is in the scopes of 6 to 55 degree, and preferable angle of inclination is 15 degree.In other embodiments, set lattice direction [abc] also can be the angle towards [011] or [011] inclination from [100].Similarly, the angle of inclination is in the scope of 6 to 55 degree, and preferable angle of inclination is 15 degree.

Please be simultaneously especially with reference to Figure 1B, it is vertical with the upper surface S3 of multilayerepitaxial structure 101 that multilayerepitaxial structure 101 has set lattice direction [abc] equally, makes the upper surface S3 of multilayerepitaxial structure 101 and the upper surface S1 ofsemiconductor substrate 100 have roughly the same surface topography (topography).Be noted that coarsening rate that the upper surface S3 of multilayerepitaxial structure 101 the presented upper surface S1 greater thansemiconductor substrate 100, it will illustrate after a while in this paper.

The semiconductor light-emitting elements manufacture method that below cooperates Figure 1A to 1B explanation embodiment of the invention.At first, please refer to Figure 1A,semiconductor substrate 100 is provided, it has the set lattice direction [abc] perpendicular to the upper surface S1 ofsemiconductor substrate 100, make the upper surface S1 ofsemiconductor substrate 100 have at least two kinds of crystal faces, for example (100) reach (001) crystal face, and present uneven rough surface, as shown in Figure 2.Then, please refer to Fig. 3 A, it shows the local crystal face schematic diagram of cubic crystal structure.In the present embodiment, the set lattice direction [abc] ofsemiconductor substrate 100 be [100] towards [011] or for [100] towards [011] tilt angle theta, wherein tilt angle theta 6 to 55 the degree scopes, and preferable tilt angle theta be 15 the degree, shown in dotted line arrow among the figure.In order to help that set lattice direction [abc] is described, indicate crystal face and the crystal orientation relevant among Fig. 3 A with set lattice direction [abc].

Then, please refer to Fig. 3 B, it shows the local crystal face schematic diagram of cubic crystal structure.In other embodiments, the set lattice direction [abc] ofsemiconductor substrate 100 be [100] towards [011] or [011] tilt angle theta, wherein tilt angle theta 6 to 55 the degree scopes, and preferable tilt angle theta be 15 the degree, shown in dotted line arrow among the figure.Equally, in order to help that set lattice direction [abc] is described, indicate crystal face and the crystal orientation relevant among Fig. 3 B with set lattice direction [abc].

Semiconductor substrate 100 is for follow-up formation multilayerepitaxial structure 101 usefulness, and its material comprises III-V family semi-conducting material, for example: arsenic phosphide gallium (GaAsP), GaAs (GaAs), gallium phosphide (GaP) or other similar materials.

Then, onsemiconductor substrate 100, form multilayer epitaxial structure 101.Because multilayerepitaxial structure 101 utilizessemiconductor substrate 100 extensions with set lattice direction [abc] to form, multilayerepitaxial structure 101 has the set lattice direction [abc] perpendicular to its upper surface S2 equally.That is the upper surface S2 of multilayerepitaxial structure 101 has identical substantially surface topography with the upper surface S1 of semiconductor substrate 100.In the present embodiment, can form multilayerepitaxial structure 101 by known epitaxy technology, for example: liquid phase epitaxial method (LPE), organic metal vapour phase epitaxy method (MOVPE) or other industrial known epitaxy technology.

Multilayerepitaxial structure 101 comprises: ntype semiconductor layer 102, ptype semiconductor layer 106 and the active layer betweensemiconductor layer 102 and 106 (active layer) 104.In other embodiments, ptype semiconductor layer 106 can be positioned at the bottom of multilayerepitaxial structure 101 and ntype semiconductor layer 102 can be positioned at the top layer of multilayer epitaxial structure 101.In the present embodiment, ntype semiconductor layer 102 comprises III-V family semi-conducting material with the material of ptype semiconductor layer 106, for example: AlGaInP (AlGaInP), aluminum gallium arsenide (AlGaAs) or other known ternarys or quaternary III-V family semi-conducting material.The material ofluminescent layer 104 can be [Al_xGa_1-x]_0.5In_0.5P or other can mate the material that uses with ntype semiconductor layer 102 and ptype semiconductor layer 106.

Next, by etching 108, for example dry ecthing or wet etching are with the upper surface S2 of the multilayerepitaxial structure 101 on the alligatoring semiconductor substrate 100.For example, the upper surface S2 of multilayerepitaxial structure 101 is carried out wet etching, this wet etching is with HCl and H₃PO₄As etching solution and continued to carry out about 20 seconds.Please refer to Fig. 1 D, it shows sweep electron microscope (the Scanning Electron Microscope of multilayerepitaxial structure 101 upper surfaces, SEM) top view, because the upper surface S2 of multilayerepitaxial structure 101 has at least two kinds of different crystal faces, for example (100) reach (001) crystal face.These two kinds of different crystal plane structure do not need to add in addition mask and can carry out etching as the mask of self.By the difference of etching solution to (100) and (001) crystal face etch-rate, after process etching 108, multilayerepitaxial structure 101 can present the upper surface S3 with the roughly the same pattern of upper surface S1 of original upper surface S2 andsemiconductor substrate 100, but its coarsening rate is greater than the original upper surface S2 and the upper surface S1 of semiconductor substrate 100.Please refer to Fig. 1 C, it shows the enlarged drawing of multilayerepitaxial structure 101 upper surface S3.In the present embodiment, the alligatoring depth d of the alligatoring upper surface S3 of multilayerepitaxial structure 101 is not less than 0.05 micron (μ m), and preferable alligatoring depth bounds is between 0.05 to 1 micron.

At last, form upper/lower electrode 110 and 112 with processes well known respectively at the upper surface S3 of multilayerepitaxial structure 101 and the lower surface of semiconductor substrate 100.Be noted that upper/lower electrode 110 and 112 can change its position configuration according to the element design difference among Figure 1B.

According to semiconductor light-emitting elements of the present invention, because multilayerepitaxial structure 101 is by at set lattice direction growth epitaxial loayer and carry out etching and form, therefore can form the multilayer epitaxial structure that the surface has preferable coarsening rate and rule and stable alligatoring pattern, take out efficient with the light that promotes semiconductor light-emitting elements, and then promote the luminous efficiency of semiconductor light-emitting elements.

Though the present invention is illustrated in by each embodiment, yet described embodiment is not in order to limit the scope of the invention.For various modifications and the change that the present invention did, neither spirit of the present invention and the scope of taking off.

Claims (27)

Translated fromChinese

1.一种半导体发光元件，包括：1. A semiconductor light emitting element, comprising:半导体基板，具有上表面，且具有垂直于该上表面的既定晶格方向，其中该既定晶格方向包含自[100]朝向[011]、[100]朝向[011]、[100]朝向[011]或[100]朝向[011]倾斜的角度，使该上表面包含至少二晶面，且此二晶面的晶面方向不同；以及A semiconductor substrate having an upper surface and a predetermined lattice direction perpendicular to the upper surface, wherein the predetermined lattice direction includes from [100] toward [011], [100] toward [011], and [100] toward [011] ] or [100] tilted towards [011], so that the upper surface includes at least two crystal planes, and the crystal plane directions of the two crystal planes are different; and多层外延结构，设置于该半导体基板上，其中该多层外延结构具有上表面，该上表面为粗化表面且与该既定晶格方向垂直。The multi-layer epitaxial structure is disposed on the semiconductor substrate, wherein the multi-layer epitaxial structure has an upper surface, the upper surface is a roughened surface and is perpendicular to the predetermined lattice direction.2.如权利要求1所述的半导体发光元件，其中该多层外延结构包括：n型半导体层、p型半导体层、以及介于所述n型半导体层和p型半导体层之间的有源层。2. The semiconductor light-emitting element according to claim 1, wherein the multilayer epitaxial structure comprises: an n-type semiconductor layer, a p-type semiconductor layer, and an active layer between the n-type semiconductor layer and the p-type semiconductor layer. layer.3.如权利要求2所述的半导体发光元件，其中该n型或p型半导体层包括III-V族半导体材料。3. The semiconductor light emitting device according to claim 2, wherein the n-type or p-type semiconductor layer comprises III-V semiconductor materials.4.如权利要求3所述的半导体发光元件，其中该n型或p型半导体层包括磷化铝镓铟或砷化铝镓。4. The semiconductor light emitting device as claimed in claim 3, wherein the n-type or p-type semiconductor layer comprises AlGaInP or AlGaAs.5.如权利要求1所述的半导体发光元件，其中该半导体基板包括III-V族半导体材料。5. The semiconductor light emitting device according to claim 1, wherein the semiconductor substrate comprises III-V semiconductor materials.6.如权利要求5所述的半导体发光元件，其中该半导体基板包括磷化砷镓、砷化镓或磷化镓。6. The semiconductor light emitting device as claimed in claim 5, wherein the semiconductor substrate comprises gallium arsenide phosphide, gallium arsenide or gallium phosphide.7.如权利要求1所述的半导体发光元件，其中该倾斜角度在6至55度的范围。7. The semiconductor light emitting device as claimed in claim 1, wherein the tilt angle is in the range of 6 to 55 degrees.8.如权利要求7所述的半导体发光元件，其中该倾斜角度为15度。8. The semiconductor light emitting device as claimed in claim 7, wherein the tilt angle is 15 degrees.9.如权利要求1所述的半导体发光元件，其中该多层外延结构的粗化上表面的粗化深度不小于0.05微米。9. The semiconductor light-emitting device according to claim 1, wherein the roughened upper surface of the multilayer epitaxial structure has a roughened depth of not less than 0.05 microns.10.如权利要求1所述的半导体发光元件，其中该多层外延结构的粗化上表面的粗化深度范围为0.05至1微米之间。10. The semiconductor light emitting device as claimed in claim 1, wherein the roughened upper surface of the multi-layer epitaxial structure has a roughened depth ranging from 0.05 to 1 micron.11.如权利要求1所述的半导体发光元件，其中该多层外延结构的上表面与该半导体基板的上表面具有相同的表面形貌。11. The semiconductor light-emitting device according to claim 1, wherein the upper surface of the multilayer epitaxial structure has the same topography as the upper surface of the semiconductor substrate.12.如权利要求1所述的半导体发光元件，其中该晶格方向以III-族原子为其单位晶胞的(0，0，0)位置为原点。12. The semiconductor light-emitting device according to claim 1, wherein the crystal lattice direction takes (0, 0, 0) position of the III-group atom as the unit cell as the origin.13.一种半导体发光元件的制造方法，包括：13. A method for manufacturing a semiconductor light emitting element, comprising:提供半导体基板，其具有垂直该半导体基板的上表面的既定晶格方向，其中该既定晶格方向包含自[100]朝向[011]、[100]朝向[011]、[100]朝向[011]、或[100]朝向[011]倾斜的角度，使该半导体基板的上表面具有至少两种晶面，且此二晶面的晶面方向不同；Provide a semiconductor substrate, which has a predetermined lattice direction perpendicular to the upper surface of the semiconductor substrate, wherein the predetermined lattice direction includes from [100] toward [011], [100] toward [011], [100] toward [011] , or [100] is inclined towards [011], so that the upper surface of the semiconductor substrate has at least two crystal planes, and the crystal plane directions of the two crystal planes are different;在该半导体基板上形成多层外延结构；以及forming a multilayer epitaxial structure on the semiconductor substrate; and进行蚀刻以粗化该半导体基板上的该多层外延结构的上表面。Etching is performed to roughen the upper surface of the multilayer epitaxial structure on the semiconductor substrate.14.如权利要求13所述的半导体发光元件的制造方法，其中该多层外延结构包括：n型半导体层、p型半导体层、以及介于所述n型半导体层和p型半导体层之间的有源层。14. The method for manufacturing a semiconductor light-emitting element as claimed in claim 13, wherein the multilayer epitaxial structure comprises: an n-type semiconductor layer, a p-type semiconductor layer, and an active layer.15.如权利要求14所述的半导体发光元件的制造方法，其中该n型或p型半导体层包括III-V族半导体材料。15. The method for manufacturing a semiconductor light-emitting device according to claim 14, wherein the n-type or p-type semiconductor layer comprises III-V semiconductor materials.16.如权利要求15所述的半导体发光元件的制造方法，其中该n型或p型半导体层包括磷化铝镓铟或砷化铝镓。16. The method for manufacturing a semiconductor light-emitting device according to claim 15, wherein the n-type or p-type semiconductor layer comprises AlGaInP or AlGaAs.17.如权利要求12所述的半导体发光元件的制造方法，其中该半导体基板包括III-V族半导体材料。17. The method of manufacturing a semiconductor light-emitting device according to claim 12, wherein the semiconductor substrate comprises III-V semiconductor materials.18.如权利要求17所述的半导体发光元件的制造方法，其中该半导体基板包括磷化砷镓、砷化镓或磷化镓。18. The method for manufacturing a semiconductor light-emitting device as claimed in claim 17, wherein the semiconductor substrate comprises gallium arsenic phosphide, gallium arsenide or gallium phosphide.19.如权利要求13所述的半导体发光元件的制造方法，其中该晶格方向以III-族原子为其单位晶胞的(0，0，0)位置为原点。19. The method for manufacturing a semiconductor light-emitting device according to claim 13, wherein the crystal lattice direction takes (0, 0, 0) position of the III-group atom as the unit cell as the origin.20.如权利要求13所述的半导体发光元件的制造方法，其中该倾斜角度在6至55度的范围。20. The method of manufacturing a semiconductor light emitting device as claimed in claim 13, wherein the tilt angle is in the range of 6 to 55 degrees.21.如权利要求20所述的半导体发光元件的制造方法，其中该倾斜角度为15度。21. The method for manufacturing a semiconductor light emitting device as claimed in claim 20, wherein the tilt angle is 15 degrees.22.如权利要求13所述的半导体发光元件的制造方法，其中该多层外延结构的上表面与该半导体基板的上表面具有相同的表面形貌。22. The method for manufacturing a semiconductor light-emitting element according to claim 13, wherein the upper surface of the multilayer epitaxial structure has the same surface topography as the upper surface of the semiconductor substrate.23.如权利要求13所述的半导体发光元件的制造方法，其中该多层外延结构的上表面粗化深度不小于0.05微米。23. The method for manufacturing a semiconductor light-emitting element according to claim 13, wherein the roughening depth of the upper surface of the multilayer epitaxial structure is not less than 0.05 microns.24.如权利要求13所述的半导体发光元件的制造方法，其中该多层外延结构的上表面粗化深度范围为0.05至1微米之间。24. The method for manufacturing a semiconductor light-emitting device as claimed in claim 13, wherein the roughening depth of the upper surface of the multi-layer epitaxial structure ranges from 0.05 to 1 micron.25.如权利要求13所述的半导体发光元件的制造方法，其中该蚀刻包括使用HCl及H₃PO₄作为蚀刻溶液的湿蚀刻。25. The method of manufacturing a semiconductor light emitting device according to claim 13, wherein the etching comprises wet etching using HCl and_H3PO4 as an etching solution_.26.如权利要求25所述的半导体发光元件的制造方法，其中该蚀刻进行20秒。26. The method of manufacturing a semiconductor light emitting device as claimed in claim 25, wherein the etching is performed for 20 seconds.27.如权利要求13所述的半导体发光元件的制造方法，其中该蚀刻包括干蚀刻。27. The method of manufacturing a semiconductor light emitting device as claimed in claim 13, wherein the etching comprises dry etching.

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