CN100361188C - Method and system for verifying driving waveform of liquid crystal display (LCD) - Google Patents

Abstract

A method for verifying driving waveforms of a Liquid Crystal Display (LCD), in particular a twisted line type LCD (TN LCD) and a super twisted line type LCD (STNLCD), comprises the following steps: firstly, a prototype (prototype) circuit of an LCD driver is manufactured, and a driving waveform signal is output; then, reading the driving waveform signals and calculating the DC bias voltage value of each display pixel; finally, the DC bias voltage value is checked to verify whether the driving waveform signals are correct. Therefore, at the beginning of designing driver prototype circuit, if the LCD driving waveform is detected to have non-preset DC bias value, the circuit design of LCD driver can be immediately corrected to achieve the purpose of verification.

Description

The verification method and the system thereof of the drive waveforms of LCD (LCD)

Technical field

The invention relates to a kind of verification method and system thereof, and particularly relevant for the verification method and the system thereof of the drive waveforms of a kind of TN LCD and STN LCD.

Background technology

LCD (Liquid Crystal Display, LCD) can be divided into passive type according to the mode that drives and drive (Passive Matrix Liquid Crystal Display, PM LCD) with two kinds of active driving (Active Matrix Liquid Crystal Display, AM LCD).Common line style (the Twisted Nematic that reverses, TN) reach super line style (the Super TwistedNematic that reverses, STN) LCD, be passive type and drive LCD, the mode of its driving is the electrode array of making strip (striped) respectively on two glass substrates up and down, comprise two kinds of scan electrode (scanning electrodes) and data electrodes (data electrodes), utilize above-mentioned scan electrode and data electrode to form the driving voltage of liquid crystal, be used for changing the angle of inclination of liquid crystal molecule, and then change the penetration of light.The signal that general STN LCD drive IC is received scan electrode is called the COM signal, and the signal of receiving data electrode is called the SEG signal.It is Alt-Preshko Technique (APT) method and improved APT (ImprovedAlt-Preshko, IAPT) method that was proposed in IEEE Trans. paper in 1974 by PaulM.Alt and Peter Pleshko two people that general STN LCD multichannel commonly used drives (multiplexing) mode.

Because the polarity of liquid crystal drive voltage needs constantly conversion to eliminate quiescent voltage, otherwise it will cause image ossify (Image sticking) and image flicker (picture flicker), reduce and show image quality, even cause the liquid crystal material electrochemical reaction that can't reply, form the permanent damage of liquid crystal and make inferiorization of function.Earlier T N LCD uses category-A horizontal scanning modulation drive waveforms more, each sweep trace of its polarity can change once, so claim line inversion drive waveforms again, the then many uses of STN LCD have been arrived than power saving category-B drive waveforms, each picture frame of its polarity can change once, so claim frame inversion drive waveforms again, afterwards again because the increase of screen resolution, for promoting the screen image quality, reduce cross-talk (crosstalk) phenomenon of picture, more develop many horizontal scanning modulation drive waveforms of the C class that between category-A and category-B, the every N bar of its polarity sweep trace can change once, so claim N-line inversion drive waveforms again.

For in response to the demand of the mankind to color, liquid crystal display reaches the purpose of colorize by colored filter, and for the requirement of multicolourization promptly must be more than the liquid crystal penetrability the few light and shade of distinguishing each color.Generally the voltage of our citation and the relation of penetrability can be understood, and different penetrabilitys must be provided by different voltage, so chip for driving must be come the various GTG of modulation (grayscale) by some distinct methods.Common method has pulse width modulation method (Pulse Width Modulation, PWM), pulse height modulation method (AmplitudeModulation, AM or Pulse Height Modulation, PHM), reach picture frame modulation method (Frame Modulation, FM or Frame Rate Control, or the using with of this several modulating methods FRC).

In order further to reduce the power consumption of LCD, the LCD drive waveforms that belongs to the High-Frequency Amplitude Selection (Hi-FAS) of APT type of drive also is suggested, utilize the COM voltage of signals that improves less switching (toggle), reduce the normal SEG voltage of signals of switching, reach the effect of power saving.Owing to use the low pressure assembly,, also just can reach the purpose of saving the IC cost again because the low pressure assembly can make the IC area effectively diminish at the more SEG of line number signal.

When using sweep trace Continuous Selection mode (Line Successive Selection method, as APT or IAPT) when mode drives quick STN LCD, can produce a kind of picture frame response phenomenon (Frame Response Phenomenon) that is called, for solving this phenomenon, the new drive waveforms that the Optrex of Japan and one of Asahi Glass company cooperative development are called multiple wire system addressing type of drive (multiple line addressing method) or multi-thread selecting type type of drive (multipleline selection method), please refer to TaiWan, China patent the 77765th, the 79637th patent, and the U.S. the 5262881st, No. 6346774 patent.

In addition, also have the many different distortion (variation) of various drive waveforms to be suggested, for example United States Patent (USP) the 5068649th proposes the FRC GTG modulating method of pseudo-random pattem, and United States Patent (USP) the 5313224th proposes to lower the FRC GTG modulating method of flicker (flicker) ... or the like.

Please refer to Fig. 1, it is the synoptic diagram of drive waveforms of STN LCD of the IAPT of traditional monochromatic category-B figure frame modulation.Positive-negative polarity between picture frame signal (frame signal) two glass substrates of 110 may command (not illustrating), and common drive wire (common line) COM0～COM15 does to drive selection with a pulse voltage according to sequential (timing).For example, in apicture frame signal 110 required cycle length among the T, 16 common drive wire COM0～COM15 are driven by a pulse signal respectively in regular turn, and the assigned pulse signal duration of each common drive wire COM0～COM15 is 1/16T.In addition, byte drive wire (segment line) SEG0～SEG4 is the usefulness as the input video data, and be to send video data in the middle of the time to, so that can corresponding with the pulse signal of common drive wire COM0～COM15 synthetic (synthesize) be the LCD display drive signals in the sequential of specific common drive wire COM0～COM15 in good time.For example, in each display pixel (pixel) 120, its drive waveforms signal is that the voltage SEGy (t) by the voltage COMx (t) of the common drive wire of X and Y byte drive wire subtracts each other the synthetic result of gained afterwards, be Vxy (t)=COMx (t)-SEGy (t), wherein x for example is 0～15 positive integer, and y for example is 0～4 positive integer.For examplepixel p ixel 130 drive waveforms signals are to subtract each other the synthetic result of gained, i.e. V afterwards by the voltage COM0 (t) of the 0th common drive wire and the voltage SEG0 (t) of the 0th byte drive wire_0,0(t)=and COM0 (t)-SEG0 (t), shown involtage waveform 131, be the waveform of an OFF.Andpixel p ixel 140 drive waveforms signals are to subtract each other the synthetic result of gained afterwards, i.e. V by the voltage COM0 (t) of the 0th common drive wire and the voltage SEG1 (t) of the 1st byte drive wire_0,1(t)=and COM0 (t)-SEG1 (t), shown involtage waveform 141, be the waveform of an ON.

Because the transmittance of thedisplay pixel 120 of LCD is decided by the driving voltage root-mean-square value that applied on its electrode, but not driving voltage value, so can present the GTG display effect of color shade performance on the LCD panel in response to different driving voltage root-mean-square values.In Fig. 1, the LCD type of drive that tradition is monochromatic, though have a specific voltage between the COM0-SEG0, but still can't reach the rms voltage of liquid crystal transition, sopixel 130 presents the OFF state, yet the voltage between the COM0-SEG1 can reach the required rms voltage of liquid crystal transition, sopixel 140 presents the ON state.

Then, please refer to Fig. 2, it is the output chart of the STN lcd drive voltage of Fig. 1.When the output kenel of eachdisplay pixel 120 of planning, because it has certain rules, so the IC deviser can be easy to infer the data presented of answering on the LCD from the drive waveforms of Fig. 1 and the chart of Fig. 2 basically.But the development of STN LCD in recent years, from the monochrome to the GTG, to colored, many functions are injected towards in the STN lcd driver, for example the GTG modulation tech just has (1) picture frame frequency control method (Frame Modulation, FM or Frame Rate Control method, FRC) (2) pulse wave width modulation method (Pulse WidthModulation method, PWM) (3) pulse wave amplitude modulation method (AmplitudeModulation method, AM or Pulse Height Modulation method PHM) wait three kinds.The polar regulation of eliminating quiescent voltage has three kinds of category-A, category-B, C classes etc., and STN lcd driver deviser is many usually checks its dc bias value in visual mode.Yet,, all can make the STNLCD drive waveforms become complicated no matter be the modulating method of GTG or the modulating method of eliminating quiescent voltage.In addition, if add High-Frequency AmplitudeSelection (Hi-FAS) or multiple wire system addressing type of drive (MLA), multi-thread selecting type type of drive (MLS), pseudo-random pattern, reduce methods such as flicker and crosstalk, say nothing of and add the new function that screen rotates (scroll), the processing of part demonstration pictures such as (partial display), STN LCD drive waveforms will become more complicated so.

General industry is being made an integrated circuit (IC) before, and whether circuit and this circuit of emulation of this IC of design accord with the requirement of specification in order to the circuit design of checking IC earlier.But owing to utilize simulation software (as Verilog) to come artificial circuit, expend time in very much, also be not easy to verify complete, therefore many use FPGA in addition or CPLD make prototype (prototype) circuit of this IC, and test this circuit with a system or software, so can utilize near the mode of entity chip (real chip) and intend very (emulate) this circuit,, and improve the integrality of checking so as to the checking work of acceleration IC.And employed 65,536 looks of high-order mobile phone now, resolution is 132 * 132 colored STN LCD drive IC, has 132 common drive wires (COM), 132 * 3=396 byte drive wire (SEG).The modulation of adding color uses the GTG modulation of PWM and FRC, and a complete STN LCD drive waveforms like this uses the archives of the output waveform of Fig. 2 to have millions of characters.Therefore, tradition uses oscillograph or logic analyser (Logic Analyzer) to capture the output of STN lcd driver prototype (prototype) circuit, and utilize visual mode to check the method for waveform one by one to common drive wire and byte drive wire, no longer suitable, and in the face of the LCD drive waveforms of various complexity, how to check waveform with the verification method of simple mode, one size fits all, be emphasis of the present invention.

Summary of the invention

Therefore, purpose of the present invention is exactly in the verification method of the drive waveforms that a kind of LCD is provided and system thereof, and particularly TN LCD and STN LCD are to verify the drive waveforms of common drive wire and byte drive wire.

Another purpose of the present invention provides the verification method and the system thereof of the drive waveforms of a kind of LCD, goes for the polar regulation of various elimination quiescent voltages, as the horizontal scanning modulation of category-A, and the figure frame modulation of category-B, and many horizontal scanning modulations of C class.

Another object of the present invention provides the verification method and the system thereof of the drive waveforms of a kind of LCD, go for various GTG modulation principles, as pulse width modulation method (Pulse WidthModulation, PWM), pulse height modulation method (Amplitude Modulation, AM orPulse Height Modulation, PHM), and picture frame modulation method (Frame Rate Control, FRC), or even the using with of this several modulating methods.

A further object of the present invention provides the verification method and the system thereof of the drive waveforms of a kind of LCD, go for traditional sweep trace Continuous Selection mode (Line SuccessiveSelection method, as APT, IAPT and Hi-FAS) scan method, also be applicable to multi-scan-line (Multiple Line Selection, MLS or Multiple Line Addressing, scan method such as MLA).

A further object of the present invention provides the verification method and the system thereof of the drive waveforms of a kind of LCD, goes for the distortion (variation) of various driving methods, or even the method that still is not suggested as yet at present.

A further object of the present invention provides the verification method and the system thereof of the drive waveforms of a kind of LCD, made before not making lcd driver IC, the IC deviser just can utilize FPGA or CPLD to make the original shape circuit of a lcd driver earlier, and the dc bias value of calculating LCD drive waveforms, in order to the IC deviser the design at the beginning of can verify whether the LCD drive waveforms correct, rather than in the face of logic analyser (Logic Analyzer) grab the millions of character meters of a pile of getting off complexity the LCD drive waveforms and be at a loss.

For reaching above-mentioned purpose of the present invention, the present invention proposes the verification method of the drive waveforms of a kind of LCD, particularly be fit to reverse line style LCD (TN LCD) and the super verification method that reverses the drive waveforms of line style LCD (STN LCD), LCD has most display pixels, and these display pixels are driven by N common drive wire and M byte drive wire, N, M is the positive integer greater than 0, the verification method of the drive waveforms of this LCD comprises the following steps: at first, make original shape (prototype) circuit of a lcd driver, and export most LCD drive waveforms signals on those common drive wires and those byte drive wires; Utilize a capture device to read those LCD drive waveforms signals; Calculate the dc bias value of each display pixel; And the check dc bias value, whether correct to verify these drive waveforms signals.

For reaching above-mentioned purpose of the present invention, particularly be fit to reverse line style LCD (TNLCD) and the super verification method that reverses the drive waveforms of line style LCD (STN LCD), the present invention proposes the verification method of the drive waveforms of a kind of LCD, this LCD has most display pixels, and these display pixels are driven by N common drive wire and M byte drive wire, N, M is the positive integer greater than 0, the verification method of the drive waveforms of this LCD comprises the following steps: at first, make prototype (prototype) circuit of a lcd driver, and export most LCD drive waveforms signals on those common drive wires and those byte drive wires; Use a software to read each those LCD drive waveforms signal: the dc bias value that calculates each display pixel; And the check dc bias value, whether correct to verify these LCD drive waveforms signals.

For reaching above-mentioned purpose of the present invention, the present invention proposes the verification system of the drive waveforms of a kind of LCD (LCD), particularly reverse line style LCD (TN LCD) and the super verification system that reverses the drive waveforms of line style LCD (STN LCD), this LCD has most display pixels, and these display pixels are driven by N common drive wire and M byte drive wire, N, M is the positive integer greater than 0, and the verification system of the drive waveforms of this LCD comprises a lcd driver prototype circuit and a computer system.Wherein, the lcd driver prototype circuit is in order to export most LCD drive waveforms signals on those common drive wires and those byte drive wires; And computer system is connected in the lcd driver prototype circuit, in order to capturing each LCD drive waveforms signal, and calculates the dc bias value of each display pixel.

Described according to preferred embodiment of the present invention, (X, dc bias value Y) for example are the mean value of drive waveforms voltage of signals difference COMx (the t)-SEGy (t) of X common drive wire (COMx) and Y byte drive wire (SEGy) to above-mentioned display pixel$\underset{t=0}{\overset{T-1}{\mathrm{\Σ}}}(\mathrm{COMx}\left(t\right)-\mathrm{SEGy}\left(t\right))/T.$In addition, the dc bias value of X common drive wire (COMx) is the drive waveforms voltage of signals mean value of X common drive wire

And the dc bias value of Y byte drive wire (COMy) is the drive waveforms voltage of signals mean value of Y byte drive wire

Lcd driver prototype (prototype) circuit that the present invention can adopt a FPGA or CPLD to make, it can intend the LCD drive waveforms signal that true (emulate) actual lcd driver IC is exported, and in output LCD drive waveforms signal to a capture device or the software, with the dc bias value of the display pixel that calculates LCD, verify whether the LCD drive waveforms is correct.

For above and other objects of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below:

Description of drawings

Fig. 1 is the synoptic diagram of the drive waveforms of the monochromatic STN LCD of tradition.

Fig. 2 is the output chart of the STN lcd drive voltage of Fig. 1.

Fig. 3 is the process flow diagram of verification method of drive waveforms of a kind of STN LCD of a preferred embodiment of the present invention.

Fig. 4 is the synoptic diagram of verification system of drive waveforms of a kind of STN LCD of a preferred embodiment of the present invention.

110: the picture frame signal

120: display pixel

130: display pixel (COM0, SEG0)

131: display pixel (COM0, drive waveforms SEG0)

140: display pixel (COM0, SEG1)

141: display pixel (COM0, drive waveforms SEG1)

The verification system of the drive waveforms of 200:STN LCD

210:STN lcd driver prototype circuit

222: data fatching apparatus

224: microprocessor

Embodiment

Fig. 3 is the process flow diagram of verification method of drive waveforms of a kind of STN LCD of a preferred embodiment of the present invention.The super line style LCD (abbreviating STN LCD as) of reversing has most display pixels (not illustrating), and these display pixels are by N common drive wire (COM) and M byte drive wire (SEG), and N, M is the positive integer greater than 0.Please refer to Fig. 3, the verification method of the drive waveforms of this STN LCD comprises the following steps: step 1 S110, makes STN lcd driver prototype (prototype) circuit, and output STN LCD drive waveforms signal; Step 2 S120 reads STN LCD drive waveforms signal; Step 3 S130, the dc bias value of calculating display pixel; And step 4 S140, the check dc bias value is with checking STN LCD drive waveforms signal.

At first, in step 1 S110, make STN lcd driver prototype (prototype) circuit earlier, field formula programmable gate array (the Field Programmable Gate Array that for example uses Xilinx company to be produced, FPGA) or the complicated programmable logic module that altera corp produced (Complex Programming Logic Device, CPLD) or other circuit unit design prototype (prototype) circuit of STN lcd driver, and output STN LCD drive waveforms signal, comprise the pulse voltage signal on each common drive wire, and the display data signal on each byte drive wire.Because FPGA and CPLD can't export simulation (Analog) waveform of STN LCD, thus the digital circuit part of true (emulate) driver can only be intended, and the analog waveform of output is just represented its voltage level with the mode of numeral output (0,1 signal).Wherein, the drive waveforms signal of each display pixel (pixel) XY is the result by X common drive wire and Y synthetic voltage difference COMx (t)-SEGy (t) gained afterwards of byte drive wire on the STN LCD, and the transmittance of the display pixel of STN LCD is decided by the rms voltage Vrms that applied on its electrode, and the dc bias value of the display pixel of STN LCD (DC bias) depends on the mean value of voltage difference$\underset{t=0}{\overset{T-1}{\mathrm{\Σ}}}(\mathrm{COMx}\left(t\right)-\mathrm{SEGy}\left(t\right))/T.$

Therefore, in step 2 S120, can utilize the data fatching apparatus 222 (and cooperating software) among Fig. 4 to read the STNLCD drive waveforms signal that STN lcddriver prototype circuit 210 is exported, then, in step 3 S130, utilize themicroprocessor 224 of Fig. 4 and the dc bias value that software calculates the display pixel of STN LCD thereof again, wherein the dc bias value of each display pixel for example is drive waveforms voltage of signals difference COMx (the t)-SEGy (t) of X common drive wire and Y byte drive wire, X wherein, Y is positive integer and 0＜X＜=N, 0＜Y＜=M.In the present embodiment, in the present embodiment, the rms voltage of each display pixel can be expressed as:$V_{\mathrm{bias}}=\frac{{\∫}_0^T\left(t\right)\mathrm{dt}}{T},$V (t)=Vx wherein, y (t)=COMx (t)-SEGy (t), and T is the cycle length that the picture frame signal is required.

Yet, in the present embodiment,, simplify computation process and have its own necessity because the account form of continous way (continuous) average voltage is comparatively complicated.For general STN LCD drive waveforms, can be considered as a Discrete Distribution (discrete distribution), so its average voltage can be expressed as:$V_{\mathrm{bias}}=\frac{\underset{i=1}{\overset{n}{\mathrm{\Σ}}}\mathrm{xi}}{n},$Xi=Vx wherein, y (i)=COMx (i)-SEGy (i), and n is the number of all COM of picture frame signal required cycle length.

Because each picture frame of polarity of STN LCD drive waveforms can change polarity, so its average voltage is 0, that is to say that the dc bias value of display pixel can be expressed as$V_{\mathrm{bias}}(x,y)=\underset{t=0}{\overset{T-1}{\mathrm{\Σ}}}(\mathrm{COMx}\left(t\right)-\mathrm{SEGy}\left(t\right))/T=0,$And t is a time variable.In addition,, therefore utilize above-mentioned verification method, also can check the bias value of common drive wire (COMx) and byte drive wire (SEGy) simultaneously because the drive waveforms of LCD cannot have the existence of Dc bias

With

Whether at a default intermediate potential, to avoid producing Dc bias.

Because mean value is 0, so we can simplify calculating once more, does not calculate division, only gets its accumulated value, accumulated value also is 0.The dc bias value of display pixel$V_{\mathrm{bias}}(x,y)=\underset{t=0}{\overset{T-1}{\mathrm{\Σ}}}(\mathrm{COMx}\left(t\right)-\mathrm{SEGy}\left(t\right))=0,$And t is a time variable.

In step 4 S140, after the dc bias value that has calculated display pixel, can check the dc bias value of each display pixel, whether correct with the signal of checking STN LCD drive waveforms.If when producing Dc bias, the quiescent voltage that it produced causes picture to show problems such as bad and liquid crystal panel damage easily, the present invention will make the lost of life of LCD, so can find out possible Dc bias design mistake in the IC design initial.

Be more Chu's explanation the present invention, we illustrate with Fig. 1:

If calculate the DC bias value of pixel 130,140, and if use VDD, V1, V2, V3, V4, the actual voltage value of V5, computation process can be a calculating that contains radix point.In order to simplify calculating, the present invention replaces magnitude of voltage with integer, and for example VDD is 5, and V1 is 4, and V2 is 3, and V3 is 2, and V4 is 1, and V5 is 0.

Because Fig. 1 is the IAPT STN LCD drive waveforms of monochromatic category-B figure frame modulation, therefore need only get negative scan period and positive scan period to get final product.The sampling of the COM0 of display pixel 130,140 and SEG0, SEG1 can be written as:

	?0 ?1	0 2	0 3	0 4	0 5	0 6	0 7	0 8	0 9	1 0	?1 ?1	?1 ?2	?1 ?3	?1 ?4	?1 ?5	?1 ?6	?0 ?1	?0 ?2	?0 ?3	?0 ?4	0 5	0 6	0 7	0 8	0 9	1 0	1 1	1 2	1 3	1 4	1 5	1 6
																																	?COM0	?0	4	4	4	4	4	4	4	4	4	?4	?4	?4	?4	?4	?4	?5	?1	?1	?1	1	1	1	1	1	1	1	1	1	1	1	1
?SEG0	?3	5	5	3	3	3	3	3	3	3	?3	?3	?3	?3	?3	?3	?2	?0	?0	?2	2	2	2	2	2	2	2	2	2	2	2	2
																																	?(COM0-S ?EG0)	?-3	-1	-1	1	1	1	1	1	1	1	?1	?1	?1	?1	?1	?1	?3	?1	?1	?-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1

$\underset{i=1}{\overset{32}{\mathrm{\Σ}}}\left(\mathrm{COM}0\right[i]-\mathrm{SEG}0[i\left]\right)/32=0$or

$\underset{i=1}{\overset{32}{\mathrm{\Σ}}}\left(\mathrm{COM}0\right[i]-\mathrm{SEG}0[i\left]\right)=0$

	0 1	0 2	?0 ?3	?0 ?4	?0 ?5	?0 ?6	?0 ?7	?0 ?8	?0 ?9	?1 ?0	?11	?1 ?2	?1 ?3	?1 ?4	?1 ?5	?1 ?6	?0 ?1	?0 ?2	?0 ?3	?0 ?4	?0 ?5	?0 ?6	?0 ?7	?0 ?8	?0 ?9	?1 ?0	?11	?1 ?2	?1 ?3	?1 ?4	?1 ?5	?1 ?6
																																	COM0	0	4	?4	?4	?4	?4	?4	?4	?4	?4	?4	?4	?4	?4	?4	?4	?5	?1	?1	?1	?1	?1	?1	?1	?1	?1	?1	?1	?1	?1	?1	?1
SEG1	5	3	?3	?3	?3	?3	?3	?3	?3	?3	?3	?3	?3	?3	?3	?3	?0	?2	?2	?2	?2	?2	?2	?2	?2	?2	?2	?2	?2	?2	?2	?2
																																	(COM0- SEG1)	-5	1	?1	?1	?1	?1	?1	?1	?1	?1	?1	?1	?1	?1	?1	?1	?5	?-1	?-1	?-1	?-1	?-1	?-1	?-1	?-1	?-1	?-1	?-1	?-1	?-1	?-1	?-1

$\underset{i=1}{\overset{32}{\mathrm{\Σ}}}\left(\mathrm{COM}0\right[i]-\mathrm{SEG}1[i\left]\right)/32=0$or

$\underset{i=1}{\overset{32}{\mathrm{\Σ}}}\left(\mathrm{COM}0\right[i]-\mathrm{SEG}1[i\left]\right)=0$

$\underset{i=1}{\overset{32}{\mathrm{\Σ}}}\mathrm{COM}0\left[i\right]/32=2.5$

$\underset{i=1}{\overset{32}{\mathrm{\Σ}}}\mathrm{SEG}0\left[i\right]=2.5$

The another way of calculating the average voltage of COM and SEG makes the corresponding round values that changes voltage, and for example VDD is 3, and V1 is 2, and V2 is 1, and V3 is-1, and V4 is-2, and V5 is-3.

	0 1	0 2	0 3	0 4	?0 ?5	?0 ?6	?0 ?7	?0 ?8	?0 ?9	?1 ?0	?1 ?1	?1 ?2	?1 ?3	?1 ?4	?1 ?5	?1 ?6	?0 ?1	0 2	0 3	0 4	0 5	0 6	0 7	0 8	0 9	1 0	1 1	1 2	1 3	1 4	1 5	1 6
																																	?COM0	-3	2	2	2	?2	?2	?2	?2	?2	?2	?2	?2	?2	?2	?2	?2	?3	-2	-2	-2	-2	-2	-2	-2	-2	-2	-2	-2	-2	-2	-2	-2
?SEG0	1	3	3	1	?1	?1	?1	?1	?1	?1	?1	?1	?1	?1	?1	?1	?-1	-3	-3	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1	-1

$\underset{i=1}{\overset{32}{\mathrm{\Σ}}}\mathrm{COM}0\left[i\right]/32=0$or

$\underset{i=1}{\overset{32}{\mathrm{\Σ}}}\mathrm{COM}0\left[i\right]=0$

$\underset{i=1}{\overset{32}{\mathrm{\Σ}}}\mathrm{SEG}0\left[i\right]/32=0$or

$\underset{i=1}{\overset{32}{\mathrm{\Σ}}}\mathrm{SEG}0\left[i\right]=0$

By the numerical value that calculates gained, can obtain eachdisplay pixel 130 easily, 140 dc bias value, make the IC deviser at the beginning of design STN lcd driver, just can intend true (emulate) this STN lcd driver with FPGA or CPLD, and calculate the dc bias value of the STN LCD drive waveforms of STNLCD drive circuit, can survey various possible test pattern apace, and need not wait until and really produce after the STN lcd driver IC, just finding has the problem of Dc bias and will revise circuit, so can reduce the IC cost of development and be beneficial to the time of accelerating launch.

Above-mentioned verification method is applicable to multiple STN LCD drive waveforms, only must adjust slightly at different drive waveforms, but still does not break away from spirit of the present invention, and for example, for the GTG drive waveforms of using the PWM modulation, its sampling frequency is the clock of PWM.And for the GTG drive waveforms that adopts the FRC modulation, its sample length is the employed maximum frame number of FRC, 16 frame for example, and the integer of magnitude of voltage correspondence also can be an arbitrary integer.

Please refer to Fig. 4, it is the synoptic diagram of verification system of drive waveforms of a kind of STN LCD of a preferred embodiment of the present invention.Utilize above-mentioned verification method, the present invention proposes theverification system 200 of the drive waveforms of a STNLCD, comprises a STN lcddriver prototype circuit 210, adata fatching apparatus 222 and amicroprocessor 224 at least.Wherein,data fatching apparatus 222 is connected in STN lcd driver prototype circuit 210 (for example being the FPGA circuit board), in order to read the STN LCD drive waveforms signal that STN lcddriver prototype circuit 210 is exported, andmicroprocessor 224 is in order to carry out a software, and software can calculate and export the dc bias value of each display pixel, therefore, in the checking at product design initial stage of STN lcd driver, debug, great help is arranged all for IC design engineer.

By above explanation as can be known, utilize verification method of the present invention and system thereof, can allow the IC deviser at the beginning of design STN lcd driver, just can intend true (emulate) this STN lcd driver with FPGA or CPLD, and calculate the dc bias value of the STN LCD drive waveforms of STN lcd driver circuit, and need not wait until and really produce after the STN lcd driver IC, and be assembled to liquid crystal screen panel, carry out the checking work of IC, find that just the picture that Dc bias causes shows bad.Therefore, STN LCD verification method of the present invention and system thereof in the STN LCD checking at product development initial stage, debug, functional test, all have great help for the IC deviser.Method of the present invention is except accelerating the checking work of STN lcd driver circuit, more can more carefully verify all function details, what promote checking effectively contains face (coverage), reduce the number of times that the IC circuit is revised, save light shield expense and test manufacture expense, and then the cost of development of reduction IC, and shorten the time (time-to-market) that the IC volume production is gone on the market.

Claims (22)

1. the verification method of the drive waveforms of a LCD (LCD), this LCD has most display pixels, and those display pixels are driven by N common drive wire and M byte drive wire, N, M is the positive integer greater than 0, it is characterized in that the verification method of the drive waveforms of this LCD comprises at least:

Make prototype (prototype) circuit of a lcd driver, and export the plurality of drive waveform signal on those common drive wires and those byte drive wires;

Utilize a capture device to read each those drive waveforms signal;

Calculate the dc bias value of each those display pixel; And

The check dc bias value, whether correct to verify those drive waveforms signals.

2. the verification method of the drive waveforms of LCD as claimed in claim 1 (LCD) is characterized in that, this method comprises whether the check dc bias value is 0.

3. the verification method of the drive waveforms of LCD as claimed in claim 1 (LCD), it is characterized in that, the dc bias value of those display pixels is the mean value of the drive waveforms voltage of signals difference of X common drive wire and Y byte drive wire, X wherein, Y is positive integer and 0＜X＜=N, 0＜Y＜=M.

4. the verification method of the drive waveforms of LCD as claimed in claim 1 (LCD) is characterized in that, the drive waveforms voltage of signals mean value of those common drive wires is a direct current bias value of common drive wire.

5. the verification method of the drive waveforms of LCD as claimed in claim 1 (LCD) is characterized in that, the drive waveforms voltage of signals mean value of those byte drive wires is a direct current bias value of byte drive wire.

6. the verification method of the drive waveforms of a LCD (LCD), this LCD has most display pixels, and those display pixels are driven by N common drive wire and M byte drive wire, N, M is the positive integer greater than 0, it is characterized in that the verification method of the drive waveforms of this LCD comprises at least:

Make a lcd driver prototype circuit, and export the plurality of drive waveform signal on those common drive wires and those byte drive wires;

Use a software to read each those drive waveforms signal;

Calculate the dc bias value of each those display pixel; And

The check dc bias value, whether correct to verify those drive waveforms signals.

7. the verification method of the drive waveforms of LCD as claimed in claim 6 (LCD) is characterized in that, this method comprises whether the check dc bias value is 0.

8. the verification method of the drive waveforms of LCD as claimed in claim 6 (LCD), it is characterized in that, the dc bias value of those display pixels is the mean value of the drive waveforms voltage of signals difference of X common drive wire and Y byte drive wire, X wherein, Y is positive integer and 0＜X＜=N, 0＜Y＜=M.

9. the verification method of the drive waveforms of LCD as claimed in claim 6 (LCD) is characterized in that, the drive waveforms voltage of signals mean value of those common drive wires is a direct current bias value of common drive wire.

10. the verification method of the drive waveforms of LCD as claimed in claim 6 (LCD) is characterized in that, the drive waveforms voltage of signals mean value of those byte drive wires is a direct current bias value of byte drive wire.

11. the verification system of the drive waveforms of a LCD (LCD), this LCD has most display pixels, and those display pixels are driven by N common drive wire and M byte drive wire, N, M is the positive integer greater than 0, it is characterized in that the verification system of the drive waveforms of this LCD comprises at least:

One lcd driver prototype circuit is in order to export the plurality of drive waveform signal on those common drive wires and those byte drive wires; And

One computer system connects this lcd driver prototype circuit, in order to capturing each those drive waveforms signal, and calculates the dc bias value of each those display pixel.

12. the verification system of the drive waveforms of LCD as claimed in claim 11 (LCD) is characterized in that, this lcd driver prototype circuit is a formula programmable gate array (FPGA) system.

13. the verification system of the drive waveforms of LCD as claimed in claim 11 (LCD) is characterized in that, this lcd driver prototype circuit is complicated programmable logic module (CPLD) system.

14. the verification system of the drive waveforms of LCD as claimed in claim 11 (LCD) is characterized in that, this lcd driver prototype circuit is a logic circuitry.

15. the verification system of the drive waveforms of LCD as claimed in claim 11 (LCD) is characterized in that, this computer system comprises:

One data fatching apparatus, this device read each those drive waveforms signal; And

One software, in order to calculate the dc bias value of each those display pixel, whether correct to verify those drive waveforms signals.

16. the verification system of the drive waveforms of LCD as claimed in claim 15 (LCD) is characterized in that this software comprises the following steps:

Import those drive waveforms signals from this data fatching apparatus;

Calculate the dc bias value of each those display pixel; And

The check dc bias value.

17. the verification system of the drive waveforms of LCD as claimed in claim 11 (LCD), it is characterized in that, the dc bias value of those display pixels is the mean value of the drive waveforms voltage of signals difference of X common drive wire and Y byte drive wire, X wherein, Y is positive integer and 0＜X＜=N, 0＜Y＜=M.

18. the verification system of the drive waveforms of LCD as claimed in claim 11 (LCD) is characterized in that, the drive waveforms voltage of signals mean value of those common drive wires is a direct current bias value of common drive wire.

19. the verification system of the drive waveforms of LCD as claimed in claim 11 (LCD) is characterized in that, the drive waveforms voltage of signals mean value of those byte drive wires is a direct current bias value of byte drive wire.

20. the verification system of the drive waveforms of a LCD (LCD), this LCD has most display pixels, and those display pixels are driven by N common drive wire and M byte drive wire, N, M is the positive integer greater than 0, it is characterized in that the verification system of the drive waveforms of this LCD comprises at least:

One lcd driver prototype circuit, it exports the plurality of drive waveform signal on those common drive wires and those byte drive wires;

One data fatching apparatus, it reads each those drive waveforms signal; And

One microprocessor, it carries out a software, and the dc bias value of these those display pixels of computed in software comprises the following steps:

Import those drive waveforms signals from this data fatching apparatus;

Calculate the dc bias value of each those display pixel; And

The output dc bias value, whether correct to verify those drive waveforms signals.

21. the verification system of the drive waveforms of LCD as claimed in claim 20 (LCD), it is characterized in that, the dc bias value of those display pixels is the mean value of the drive waveforms voltage of signals difference of X common drive wire and Y byte drive wire, X wherein, Y is positive integer and 0＜X＜=N, 0＜Y＜=M.

22. the verification system of the drive waveforms of LCD as claimed in claim 20 (LCD), it is characterized in that, the dc bias value of those display pixels is the sum total of the drive waveforms voltage of signals difference of X common drive wire and Y byte drive wire, X wherein, Y is positive integer and 0＜X＜=N, 0＜Y＜=M.

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