~2~35(:~4 VARIABLE COLOUR ANALOG TIMEPIECE
BACKGROUND OF THE INVENTION
1. Field of the Invention This invention relates to timepieces utilizing variable colour analog display.
2. Description of the Prior Art An electronic timepiece disclosed in U. S. Patent No.
3,922,847, issued on December 2, 1975 to Bobby Gene Culley et al., includes a time base oscillator, counters, and a display consisting of 12 monochromatic light emitting diodes arranged in an inner ring, for individually indicating hours, and 60 monochromatic light emitting diodes arranged in an outer ring, for alternately indicating minutes and seconds.
A liquid crystal analog timepiece disclosed in U. S.
Patent No. 3,969,887, issued on July 20, 1976 to Shigeru Fukumoto, includes a display having hour and minute information segment electrodes for indicating time in a conventional format.
Monochromatic analog display timepieces are not capable of simultaneously indicating values of time and values of a diverse quantity.
a SUMMARY OF THE INVENTION
n a broad sense, it is the principal object of this invention to provide a timepiece with a variable colour analog display.
It is another object of the invention to provide an analog timepiece in which the colour of the display may be controlled in accordance with a diverse quantity.
In summary, electronic timepiece of the present invention is provided with a variable colour display for providing an analog indication of time. The timepiece also includes a transducer for measuring a diverse quantity and for developing output electrical signals related to values of the measured quantity. Colour control circuits are provided for controlling the colour of the analog indication in accordance with the output electrical signals of the transducer.
~Z~3S~4 BRIEF DESCRIPTION OF THE DRAWINGS
In the drawings in which are shown several embodiments of the invention, FIG. 1 is a block diagram of a variable colour analog display system of the invention.
FIG. 2 is a block diagram of a variable colour analog timepiece with transducer.
FIG. 3 is a block diagram of a like timepiece characterized by a variable colour circular display.
FIG. 4 (on sheet 2) is a schematic diagram of a variable colour analog timepiece.
FIG. 5 is a schematic diagram of a colour control converter.
FIG. 6 is an enlarged cross-sectional view of one display segment in FIG. 4, taken along the line A - A.
FIG. 7 is a timing diagram showing the timing relationship of output signals in shift register chain in FIG. 4.
FIG. 8 is a schematic diagram of a signal converter for developing colour contro] signals.
FIG. 9 is a schematic diagram of a temperature transducer with interface circuit.
Throughout the drawings, like characters indicate like parts.
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DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring now more particularly, to the drawings, in FIG. 1 is shown a block diagram of an analog display system which includes a first device lOa for developing electrical signals, a suitable decoder 20 for converting the signals into a displayable analog indication, and a variable colour analog display 40 for providing a visual analog indication of the signals. The invention resides in the addition of a colour control circuit 50 for controlling the colour of the analog indication in accordance with signals developed by a second device lOb. The variable colour display system of the invention can thus simultaneously indicate values of two different quantities, from the outputs of devices lOa and lOb, by causing an analog indication representing the value of the first quantity to be exhibited on the display and by controlling the colour of the indication in accordance with the value of the second quantity.
FIG. 2 is a generalized block diagram of an analog timepiece with transducer of this invention which includes a timekeeping device 71 for keeping time and for developing output electrical signals indicative of time, decoder 20 for converting the output electrical signals to a displayable indication, and variable colour analog display 40 for exhibiting an analog indication of time. The invention resides in the addition of a transducer 75, for measuring a diverse quantity and for developing output signals related thereto, and colour control 50, for controlling the colour of the analog indication in accordance with the output signals of transducer 75. The display 40 will thus simultaneously indicate time, in analog format, and values of the measured diverse quantity, in variable colour.
As will be more fully pointed out subsequently, the preferred embodiment of a timepiece of the invention utilizes a temperature transducer for measuring values of temperature and for developing output signals related thereto. Such timepiece is capable of simultaneously indicating time, by exhibiting an analog indication representing time, and temperature, by controlling the colour of the analog indication in accordance with temperature.
In FIG. 3 is shown a block diagram of a like timepiece characterized by a clock pulse source 97 for furnishing a train of stable clock pulses, a shift register 78 for shifting predetermined data in accordance with the clock pulses, and variable colour analog display 40 coupled to the shift register for exhibiting the data visually. The overall effect is a timepiece face that simulates the appearance of an hour and minute hands to present time information in substantially conventional manner.
The term transducer, as used throughout the description of the invention, is used irl its widest sense so as to include every type of a device for performing a conversion of one type of energy to another. The principles of the invention may be applied to various displacement, motion, force, pressure, sound, flow, temperature, humidity, weight, magnetic, physiological, and like transducers. A physical transducer is defined for the purpose of this invention as means for measuring values of a physical quantity and for developing output electrical signals related thereto. A
~29~3S~4 physiological transducer is defined as means for producing electrical signals which represent physiological conditions or events in a human body or other living matter.
In FIG. 4 is shown a schematic diagram of a variable colour analog timepiece. The circular display designated 41 includes twelve variable colour display segments la, lb, lc, ld, le, lf, lg, lh, li, lj, lk, and lm, regularly spaced along a circle to resemble a conventional timepiece face, which may be progressively energized to exhibit analog indication of time. Each display segment includes a pair of LEDs (light emitting diodes): a red LED 2 and green LED 3, which are closely adjacent such that the light signals emitted therefrom are substantially superimposed upon each other to mix the colours. To facilitate the illustration, the LEDs are designated by segment symbols, e. g., the red LED in the segment la is designated as 2a 7 etc. The anodes of all red and green LED pairs are interconnected in each display segment and are electrically connected to respective outputs of commercially well known shift registers 79a, 79b, and 79c. The cathodes of all red LEDs 2a, 2b, 2c, 2d, 2e, 2f, 2g, 2h, 2i, 2j, 2k, and 2m are commonly coupled to an electric path referred to as a red bus 5. The cathodes of all green LEDs 3a, 3b, 3c, 3d, 3e, 3f, 3g, 3h, 3i, 3j, 3k, and 3m are commonly coupled to a like electric path referred to as a green bus 6.
The red bus 5 is connected via a current limiting resistor 89a to the output of an inverting buffer 63a. The green bus 6 is connected via a current limiting resistor 89b to the output of a like buffer 63b. The conditions of the red and green buses can be selectively controlled by so applying suitable logic control signals to the bus inputs RB
(red bus) and GB (green bus).
The display 41 is controlled by chain of shift registers 79a, 79b, and 79c adapted for shifting data to the left by having their Shift Left inputs SL respectively coupled to outputs of the next one of the shift registers and by having their select inputs Sl coupled to a high logic level, in a manner well understood by those skilled in the art. The parallel inputs PO, Pl, P2, and P3 of all shift registers are coupled to a low logic level except for the most significant input P3 of shift register 79c which is coupled to a high logic level. When a short positive pulse LOAD is applied to the interconnected select inputs S2, the data from the parallel inputs are ]oaded into the shift registers, appear at their outputs QO, Ql, Q2, and Q3, and may be progressively shifted to the left with each active clock transition when the inputs S2 are returned to a low logic level. A high logic level at a particular output Q of the shift registers will forwardly bias one or both LEDs in the associated display segments, depending on the conditions of the bus control inputs RB and GB.
In FIG. 5 is shown a schematic diagram of a colour control converter circuit which includes OR gates 60a and 60b for gating colour control logic signals R (red), Y
(yellow), and G (green) applied to their inputs to develop bus control signals RB (red bus) and GB (green bus) in a manner which will become clearer subsequently. The outputs RB and GB may be directly coupled to like inputs shown in FIG. 4.
Returning again to FIG. 4, the operation of the timepiece ~24~
will be explained on example of illuminating display segment la in three different colours. It is assumed for the purpose of the description that the outputs RB and GB of the colour control converter in FIG. 5 are coupled to like inputs in FIG. 4. The display segment la may be illuminated when the output Q3 of shift register 79c rises to a high logic level. To illuminate the segment la in red colour, the colour control input R is raised to a high logic level and colour control inputs Y and G are maintained at a low logic level. As a result, the output of OR gate 60a rises to a high logic level, thereby forcing the output of buffer 63a to drop to a low logic level. The current flows from the output Q3 of shift register 79c via red LED 2a, red bus 5, and resistor 89a to the current sinking output of buffer 63a. As a result, segment la illuminates in red colour. The green LED 3a remains extinguished because the output of buffer 63b is at a high logic level, thereby disabling the green bus 6.
To illuminate the segment la in green colour, the colour control input G is raised to a high logic level, while the colour control inputs R and Y are maintained at a low logic level. As a result, the output of OR gate 60b rises to a high logic level, thereby forcing the output of buffer 63b to drop to a low logic level. The current flows from the output Q3 of shift register 79c via green LED 3a, green bus 6, and resistor 89b to the current sinking output of buffer 63b. As a result, segment la illuminates in green colour.
The red LED 2a remains extinguished because the output of buffer 63a is at a high logic level, thereby disabling the red bus 5.
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To illuminate the segment la in yellow colour, the colour control input Y is raised to a high logic level, while the colour control inputs R and G are maintained at a low logic level. As a result, the outputs of both OR gates 60a and 60b rise to a high 'ogic level, thereby forcing the outputs of both buffers 63a and 63b to drop to a low logic level.
The current flows from the output Q3 of shift register 79c via red LED 2a, red bus 5, and resistor 89a to the output of buffer 63a and via green LED 3a, green bus 6 and resistor 89b to the output of buffer 63b. As a result of internally blending light of red and green colours, segment la illuminates in substantially yellow colour.
In FIG. 6, red LED 2a and green LED 3a are placed on the base of a segment body 15 which is filled with a transparent light scattering material 16. When forwardly biased, the LEDs 2a and 3a emit light signals of red and green colours, respectively, which are scattered within the transparent material 16, thereby blending the red and green light signals into a composite light signal that emerges at the upper surface of the segment body 15. The colour of the composite light signal may be controlled by varying portions of the red and green light signals.
In FI&. 7 is shown a timing diagram of the output signals in the shift register chain in FIG. 4. Clock pulses 98 are applied to the interconnected Clock Pulse inputs CP of the shift registers to serially shift their contents to the left with each low-to-high clock transition. Initially, the output Q3 of shift register 79c is at a high level, while all other Q outputs are low, for causing the associated display segment la to illuminate. When the high level is 3S~
shifted to the output Q2 of the same shift register, display segment lb illuminates. When the high level is shifted to the output Ql of the same shift register, display segment lc illuminates, etc.
It is readily apparent that the rate of movement of the analog indication on the display depends on the period of the clock. When the clock period is 1 hour, the display indicates one of 12 hours. When the clock period is 5 minutes, the display indicates time to the nearest 5 minutes. When the clock period is 5 seconds, the display similarly indicates time to the nearest 5 seconds. It would be obvious to add additional display segments and shift registers to provide more accurate time indication.
In FIG. 8 is shown a schematic diagram of an exemplary signal converter which converts values of analog voltage to colGur control logic signals R, Y, and G for controlling the colour of the display segments in FIG. 4 in accordance with the magnitude of input voltage. An analog voltage Vin is applied to the interconnected inputs of two analog comparators 82a and 82b~ in a classic 'window' comparator configuration. When the voltage Vin is lower than the low voltage limit Vlo, set by a potentiometer 92a, the output of comparator 82a drops to a low logic level, thereby forcing the output of inverter 65a to rise to a high logic level to generate active colour control signal Y for illuminating the segment in yellow colour.
When the voltage Vin is higher than the high voltage limit Vhi, set by a potentiometer 92b, the output of comparator 82b drops to a low logic level, thereby forcing the output of inverter 65b to rise to a high logic level to i 3 So generate active colour control signal R for illuminating the segment in red colour.
When the voltage Vin is between the low voltage limit Vlo and high voltage limit Vhi, the outputs of comparators 82a, 82b rise to a high logic level, thereby causing the output of AND gate 66 to rise to a high logic level to generate active colour control signal G for illuminating the segment in green colour.
The outputs R, Y, and G may be directly coupled to like inputs of the colour control converter in FIG. 5. It would be obvious that the colour sequences could be readily changed by differently interconnecting the outputs of the signal converter with colour control inputs of the colour control converter.
In a schematic diagram shown in FIG. 9, temperature transducer 76 measures ambient temperature and develops at its output a current which is linearly proportional to measured temperature in degrees Kelvin. The current flows through a resistor 90c of suitable value (e. g., 1 k Ohm) to ground, to develop voltage proportional to the measured temperature, which is applied to the input of an op amp 86 having a feedback established by resistors 90a and 90b. To read at the op amp's output OUT voltage that directly corresponds to temperature in degrees Celsius, a DC voltage 273.2 mV is applied to the other input V OFFSET. The invention resides in utilizing the output voltage at the terminal OlJT to develop colour control signals for causing the timepiece display to illuminate in a colour related to measured ambient temperature. To achieve this, the terminal OUT may be connected to the input Vin of the signal ~Z435~i~
converter in FIG. 8 -to control the colour of the timepiece display in three steps.
Although not shown in the drawings, it will be appreciated that the timepiece of this invention may have any conceivable form or shape, such as a wrist watch, pocket watch, clock, alarm clock, and the like. Alternatively, the timepiece may have characteristics of an article for wearing on a body of wearer or for securing to wearer's clothing, such as a bracelet, ring, ear-ring, necklace, tie tack, button, cuff link, brooch, hair ornament, and the like, or it may be built into, or associated with, an object such as a pen, pencil, ruler, lighter, briefcase, purse, and the like.
In brief summary, the invention describes a method of simultaneously displaying values of time and values of a diverse quantity, on a single variable colour display device, by causing an analog indication representing time to be indicated on the display device, and by controlling the colour of the indication in accordance with the values of the diverse quantity.
A timepiece with a variable colour analog display for providing an analog indication of time was disclosed which also includes a transducer for measuring values of a diverse quantity, such as temperature. Colour control responsive to output signals of the transducer is provided for controlling the colour of the analog indication in accordance with measured values of the diverse quantity.
It would be obvious that persons skilled in the art may resort to numerous modifications in the construction of the preferred embodiments shown herein, without departing from the spirit of the invention as defined in the appended claims.
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CORRELATION TABLE
This is a correlation table of reference characters, their descriptions, and examples of commercially available parts.
# DESCRIPTION EXAMPLE
_ 1 display element 2 red LED
3 green LED
red bus 6 green bus device developing electrical signals segment body 16 light scattering material decoder variable colour analog display 41 variable colour circular display colour control 60 2-input OR gate 74HC32 63 inverting buffer 74LS240 65 inverter 74HC04 66 2-input AND gate 74HC08 71 timekeeping device transducer 76 Analog Devices temperature transducer AD590J
78 shift register 79 4-bit shift register 74LS194 ~3S~i~
# DESCRIPTION EXAMPLE
82 analog comparator LM339 86 op amp LM741 89 resistor 90 resistor 91 resistor 92 potentiometer 97 clock pulse source 98 clock pulse 10 99 pulse