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AU5570199A - Apparatus and method to efficiently implement a switch architecture for a multiprocessor system - Google Patents

Apparatus and method to efficiently implement a switch architecture for a multiprocessor system

Info

Publication number
AU5570199A
AU5570199AAU55701/99AAU5570199AAU5570199AAU 5570199 AAU5570199 AAU 5570199AAU 55701/99 AAU55701/99 AAU 55701/99AAU 5570199 AAU5570199 AAU 5570199AAU 5570199 AAU5570199 AAU 5570199A
Authority
AU
Australia
Prior art keywords
multiprocessor system
switch architecture
efficiently implement
efficiently
implement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU55701/99A
Inventor
Jiahung Chen
Shirish Gadre
Jeff Guan
Taner Ozcelik
Yew-Koon Tan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Electronics Inc
Original Assignee
Sony Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Electronics IncfiledCriticalSony Electronics Inc
Publication of AU5570199ApublicationCriticalpatent/AU5570199A/en
Abandonedlegal-statusCriticalCurrent

Links

Classifications

Landscapes

AU55701/99A1998-09-161999-08-19Apparatus and method to efficiently implement a switch architecture for a multiprocessor systemAbandonedAU5570199A (en)

Applications Claiming Priority (3)

Application NumberPriority DateFiling DateTitle
US15460098A1998-09-161998-09-16
US091546001998-09-16
PCT/US1999/018784WO2000016202A1 (en)1998-09-161999-08-19Apparatus and method to efficiently implement a switch architecture for a multiprocessor system

Publications (1)

Publication NumberPublication Date
AU5570199Atrue AU5570199A (en)2000-04-03

Family

ID=22551980

Family Applications (1)

Application NumberTitlePriority DateFiling Date
AU55701/99AAbandonedAU5570199A (en)1998-09-161999-08-19Apparatus and method to efficiently implement a switch architecture for a multiprocessor system

Country Status (2)

CountryLink
AU (1)AU5570199A (en)
WO (1)WO2000016202A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
WO2005109232A1 (en)*2004-05-122005-11-17Building 31 Clustering AbCluster switch

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication numberPriority datePublication dateAssigneeTitle
US5522083A (en)*1989-11-171996-05-28Texas Instruments IncorporatedReconfigurable multi-processor operating in SIMD mode with one processor fetching instructions for use by remaining processors
US5255264A (en)*1991-09-261993-10-19Ipc Information Systems, Inc.Distributed control switching network for multi-line telephone communications
AU664105B2 (en)*1992-06-151995-11-02British Telecommunications Public Limited CompanyService platform

Also Published As

Publication numberPublication date
WO2000016202A1 (en)2000-03-23

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Legal Events

DateCodeTitleDescription
MK6Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase

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