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AU2005902026A0 - Multiple Computer Architecture with Synchronization - Google Patents

Multiple Computer Architecture with Synchronization

Info

Publication number
AU2005902026A0
AU2005902026A0AU2005902026AAU2005902026AAU2005902026A0AU 2005902026 A0AU2005902026 A0AU 2005902026A0AU 2005902026 AAU2005902026 AAU 2005902026AAU 2005902026 AAU2005902026 AAU 2005902026AAU 2005902026 A0AU2005902026 A0AU 2005902026A0
Authority
AU
Australia
Prior art keywords
synchronization
computer architecture
multiple computer
architecture
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2005902026A
Inventor
John Matthew Holt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Waratek Pty Ltd
Original Assignee
Waratek Pty Ltd
Filing date
Publication date
Application filed by Waratek Pty LtdfiledCriticalWaratek Pty Ltd
Publication of AU2005902026A0publicationCriticalpatent/AU2005902026A0/en
Priority to US11/259,761priorityCriticalpatent/US20060265704A1/en
Priority to PCT/AU2005/001641prioritypatent/WO2006110937A1/en
Priority to US11/259,762prioritypatent/US8028299B2/en
Priority to US11/259,634prioritypatent/US20060265703A1/en
Priority to US11/259,744prioritypatent/US20060253844A1/en
Priority to US11/259,885prioritypatent/US7788314B2/en
Priority to AU2006238334Aprioritypatent/AU2006238334A1/en
Priority to US11/912,141prioritypatent/US20090055603A1/en
Priority to PCT/AU2006/000532prioritypatent/WO2006110957A1/en
Priority to EP06721412Aprioritypatent/EP1880303A4/en
Priority to US12/340,303prioritypatent/US20090198776A1/en
Priority to US12/343,419prioritypatent/US7818296B2/en
Priority to US12/396,446prioritypatent/US7860829B2/en
Priority to US12/820,758prioritypatent/US20100262590A1/en
Abandonedlegal-statusCriticalCurrent

Links

AU2005902026A2004-04-232005-04-21Multiple Computer Architecture with SynchronizationAbandonedAU2005902026A0 (en)

Priority Applications (14)

Application NumberPriority DateFiling DateTitle
US11/259,761US20060265704A1 (en)2005-04-212005-10-25Computer architecture and method of operation for multi-computer distributed processing with synchronization
PCT/AU2005/001641WO2006110937A1 (en)2005-04-212005-10-25Modified computer architecture with coordinated objects
US11/259,762US8028299B2 (en)2005-04-212005-10-25Computer architecture and method of operation for multi-computer distributed processing with finalization of objects
US11/259,634US20060265703A1 (en)2005-04-212005-10-25Computer architecture and method of operation for multi-computer distributed processing with replicated memory
US11/259,744US20060253844A1 (en)2005-04-212005-10-25Computer architecture and method of operation for multi-computer distributed processing with initialization of objects
US11/259,885US7788314B2 (en)2004-04-232005-10-25Multi-computer distributed processing with replicated local memory exclusive read and write and network value update propagation
EP06721412AEP1880303A4 (en)2005-04-212006-04-20Modified computer architecture for a computer to operate in a multiple computer system
AU2006238334AAU2006238334A1 (en)2005-04-212006-04-20Modified computer architecture for a computer to operate in a multiple computer system
US11/912,141US20090055603A1 (en)2005-04-212006-04-20Modified computer architecture for a computer to operate in a multiple computer system
PCT/AU2006/000532WO2006110957A1 (en)2005-04-212006-04-20Modified computer architecture for a computer to operate in a multiple computer system
US12/340,303US20090198776A1 (en)2004-04-232008-12-19Computer architecture and method of operation for multi-computer distributed processing with initialization of objects
US12/343,419US7818296B2 (en)2005-04-212008-12-23Computer architecture and method of operation for multi-computer distributed processing with synchronization
US12/396,446US7860829B2 (en)2004-04-232009-03-02Computer architecture and method of operation for multi-computer distributed processing with replicated memory
US12/820,758US20100262590A1 (en)2004-04-232010-06-22Multi-computer distributed processing with replicated local memory exclusive read and write and network value update propagation

Publications (1)

Publication NumberPublication Date
AU2005902026A0true AU2005902026A0 (en)2005-05-05

Family

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