Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
  • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
  • H01L21/76—Making of isolation regions between components
  • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
  • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
  • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
  • H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
  • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
  • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer

Landscapes

• Engineering & Computer Science (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Manufacturing & Machinery (AREA)
• Computer Hardware Design (AREA)
• Physics & Mathematics (AREA)
• Power Engineering (AREA)
• Recrystallisation Techniques (AREA)
• Element Separation (AREA)
• Bipolar Transistors (AREA)
• Junction Field-Effect Transistors (AREA)
• Thin Film Transistor (AREA)

Applications Claiming Priority (3)

Publications (1)

Family

ID=24781275

Family Applications (1)

Country Status (9)

Families Citing this family (82)

Family Cites Families (36)

• 2000
  • 2000-10-19USUS09/692,606patent/US6890835B1/ennot_activeExpired - Fee Related
• 2001
  • 2001-09-17CNCNB018176550Apatent/CN100472748C/ennot_activeExpired - Fee Related
  • 2001-09-17KRKR1020037005157Apatent/KR100613182B1/ennot_activeExpired - Fee Related
  • 2001-09-17AUAU2001287881Apatent/AU2001287881A1/ennot_activeAbandoned
  • 2001-09-17ILIL15539501Apatent/IL155395A0/ennot_activeIP Right Cessation
  • 2001-09-17JPJP2002537047Apatent/JP2004512683A/ennot_activeWithdrawn
  • 2001-09-17EPEP01967506Apatent/EP1327263A1/ennot_activeWithdrawn
  • 2001-09-17WOPCT/GB2001/004159patent/WO2002033746A1/enactiveApplication Filing
  • 2001-10-16TWTW090125554Apatent/TW521395B/ennot_activeIP Right Cessation
• 2003
  • 2003-04-11ILIL155395Apatent/IL155395A/ennot_activeIP Right Cessation
• 2004
  • 2004-09-23USUS10/948,421patent/US7427773B2/ennot_activeExpired - Fee Related
• 2008
  • 2008-07-29USUS12/181,489patent/US20090026495A1/ennot_activeAbandoned
  • 2008-07-29USUS12/181,613patent/US7786468B2/ennot_activeExpired - Fee Related

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