Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
- G11C7/1039—Read-write modes for single port memories, i.e. having either a random port or a serial port using pipelining techniques, i.e. using latches between functional memory parts, e.g. row/column decoders, I/O buffers, sense amplifiers
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/22—Control and timing of internal memory operations
- G11C2207/2281—Timing of a read operation
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/22—Control and timing of internal memory operations
- G11C2207/229—Timing of a write operation

Application Number	Priority Date	Filing Date	Title
US21667900P	2000-07-07	2000-07-07
US60/216,679		2000-07-07
CA2,313,954		2000-07-07
CA002313954ACA2313954A1 (en)	2000-07-07	2000-07-07	High speed dram architecture with uniform latency
PCT/CA2001/000949WO2002005281A2 (en)	2000-07-07	2001-06-29	A high speed dram architecture with uniform access latency

Publication Number	Publication Date
AU2001270400A1true AU2001270400A1 (en)	2002-01-21

Family

ID=25681959

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
AU2001270400AAbandonedAU2001270400A1 (en)	2000-07-07	2001-06-29	A high speed dram architecture with uniform access latency

Country Status (7)

Country	Link
US (7)	US6711083B2 (en)
EP (2)	EP2056301B1 (en)
JP (1)	JP2004502267A (en)
KR (3)	KR100872213B1 (en)
CN (1)	CN1307647C (en)
AU (1)	AU2001270400A1 (en)
WO (1)	WO2002005281A2 (en)

Families Citing this family (193)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP2002510118A (en)*	1998-04-01	2002-04-02	モサイド・テクノロジーズ・インコーポレーテッド	Semiconductor memory asynchronous pipeline
WO2002005281A2 (en)*	2000-07-07	2002-01-17	Mosaid Technologies Incorporated	A high speed dram architecture with uniform access latency
CN1303610C (en)*	2000-07-07	2007-03-07	睦塞德技术公司	Method and appts. for synchronzation of row and column access operation
DE10143033A1 (en)*	2001-09-01	2003-04-03	Infineon Technologies Ag	Method for accessing memory cells of a DRAM memory chip
KR100532454B1 (en)*	2003-07-24	2005-11-30	삼성전자주식회사	Integrated circuit having temporary memory and data storing method thereof
US7860172B2 (en)*	2004-05-13	2010-12-28	International Business Machines Corporation	Self clock generation structure for low power local clock buffering decoder
JP4827399B2 (en)*	2004-05-26	2011-11-30	ルネサスエレクトロニクス株式会社	Semiconductor memory device
US7176714B1 (en)	2004-05-27	2007-02-13	Altera Corporation	Multiple data rate memory interface architecture
FR2874734A1 (en)*	2004-08-26	2006-03-03	St Microelectronics Sa	METHOD FOR READING MEMORY CELLS PROGRAMMABLE AND EFFECTIVELY ELECTRICALLY, WITH ANTICIPATED PRECHARGE OF BIT LINES
KR100645049B1 (en)*	2004-10-21	2006-11-10	삼성전자주식회사	Nonvolatile memory device and its programming method which can improve program characteristics
KR100618870B1 (en)*	2004-10-23	2006-08-31	삼성전자주식회사	Data training method
US7272060B1 (en)*	2004-12-01	2007-09-18	Spansion Llc	Method, system, and circuit for performing a memory related operation
JP4791733B2 (en)*	2005-01-14	2011-10-12	株式会社東芝	Semiconductor integrated circuit device
JP4982711B2 (en)*	2005-03-31	2012-07-25	エスケーハイニックス株式会社	Memory chip structure for high-speed operation
KR100670665B1 (en)*	2005-06-30	2007-01-17	주식회사 하이닉스반도체	Latency Control Circuit of Semiconductor Memory Device
KR100665232B1 (en)*	2005-12-26	2007-01-09	삼성전자주식회사	Synchronous Semiconductor Memory Device
US7359265B2 (en)*	2006-01-04	2008-04-15	Etron Technology, Inc.	Data flow scheme for low power DRAM
KR100835279B1 (en)*	2006-09-05	2008-06-05	삼성전자주식회사	A semiconductor memory device having a transistor having a vertical channel structure
US7280398B1 (en)*	2006-08-31	2007-10-09	Micron Technology, Inc.	System and memory for sequential multi-plane page memory operations
KR100873617B1 (en)*	2007-04-12	2008-12-12	주식회사 하이닉스반도체	Active Driver Control Circuit of Semiconductor Memory Device
US7668037B2 (en)*	2007-11-06	2010-02-23	International Business Machines Corporation	Storage array including a local clock buffer with programmable timing
US8601205B1 (en)	2008-12-31	2013-12-03	Synopsys, Inc.	Dynamic random access memory controller
US8635487B2 (en)*	2010-03-15	2014-01-21	International Business Machines Corporation	Memory interface having extended strobe burst for write timing calibration
US8856579B2 (en)*	2010-03-15	2014-10-07	International Business Machines Corporation	Memory interface having extended strobe burst for read timing calibration
US8583710B2 (en)*	2010-09-17	2013-11-12	Infineon Technologies Ag	Identification circuit and method for generating an identification bit using physical unclonable functions
CN103514956B (en)*	2012-06-15	2016-04-13	晶豪科技股份有限公司	Semiconductor memory element and testing method thereof
CN103632708B (en)*	2012-08-28	2016-08-10	珠海全志科技股份有限公司	The self refresh control apparatus of synchronous DRAM and method
KR102023487B1 (en)	2012-09-17	2019-09-20	삼성전자주식회사	Semiconductor memory device capable of performing refresh operation without auto refresh command and memory system including the same
US9519531B2 (en)	2012-11-27	2016-12-13	Samsung Electronics Co., Ltd.	Memory devices and memory systems having the same
US8964493B2 (en)	2013-01-04	2015-02-24	International Business Machines Corporation	Defective memory column replacement with load isolation
US20140219007A1 (en)*	2013-02-07	2014-08-07	Nvidia Corporation	Dram with segmented page configuration
US9158667B2 (en)	2013-03-04	2015-10-13	Micron Technology, Inc.	Apparatuses and methods for performing logical operations using sensing circuitry
EP2989559A2 (en)	2013-04-22	2016-03-02	Bacula Systems SA	Creating a universally deduplicatable archive volume
US9524771B2 (en)	2013-07-12	2016-12-20	Qualcomm Incorporated	DRAM sub-array level autonomic refresh memory controller optimization
US8964496B2 (en)	2013-07-26	2015-02-24	Micron Technology, Inc.	Apparatuses and methods for performing compare operations using sensing circuitry
US8971124B1 (en)	2013-08-08	2015-03-03	Micron Technology, Inc.	Apparatuses and methods for performing logical operations using sensing circuitry
TWI493568B (en)*	2013-08-19	2015-07-21	Ind Tech Res Inst	Memory device
US9153305B2 (en)	2013-08-30	2015-10-06	Micron Technology, Inc.	Independently addressable memory array address spaces
US9019785B2 (en)	2013-09-19	2015-04-28	Micron Technology, Inc.	Data shifting via a number of isolation devices
US9449675B2 (en)	2013-10-31	2016-09-20	Micron Technology, Inc.	Apparatuses and methods for identifying an extremum value stored in an array of memory cells
US9430191B2 (en)	2013-11-08	2016-08-30	Micron Technology, Inc.	Division operations for memory
US9934856B2 (en)	2014-03-31	2018-04-03	Micron Technology, Inc.	Apparatuses and methods for comparing data patterns in memory
US9711206B2 (en)	2014-06-05	2017-07-18	Micron Technology, Inc.	Performing logical operations using sensing circuitry
US9830999B2 (en)	2014-06-05	2017-11-28	Micron Technology, Inc.	Comparison operations in memory
US10074407B2 (en)	2014-06-05	2018-09-11	Micron Technology, Inc.	Apparatuses and methods for performing invert operations using sensing circuitry
US9496023B2 (en)*	2014-06-05	2016-11-15	Micron Technology, Inc.	Comparison operations on logical representations of values in memory
US9704540B2 (en)	2014-06-05	2017-07-11	Micron Technology, Inc.	Apparatuses and methods for parity determination using sensing circuitry
US9786335B2 (en)	2014-06-05	2017-10-10	Micron Technology, Inc.	Apparatuses and methods for performing logical operations using sensing circuitry
US9711207B2 (en)	2014-06-05	2017-07-18	Micron Technology, Inc.	Performing logical operations using sensing circuitry
US9449674B2 (en)	2014-06-05	2016-09-20	Micron Technology, Inc.	Performing logical operations using sensing circuitry
US9779019B2 (en)	2014-06-05	2017-10-03	Micron Technology, Inc.	Data storage layout
US9455020B2 (en)	2014-06-05	2016-09-27	Micron Technology, Inc.	Apparatuses and methods for performing an exclusive or operation using sensing circuitry
US9910787B2 (en)	2014-06-05	2018-03-06	Micron Technology, Inc.	Virtual address table
US9747961B2 (en)	2014-09-03	2017-08-29	Micron Technology, Inc.	Division operations in memory
US9847110B2 (en)	2014-09-03	2017-12-19	Micron Technology, Inc.	Apparatuses and methods for storing a data value in multiple columns of an array corresponding to digits of a vector
US9740607B2 (en)	2014-09-03	2017-08-22	Micron Technology, Inc.	Swap operations in memory
US10068652B2 (en)	2014-09-03	2018-09-04	Micron Technology, Inc.	Apparatuses and methods for determining population count
US9898252B2 (en)	2014-09-03	2018-02-20	Micron Technology, Inc.	Multiplication operations in memory
US9904515B2 (en)	2014-09-03	2018-02-27	Micron Technology, Inc.	Multiplication operations in memory
US9589602B2 (en)	2014-09-03	2017-03-07	Micron Technology, Inc.	Comparison operations in memory
US9940026B2 (en)	2014-10-03	2018-04-10	Micron Technology, Inc.	Multidimensional contiguous memory allocation
US9836218B2 (en)	2014-10-03	2017-12-05	Micron Technology, Inc.	Computing reduction and prefix sum operations in memory
US10163467B2 (en)	2014-10-16	2018-12-25	Micron Technology, Inc.	Multiple endianness compatibility
US10147480B2 (en)	2014-10-24	2018-12-04	Micron Technology, Inc.	Sort operation in memory
US9779784B2 (en)	2014-10-29	2017-10-03	Micron Technology, Inc.	Apparatuses and methods for performing logical operations using sensing circuitry
US9747960B2 (en)	2014-12-01	2017-08-29	Micron Technology, Inc.	Apparatuses and methods for converting a mask to an index
US10073635B2 (en)	2014-12-01	2018-09-11	Micron Technology, Inc.	Multiple endianness compatibility
US10061590B2 (en)	2015-01-07	2018-08-28	Micron Technology, Inc.	Generating and executing a control flow
US10032493B2 (en)	2015-01-07	2018-07-24	Micron Technology, Inc.	Longest element length determination in memory
US9583163B2 (en)	2015-02-03	2017-02-28	Micron Technology, Inc.	Loop structure for operations in memory
CN107408404B (en)	2015-02-06	2021-02-12	美光科技公司	Apparatus and methods for memory devices as storage of program instructions
WO2016126472A1 (en)	2015-02-06	2016-08-11	Micron Technology, Inc.	Apparatuses and methods for scatter and gather
CN107408405B (en)	2015-02-06	2021-03-05	美光科技公司	Apparatus and method for parallel writing to multiple memory device locations
CN107408408B (en)	2015-03-10	2021-03-05	美光科技公司	Apparatus and method for shift determination
US9898253B2 (en)	2015-03-11	2018-02-20	Micron Technology, Inc.	Division operations on variable length elements in memory
US9741399B2 (en)	2015-03-11	2017-08-22	Micron Technology, Inc.	Data shift by elements of a vector in memory
US10365851B2 (en)	2015-03-12	2019-07-30	Micron Technology, Inc.	Apparatuses and methods for data movement
US10146537B2 (en)	2015-03-13	2018-12-04	Micron Technology, Inc.	Vector population count determination in memory
US10049054B2 (en)	2015-04-01	2018-08-14	Micron Technology, Inc.	Virtual register file
US10140104B2 (en)	2015-04-14	2018-11-27	Micron Technology, Inc.	Target architecture determination
US9959923B2 (en)	2015-04-16	2018-05-01	Micron Technology, Inc.	Apparatuses and methods to reverse data stored in memory
KR20160138690A (en)*	2015-05-26	2016-12-06	에스케이하이닉스 주식회사	Memory device
US10073786B2 (en)	2015-05-28	2018-09-11	Micron Technology, Inc.	Apparatuses and methods for compute enabled cache
US9704541B2 (en)	2015-06-12	2017-07-11	Micron Technology, Inc.	Simulating access lines
US9921777B2 (en)	2015-06-22	2018-03-20	Micron Technology, Inc.	Apparatuses and methods for data transfer from sensing circuitry to a controller
US9996479B2 (en)	2015-08-17	2018-06-12	Micron Technology, Inc.	Encryption of executables in computational memory
US9905276B2 (en)	2015-12-21	2018-02-27	Micron Technology, Inc.	Control of sensing components in association with performing operations
US9952925B2 (en)	2016-01-06	2018-04-24	Micron Technology, Inc.	Error code calculation on sensing circuitry
US9865316B2 (en)	2016-01-21	2018-01-09	Qualcomm Incorporated	Memory with a word line assertion delayed by a bit line discharge for write operations with improved write time and reduced write power
US10048888B2 (en)	2016-02-10	2018-08-14	Micron Technology, Inc.	Apparatuses and methods for partitioned parallel data movement
US9892767B2 (en)	2016-02-12	2018-02-13	Micron Technology, Inc.	Data gathering in memory
US9971541B2 (en)	2016-02-17	2018-05-15	Micron Technology, Inc.	Apparatuses and methods for data movement
US10956439B2 (en)	2016-02-19	2021-03-23	Micron Technology, Inc.	Data transfer with a bit vector operation device
US9899070B2 (en)	2016-02-19	2018-02-20	Micron Technology, Inc.	Modified decode for corner turn
US9697876B1 (en)	2016-03-01	2017-07-04	Micron Technology, Inc.	Vertical bit vector shift in memory
US10262721B2 (en)	2016-03-10	2019-04-16	Micron Technology, Inc.	Apparatuses and methods for cache invalidate
US9997232B2 (en)	2016-03-10	2018-06-12	Micron Technology, Inc.	Processing in memory (PIM) capable memory device having sensing circuitry performing logic operations
US10379772B2 (en)	2016-03-16	2019-08-13	Micron Technology, Inc.	Apparatuses and methods for operations using compressed and decompressed data
US9910637B2 (en)	2016-03-17	2018-03-06	Micron Technology, Inc.	Signed division in memory
US10120740B2 (en)	2016-03-22	2018-11-06	Micron Technology, Inc.	Apparatus and methods for debugging on a memory device
US11074988B2 (en)	2016-03-22	2021-07-27	Micron Technology, Inc.	Apparatus and methods for debugging on a host and memory device
US10388393B2 (en)	2016-03-22	2019-08-20	Micron Technology, Inc.	Apparatus and methods for debugging on a host and memory device
US10474581B2 (en)	2016-03-25	2019-11-12	Micron Technology, Inc.	Apparatuses and methods for cache operations
US10977033B2 (en)	2016-03-25	2021-04-13	Micron Technology, Inc.	Mask patterns generated in memory from seed vectors
US10074416B2 (en)	2016-03-28	2018-09-11	Micron Technology, Inc.	Apparatuses and methods for data movement
US10430244B2 (en)	2016-03-28	2019-10-01	Micron Technology, Inc.	Apparatuses and methods to determine timing of operations
US10453502B2 (en)	2016-04-04	2019-10-22	Micron Technology, Inc.	Memory bank power coordination including concurrently performing a memory operation in a selected number of memory regions
US10607665B2 (en)	2016-04-07	2020-03-31	Micron Technology, Inc.	Span mask generation
US9818459B2 (en)	2016-04-19	2017-11-14	Micron Technology, Inc.	Invert operations using sensing circuitry
US10153008B2 (en)	2016-04-20	2018-12-11	Micron Technology, Inc.	Apparatuses and methods for performing corner turn operations using sensing circuitry
US9659605B1 (en)	2016-04-20	2017-05-23	Micron Technology, Inc.	Apparatuses and methods for performing corner turn operations using sensing circuitry
US10042608B2 (en)	2016-05-11	2018-08-07	Micron Technology, Inc.	Signed division in memory
US9659610B1 (en)	2016-05-18	2017-05-23	Micron Technology, Inc.	Apparatuses and methods for shifting data
US10049707B2 (en)	2016-06-03	2018-08-14	Micron Technology, Inc.	Shifting data
US10387046B2 (en)	2016-06-22	2019-08-20	Micron Technology, Inc.	Bank to bank data transfer
US10037785B2 (en)	2016-07-08	2018-07-31	Micron Technology, Inc.	Scan chain operation in sensing circuitry
US10388360B2 (en)	2016-07-19	2019-08-20	Micron Technology, Inc.	Utilization of data stored in an edge section of an array
US10387299B2 (en)	2016-07-20	2019-08-20	Micron Technology, Inc.	Apparatuses and methods for transferring data
US10733089B2 (en)	2016-07-20	2020-08-04	Micron Technology, Inc.	Apparatuses and methods for write address tracking
US9767864B1 (en)	2016-07-21	2017-09-19	Micron Technology, Inc.	Apparatuses and methods for storing a data value in a sensing circuitry element
US9972367B2 (en)	2016-07-21	2018-05-15	Micron Technology, Inc.	Shifting data in sensing circuitry
US10303632B2 (en)	2016-07-26	2019-05-28	Micron Technology, Inc.	Accessing status information
US10468087B2 (en)	2016-07-28	2019-11-05	Micron Technology, Inc.	Apparatuses and methods for operations in a self-refresh state
US9990181B2 (en)	2016-08-03	2018-06-05	Micron Technology, Inc.	Apparatuses and methods for random number generation
US11029951B2 (en)	2016-08-15	2021-06-08	Micron Technology, Inc.	Smallest or largest value element determination
US10606587B2 (en)	2016-08-24	2020-03-31	Micron Technology, Inc.	Apparatus and methods related to microcode instructions indicating instruction types
US10466928B2 (en)	2016-09-15	2019-11-05	Micron Technology, Inc.	Updating a register in memory
US10387058B2 (en)	2016-09-29	2019-08-20	Micron Technology, Inc.	Apparatuses and methods to change data category values
US10014034B2 (en)	2016-10-06	2018-07-03	Micron Technology, Inc.	Shifting data in sensing circuitry
US10529409B2 (en)	2016-10-13	2020-01-07	Micron Technology, Inc.	Apparatuses and methods to perform logical operations using sensing circuitry
US9805772B1 (en)	2016-10-20	2017-10-31	Micron Technology, Inc.	Apparatuses and methods to selectively perform logical operations
CN207637499U (en)	2016-11-08	2018-07-20	美光科技公司	The equipment for being used to form the computation module above memory cell array
US10423353B2 (en)	2016-11-11	2019-09-24	Micron Technology, Inc.	Apparatuses and methods for memory alignment
US9761300B1 (en)	2016-11-22	2017-09-12	Micron Technology, Inc.	Data shift apparatuses and methods
US10402340B2 (en)	2017-02-21	2019-09-03	Micron Technology, Inc.	Memory array page table walk
US10268389B2 (en)	2017-02-22	2019-04-23	Micron Technology, Inc.	Apparatuses and methods for in-memory operations
US10403352B2 (en)	2017-02-22	2019-09-03	Micron Technology, Inc.	Apparatuses and methods for compute in data path
US10838899B2 (en)	2017-03-21	2020-11-17	Micron Technology, Inc.	Apparatuses and methods for in-memory data switching networks
US11222260B2 (en)	2017-03-22	2022-01-11	Micron Technology, Inc.	Apparatuses and methods for operating neural networks
US10185674B2 (en)	2017-03-22	2019-01-22	Micron Technology, Inc.	Apparatus and methods for in data path compute operations
US10049721B1 (en)	2017-03-27	2018-08-14	Micron Technology, Inc.	Apparatuses and methods for in-memory operations
US10147467B2 (en)	2017-04-17	2018-12-04	Micron Technology, Inc.	Element value comparison in memory
US10043570B1 (en)	2017-04-17	2018-08-07	Micron Technology, Inc.	Signed element compare in memory
US9997212B1 (en)	2017-04-24	2018-06-12	Micron Technology, Inc.	Accessing data in memory
US10942843B2 (en)	2017-04-25	2021-03-09	Micron Technology, Inc.	Storing data elements of different lengths in respective adjacent rows or columns according to memory shapes
US10236038B2 (en)	2017-05-15	2019-03-19	Micron Technology, Inc.	Bank to bank data transfer
US10068664B1 (en)	2017-05-19	2018-09-04	Micron Technology, Inc.	Column repair in memory
US10013197B1 (en)	2017-06-01	2018-07-03	Micron Technology, Inc.	Shift skip
US10152271B1 (en)	2017-06-07	2018-12-11	Micron Technology, Inc.	Data replication
US10262701B2 (en)	2017-06-07	2019-04-16	Micron Technology, Inc.	Data transfer between subarrays in memory
US10318168B2 (en)	2017-06-19	2019-06-11	Micron Technology, Inc.	Apparatuses and methods for simultaneous in data path compute operations
US10162005B1 (en)	2017-08-09	2018-12-25	Micron Technology, Inc.	Scan chain operations
US10534553B2 (en)	2017-08-30	2020-01-14	Micron Technology, Inc.	Memory array accessibility
US10346092B2 (en)	2017-08-31	2019-07-09	Micron Technology, Inc.	Apparatuses and methods for in-memory operations using timing circuitry
US10416927B2 (en)	2017-08-31	2019-09-17	Micron Technology, Inc.	Processing in memory
US10741239B2 (en)	2017-08-31	2020-08-11	Micron Technology, Inc.	Processing in memory device including a row address strobe manager
US10409739B2 (en)	2017-10-24	2019-09-10	Micron Technology, Inc.	Command selection policy
US10410698B2 (en)	2017-12-07	2019-09-10	Micron Technology, Inc.	Skew reduction of a wave pipeline in a memory device
US10360956B2 (en)	2017-12-07	2019-07-23	Micron Technology, Inc.	Wave pipeline
US10522210B2 (en)	2017-12-14	2019-12-31	Micron Technology, Inc.	Apparatuses and methods for subarray addressing
US10332586B1 (en)	2017-12-19	2019-06-25	Micron Technology, Inc.	Apparatuses and methods for subrow addressing
US10614875B2 (en)	2018-01-30	2020-04-07	Micron Technology, Inc.	Logical operations using memory cells
US10437557B2 (en)	2018-01-31	2019-10-08	Micron Technology, Inc.	Determination of a match between data values stored by several arrays
US11194477B2 (en)	2018-01-31	2021-12-07	Micron Technology, Inc.	Determination of a match between data values stored by three or more arrays
US10725696B2 (en)	2018-04-12	2020-07-28	Micron Technology, Inc.	Command selection policy with read priority
US10440341B1 (en)	2018-06-07	2019-10-08	Micron Technology, Inc.	Image processor formed in an array of memory cells
US10991411B2 (en)	2018-08-17	2021-04-27	Micron Technology, Inc.	Method and apparatuses for performing a voltage adjustment operation on a section of memory cells based on a quantity of access operations
US10431281B1 (en)*	2018-08-17	2019-10-01	Micron Technology, Inc.	Access schemes for section-based data protection in a memory device
US11175915B2 (en)	2018-10-10	2021-11-16	Micron Technology, Inc.	Vector registers implemented in memory
US10769071B2 (en)	2018-10-10	2020-09-08	Micron Technology, Inc.	Coherent memory access
US10483978B1 (en)	2018-10-16	2019-11-19	Micron Technology, Inc.	Memory device processing
US11184446B2 (en)	2018-12-05	2021-11-23	Micron Technology, Inc.	Methods and apparatus for incentivizing participation in fog networks
US10991414B2 (en)*	2019-04-12	2021-04-27	Western Digital Technologies, Inc.	Granular refresh rate control for memory devices based on bit position
US12118056B2 (en)	2019-05-03	2024-10-15	Micron Technology, Inc.	Methods and apparatus for performing matrix transformations within a memory array
US11061836B2 (en)*	2019-06-21	2021-07-13	Micron Technology, Inc.	Wave pipeline including synchronous stage
US10867655B1 (en)	2019-07-08	2020-12-15	Micron Technology, Inc.	Methods and apparatus for dynamically adjusting performance of partitioned memory
US11360768B2 (en)	2019-08-14	2022-06-14	Micron Technolgy, Inc.	Bit string operations in memory
JP7330068B2 (en)*	2019-11-11	2023-08-21	ルネサスエレクトロニクス株式会社	semiconductor storage device
US11449577B2 (en)	2019-11-20	2022-09-20	Micron Technology, Inc.	Methods and apparatus for performing video processing matrix operations within a memory array
US11164613B2 (en)	2019-12-02	2021-11-02	Micron Technology, Inc.	Processing multi-cycle commands in memory devices, and related methods, devices, and systems
US11853385B2 (en)	2019-12-05	2023-12-26	Micron Technology, Inc.	Methods and apparatus for performing diversity matrix operations within a memory array
US11347504B2 (en)*	2020-07-10	2022-05-31	Korea Electronics Technology Institute	Memory management method and apparatus for processing-in-memory
US11227641B1 (en)	2020-07-21	2022-01-18	Micron Technology, Inc.	Arithmetic operations in memory
KR102728101B1 (en)*	2020-11-02	2024-11-08	주식회사 딥엑스	System and memory for artificial neural network
US12235778B2 (en)	2020-11-02	2025-02-25	Deepx Co., Ltd.	Memory system of artificial neural network based on artificial neural network data locality
US11922051B2 (en)	2020-11-02	2024-03-05	Deepx Co., Ltd.	Memory controller, processor and system for artificial neural network
US11972137B2 (en)	2020-11-02	2024-04-30	Deepx Co., Ltd.	System and memory for artificial neural network (ANN) optimization using ANN data locality
US11757960B1 (en)	2022-02-23	2023-09-12	Iheartmedia Management Services, Inc.	Disaster recovery in media broadcast system
US12009024B2 (en)	2022-03-03	2024-06-11	Changxin Memory Technologies, Inc.	Circuit for reading out data, method for reading out data and memory
US12131059B2 (en)	2022-03-03	2024-10-29	Changxin Memory Technologies, Inc.	Data writing circuit, data writing method, and memory
US12027211B2 (en)*	2022-05-26	2024-07-02	Micron Technology, Inc.	Partial block handling protocol in a non-volatile memory device
US20240055045A1 (en)*	2022-08-12	2024-02-15	Ap Memory Technology Corporation	Memory device having segmented data line structure
TWI859758B (en)*	2023-03-10	2024-10-21	修平學校財團法人修平科技大學	Dual port static random access memory

Family Cites Families (80)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
GB2084361B (en)	1980-09-19	1984-11-21	Sony Corp	Random access memory arrangements
JPS58207152A (en)	1982-05-28	1983-12-02	Nec Corp	Test system for pipeline arithmetic device
JPS598192A (en)*	1982-07-07	1984-01-17	Toshiba Corp	Semiconductor storage device
JPS5928766A (en)*	1982-08-10	1984-02-15	Sony Corp	Delay circuit
JPS6072020A (en)	1983-09-29	1985-04-24	Nec Corp	Dual port memory circuit
US4533441A (en)*	1984-03-30	1985-08-06	Burlington Industries, Inc.	Practical amorphous iron electroform and method for achieving same
EP0179605B1 (en)	1984-10-17	1992-08-19	Fujitsu Limited	Semiconductor memory device having a serial data input circuit and a serial data output circuit
JPS61144795A (en)*	1984-12-17	1986-07-02	Mitsubishi Electric Corp	semiconductor storage device
JPS61239491A (en)	1985-04-13	1986-10-24	Fujitsu Ltd	Electronic equipment
JPH0778993B2 (en)*	1985-11-05	1995-08-23	株式会社日立製作所	Semiconductor memory
US4823302A (en)*	1987-01-30	1989-04-18	Rca Licensing Corporation	Block oriented random access memory able to perform a data read, a data write and a data refresh operation in one block-access time
US5222047A (en)*	1987-05-15	1993-06-22	Mitsubishi Denki Kabushiki Kaisha	Method and apparatus for driving word line in block access memory
JPH01269294A (en)*	1988-04-20	1989-10-26	Nec Eng Ltd	Memory refresh control system
JPH02158997A (en)*	1988-12-09	1990-06-19	Matsushita Electric Ind Co Ltd	Storage device
KR940008295B1 (en)*	1989-08-28	1994-09-10	가부시기가이샤 히다찌세이사꾸쇼	Semiconductor memory
JP3179793B2 (en)*	1990-05-30	2001-06-25	三菱電機株式会社	Semiconductor memory device and reading method therefor
JP2658533B2 (en)*	1990-08-27	1997-09-30	三菱電機株式会社	Semiconductor storage device
JPH04147492A (en)*	1990-10-11	1992-05-20	Hitachi Ltd	Semiconductor memory
JP3178859B2 (en)	1991-06-05	2001-06-25	株式会社東芝	Random access memory device and pipeline / page mode control method thereof
US5294842A (en)	1991-09-23	1994-03-15	Digital Equipment Corp.	Update synchronizer
JP3186204B2 (en)*	1992-05-13	2001-07-11	日本電気株式会社	Semiconductor dynamic RAM
DE69331061T2 (en)	1992-08-10	2002-06-06	Monolithic System Tech Inc	Fault-tolerant hierarchical bus system
JPH06267275A (en)*	1993-03-10	1994-09-22	Fujitsu Ltd	Circuit and method for controlling sense amplifier
JPH06290582A (en)	1993-04-02	1994-10-18	Nec Corp	Semiconductor memory
US5402388A (en)	1993-12-16	1995-03-28	Mosaid Technologies Incorporated	Variable latency scheme for synchronous memory
JP2616567B2 (en)	1994-09-28	1997-06-04	日本電気株式会社	Semiconductor storage device
JP3013714B2 (en)	1994-09-28	2000-02-28	日本電気株式会社	Semiconductor storage device
JPH08102187A (en)	1994-09-29	1996-04-16	Toshiba Microelectron Corp	Dynamic memory
TW358907B (en)*	1994-11-22	1999-05-21	Monolithic System Tech Inc	A computer system and a method of using a DRAM array as a next level cache memory
US5713005A (en)	1995-02-10	1998-01-27	Townsend And Townsend And Crew Llp	Method and apparatus for pipelining data in an integrated circuit
US5544124A (en)	1995-03-13	1996-08-06	Micron Technology, Inc.	Optimization circuitry and control for a synchronous memory device with programmable latency period
JPH08263985A (en)	1995-03-24	1996-10-11	Nec Corp	Semiconductor memory
US6128700A (en)*	1995-05-17	2000-10-03	Monolithic System Technology, Inc.	System utilizing a DRAM array as a next level cache memory and method for operating same
US5655105A (en)	1995-06-30	1997-08-05	Micron Technology, Inc.	Method and apparatus for multiple latency synchronous pipelined dynamic random access memory
US5598374A (en)*	1995-07-14	1997-01-28	Cirrus Logic, Inc.	Pipeland address memories, and systems and methods using the same
JP2817679B2 (en)	1995-09-20	1998-10-30	日本電気株式会社	Semiconductor memory
JP3843145B2 (en)*	1995-12-25	2006-11-08	株式会社ルネサステクノロジ	Synchronous semiconductor memory device
US5748551A (en)*	1995-12-29	1998-05-05	Micron Technology, Inc.	Memory device with multiple internal banks and staggered command execution
JP4084428B2 (en)*	1996-02-02	2008-04-30	富士通株式会社	Semiconductor memory device
US5666324A (en)*	1996-03-15	1997-09-09	Mitsubishi Denki Kabushiki Kaisha	Clock synchronous semiconductor memory device having current consumption reduced
US5822772A (en)*	1996-03-22	1998-10-13	Industrial Technology Research Institute	Memory controller and method of memory access sequence recordering that eliminates page miss and row miss penalties
US6108229A (en)	1996-05-24	2000-08-22	Shau; Jeng-Jye	High performance embedded semiconductor memory device with multiple dimension first-level bit-lines
US5784705A (en)	1996-07-15	1998-07-21	Mosys, Incorporated	Method and structure for performing pipeline burst accesses in a semiconductor memory
JP3579205B2 (en)*	1996-08-06	2004-10-20	株式会社ルネサステクノロジ	Semiconductor storage device, semiconductor device, data processing device, and computer system
US5808959A (en)	1996-08-07	1998-09-15	Alliance Semiconductor Corporation	Staggered pipeline access scheme for synchronous random access memory
US5787457A (en)*	1996-10-18	1998-07-28	International Business Machines Corporation	Cached synchronous DRAM architecture allowing concurrent DRAM operations
US5901086A (en)*	1996-12-26	1999-05-04	Motorola, Inc.	Pipelined fast-access floating gate memory architecture and method of operation
JP3608597B2 (en)*	1996-12-27	2005-01-12	東燃ゼネラル石油株式会社	Lubricating oil composition for internal combustion engines
JPH10233091A (en)*	1997-02-21	1998-09-02	Hitachi Ltd	Semiconductor storage device and data processing device
KR100268429B1 (en)	1997-03-18	2000-11-01	윤종용	Synchronous memory device
JP3504104B2 (en)	1997-04-03	2004-03-08	富士通株式会社	Synchronous DRAM
TW378330B (en)*	1997-06-03	2000-01-01	Fujitsu Ltd	Semiconductor memory device
US5856940A (en)*	1997-08-15	1999-01-05	Silicon Aquarius, Inc.	Low latency DRAM cell and method therefor
JPH1186557A (en)	1997-09-11	1999-03-30	Mitsubishi Electric Corp	Synchronous storage device and data read method in synchronous storage device
JP4039532B2 (en)*	1997-10-02	2008-01-30	株式会社ルネサステクノロジ	Semiconductor integrated circuit device
JP3565474B2 (en)*	1997-11-14	2004-09-15	シャープ株式会社	Semiconductor storage device
US6072743A (en)	1998-01-13	2000-06-06	Mitsubishi Denki Kabushiki Kaisha	High speed operable semiconductor memory device with memory blocks arranged about the center
FR2773635B1 (en)*	1998-01-15	2003-01-10	St Microelectronics Sa	DEVICE AND METHOD FOR READING REWRITE OF A DYNAMIC LIVE MEMORY CELL
CA2805213A1 (en)	1998-04-01	1999-10-01	Mosaid Technologies Incorporated	Semiconductor memory asynchronous pipeline
TW430815B (en)*	1998-06-03	2001-04-21	Fujitsu Ltd	Semiconductor integrated circuit memory and, bus control method
US6178517B1 (en)*	1998-07-24	2001-01-23	International Business Machines Corporation	High bandwidth DRAM with low operating power modes
US6510503B2 (en)*	1998-07-27	2003-01-21	Mosaid Technologies Incorporated	High bandwidth memory interface
JP2000137983A (en)*	1998-08-26	2000-05-16	Toshiba Corp	Semiconductor storage device
JP4043151B2 (en)*	1998-08-26	2008-02-06	富士通株式会社	High speed random accessible memory device
KR100523180B1 (en)*	1998-08-26	2005-10-24	후지쯔 가부시끼가이샤	High-speed random access memory device
JP2000163969A (en)*	1998-09-16	2000-06-16	Fujitsu Ltd	Semiconductor storage device
JP4106782B2 (en)	1998-12-21	2008-06-25	船井電機株式会社	TV phone equipment
JP3267259B2 (en)*	1998-12-22	2002-03-18	日本電気株式会社	Semiconductor storage device
US6208577B1 (en)*	1999-04-16	2001-03-27	Micron Technology, Inc.	Circuit and method for refreshing data stored in a memory cell
US6151236A (en)*	2000-02-29	2000-11-21	Enhanced Memory Systems, Inc.	Enhanced bus turnaround integrated circuit dynamic random access memory device
JP3376998B2 (en)*	2000-03-08	2003-02-17	日本電気株式会社	Semiconductor storage device
WO2002005281A2 (en)	2000-07-07	2002-01-17	Mosaid Technologies Incorporated	A high speed dram architecture with uniform access latency
CN1303610C (en)*	2000-07-07	2007-03-07	睦塞德技术公司	Method and appts. for synchronzation of row and column access operation
CA2313948A1 (en)	2000-07-07	2002-01-07	Mosaid Technologies Incorporated	Low delay, conditional differential data sense and capture scheme for a high speed dram
US6356509B1 (en)*	2000-12-05	2002-03-12	Sonicblue, Incorporated	System and method for efficiently implementing a double data rate memory architecture
US6650573B2 (en)*	2001-03-29	2003-11-18	International Business Machines Corporation	Data input/output method
JP4246971B2 (en)*	2002-07-15	2009-04-02	富士通マイクロエレクトロニクス株式会社	Semiconductor memory
JP4229674B2 (en)*	2002-10-11	2009-02-25	Ｎｅｃエレクトロニクス株式会社	Semiconductor memory device and control method thereof
US6853602B2 (en)*	2003-05-09	2005-02-08	Taiwan Semiconductor Manufacturing Company, Ltd.	Hiding error detecting/correcting latency in dynamic random access memory (DRAM)
JP2011086557A (en)	2009-10-16	2011-04-28	Zippertubing (Japan) Ltd	Jumper for surface mounting

2001
- 2001-06-29WOPCT/CA2001/000949patent/WO2002005281A2/enactiveApplication Filing
- 2001-06-29EPEP09151003Apatent/EP2056301B1/ennot_activeExpired - Lifetime
- 2001-06-29EPEP01949156Apatent/EP1307884A2/ennot_activeWithdrawn
- 2001-06-29KRKR1020087018695Apatent/KR100872213B1/ennot_activeExpired - Fee Related
- 2001-06-29JPJP2002508799Apatent/JP2004502267A/enactivePending
- 2001-06-29AUAU2001270400Apatent/AU2001270400A1/ennot_activeAbandoned
- 2001-06-29KRKR1020037000245Apatent/KR100816915B1/ennot_activeExpired - Fee Related
- 2001-06-29KRKR1020077026509Apatent/KR100869870B1/ennot_activeExpired - Fee Related
- 2001-06-29CNCNB018124275Apatent/CN1307647C/ennot_activeExpired - Fee Related
2003
- 2003-01-06USUS10/336,850patent/US6711083B2/ennot_activeExpired - Fee Related
2004
- 2004-03-19USUS10/804,182patent/US6891772B2/ennot_activeExpired - Lifetime
2005
- 2005-04-08USUS11/101,413patent/US7012850B2/ennot_activeExpired - Lifetime
2006
- 2006-03-06USUS11/367,589patent/US7450444B2/ennot_activeExpired - Lifetime
2008
- 2008-10-10USUS12/249,413patent/US7751262B2/ennot_activeExpired - Fee Related
2010
- 2010-05-21USUS12/785,051patent/US8045413B2/ennot_activeExpired - Fee Related
2011
- 2011-09-20USUS13/237,202patent/US8503250B2/ennot_activeExpired - Fee Related

Publication number	Publication date
WO2002005281A9 (en)	2002-11-28
US6891772B2 (en)	2005-05-10
KR100816915B1 (en)	2008-03-26
KR20030028544A (en)	2003-04-08
US20090034347A1 (en)	2009-02-05
US20120008426A1 (en)	2012-01-12
US8045413B2 (en)	2011-10-25
US20060146641A1 (en)	2006-07-06
US8503250B2 (en)	2013-08-06
US20040202036A1 (en)	2004-10-14
KR100872213B1 (en)	2008-12-05
EP1307884A2 (en)	2003-05-07
JP2004502267A (en)	2004-01-22
CN1307647C (en)	2007-03-28
EP2056301A3 (en)	2009-06-17
KR100869870B1 (en)	2008-11-24
WO2002005281A2 (en)	2002-01-17
EP2056301A2 (en)	2009-05-06
US7450444B2 (en)	2008-11-11
KR20080077292A (en)	2008-08-21
US20100232237A1 (en)	2010-09-16
US20050180246A1 (en)	2005-08-18
KR20070114851A (en)	2007-12-04
EP2056301B1 (en)	2011-11-30
US6711083B2 (en)	2004-03-23
US7751262B2 (en)	2010-07-06
CN1446358A (en)	2003-10-01
WO2002005281A3 (en)	2002-05-30
US20030151966A1 (en)	2003-08-14
US7012850B2 (en)	2006-03-14

Publication	Publication Date	Title
AU2001270400A1 (en)	2002-01-21	A high speed dram architecture with uniform access latency
EP1564749B8 (en)	2009-02-18	Multi-port memory based on DRAM core
AU2001237561A1 (en)	2001-10-03	Data access
AU2001278328A1 (en)	2002-02-05	Distributive access controller
AU2002232815A1 (en)	2002-07-08	Rack for memory storage devices
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AU2001270400A1 - A high speed dram architecture with uniform access latency - Google Patents

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