Power Distribution Network Generator

Power Distribution Network Generator #

The power distribution network (PDN) generator module in OpenROAD (pdn)is based on the PDNGEN tool.This utility aims to simplify the process of adding a power grid into afloorplan. The aim is to specify a small set of power grid policies to beapplied to the design, such as layers to use, stripe width and spacing,then have the utility generate the actual metal straps. Grid policies canbe defined over the stdcell area, and over areas occupied by macros.

Commands#

Note

Parameters in square brackets[-paramparam] are optional.
Parameters without square brackets-param2param2 are required.

Build Power Grid#

Build a power grid in accordance with the information specified.

pdngen[-check_only][-dont_add_pins][-failed_via_reportfile][-report_only][-reset][-ripup][-skip_trim]

Options#

Switch Name	Description
`[-dont_add_pins]`	Prevent the creation of block pins.
`[-failed_via_report]`	Generate a report file which can be viewed in the DRC viewer for all the failed vias (ie. those that did not get built or were removed).
`[-report_only]`	Print the current specifications.
`[-check_only]`	Check the current setup for errors.
`[-reset]`	Reset the grid and domain specifications.
`[-ripup]`	Ripup the existing power grid, as specified by the voltage domains.
`[-skip_trim]`	Skip the metal trim step, which attempts to remove metal stubs.

Define Voltage Domain#

Defines a named voltage domain with the names of the power and ground nets for a region.

This region must already exist in the floorplan before referencing it with theset_voltage_domain command. If the-region argument is not supplied then region is the entire core area of the design.

Example usage:

set_voltage_domain-powerVDD-groundVSSset_voltage_domain-nameTEMP_ANALOG-regionTEMP_ANALOG-powerVIN-groundVSSset_voltage_domain-regiontest_domain-powerVDD-groundVSS-secondary_powerVREG

set_voltage_domain-groundground_net_name-namedomain_name-powerpower_net_name[-regionregion_name][-secondary_powersecondary_power_net][-switched_powerswitched_power_net]

Options#

Switch Name	Description
`-ground`	Specifies the name of the ground net for this voltage domain.
`-name`	Defines the name of the voltage domain. The default is “Core” or region name if provided.
`-power`	Specifies the name of the power net for this voltage domain.
`[-region]`	Specifies a region of the design occupied by this voltage domain.
`[-secondary_power]`	Specifies the name of the secondary power net for this voltage domain.
`[-switched_power]`	Specifies the name of the switched power net for switched power domains.

Define Power Grids#

Warning

define_pdn_grid is overloaded with two different signatures. Take note of the arguments when using this function!

Method 1: General UsageDefine the rules to describe a power grid pattern to be placed in the design.

Example usage:

define_pdn_grid-namemain_grid-pins{metal7}-voltage_domain{CORETEMP_ANALOG}

Method 2: MacrosDefine the rules for one or more macros.

Example usage:

define_pdn_grid-macro-nameram-orient{R0R180MXMY}-grid_over_pg_pins-starts_withPOWERdefine_pdn_grid-macro-namerotated_rams-orient{EFEWFW}-grid_over_boundary-starts_withPOWER

Method 3: Modify existing power domainModify pre-existing power domain.

Example usage:

define_pdn_grid-namemain_grid-existing

define_pdn_grid[-cellslist_of_cells][-default][-existing][-grid_over_pg_pins|-grid_over_boundary][-halolist_of_halo_values][-instanceslist_of_instances][-macro][-namename][-obstructionslist_of_layers][-orientlist_of_valid_orientations][-pinslist_of_pin_layers][-power_controlsignal_name][-power_control_networkSTAR|DAISY][-power_switch_cellname][-starts_withPOWER|GROUND][-voltage_domainslist_of_domain_names]

Options#

Switch Name	Description
`[-cells]`	For a macro, defines a set of valid cells. Macros which are instances of one of these cells will use this grid specification.
`[-default]`	For a macro, specifies this is a default grid that can be overwritten.
`[-existing]`	Flag to enable defining for existing routing solution.
`[-grid_over_pg_pins]`,`[-grid_over_boundary]`	Place the power grid over the power ground pins of the macro. (Default True), or Place the power grid over the entire macro.
`[-halo]`	Specifies the default minimum separation of selected macros from other cells in the design. This is only used if the macro does not define halo values in the LEF description. If 1 value is specified it will be used on all 4 sides, if two values are specified, the first will be applied to left/right sides and the second will be applied to top/bottom sides, if 4 values are specified, then they are applied to left, bottom, right and top sides respectively (Default: 0).
`[-instances]`	For a macro, defines a set of valid instances. Macros with a matching instance name will use this grid specification.
`[-macro]`	Defines the type of grid being added as a macro.
`[-name]`	Defines a name to use when referring to this grid definition.
`[-obstructions]`	Specify the layers to add routing blockages, in order to avoid DRC violations.
`[-orient]`	For a macro, defines a set of valid orientations. LEF orientations (N, FN, S, FS, E, FE, W and FW) can be used as well as standard geometry orientations (R0, R90, R180, R270, MX, MY, MXR90 and MYR90). Macros with one of the valid orientations will use this grid specification.
`[-pins]`	Defines a list of layers which where the power straps will be promoted to block pins.
`[-power_control]`	Defines the name of the power control signal used to control the switching of the inserted power switches.
`[-power_control_network]`	Defines the structure of the power control signal network. Choose from STAR, or DAISY. If STAR is specified, then the network is wired as a high-fanout net with the power control signal driving the power control pin on every power switch. If DAISY is specified then the power switches are connected in a daisy-chain configuration - note, this requires that the power swich defined by the`define_power_switch_cell` command defines an acknowledge pin for the switch.
`[-power_switch_cell]`	Defines the name of the coarse grain power switch cell to be used wherever the stdcell rail connects to the rest of the power grid. The mesh layers are associated with the unswitched power net of the voltage domain, whereas the stdcell rail is associated with the switched power net of the voltage domain. The placement of a power switch cell connects the unswitched power mesh to the switched power rail through a power switch defined by the`define_power_switch_cell` command.
`[-starts_with]`	Specifies whether the first strap placed will be POWER or GROUND (Default: GROUND).
`[-voltage_domains]`	Defines the name of the voltage domain for this grid (Default: Last domain created).

Power Switch Cell insertion#

Define a power switch cell that will be inserted into a power grid

Example usage:

define_power_switch_cell-namePOWER_SWITCH-controlSLEEP-power_switchableVDD-powerVDDG-groundVSS

define_power_switch_cell-controlcontrol_pin-groundground_pin-namename-powerunswitched_power_pin-power_switchablepower_switchable_pin[-acknowledgeacknowledge_pin_name]

Options#

Switch Name	Description
`-control`	The name of the power control port of the power switch cell.
`-ground`	Defines the name of the pin that connects to the ground net.
`-name`	The name of the power switch cell.
`-power`	Defines the name of the pin that connects to the unswitched power net.
`-power_switchable`	Defines the name of the pin that outputs the switched power net.
`[-acknowledge]`	Defines the name of the output control signal of the power control switch if it has one.

Add PDN Straps/Stripes#

Defines a pattern of power and ground stripes in a single layer to be added to a power grid.

Example usage:

add_pdn_stripe-gridmain_grid-layermetal1-followpinsadd_pdn_stripe-gridmain_grid-layermetal2-width0.17-followpinsadd_pdn_stripe-gridmain_grid-layermetal4-width0.48-pitch56.0-offset2-starts_withGROUND

add_pdn_stripe-layerlayer_name[-extend_to_boundary][-extend_to_core_ring][-followpins][-gridgrid_name][-netslist_of_nets][-number_of_strapscount][-offsetoffset_value][-pitchpitch_value][-snap_to_grid][-spacingspacing_value][-starts_withPOWER|GROUND][-widthwidth_value]

Options#

Switch Name	Description
`-layer`	Specifies the name of the layer for these stripes.
`[-extend_to_boundary]`	Extend the stripes to the boundary of the grid.
`[-extend_to_core_ring]`	Extend the stripes to the core PG ring.
`[-followpins]`	Indicates that the stripe forms part of the stdcell rails, pitch and spacing are dictated by the stdcell rows, the`-width` is not needed if it can be determined from the cells.
`[-grid]`	Specifies the grid to which this stripe definition will be added. (Default: Last grid defined by`define_pdn_grid`).
`[-nets]`	Limit straps to just this list of nets.
`[-number_of_straps]`	Number of power/ground pairs to add.
`[-offset]`	Value for the offset of the stripe from the lower left corner of the design core area.
`[-pitch]`	Value for the distance between each power/ground pair.
`[-snap_to_grid]`	Snap the stripes to the defined routing grid.
`[-spacing]`	Optional specification of the spacing between power/ground pairs within a single pitch (Default: pitch / 2).
`[-starts_with]`	Specifies whether the first strap placed will be POWER or GROUND (Default: grid setting). This cannot be used with -followpins (Flip sites when initializing floorplan to change followpin power/ground order).
`[-width]`	Value for the width of stripe.

Add Sroute Connect#

Theadd_sroute_connect command is employed for connecting pins locatedoutside of a specific power domain to the power ring, especially in cases wheremultiple power domains are present. Duringsroute, multi-cut vias will be addedfor new connections. The use of fixed vias from the technology file should bespecified for the connection using theadd_sroute_connect command. The useof max_rows and max_columns defines the row and column limit for the via stack.

Example:

add_sroute_connect-net"VIN"-outerNet"VDD"-layers{met1met4}-cut_pitch{200200}-fixed_vias{M3M4_PR_M}-metalwidths{10001000}-metalspaces{800}-ongrid{met3met4}-insts"temp_analog_1.a_header_0"

add_sroute_connect-cut_pitchlist_of_2_pitch_values-layerslist_of_2_layers-netnet[-fixed_viaslist_of_vias][-instsinst][-max_columnscolumns][-max_rowsrows][-metalspacesmetalspaces][-metalwidthsmetalwidths][-ongridongrid_layers][-outerNetouterNet]

Options#

Switch Name	Description
`-cut_pitch`	Distances in x and y between via cuts when the two layers are parallel, e.g., overlapping stdcell rails.
`-layers`	The metal layers for vertical stripes within inner power ring.
`-net`	The inner net where the power ring exists.
`[-fixed_vias]`	List of fixed vias to be used to form the via stack.
`[-insts]`	List of all the instances that contain the pin that needs to get connected with power ring. (Default:nothing)
`[-max_columns]`	Maximum number of columns when adding arrays of vias. (Default:10)
`[-max_rows]`	Maximum number of rows when adding arrays of vias. (Default:10)
`[-metalspaces]`	Spacing of each metal layer.
`[-metalwidths]`	Width for each metal layer.
`[-ongrid]`	List of intermediate layers in a via stack to snap onto a routing grid.
`[-outerNet]`	The outer net where instances/pins that need to get connected exist.

Add PDN Ring#

Theadd_pdn_ring command is used to define power/ground rings around a grid region.The ring structure is built using two layers that are orthogonal to each other.A power/ground pair will be added above and below the grid using the horizontallayer, with another power/ground pair to the left and right using the vertical layer.Together these 4 pairs of power/ground stripes form a ring around the specified grid.Power straps on these layers that are inside the enclosed region are extend toconnect to the ring.

Example usage:

add_pdn_ring-gridmain_grid-layer{metal6metal7}-widths5.0-spacings3.0-core_offset5

add_pdn_ring-layerslayer_name-spacingsspacing_value|list_of_2_values-widthswidth_value|list_of_2_values[-add_connect][-connect_to_pad_layerslayers][-connect_to_pads][-core_offsetsoffset_value][-extend_to_boundary][-gridgrid_name][-netslist_of_nets][-pad_offsetsoffset_value][-starts_withPOWER|GROUND][-allow_out_of_die]

Options#

Switch Name	Description
`-layers`	Specifies the name of the layer for these stripes.
`-spacings`	Optional specification of the spacing between power/ground pairs within a single pitch. (Default: pitch / 2).
`-widths`	Value for the width of the stdcell rail.
`[-add_connect]`	Automatically add a connection between the two layers.
`[-connect_to_pad_layers]`	Restrict the pad pins layers to this list.
`[-connect_to_pads]`	The core side of the pad pins will be connected to the ring.
`[-core_offsets]`	Value for the offset of the ring from the grid region.
`[-extend_to_boundary]`	Extend the rings to the grid boundary.
`[-grid]`	Specifies the name of the grid to which this ring defintion will be added. (Default: Last grid created by`define_pdn_grid`).
`[-nets]`	Limit straps to just this list of nets.
`[-pad_offsets]`	When defining a power grid for the top level of an SoC, can be used to define the offset of ring from the pad cells.
`[-starts_with]`	Specifies whether the first strap placed will be POWER or GROUND (Default: grid setting).
`[-allow_out_of_die]`	If specified, the ring shapes are allowed to be outside the die boundary. This should be used with caution.

Add PDN Connect#

Theadd_pdn_connect command is used to define which layers in the power grid are to be connected together. During power grid generation, vias will be added for overlapping power nets and overlapping ground nets. The use of fixed vias from the technology file can be specified or else via stacks will be constructed using VIARULEs. If VIARULEs are not available in the technology, then fixed vias must be used.

Example usage:

add_pdn_connect-gridmain_grid-layers{metal1metal2}-cut_pitch0.16add_pdn_connect-gridmain_grid-layers{metal2metal4}add_pdn_connect-gridmain_grid-layers{metal4metal7}add_pdn_connect-gridram-layers{metal4metal5}add_pdn_connect-gridram-layers{metal5metal6}add_pdn_connect-gridram-layers{metal6metal7}add_pdn_connect-gridrotated_rams-layers{metal4metal6}add_pdn_connect-gridrotated_rams-layers{metal6metal7}

add_pdn_connect-layerslist_of_two_layers[-cut_pitchpitch_value][-dont_use_viaslist_of_vias][-fixed_viaslist_of_fixed_vias][-gridgrid_name][-max_columnscolumns][-max_rowsrows][-ongridongrid_layers][-split_cutssplit_cuts_mapping][-split_cuts_staggered]

Options#

Switch Name	Description
`-layers`	Layers to be connected where there are overlapping power or overlapping ground nets.
`[-cut_pitch]`	When the two layers are parallel e.g. overlapping stdcell rails, specify the distance between via cuts.
`[-dont_use_vias]`	List or pattern of vias to not use to form the via stack.
`[-fixed_vias]`	List of fixed vias to be used to form the via stack.
`[-grid]`	Specifies the name of the grid definition to which this connection will be added (Default: Last grid created by`define_pdn_grid`).
`[-max_columns]`	Maximum number of columns when adding arrays of vias.
`[-max_rows]`	Maximum number of rows when adding arrays of vias.
`[-ongrid]`	List of intermediate layers in a via stack to snap onto a routing grid.
`[-split_cuts]`	Specifies layers to use split cuts on with an associated pitch, for example`{metal30.380metal50.500}`.
`[-split_cuts_staggered]`	Specified if the split cuts should be staggered, ie. the ground vias will appear with an offset of pitch / 2.

Repairing power grid vias after detailed routing#

To remove vias which generate DRC violations after detailed placementand routing userepair_pdn_vias.

repair_pdn_vias[-all][-netnet_name]

Options#

Switch Name	Description
`[-all]`	Repair vias on all supply nets.
`[-net]`	Repair only vias on the specified net.

Useful Developer Commands#

If you are a developer, you might find these useful. More details can be found in thesource file or theswig file.

Command Name	Description
`name_cmp`	Compare 2 input strings`obj1` and`obj2` if they are equal.
`check_design_state`	Check if design is loaded.
`get_layer`	Get the layer reference of layer name.
`get_voltage_domains`	Gets a Tcl list of power domains in design.
`match_orientation`	Checks if a given orientation`orient` is within a list of orientations`orients`.
`get_insts`	Get Tcl list of instances.
`get_masters`	Get Tcl list of masters.
`get_one_to_two`	If a Tcl list has one element`{x}`, Tcl list`{xx}` is returned. If a Tcl list of two elements`{yy}`, list as is returned. Otherwise, for any other list lengths, error is triggered.
`get_one_to_four`	Similar logic for above function, except the logic only works for lists of length one, two and four respectively. All other list lengths triggers error.
`get_obstructions`	Get Tcl list of layers.
`get_starts_with`	If value starts with`POWER`, return 1; else if value starts with`GROUND` return 0; else return error.
`get_mterm`	Find master terminal.
`get_orientations`	Get list of valid orientations.

Example scripts#

Defining a SoC power grid with pads#

add_global_connection -net VDD -pin_pattern {^VDD$} -poweradd_global_connection -net VDD -pin_pattern {^VDDPE$}add_global_connection -net VDD -pin_pattern {^VDDCE$}add_global_connection -net VSS -pin_pattern {^VSS$} -groundadd_global_connection -net VSS -pin_pattern {^VSSE$}set_voltage_domain -power VDD -ground VSSdefine_pdn_grid -name "Core"add_pdn_ring -grid "Core" -layers {metal8 metal9} -widths 5.0 -spacings 2.0 -core_offsets 4.5 -connect_to_padsadd_pdn_stripe -followpins -layer metal1 -extend_to_core_ringadd_pdn_stripe -layer metal4 -width 0.48 -pitch 56.0 -offset 2.0 -extend_to_core_ringadd_pdn_stripe -layer metal7 -width 1.40 -pitch 40.0 -offset 2.0 -extend_to_core_ringadd_pdn_stripe -layer metal8 -width 1.40 -pitch 40.0 -offset 2.0 -extend_to_core_ringadd_pdn_stripe -layer metal9 -width 1.40 -pitch 40.0 -offset 2.0 -extend_to_core_ringadd_pdn_connect -layers {metal1 metal4}add_pdn_connect -layers {metal4 metal7}add_pdn_connect -layers {metal7 metal8}add_pdn_connect -layers {metal8 metal9}add_pdn_connect -layers {metal9 metal10}pdngen

Regression tests#

There are a set of regression tests in./test. For more information, refer to thissection.

Simply run the following script:

./test/regression

Limitations#

Currently the following assumptions are made:

The design is rectangular
The input floorplan includes the stdcell rows, placement of all macro blocks and IO pins.
The stdcells rows will be cut around macro placements

FAQs#

Check outGitHub discussion about this tool.

License#

BSD 3-Clause License. SeeLICENSE file.

Contents

Movatterモバイル変換

Power Distribution Network Generator

Contents

Power Distribution Network Generator#

Commands#

Build Power Grid#

Options#

Define Voltage Domain#

Options#

Define Power Grids#

Options#

Power Switch Cell insertion#

Options#

Add PDN Straps/Stripes#

Options#

Add Sroute Connect#

Options#

Add PDN Ring#

Options#

Add PDN Connect#

Options#

Repairing power grid vias after detailed routing#

Options#

Useful Developer Commands#

Example scripts#

Defining a SoC power grid with pads#

Regression tests#

Limitations#

FAQs#

License#

Power Distribution Network Generator #