Clock Tree Synthesis
Contents
Clock Tree Synthesis#
The clock tree synthesis module in OpenROAD (cts
) is based on TritonCTS2.0. It is available from theclock_tree_synthesis
command. TritonCTS 2.0performs on-the-fly characterization. Thus, there is no need to generatecharacterization data. The on-the-fly characterization feature can be optionallycontrolled by parameters specified by theconfigure_cts_characterization
command. Useset_wire_rc
command to set the clock routing layer.
Commands#
Note
Parameters in square brackets
[-paramparam]
are optional.Parameters without square brackets
-param2param2
are required.
Configure CTS Characterization#
Configure key CTS characterization parameters, for example maximum slew and capacitance,as well as the number of steps they will be divided for characterization.
configure_cts_characterization[-max_slewmax_slew][-max_capmax_cap][-slew_stepsslew_steps][-cap_stepscap_steps]
Options#
Switch Name | Description |
---|---|
| Max slew value (in the current time unit) that the characterization will test. If this parameter is omitted, the code would use max slew value for specified buffer in |
| Max capacitance value (in the current capacitance unit) that the characterization will test. If this parameter is omitted, the code would use max cap value for specified buffer in |
| Number of steps that |
| Number of steps that |
Clock Tree Synthesis#
Perform clock tree synthesis.
clock_tree_synthesis[-wire_unitwire_unit][-buf_list<list_of_buffers>][-root_bufroot_buf][-clk_nets<list_of_clk_nets>][-tree_buf<buf>][-distance_between_buffers][-branching_point_buffers_distance][-clustering_exponent][-clustering_unbalance_ratio][-sink_clustering_sizecluster_size][-sink_clustering_max_diametermax_diameter][-macro_clustering_sizecluster_size][-macro_clustering_max_diametermax_diameter][-sink_clustering_enable][-balance_levels][-sink_clustering_levelslevels][-num_static_layers][-sink_clustering_buffer][-obstruction_aware][-apply_ndrstrategy][-insertion_delay][-dont_use_dummy_load][-sink_buffer_max_cap_deratederate_value][-delay_buffer_deratederate_value][-libraryliberty_library_name][-repair_clock_nets][-no_insertion_delay]
Options#
Switch Name | Description |
---|---|
| Tcl list of master cells (buffers) that will be considered when making the wire segments (e.g. |
| The master cell of the buffer that serves as root for the clock tree. If this parameter is omitted, the first master cell from |
| Minimum unit distance between buffers for a specific wire. If this parameter is omitted, the code gets the value from ten times the height of |
| Distance (in microns) between buffers that |
| Distance (in microns) that a branch has to have in order for a buffer to be inserted on a branch end-point. This requires the |
| Value that determines the power used on the difference between sink and means on the CKMeans clustering algorithm. The default value is |
| Value determines each cluster’s maximum capacity during CKMeans. A value of |
| Enables pre-clustering of sinks to create one level of sub-tree before building H-tree. Each cluster is driven by buffer which becomes end point of H-tree structure. |
| Specifies the maximum number of sinks per cluster for the register tree. The allowed values are integers |
| Specifies maximum diameter (in microns) of sink cluster for the register tree. The allowed values are integers |
| Specifies the maximum number of sinks per cluster for the macro tree. The default value is |
| Specifies maximum diameter (in microns) of sink cluster for the macro tree. The default value is |
| Attempt to keep a similar number of levels in the clock tree across non-register cells (e.g., clock-gate or inverter). The default value is |
| String containing the names of the clock roots. If this parameter is omitted, |
| Set the number of static layers. The default value is |
| Set the sink clustering buffer(s) to be used. |
| Enables obstruction-aware buffering such that clock buffers are not placed on top of blockages or hard macros. This option may reduce legalizer displacement, leading to better latency, skew or timing QoR. The default value is |
| Applies 2X spacing non-default rule to clock nets except leaf-level nets following some strategy. There are four strategy options: |
| Don’t apply dummy buffer or inverter cells at clock tree leaves to balance loads. The default values is |
| Use this option to control automatic buffer selection. To favor strong(weak) drive strength buffers use a small(large) value. The default value is |
| This option balances latencies between macro cells and registers by inserting delay buffers. The default value is |
| This option specifies the name of Liberty library from which clock buffers will be selected, such as the LVT or uLVT library. It is assumed that the library has already been loaded using the read_liberty command. If this option is not specified, clock buffers will be chosen from the currently loaded libraries, which may not include LVT or uLVT cells. |
| This option includes fixing long wires inside CTS prior to latency adjustment with delay buffers. This can lead to a more balanced clock tree. The default is not to perform clock net repair. |
| Ignore sink insertion delay in clock tree construction and balancing. |
Instance Name Prefixes#
clock_tree_synthesis
uses the following prefixes for the instances that it inserts:
Instance Prefix | Purpose |
---|---|
clkbuf_regs | Splitting registers from macros |
clkload | Dummy loads to help balance the clock tree |
delaybuf | Delay buffers to help balance the tree |
Report CTS#
This command is used to extract the following metrics after a successfulclock_tree_synthesis
run.
Number of Clock Roots
Number of Buffers Inserted
Number of Clock Subnets
Number of Sinks.
report_cts[-out_filefile]
Options#
Switch Name | Description |
---|---|
| The file to save |
Set CTS configuration#
This command is used to set the configuration of CTS.
set_cts_config[-apply_ndrstrategy][-buf_list<list_of_buffers>][-branching_point_buffers_distancedistance][-clustering_exponentpower][-clustering_unbalance_ratiocapacity][-delay_buffer_deratederate_value][-distance_between_buffersdistance][-libraryliberty_library_name][-macro_clustering_max_diametermax_diameter][-macro_clustering_sizecluster_size][-num_static_layersnum_layers][-root_bufroot_buf][-sink_buffer_max_cap_deratederate_value][-sink_clustering_levelslevels][-sink_clustering_max_diametermax_diameter][-sink_clustering_sizecluster_size][-skip_nets<list_of_clk_nets_to_skip>][-tree_buf<buf>][-wire_unitwire_unit]
Options#
Switch Name | Description |
---|---|
| Applies 2X spacing non-default rule to clock nets except leaf-level nets following some strategy. There are four strategy options: |
| Tcl list of master cells (buffers) that will be considered when making the wire segments (e.g. |
| Distance (in microns) that a branch has to have in order for a buffer to be inserted on a branch end-point. This requires the |
| Value that determines the power used on the difference between sink and means on the CKMeans clustering algorithm. The default value is |
| Value determines each cluster’s maximum capacity during CKMeans. A value of |
| This option balances latencies between macro cells and registers by inserting delay buffers. The default value is |
| Distance (in microns) between buffers that |
| This option specifies the name of Liberty library from which clock buffers will be selected, such as the LVT or uLVT library. It is assumed that the library has already been loaded using the read_liberty command. If this option is not specified, clock buffers will be chosen from the currently loaded libraries, which may not include LVT or uLVT cells. |
| Specifies maximum diameter (in microns) of sink cluster for the macro tree. The default value is |
| Specifies the maximum number of sinks per cluster for the macro tree. The default value is |
| Set the number of static layers. The default value is |
| The master cell of the buffer that serves as root for the clock tree. If this parameter is omitted, the first master cell from |
| Use this option to control automatic buffer selection. To favor strong(weak) drive strength buffers use a small(large) value. The default value is |
| … |
| Specifies maximum diameter (in microns) of sink cluster for the register tree. The allowed values are integers |
| Specifies the maximum number of sinks per cluster for the register tree. The allowed values are integers |
| … |
| Tcl list containing the clock nets to be skipped (e.g. |
| Minimum unit distance between buffers for a specific wire. If this parameter is omitted, the code gets the value from ten times the height of |
Report CTS configuration#
This command is used to extract the configuration of CTS.
report_cts_config
Reset CTS configuration#
This command is used to reset the configuration of CTS. The flags determine which configurations will be reset to their default values. Using it without a flag means resetting all configurations.
reset_cts_config[-apply_ndr][-buf_list][-branching_point_buffers_distance][-clustering_exponent][-clustering_unbalance_ratio][-delay_buffer_derate][-distance_between_buffers][-library][-macro_clustering_max_diameter][-macro_clustering_size][-num_static_layers][-root_buf][-sink_buffer_max_cap_derate][-sink_clustering_levels][-sink_clustering_max_diameter][-sink_clustering_size][-skip_nets][-tree_buf][-wire_unit]
Useful Developer Commands#
If you are a developer, you might find these useful. More details can be found in thesource file or theswig file.
Command Name | Description |
---|---|
| Option to plot the CTS to GUI. |
Example scripts#
clock_tree_synthesis-root_buf"BUF_X4" \-buf_list"BUF_X4" \-wire_unit20report_cts"file.txt"
Regression tests#
There are a set of regression tests in./test
. For more information, refer to thissection.
Simply run the following script:
./test/regression
Limitations#
FAQs#
Check outGitHub discussion about this tool.
References#
Authors#
TritonCTS 2.0 is written by Mateus Fogaça, PhD student in the GraduateProgram on Microelectronics from the Federal University of Rio Grande do Sul(UFRGS), Brazil. Mr. Fogaça’s advisor is Prof. Ricardo Reis.
Many guidance provided by (alphabetic order):
Andrew B. Kahng
Jiajia Li
Kwangsoo Han
Tom Spyrou
License#
BSD 3-Clause License. SeeLICENSE file.