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LLVM 20.0.0git
Classes |Public Types |Public Member Functions |Static Public Member Functions |List of all members
llvm::TargetTransformInfo Class Reference

This pass provides access to the codegen interfaces that are needed for IR-level transformations.More...

#include "llvm/Analysis/TargetTransformInfo.h"

Classes

class  Concept
 
struct  LSRCost
 
struct  MemCmpExpansionOptions
 Returns options for expansion of memcmp. IsZeroCmp is.More...
 
struct  OperandValueInfo
 
struct  PeelingPreferences
 
struct  PointersChainInfo
 Describe known properties for a set of pointers.More...
 
struct  ReductionFlags
 Flags describing the kind of vector reduction.More...
 
struct  UnrollingPreferences
 Parameters that control the generic loop unrolling transformation.More...
 
struct  VPLegalization
 

Public Types

enum  PartialReductionExtendKind {PR_None,PR_SignExtend,PR_ZeroExtend }
 

Public Member Functions

template<typenameT >
 TargetTransformInfo (T Impl)
 Construct a TTI object using a type implementing theConcept API below.
 
 TargetTransformInfo (constDataLayout &DL)
 Construct a baseline TTI object using a minimal implementation of theConcept API below.
 
 TargetTransformInfo (TargetTransformInfo &&Arg)
 
TargetTransformInfooperator= (TargetTransformInfo &&RHS)
 
 ~TargetTransformInfo ()
 
bool invalidate (Function &,constPreservedAnalyses &,FunctionAnalysisManager::Invalidator &)
 Handle the invalidation of this information.
 
bool hasArmWideBranch (bool Thumb)const
 
uint64_t getFeatureMask (constFunction &F)const
 Returns a bitmask constructed from the target-features or fmv-features metadata of a function.
 
bool isMultiversionedFunction (constFunction &F)const
 Returns true if this is an instance of a function with multiple versions.
 
unsigned getMaxNumArgs ()const
 
unsigned getNumBytesToPadGlobalArray (unsignedSize,Type *ArrayType)const
 
Vector Predication Information

Whether the target supports the evl parameter of VP intrinsic efficiently in hardware, for the given opcode and type/alignment.

(see LLVM Language Reference - "Vector Predication Intrinsics").Use of evl is discouraged when that is not the case.

bool hasActiveVectorLength (unsigned Opcode,Type *DataType,Align Alignment)const
 
bool isProfitableToSinkOperands (Instruction *I,SmallVectorImpl<Use * > &Ops)const
 Return true if sinking I's operands to the same basic block as I is profitable, e.g.
 
bool isVectorShiftByScalarCheap (Type *Ty)const
 Return true if it's significantly cheaper to shift a vector by a uniform scalar than by an amount which will vary across each lane.
 
VPLegalization getVPLegalizationStrategy (constVPIntrinsic &PI)const
 

Static Public Member Functions

staticPartialReductionExtendKind getPartialReductionExtendKind (Instruction *I)
 Get the kind of extension that an instruction represents.
 

Generic Target Information

enum  TargetCostKind {TCK_RecipThroughput,TCK_Latency,TCK_CodeSize,TCK_SizeAndLatency }
 The kind of cost model.More...
 
enum  TargetCostConstants {TCC_Free = 0,TCC_Basic = 1,TCC_Expensive = 4 }
 Underlying constants for 'cost' values in this interface.More...
 
InstructionCost getGEPCost (Type *PointeeType,constValue *Ptr,ArrayRef<constValue * >Operands,Type *AccessType=nullptr,TargetCostKindCostKind=TCK_SizeAndLatency)const
 Estimate the cost of a GEP operation when lowered.
 
InstructionCost getPointersChainCost (ArrayRef<constValue * > Ptrs,constValue *Base,constPointersChainInfo &Info,Type *AccessTy,TargetCostKindCostKind=TTI::TCK_RecipThroughput)const
 Estimate the cost of a chain of pointers (typically pointer operands of a chain of loads or stores within same block) operations set when lowered.
 
unsigned getInliningThresholdMultiplier ()const
 
unsigned getInliningCostBenefitAnalysisSavingsMultiplier ()const
 
unsigned getInliningCostBenefitAnalysisProfitableMultiplier ()const
 
int getInliningLastCallToStaticBonus ()const
 
unsigned adjustInliningThreshold (constCallBase *CB)const
 
unsigned getCallerAllocaCost (constCallBase *CB,constAllocaInst *AI)const
 
int getInlinerVectorBonusPercent ()const
 
InstructionCost getMemcpyCost (constInstruction *I)const
 
uint64_t getMaxMemIntrinsicInlineSizeThreshold ()const
 Returns the maximum memset / memcpy size in bytes that still makes it profitable to inline the call.
 
unsigned getEstimatedNumberOfCaseClusters (constSwitchInst &SI,unsigned &JTSize,ProfileSummaryInfo *PSI,BlockFrequencyInfo *BFI)const
 
InstructionCost getInstructionCost (constUser *U,ArrayRef<constValue * >Operands,TargetCostKindCostKind)const
 Estimate the cost of a given IR user when lowered.
 
InstructionCost getInstructionCost (constUser *U,TargetCostKindCostKind)const
 This is a helper function which calls the three-argument getInstructionCost withOperands which are the current operands U has.
 
BranchProbability getPredictableBranchThreshold ()const
 If a branch or a select condition is skewed in one direction by more than this factor, it is very likely to be predicted correctly.
 
InstructionCost getBranchMispredictPenalty ()const
 Returns estimated penalty of a branch misprediction in latency.
 
bool hasBranchDivergence (constFunction *F=nullptr)const
 Return true if branch divergence exists.
 
bool isSourceOfDivergence (constValue *V)const
 Returns whether V is a source of divergence.
 
bool isAlwaysUniform (constValue *V)const
 
bool isValidAddrSpaceCast (unsigned FromAS,unsigned ToAS)const
 Query the target whether the specified address space cast from FromAS to ToAS is valid.
 
bool addrspacesMayAlias (unsigned AS0,unsigned AS1)const
 Return false if aAS0 address cannot possibly alias aAS1 address.
 
unsigned getFlatAddressSpace ()const
 Returns the address space ID for a target's 'flat' address space.
 
bool collectFlatAddressOperands (SmallVectorImpl< int > &OpIndexes,Intrinsic::ID IID)const
 Return any intrinsic address operand indexes which may be rewritten if they use a flat address space pointer.
 
bool isNoopAddrSpaceCast (unsigned FromAS,unsigned ToAS)const
 
bool canHaveNonUndefGlobalInitializerInAddressSpace (unsigned AS)const
 Return true if globals in this address space can have initializers other thanundef.
 
unsigned getAssumedAddrSpace (constValue *V)const
 
bool isSingleThreaded ()const
 
std::pair<constValue *,unsignedgetPredicatedAddrSpace (constValue *V)const
 
ValuerewriteIntrinsicWithAddressSpace (IntrinsicInst *II,Value *OldV,Value *NewV)const
 Rewrite intrinsic callII such thatOldV will be replaced withNewV, which has a different address space.
 
bool isLoweredToCall (constFunction *F)const
 Test whether calls to a function lower to actual program function calls.
 
void getUnrollingPreferences (Loop *L,ScalarEvolution &,UnrollingPreferences &UP,OptimizationRemarkEmitter *ORE)const
 Get target-customized preferences for the generic loop unrolling transformation.
 
bool isHardwareLoopProfitable (Loop *L,ScalarEvolution &SE,AssumptionCache &AC,TargetLibraryInfo *LibInfo,HardwareLoopInfo &HWLoopInfo)const
 Query the target whether it would be profitable to convert the given loop into a hardware loop.
 
unsigned getEpilogueVectorizationMinVF ()const
 
bool preferPredicateOverEpilogue (TailFoldingInfo *TFI)const
 Query the target whether it would be prefered to create a predicated vector loop, which can avoid the need to emit a scalar epilogue loop.
 
TailFoldingStyle getPreferredTailFoldingStyle (bool IVUpdateMayOverflow=true)const
 Query the target what the preferred style of tail folding is.
 
void getPeelingPreferences (Loop *L,ScalarEvolution &SE,PeelingPreferences &PP)const
 Get target-customized preferences for the generic loop peeling transformation.
 
std::optional<Instruction * > instCombineIntrinsic (InstCombiner &IC,IntrinsicInst &II)const
 Targets can implement their own combinations for target-specific intrinsics.
 
std::optional<Value * > simplifyDemandedUseBitsIntrinsic (InstCombiner &IC,IntrinsicInst &II,APInt DemandedMask,KnownBits &Known,bool &KnownBitsComputed)const
 Can be used to implement target-specific instruction combining.
 
std::optional<Value * > simplifyDemandedVectorEltsIntrinsic (InstCombiner &IC,IntrinsicInst &II,APInt DemandedElts,APInt &UndefElts,APInt &UndefElts2,APInt &UndefElts3, std::function< void(Instruction *,unsigned,APInt,APInt &)> SimplifyAndSetOp)const
 Can be used to implement target-specific instruction combining.
 

Scalar Target Information

enum  PopcntSupportKind {PSK_Software,PSK_SlowHardware,PSK_FastHardware }
 Flags indicating the kind of support for population count.More...
 
enum  AddressingModeKind {AMK_PreIndexed,AMK_PostIndexed,AMK_None }
 
bool isLegalAddImmediate (int64_t Imm)const
 Return true if the specified immediate is legal add immediate, that is the target has add instructions which can add a register with the immediate without having to materialize the immediate into a register.
 
bool isLegalAddScalableImmediate (int64_t Imm)const
 Return true if adding the specified scalable immediate is legal, that is the target has add instructions which can add a register with the immediate (multiplied by vscale) without having to materialize the immediate into a register.
 
bool isLegalICmpImmediate (int64_t Imm)const
 Return true if the specified immediate is legal icmp immediate, that is the target has icmp instructions which can compare a register against the immediate without having to materialize the immediate into a register.
 
bool isLegalAddressingMode (Type *Ty,GlobalValue *BaseGV, int64_t BaseOffset,bool HasBaseReg, int64_t Scale,unsigned AddrSpace=0,Instruction *I=nullptr, int64_t ScalableOffset=0)const
 Return true if the addressing mode represented by AM is legal for this target, for a load/store of the specified type.
 
bool isLSRCostLess (constTargetTransformInfo::LSRCost &C1,constTargetTransformInfo::LSRCost &C2)const
 Return true if LSR cost of C1 is lower than C2.
 
bool isNumRegsMajorCostOfLSR ()const
 Return true if LSR major cost is number of registers.
 
bool shouldDropLSRSolutionIfLessProfitable ()const
 Return true if LSR should drop a found solution if it's calculated to be less profitable than the baseline.
 
bool isProfitableLSRChainElement (Instruction *I)const
 
bool canMacroFuseCmp ()const
 Return true if the target can fuse a compare and branch.
 
bool canSaveCmp (Loop *L,BranchInst **BI,ScalarEvolution *SE,LoopInfo *LI,DominatorTree *DT,AssumptionCache *AC,TargetLibraryInfo *LibInfo)const
 Return true if the target can save a compare for loop count, for example hardware loop saves a compare.
 
AddressingModeKind getPreferredAddressingMode (constLoop *L,ScalarEvolution *SE)const
 Return the preferred addressing mode LSR should make efforts to generate.
 
bool isLegalMaskedStore (Type *DataType,Align Alignment)const
 Return true if the target supports masked store.
 
bool isLegalMaskedLoad (Type *DataType,Align Alignment)const
 Return true if the target supports masked load.
 
bool isLegalNTStore (Type *DataType,Align Alignment)const
 Return true if the target supports nontemporal store.
 
bool isLegalNTLoad (Type *DataType,Align Alignment)const
 Return true if the target supports nontemporal load.
 
bool isLegalBroadcastLoad (Type *ElementTy,ElementCount NumElements)const
 \Returns true if the target supports broadcasting a load to a vector of type <NumElements x ElementTy>.
 
bool isLegalMaskedScatter (Type *DataType,Align Alignment)const
 Return true if the target supports masked scatter.
 
bool isLegalMaskedGather (Type *DataType,Align Alignment)const
 Return true if the target supports masked gather.
 
bool forceScalarizeMaskedGather (VectorType *Type,Align Alignment)const
 Return true if the target forces scalarizing of llvm.masked.gather intrinsics.
 
bool forceScalarizeMaskedScatter (VectorType *Type,Align Alignment)const
 Return true if the target forces scalarizing of llvm.masked.scatter intrinsics.
 
bool isLegalMaskedCompressStore (Type *DataType,Align Alignment)const
 Return true if the target supports masked compress store.
 
bool isLegalMaskedExpandLoad (Type *DataType,Align Alignment)const
 Return true if the target supports masked expand load.
 
bool isLegalStridedLoadStore (Type *DataType,Align Alignment)const
 Return true if the target supports strided load.
 
bool isLegalInterleavedAccessType (VectorType *VTy,unsigned Factor,Align Alignment,unsigned AddrSpace)const
 Return true is the target supports interleaved access for the given vector typeVTy, interleave factorFactor, alignmentAlignment and address spaceAddrSpace.
 
bool isLegalMaskedVectorHistogram (Type *AddrType,Type *DataType)const
 
bool isLegalAltInstr (VectorType *VecTy,unsigned Opcode0,unsigned Opcode1,constSmallBitVector &OpcodeMask)const
 Return true if this is an alternating opcode pattern that can be lowered to a single instruction on the target.
 
bool enableOrderedReductions ()const
 Return true if we should be enabling ordered reductions for the target.
 
bool hasDivRemOp (Type *DataType,bool IsSigned)const
 Return true if the target has a unified operation to calculate division and remainder.
 
bool hasVolatileVariant (Instruction *I,unsigned AddrSpace)const
 Return true if the given instruction (assumed to be a memory access instruction) has a volatile variant.
 
bool prefersVectorizedAddressing ()const
 Return true if target doesn't mind addresses in vectors.
 
InstructionCost getScalingFactorCost (Type *Ty,GlobalValue *BaseGV,StackOffset BaseOffset,bool HasBaseReg, int64_t Scale,unsigned AddrSpace=0)const
 Return the cost of the scaling factor used in the addressing mode represented by AM for this target, for a load/store of the specified type.
 
bool LSRWithInstrQueries ()const
 Return true if the loop strength reduce pass should make Instruction* based TTI queries toisLegalAddressingMode().
 
bool isTruncateFree (Type *Ty1,Type *Ty2)const
 Return true if it's free to truncate a value of type Ty1 to type Ty2.
 
bool isProfitableToHoist (Instruction *I)const
 Return true if it is profitable to hoist instruction in the then/else to before if.
 
bool useAA ()const
 
bool isTypeLegal (Type *Ty)const
 Return true if this type is legal.
 
unsigned getRegUsageForType (Type *Ty)const
 Returns the estimated number of registers required to representTy.
 
bool shouldBuildLookupTables ()const
 Return true if switches should be turned into lookup tables for the target.
 
bool shouldBuildLookupTablesForConstant (Constant *C)const
 Return true if switches should be turned into lookup tables containing this constant value for the target.
 
bool shouldBuildRelLookupTables ()const
 Return true if lookup tables should be turned into relative lookup tables.
 
bool useColdCCForColdCall (Function &F)const
 Return true if the input function which is cold at all call sites, should use coldcc calling convention.
 
bool isTargetIntrinsicTriviallyScalarizable (Intrinsic::IDID)const
 
bool isTargetIntrinsicWithScalarOpAtArg (Intrinsic::IDID,unsigned ScalarOpdIdx)const
 Identifies if the vector form of the intrinsic has a scalar operand.
 
bool isTargetIntrinsicWithOverloadTypeAtArg (Intrinsic::IDID, int OpdIdx)const
 Identifies if the vector form of the intrinsic is overloaded on the type of the operand at indexOpdIdx, or on the return type ifOpdIdx is -1.
 
bool isTargetIntrinsicWithStructReturnOverloadAtField (Intrinsic::IDID, int RetIdx)const
 Identifies if the vector form of the intrinsic that returns a struct is overloaded at the struct element indexRetIdx.
 
InstructionCost getScalarizationOverhead (VectorType *Ty,constAPInt &DemandedElts,bool Insert,bool Extract,TTI::TargetCostKindCostKind,ArrayRef<Value * > VL={})const
 Estimate the overhead of scalarizing an instruction.
 
InstructionCost getOperandsScalarizationOverhead (ArrayRef<constValue * > Args,ArrayRef<Type * > Tys,TTI::TargetCostKindCostKind)const
 Estimate the overhead of scalarizing an instructions unique non-constant operands.
 
bool supportsEfficientVectorElementLoadStore ()const
 If target has efficient vector element load/store instructions, it can return true here so that insertion/extraction costs are not added to the scalarization cost of a load/store.
 
bool supportsTailCalls ()const
 If the target supports tail calls.
 
bool supportsTailCallFor (constCallBase *CB)const
 If target supports tail call onCB.
 
bool enableAggressiveInterleaving (bool LoopHasReductions)const
 Don't restrict interleaved unrolling to small loops.
 
MemCmpExpansionOptions enableMemCmpExpansion (bool OptSize,bool IsZeroCmp)const
 
bool enableSelectOptimize ()const
 Should the Select Optimization pass be enabled and ran.
 
bool shouldTreatInstructionLikeSelect (constInstruction *I)const
 Should the Select Optimization pass treat the given instruction like a select, potentially converting it to a conditional branch.
 
bool enableInterleavedAccessVectorization ()const
 Enable matching of interleaved access groups.
 
bool enableMaskedInterleavedAccessVectorization ()const
 Enable matching of interleaved access groups that contain predicated accesses or gaps and therefore vectorized using masked vector loads/stores.
 
bool isFPVectorizationPotentiallyUnsafe ()const
 Indicate that it is potentially unsafe to automatically vectorize floating-point operations because the semantics of vector and scalar floating-point semantics may differ.
 
bool allowsMisalignedMemoryAccesses (LLVMContext &Context,unsignedBitWidth,unsignedAddressSpace=0,Align Alignment=Align(1),unsigned *Fast=nullptr)const
 Determine if the target supports unaligned memory accesses.
 
PopcntSupportKind getPopcntSupport (unsigned IntTyWidthInBit)const
 Return hardware support for population count.
 
bool haveFastSqrt (Type *Ty)const
 Return true if the hardware has a fast square-root instruction.
 
bool isExpensiveToSpeculativelyExecute (constInstruction *I)const
 Return true if the cost of the instruction is too high to speculatively execute and should be kept behind a branch.
 
bool isFCmpOrdCheaperThanFCmpZero (Type *Ty)const
 Return true if it is faster to check if a floating-point value is NaN (or not-NaN) versus a comparison against a constant FP zero value.
 
InstructionCost getFPOpCost (Type *Ty)const
 Return the expected cost of supporting the floating point operation of the specified type.
 
InstructionCost getIntImmCost (constAPInt &Imm,Type *Ty,TargetCostKindCostKind)const
 Return the expected cost of materializing for the given integer immediate of the specified type.
 
InstructionCost getIntImmCostInst (unsigned Opc,unsignedIdx,constAPInt &Imm,Type *Ty,TargetCostKindCostKind,Instruction *Inst=nullptr)const
 Return the expected cost of materialization for the given integer immediate of the specified type for a given instruction.
 
InstructionCost getIntImmCostIntrin (Intrinsic::ID IID,unsignedIdx,constAPInt &Imm,Type *Ty,TargetCostKindCostKind)const
 
InstructionCost getIntImmCodeSizeCost (unsigned Opc,unsignedIdx,constAPInt &Imm,Type *Ty)const
 Return the expected cost for the given integer when optimising for size.
 
bool preferToKeepConstantsAttached (constInstruction &Inst,constFunction &Fn)const
 It can be advantageous to detach complex constants from their uses to make their generation cheaper.
 

Vector Target Information

enum  ShuffleKind {
  SK_Broadcast,SK_Reverse,SK_Select,SK_Transpose,
  SK_InsertSubvector,SK_ExtractSubvector,SK_PermuteTwoSrc,SK_PermuteSingleSrc,
  SK_Splice
}
 The various kinds of shuffle patterns for vector queries.More...
 
enum  OperandValueKind {OK_AnyValue,OK_UniformValue,OK_UniformConstantValue,OK_NonUniformConstantValue }
 Additional information about an operand's possible values.More...
 
enum  OperandValueProperties {OP_None = 0,OP_PowerOf2 = 1,OP_NegatedPowerOf2 = 2 }
 Additional properties of an operand's values.More...
 
enum  RegisterKind {RGK_Scalar,RGK_FixedWidthVector,RGK_ScalableVector }
 
enum class  CacheLevel {L1D,L2D }
 The possible cache levels.More...
 
enum class  CastContextHint : uint8_t {
  None,Normal,Masked,GatherScatter,
  Interleave,Reversed
}
 Represents a hint about the context in which a cast is used.More...
 
enum  MemIndexedMode {
  MIM_Unindexed,MIM_PreInc,MIM_PreDec,MIM_PostInc,
  MIM_PostDec
}
 The type of load/store indexing.More...
 
enum struct  ReductionShuffle {SplitHalf,Pairwise }
 
staticOperandValueInfo getOperandInfo (constValue *V)
 Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
 
staticCastContextHint getCastContextHint (constInstruction *I)
 Calculates a CastContextHint fromI.
 
staticbool requiresOrderedReduction (std::optional<FastMathFlags > FMF)
 A helper function to determine the type of reduction algorithm used for a givenOpcode and set ofFastMathFlagsFMF.
 
unsigned getNumberOfRegisters (unsigned ClassID)const
 
bool hasConditionalLoadStoreForType (Type *Ty=nullptr)const
 
unsigned getRegisterClassForType (boolVector,Type *Ty=nullptr)const
 
constchargetRegisterClassName (unsigned ClassID)const
 
TypeSize getRegisterBitWidth (RegisterKind K)const
 
unsigned getMinVectorRegisterBitWidth ()const
 
std::optional<unsignedgetMaxVScale ()const
 
std::optional<unsignedgetVScaleForTuning ()const
 
bool isVScaleKnownToBeAPowerOfTwo ()const
 
bool shouldMaximizeVectorBandwidth (TargetTransformInfo::RegisterKind K)const
 
ElementCount getMinimumVF (unsigned ElemWidth,bool IsScalable)const
 
unsigned getMaximumVF (unsigned ElemWidth,unsigned Opcode)const
 
unsigned getStoreMinimumVF (unsigned VF,Type *ScalarMemTy,Type *ScalarValTy)const
 
bool shouldConsiderAddressTypePromotion (constInstruction &I,bool &AllowPromotionWithoutCommonHeader)const
 
unsigned getCacheLineSize ()const
 
std::optional<unsignedgetCacheSize (CacheLevel Level)const
 
std::optional<unsignedgetCacheAssociativity (CacheLevel Level)const
 
std::optional<unsignedgetMinPageSize ()const
 
unsigned getPrefetchDistance ()const
 
unsigned getMinPrefetchStride (unsigned NumMemAccesses,unsigned NumStridedMemAccesses,unsigned NumPrefetches,bool HasCall)const
 Some HW prefetchers can handle accesses up to a certain constant stride.
 
unsigned getMaxPrefetchIterationsAhead ()const
 
bool enableWritePrefetching ()const
 
bool shouldPrefetchAddressSpace (unsigned AS)const
 
InstructionCost getPartialReductionCost (unsigned Opcode,Type *InputTypeA,Type *InputTypeB,Type *AccumType,ElementCount VF,PartialReductionExtendKind OpAExtend,PartialReductionExtendKind OpBExtend, std::optional<unsigned > BinOp=std::nullopt)const
 
unsigned getMaxInterleaveFactor (ElementCount VF)const
 
InstructionCost getArithmeticInstrCost (unsigned Opcode,Type *Ty,TTI::TargetCostKindCostKind=TTI::TCK_RecipThroughput,TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue,TTI::OP_None},TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue,TTI::OP_None},ArrayRef<constValue * > Args={},constInstruction *CxtI=nullptr,constTargetLibraryInfo *TLibInfo=nullptr)const
 This is an approximation of reciprocal throughput of a math/logic op.
 
InstructionCost getAltInstrCost (VectorType *VecTy,unsigned Opcode0,unsigned Opcode1,constSmallBitVector &OpcodeMask,TTI::TargetCostKindCostKind=TTI::TCK_RecipThroughput)const
 Returns the cost estimation for alternating opcode pattern that can be lowered to a single instruction on the target.
 
InstructionCost getShuffleCost (ShuffleKind Kind,VectorType *Tp,ArrayRef< int > Mask={},TTI::TargetCostKindCostKind=TTI::TCK_RecipThroughput, intIndex=0,VectorType *SubTp=nullptr,ArrayRef<constValue * > Args={},constInstruction *CxtI=nullptr)const
 
InstructionCost getCastInstrCost (unsigned Opcode,Type *Dst,Type *Src,TTI::CastContextHint CCH,TTI::TargetCostKindCostKind=TTI::TCK_SizeAndLatency,constInstruction *I=nullptr)const
 
InstructionCost getExtractWithExtendCost (unsigned Opcode,Type *Dst,VectorType *VecTy,unsignedIndex)const
 
InstructionCost getCFInstrCost (unsigned Opcode,TTI::TargetCostKindCostKind=TTI::TCK_SizeAndLatency,constInstruction *I=nullptr)const
 
InstructionCost getCmpSelInstrCost (unsigned Opcode,Type *ValTy,Type *CondTy,CmpInst::Predicate VecPred,TTI::TargetCostKindCostKind=TTI::TCK_RecipThroughput,OperandValueInfo Op1Info={OK_AnyValue,OP_None},OperandValueInfo Op2Info={OK_AnyValue,OP_None},constInstruction *I=nullptr)const
 
InstructionCost getVectorInstrCost (unsigned Opcode,Type *Val,TTI::TargetCostKindCostKind,unsignedIndex=-1,Value *Op0=nullptr,Value *Op1=nullptr)const
 
InstructionCost getVectorInstrCost (unsigned Opcode,Type *Val,TTI::TargetCostKindCostKind,unsignedIndex,Value *Scalar,ArrayRef< std::tuple<Value *,User *, int > > ScalarUserAndIdx)const
 
InstructionCost getVectorInstrCost (constInstruction &I,Type *Val,TTI::TargetCostKindCostKind,unsignedIndex=-1)const
 
InstructionCost getReplicationShuffleCost (Type *EltTy, int ReplicationFactor, int VF,constAPInt &DemandedDstElts,TTI::TargetCostKindCostKind)const
 
InstructionCost getMemoryOpCost (unsigned Opcode,Type *Src,Align Alignment,unsignedAddressSpace,TTI::TargetCostKindCostKind=TTI::TCK_RecipThroughput,OperandValueInfo OpdInfo={OK_AnyValue,OP_None},constInstruction *I=nullptr)const
 
InstructionCost getVPMemoryOpCost (unsigned Opcode,Type *Src,Align Alignment,unsignedAddressSpace,TTI::TargetCostKindCostKind=TTI::TCK_RecipThroughput,constInstruction *I=nullptr)const
 
InstructionCost getMaskedMemoryOpCost (unsigned Opcode,Type *Src,Align Alignment,unsignedAddressSpace,TTI::TargetCostKindCostKind=TTI::TCK_RecipThroughput)const
 
InstructionCost getGatherScatterOpCost (unsigned Opcode,Type *DataTy,constValue *Ptr,bool VariableMask,Align Alignment,TTI::TargetCostKindCostKind=TTI::TCK_RecipThroughput,constInstruction *I=nullptr)const
 
InstructionCost getStridedMemoryOpCost (unsigned Opcode,Type *DataTy,constValue *Ptr,bool VariableMask,Align Alignment,TTI::TargetCostKindCostKind=TTI::TCK_RecipThroughput,constInstruction *I=nullptr)const
 
InstructionCost getInterleavedMemoryOpCost (unsigned Opcode,Type *VecTy,unsigned Factor,ArrayRef<unsigned > Indices,Align Alignment,unsignedAddressSpace,TTI::TargetCostKindCostKind=TTI::TCK_RecipThroughput,bool UseMaskForCond=false,bool UseMaskForGaps=false)const
 
InstructionCost getArithmeticReductionCost (unsigned Opcode,VectorType *Ty, std::optional<FastMathFlags > FMF,TTI::TargetCostKindCostKind=TTI::TCK_RecipThroughput)const
 Calculate the cost of vector reduction intrinsics.
 
InstructionCost getMinMaxReductionCost (Intrinsic::ID IID,VectorType *Ty,FastMathFlags FMF=FastMathFlags(),TTI::TargetCostKindCostKind=TTI::TCK_RecipThroughput)const
 
InstructionCost getMulAccReductionCost (bool IsUnsigned,Type *ResTy,VectorType *Ty,TTI::TargetCostKindCostKind=TTI::TCK_RecipThroughput)const
 Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of an Add reduction with multiply and optional extensions.
 
InstructionCost getExtendedReductionCost (unsigned Opcode,bool IsUnsigned,Type *ResTy,VectorType *Ty,FastMathFlags FMF,TTI::TargetCostKindCostKind=TTI::TCK_RecipThroughput)const
 Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of a reduction with an extension.
 
InstructionCost getIntrinsicInstrCost (constIntrinsicCostAttributes &ICA,TTI::TargetCostKindCostKind)const
 
InstructionCost getCallInstrCost (Function *F,Type *RetTy,ArrayRef<Type * > Tys,TTI::TargetCostKindCostKind=TTI::TCK_SizeAndLatency)const
 
unsigned getNumberOfParts (Type *Tp)const
 
InstructionCost getAddressComputationCost (Type *Ty,ScalarEvolution *SE=nullptr,constSCEV *Ptr=nullptr)const
 
InstructionCost getCostOfKeepingLiveOverCall (ArrayRef<Type * > Tys)const
 
bool getTgtMemIntrinsic (IntrinsicInst *Inst,MemIntrinsicInfo &Info)const
 
unsigned getAtomicMemIntrinsicMaxElementSize ()const
 
ValuegetOrCreateResultFromMemIntrinsic (IntrinsicInst *Inst,Type *ExpectedType)const
 
TypegetMemcpyLoopLoweringType (LLVMContext &Context,Value *Length,unsigned SrcAddrSpace,unsigned DestAddrSpace,Align SrcAlign,Align DestAlign, std::optional<uint32_t > AtomicElementSize=std::nullopt)const
 
void getMemcpyLoopResidualLoweringType (SmallVectorImpl<Type * > &OpsOut,LLVMContext &Context,unsigned RemainingBytes,unsigned SrcAddrSpace,unsigned DestAddrSpace,Align SrcAlign,Align DestAlign, std::optional<uint32_t > AtomicCpySize=std::nullopt)const
 
bool areInlineCompatible (constFunction *Caller,constFunction *Callee)const
 
unsigned getInlineCallPenalty (constFunction *F,constCallBase &Call,unsigned DefaultCallPenalty)const
 Returns a penalty for invoking callCall inF.
 
bool areTypesABICompatible (constFunction *Caller,constFunction *Callee,constArrayRef<Type * > &Types)const
 
bool isIndexedLoadLegal (enumMemIndexedModeMode,Type *Ty)const
 
bool isIndexedStoreLegal (enumMemIndexedModeMode,Type *Ty)const
 
unsigned getLoadStoreVecRegBitWidth (unsigned AddrSpace)const
 
bool isLegalToVectorizeLoad (LoadInst *LI)const
 
bool isLegalToVectorizeStore (StoreInst *SI)const
 
bool isLegalToVectorizeLoadChain (unsigned ChainSizeInBytes,Align Alignment,unsigned AddrSpace)const
 
bool isLegalToVectorizeStoreChain (unsigned ChainSizeInBytes,Align Alignment,unsigned AddrSpace)const
 
bool isLegalToVectorizeReduction (constRecurrenceDescriptor &RdxDesc,ElementCount VF)const
 
bool isElementTypeLegalForScalableVector (Type *Ty)const
 
unsigned getLoadVectorFactor (unsigned VF,unsigned LoadSize,unsigned ChainSizeInBytes,VectorType *VecTy)const
 
unsigned getStoreVectorFactor (unsigned VF,unsigned StoreSize,unsigned ChainSizeInBytes,VectorType *VecTy)const
 
bool preferFixedOverScalableIfEqualCost ()const
 
bool preferInLoopReduction (unsigned Opcode,Type *Ty,ReductionFlags Flags)const
 
bool preferPredicatedReductionSelect (unsigned Opcode,Type *Ty,ReductionFlags Flags)const
 
bool preferEpilogueVectorization ()const
 Return true if the loop vectorizer should consider vectorizing an otherwise scalar epilogue loop.
 
bool shouldExpandReduction (constIntrinsicInst *II)const
 
ReductionShuffle getPreferredExpandedReductionShuffle (constIntrinsicInst *II)const
 
unsigned getGISelRematGlobalCost ()const
 
unsigned getMinTripCountTailFoldingThreshold ()const
 
bool supportsScalableVectors ()const
 
bool enableScalableVectorization ()const
 

Detailed Description

This pass provides access to the codegen interfaces that are needed for IR-level transformations.

Definition at line212 of fileTargetTransformInfo.h.

Member Enumeration Documentation

◆ AddressingModeKind

enumllvm::TargetTransformInfo::AddressingModeKind
Enumerator
AMK_PreIndexed 
AMK_PostIndexed 
AMK_None 

Definition at line780 of fileTargetTransformInfo.h.

◆ CacheLevel

enum classllvm::TargetTransformInfo::CacheLevel
strong

The possible cache levels.

Enumerator
L1D 
L2D 

Definition at line1239 of fileTargetTransformInfo.h.

◆ CastContextHint

enum classllvm::TargetTransformInfo::CastContextHint :uint8_t
strong

Represents a hint about the context in which a cast is used.

For zext/sext, the context of the cast is the operand, which must be a load of some kind. For trunc, the context is of the cast is the single user of the instruction, which must be a store of some kind.

This enum allows the vectorizer to give getCastInstrCost an idea of the type of cast it's dealing with, as not every cast is equal. For instance, the zext of a load may be free, but the zext of an interleaving load can be (very) expensive!

SeegetCastContextHint to compute a CastContextHint from a cast Instruction*. Callers can use it if they don't need to override the context and just want it to be calculated from the instruction.

FIXME: This handles the types of load/store that the vectorizer can produce, which are the cases where the context instruction is most likely to be incorrect. There are other situations where that can happen too, which might be handled here but in the long run a more general solution of costing multiple instructions at the same times may be better.

Enumerator
None 

The cast is not used with a load/store of any kind.

Normal 

The cast is used with a normal load/store.

Masked 

The cast is used with a masked load/store.

GatherScatter 

The cast is used with a gather/scatter.

Interleave 

The cast is used with an interleaved load/store.

Reversed 

The cast is used with a reversed load/store.

Definition at line1389 of fileTargetTransformInfo.h.

◆ MemIndexedMode

enumllvm::TargetTransformInfo::MemIndexedMode

The type of load/store indexing.

Enumerator
MIM_Unindexed 

No indexing.

MIM_PreInc 

Pre-incrementing.

MIM_PreDec 

Pre-decrementing.

MIM_PostInc 

Post-incrementing.

MIM_PostDec 

Post-decrementing.

Definition at line1696 of fileTargetTransformInfo.h.

◆ OperandValueKind

enumllvm::TargetTransformInfo::OperandValueKind

Additional information about an operand's possible values.

Enumerator
OK_AnyValue 
OK_UniformValue 
OK_UniformConstantValue 
OK_NonUniformConstantValue 

Definition at line1118 of fileTargetTransformInfo.h.

◆ OperandValueProperties

enumllvm::TargetTransformInfo::OperandValueProperties

Additional properties of an operand's values.

Enumerator
OP_None 
OP_PowerOf2 
OP_NegatedPowerOf2 

Definition at line1126 of fileTargetTransformInfo.h.

◆ PartialReductionExtendKind

enumllvm::TargetTransformInfo::PartialReductionExtendKind
Enumerator
PR_None 
PR_SignExtend 
PR_ZeroExtend 

Definition at line214 of fileTargetTransformInfo.h.

◆ PopcntSupportKind

enumllvm::TargetTransformInfo::PopcntSupportKind

Flags indicating the kind of support for population count.

Compared to the SW implementation, HW support is supposed to significantly boost the performance when the population is dense, and it may or may not degrade performance if the population is sparse. A HW support is considered as "Fast" if it can outperform, or is on a par with, SW implementation when the population is sparse; otherwise, it is considered as "Slow".

Enumerator
PSK_Software 
PSK_SlowHardware 
PSK_FastHardware 

Definition at line719 of fileTargetTransformInfo.h.

◆ ReductionShuffle

enum structllvm::TargetTransformInfo::ReductionShuffle
strong
Enumerator
SplitHalf 
Pairwise 

Definition at line1788 of fileTargetTransformInfo.h.

◆ RegisterKind

enumllvm::TargetTransformInfo::RegisterKind
Enumerator
RGK_Scalar 
RGK_FixedWidthVector 
RGK_ScalableVector 

Definition at line1180 of fileTargetTransformInfo.h.

◆ ShuffleKind

enumllvm::TargetTransformInfo::ShuffleKind

The various kinds of shuffle patterns for vector queries.

Enumerator
SK_Broadcast 

Broadcast element 0 to all other elements.

SK_Reverse 

Reverse the order of the vector.

SK_Select 

Selects elements from the corresponding lane of either source operand.

This is equivalent to a vector select with a constant condition operand.

SK_Transpose 

Transpose two vectors.

SK_InsertSubvector 

InsertSubvector. Index indicates start offset.

SK_ExtractSubvector 

ExtractSubvector Index indicates start offset.

SK_PermuteTwoSrc 

Merge elements from two source vectors into one with any shuffle mask.

SK_PermuteSingleSrc 

Shuffle elements of single source vector with any shuffle mask.

SK_Splice 

Concatenates elements from the first input vector with elements of the second input vector.

Returning a vector of the same type as the input vectors. Index indicates start offset in first input vector.

Definition at line1098 of fileTargetTransformInfo.h.

◆ TargetCostConstants

enumllvm::TargetTransformInfo::TargetCostConstants

Underlying constants for 'cost' values in this interface.

Many APIs in this interface return a cost. This enum defines the fundamental values that should be used to interpret (and produce) those costs. The costs are returned as an int rather than a member of this enumeration because it is expected that the cost of one IR instruction may have a multiplicative factor to it or otherwise won't fit directly into the enum. Moreover, it is common to sum or average costs which works better as simple integral values. Thus this enum only provides constants. Also note that the returned costs are signed integers to make it natural to add, subtract, and test with zero (a common boundary condition). It is not expected that 2^32 is a realistic cost to be modeling at any point.

Note that these costs should usually reflect the intersection of code-size cost and execution cost. A free instruction is typically one that folds into another instruction. For example, reg-to-reg moves can often be skipped by renaming the registers in the CPU, but they still are encoded and thus wouldn't be considered 'free' here.

Enumerator
TCC_Free 

Expected to fold away in lowering.

TCC_Basic 

The cost of a typical 'add' instruction.

TCC_Expensive 

The cost of a 'div' instruction on x86.

Definition at line288 of fileTargetTransformInfo.h.

◆ TargetCostKind

enumllvm::TargetTransformInfo::TargetCostKind

The kind of cost model.

There are several different cost models that can be customized by the target. The normalization of each cost model may be target specific. e.g. TCK_SizeAndLatency should be comparable to target thresholds such as those derived fromMCSchedModel::LoopMicroOpBufferSize etc.

Enumerator
TCK_RecipThroughput 

Reciprocal throughput.

TCK_Latency 

The latency of instruction.

TCK_CodeSize 

Instruction code size.

TCK_SizeAndLatency 

The weighted sum of size and latency.

Definition at line263 of fileTargetTransformInfo.h.

Constructor & Destructor Documentation

◆ TargetTransformInfo()[1/3]

template<typenameT >
llvm::TargetTransformInfo::TargetTransformInfo(T Impl)

Construct a TTI object using a type implementing theConcept API below.

This is used by targets to construct a TTI wrapping their target-specific implementation that encodes appropriate costs for their target.

Definition at line3180 of fileTargetTransformInfo.h.

◆ TargetTransformInfo()[2/3]

TargetTransformInfo::TargetTransformInfo(constDataLayoutDL)
explicit

Construct a baseline TTI object using a minimal implementation of theConcept API below.

The TTI implementation will reflect the information in theDataLayout provided if non-null.

Definition at line202 of fileTargetTransformInfo.cpp.

◆ TargetTransformInfo()[3/3]

TargetTransformInfo::TargetTransformInfo(TargetTransformInfo && Arg)

Definition at line207 of fileTargetTransformInfo.cpp.

◆ ~TargetTransformInfo()

TargetTransformInfo::~TargetTransformInfo()
default

Member Function Documentation

◆ addrspacesMayAlias()

bool llvm::TargetTransformInfo::addrspacesMayAlias(unsigned AS0,
unsigned AS1 
) const

Return false if aAS0 address cannot possibly alias aAS1 address.

Definition at line310 of fileTargetTransformInfo.cpp.

Referenced byllvm::expandMemMoveAsLoop().

◆ adjustInliningThreshold()

unsigned TargetTransformInfo::adjustInliningThreshold(constCallBaseCB) const
Returns
A value to be added to the inlining threshold.

Definition at line235 of fileTargetTransformInfo.cpp.

◆ allowsMisalignedMemoryAccesses()

bool TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContextContext,
unsigned BitWidth,
unsigned AddressSpace =0,
Align Alignment =Align(1),
unsignedFast =nullptr 
) const

Determine if the target supports unaligned memory accesses.

Definition at line685 of fileTargetTransformInfo.cpp.

Referencesllvm::BitWidth, andllvm::CallingConv::Fast.

Referenced byfoldConsecutiveLoads().

◆ areInlineCompatible()

bool TargetTransformInfo::areInlineCompatible(constFunctionCaller,
constFunctionCallee 
) const
Returns
True if the two functions have compatible attributes for inlining purposes.

Definition at line1284 of fileTargetTransformInfo.cpp.

Referenced byfunctionsHaveCompatibleAttributes().

◆ areTypesABICompatible()

bool TargetTransformInfo::areTypesABICompatible(constFunctionCaller,
constFunctionCallee,
constArrayRef<Type * > & Types 
) const
Returns
True if the caller and callee agree on howTypes will be passed to or returned from the callee. to the callee.
Parameters
TypesList of types to check.

Definition at line1296 of fileTargetTransformInfo.cpp.

◆ canHaveNonUndefGlobalInitializerInAddressSpace()

bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const

Return true if globals in this address space can have initializers other thanundef.

Definition at line329 of fileTargetTransformInfo.cpp.

◆ canMacroFuseCmp()

bool TargetTransformInfo::canMacroFuseCmp() const

Return true if the target can fuse a compare and branch.

Loop-strength-reduction (LSR) uses that knowledge to adjust its cost calculation for the instructions in a loop.

Definition at line449 of fileTargetTransformInfo.cpp.

◆ canSaveCmp()

bool TargetTransformInfo::canSaveCmp(LoopL,
BranchInst ** BI,
ScalarEvolutionSE,
LoopInfoLI,
DominatorTreeDT,
AssumptionCacheAC,
TargetLibraryInfoLibInfo 
) const

Return true if the target can save a compare for loop count, for example hardware loop saves a compare.

Definition at line453 of fileTargetTransformInfo.cpp.

◆ collectFlatAddressOperands()

bool TargetTransformInfo::collectFlatAddressOperands(SmallVectorImpl< int > & OpIndexes,
Intrinsic::ID IID 
) const

Return any intrinsic address operand indexes which may be rewritten if they use a flat address space pointer.

Returns
true if the intrinsic was handled.

Definition at line319 of fileTargetTransformInfo.cpp.

◆ enableAggressiveInterleaving()

bool TargetTransformInfo::enableAggressiveInterleaving(bool LoopHasReductions) const

Don't restrict interleaved unrolling to small loops.

Definition at line653 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationCostModel::selectInterleaveCount().

◆ enableInterleavedAccessVectorization()

bool TargetTransformInfo::enableInterleavedAccessVectorization() const

Enable matching of interleaved access groups.

Definition at line672 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizePass::processLoop().

◆ enableMaskedInterleavedAccessVectorization()

bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const

Enable matching of interleaved access groups that contain predicated accesses or gaps and therefore vectorized using masked vector loads/stores.

Definition at line676 of fileTargetTransformInfo.cpp.

Referenced byuseMaskedInterleavedAccesses().

◆ enableMemCmpExpansion()

TargetTransformInfo::MemCmpExpansionOptions TargetTransformInfo::enableMemCmpExpansion(bool OptSize,
bool IsZeroCmp 
) const

Definition at line659 of fileTargetTransformInfo.cpp.

◆ enableOrderedReductions()

bool TargetTransformInfo::enableOrderedReductions() const

Return true if we should be enabling ordered reductions for the target.

Definition at line543 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizePass::processLoop().

◆ enableScalableVectorization()

bool TargetTransformInfo::enableScalableVectorization() const
Returns
true when scalable vectorization is preferred.

Definition at line1420 of fileTargetTransformInfo.cpp.

Referenced bydetermineVPlanVF(), andllvm::LoopVectorizeHints::LoopVectorizeHints().

◆ enableSelectOptimize()

bool TargetTransformInfo::enableSelectOptimize() const

Should the Select Optimization pass be enabled and ran.

Definition at line663 of fileTargetTransformInfo.cpp.

◆ enableWritePrefetching()

bool TargetTransformInfo::enableWritePrefetching() const
Returns
True if prefetching should also be done for writes.

Definition at line858 of fileTargetTransformInfo.cpp.

◆ forceScalarizeMaskedGather()

bool TargetTransformInfo::forceScalarizeMaskedGather(VectorTypeType,
Align Alignment 
) const

Return true if the target forces scalarizing of llvm.masked.gather intrinsics.

Definition at line506 of fileTargetTransformInfo.cpp.

Referenced byllvm::slpvectorizer::BoUpSLP::canVectorizeLoads(), andoptimizeCallInst().

◆ forceScalarizeMaskedScatter()

bool TargetTransformInfo::forceScalarizeMaskedScatter(VectorTypeType,
Align Alignment 
) const

Return true if the target forces scalarizing of llvm.masked.scatter intrinsics.

Definition at line511 of fileTargetTransformInfo.cpp.

Referenced byoptimizeCallInst().

◆ getAddressComputationCost()

InstructionCost TargetTransformInfo::getAddressComputationCost(TypeTy,
ScalarEvolutionSE =nullptr,
constSCEVPtr =nullptr 
) const
Returns
The cost of the address computation. For most targets this can be merged into the instruction indexing mode. Some targets might want to distinguish between address computation for memory operations on vector types and scalar types. Such targets should override this function. The 'SE' parameter holds pointer for the scalar evolution object which is used in order to get the Ptr step value in case of constant stride. The 'Ptr' parameter holdsSCEV of the access pointer.

Definition at line1198 of fileTargetTransformInfo.cpp.

Referencesassert(), andPtr.

Referenced bychainToBasePointerCost(), andllvm::VPWidenMemoryRecipe::computeCost().

◆ getAltInstrCost()

InstructionCost TargetTransformInfo::getAltInstrCost(VectorTypeVecTy,
unsigned Opcode0,
unsigned Opcode1,
constSmallBitVectorOpcodeMask,
TTI::TargetCostKind CostKind =TTI::TCK_RecipThroughput 
) const

Returns the cost estimation for alternating opcode pattern that can be lowered to a single instruction on the target.

InX86 this is for the addsub instruction which corrsponds to a Shuffle + Fadd + FSub pattern in IR. This function expects two opcodes:Opcode1 andOpcode2 being selected byOpcodeMask. The mask contains one bit per lane and is a0 whenOpcode0 is selected and1 when Opcode1 is selected.VecTy is the vector type of the instruction to be generated.

Definition at line967 of fileTargetTransformInfo.cpp.

Referencesassert(), andCostKind.

◆ getArithmeticInstrCost()

InstructionCost TargetTransformInfo::getArithmeticInstrCost(unsigned Opcode,
TypeTy,
TTI::TargetCostKind CostKind =TTI::TCK_RecipThroughput,
TTI::OperandValueInfo Opd1Info ={TTI::OK_AnyValueTTI::OP_None},
TTI::OperandValueInfo Opd2Info ={TTI::OK_AnyValueTTI::OP_None},
ArrayRef<constValue * > Args ={},
constInstructionCxtI =nullptr,
constTargetLibraryInfoTLibInfo =nullptr 
) const

This is an approximation of reciprocal throughput of a math/logic op.

A higher cost indicates less expected throughput. From Agner Fog's guides, reciprocal throughput is "the average number ofclock cycles per instruction when the instructions are not part of alimiting dependency chain." Therefore, costs should be scaled to account for multiple execution units on the target that can process this type of instruction. For example, if there are 5 scalar integer units and 2 vector integer units that can calculate an 'add' in a single cycle, this model should indicate that the cost of the vector add instruction is 2.5 times the cost of the scalar add instruction.Args is an optional argument which holds the instruction operands values so the TTI can analyze those values searching for special cases or optimizations based on those values.CxtI is the optional original context instruction, if one exists, to provide even more information.TLibInfo is used to search for platform specific vector library functions for instructions that might be converted to calls (e.g. frem).

Definition at line940 of fileTargetTransformInfo.cpp.

Referencesassert(),CostKind,getCallInstrCost(),llvm::VectorType::getElementCount(),llvm::TargetLibraryInfo::getLibFunc(),llvm::TargetLibraryInfo::getName(),llvm::Type::getScalarType(), andllvm::TargetLibraryInfo::isFunctionVectorizable().

Referenced byllvm::VPWidenRecipe::computeCost(),llvm::VPHistogramRecipe::computeCost(),llvm::VPWidenSelectRecipe::computeCost(),llvm::VPReductionRecipe::computeCost(),costAndCollectOperands(),llvm::foldBranchToCommonDest(),llvm::LoopVectorizationCostModel::getDivRemSpeculationCost(),llvm::LoopVectorizationCostModel::getInstructionCost(),llvm::LoopVectorizationCostModel::getReductionPatternCost(), andvisitIVCast().

◆ getArithmeticReductionCost()

InstructionCost TargetTransformInfo::getArithmeticReductionCost(unsigned Opcode,
VectorTypeTy,
std::optional<FastMathFlagsFMF,
TTI::TargetCostKind CostKind =TTI::TCK_RecipThroughput 
) const

Calculate the cost of vector reduction intrinsics.

This is the cost of reducing the vector value of typeTy to a scalar value using the operation denoted byOpcode. TheFastMathFlags parameterFMF indicates what type of reduction we are performing:

  1. Tree-wise. This is the typical 'fast' reduction performed that involves successively splitting a vector into half and doing the operation on the pair of halves until you have a scalar value. For example: (v0, v1, v2, v3) ((v0+v2), (v1+v3), undef, undef) ((v0+v2+v1+v3), undef, undef, undef) This is the default behaviour for integer operations, whereas for floating point we only do this ifFMF indicates that reassociation is allowed.
  2. Ordered. For a vector with N elements this involves performing N operations in lane order, starting with an initial scalar value, i.e. result = InitVal + v0 result = result + v1 result = result + v2 result = result + v3 This is only the case for FP operations and when reassociation is not allowed.

Definition at line1215 of fileTargetTransformInfo.cpp.

Referencesassert(), andCostKind.

Referenced byllvm::VPReductionRecipe::computeCost(), andllvm::LoopVectorizationCostModel::getReductionPatternCost().

◆ getAssumedAddrSpace()

unsigned TargetTransformInfo::getAssumedAddrSpace(constValueV) const

Definition at line334 of fileTargetTransformInfo.cpp.

Referenced byisAddressExpression().

◆ getAtomicMemIntrinsicMaxElementSize()

unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const
Returns
The maximum element size, in bytes, for an element unordered-atomic memory intrinsic.

Definition at line1256 of fileTargetTransformInfo.cpp.

◆ getBranchMispredictPenalty()

InstructionCost TargetTransformInfo::getBranchMispredictPenalty() const

Returns estimated penalty of a branch misprediction in latency.

Indicates how aggressive the target wants for eliminating unpredictable branches. A zero return value means extra optimization applied to them should be minimal.

Definition at line285 of fileTargetTransformInfo.cpp.

Referenced byfoldTwoEntryPHINode().

◆ getCacheAssociativity()

std::optional<unsigned > TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const
Returns
The associativity of the cache level, if available.

Definition at line834 of fileTargetTransformInfo.cpp.

◆ getCacheLineSize()

unsigned TargetTransformInfo::getCacheLineSize() const
Returns
The size of a cache line in bytes.

Definition at line823 of fileTargetTransformInfo.cpp.

ReferencesCacheLineSize.

◆ getCacheSize()

std::optional<unsigned > TargetTransformInfo::getCacheSize(CacheLevel Level) const
Returns
The size of the cache level in bytes, if available.

Definition at line829 of fileTargetTransformInfo.cpp.

◆ getCallerAllocaCost()

unsigned TargetTransformInfo::getCallerAllocaCost(constCallBaseCB,
constAllocaInstAI 
) const
Returns
The cost of having an Alloca in the caller if not inlined, to be added to the threshold

Definition at line239 of fileTargetTransformInfo.cpp.

◆ getCallInstrCost()

InstructionCost TargetTransformInfo::getCallInstrCost(FunctionF,
TypeRetTy,
ArrayRef<Type * > Tys,
TTI::TargetCostKind CostKind =TTI::TCK_SizeAndLatency 
) const
Returns
The cost of Call instructions.

Definition at line1185 of fileTargetTransformInfo.cpp.

Referencesassert(),CostKind,F, andRetTy.

Referenced byllvm::VPWidenCallRecipe::computeCost(),getArithmeticInstrCost(),llvm::slpvectorizer::BoUpSLP::getSpillCost(),llvm::LoopVectorizationCostModel::getVectorCallCost(),getVectorCallCosts(), andllvm::LoopVectorizationCostModel::setVectorizedCallDecision().

◆ getCastContextHint()

TTI::CastContextHint TargetTransformInfo::getCastContextHint(constInstructionI)
static

Calculates a CastContextHint fromI.

This should be used by callers of getCastInstrCost if they wish to determine the context from some instruction.

Returns
the CastContextHint for ZExt/SExt/Trunc, None ifI is nullptr, or if it's another type of cast.

Definition at line996 of fileTargetTransformInfo.cpp.

ReferencesGatherScatter,I,II,Masked,None, andNormal.

Referenced bychainToBasePointerCost(),llvm::TargetTransformInfoImplCRTPBase< T >::getInstructionCost(), andllvm::AArch64TargetLowering::optimizeExtendOrTruncateConversion().

◆ getCastInstrCost()

InstructionCost TargetTransformInfo::getCastInstrCost(unsigned Opcode,
TypeDst,
TypeSrc,
TTI::CastContextHint CCH,
TTI::TargetCostKind CostKind =TTI::TCK_SizeAndLatency,
constInstructionI =nullptr 
) const
Returns
The expected cost of cast instructions, such as bitcast, trunc, zext, etc. If there is an existing instruction that holds Opcode, it may be passed in the 'I' parameter.

Definition at line1039 of fileTargetTransformInfo.cpp.

Referencesassert(),CostKind, andI.

Referenced bychainToBasePointerCost(),llvm::VPWidenCastRecipe::computeCost(),costAndCollectOperands(),llvm::BasicTTIImplBase< T >::getCastInstrCost(),llvm::LoopVectorizationCostModel::getInstructionCost(),llvm::LoopVectorizationCostModel::getReductionPatternCost(),llvm::slpvectorizer::BoUpSLP::getTreeCost(),llvm::AArch64TargetLowering::optimizeExtendOrTruncateConversion(), andtryToFPToSat().

◆ getCFInstrCost()

InstructionCost TargetTransformInfo::getCFInstrCost(unsigned Opcode,
TTI::TargetCostKind CostKind =TTI::TCK_SizeAndLatency,
constInstructionI =nullptr 
) const
Returns
The expected cost of control-flow related instructions such as Phi, Ret, Br, Switch.

Definition at line1058 of fileTargetTransformInfo.cpp.

Referencesassert(),CostKind, andI.

Referenced byllvm::VPHeaderPHIRecipe::computeCost(),llvm::VPFirstOrderRecurrencePHIRecipe::computeCost(),llvm::VPBlendRecipe::computeCost(),llvm::VPRegionBlock::cost(),costAndCollectOperands(),findCostForOutputBlocks(),llvm::LoopVectorizationCostModel::getDivRemSpeculationCost(), andllvm::LoopVectorizationCostModel::getInstructionCost().

◆ getCmpSelInstrCost()

InstructionCost TargetTransformInfo::getCmpSelInstrCost(unsigned Opcode,
TypeValTy,
TypeCondTy,
CmpInst::Predicate VecPred,
TTI::TargetCostKind CostKind =TTI::TCK_RecipThroughput,
OperandValueInfo Op1Info ={OK_AnyValueOP_None},
OperandValueInfo Op2Info ={OK_AnyValueOP_None},
constInstructionI =nullptr 
) const
Returns
The expected cost of compare and select instructions. If there is an existing instruction that holds Opcode, it may be passed in the 'I' parameter. TheVecPred parameter can be used to indicate the select is using a compare with the specified predicate as condition. When vector types are passed,VecPred must be used for all lanes. For a comparison, the two operands are the natural values. For a select, the two operands are thevalue operands, not the condition operand.

Definition at line1067 of fileTargetTransformInfo.cpp.

Referencesassert(),CostKind, andI.

Referenced byllvm::VPWidenRecipe::computeCost(),llvm::VPWidenSelectRecipe::computeCost(),llvm::VPBlendRecipe::computeCost(),costAndCollectOperands(),findCostForOutputBlocks(),llvm::LoopVectorizationCostModel::getDivRemSpeculationCost(),llvm::LoopVectorizationCostModel::getInstructionCost(), andvalidateAndCostRequiredSelects().

◆ getCostOfKeepingLiveOverCall()

InstructionCost TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type * > Tys) const
Returns
The cost, if any, of keeping values of the given types alive over a callsite.

Some types may require the use of register classes that do not have any callee-saved registers, so would require a spill and fill.

Definition at line1247 of fileTargetTransformInfo.cpp.

Referenced byllvm::slpvectorizer::BoUpSLP::getSpillCost().

◆ getEpilogueVectorizationMinVF()

unsigned TargetTransformInfo::getEpilogueVectorizationMinVF() const

Definition at line362 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationCostModel::isEpilogueVectorizationProfitable().

◆ getEstimatedNumberOfCaseClusters()

unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters(constSwitchInstSI,
unsignedJTSize,
ProfileSummaryInfoPSI,
BlockFrequencyInfoBFI 
) const
Returns
The estimated number of case clusters when lowering'SI'.JTSize Set a jump table size only whenSI is suitable for a jump table.

Definition at line263 of fileTargetTransformInfo.cpp.

◆ getExtendedReductionCost()

InstructionCost TargetTransformInfo::getExtendedReductionCost(unsigned Opcode,
bool IsUnsigned,
TypeResTy,
VectorTypeTy,
FastMathFlags FMF,
TTI::TargetCostKind CostKind =TTI::TCK_RecipThroughput 
) const

Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of a reduction with an extension.

This is the cost of as: ResTy vecreduce.opcode(ext(Ty A)).

Definition at line1233 of fileTargetTransformInfo.cpp.

ReferencesCostKind.

Referenced byllvm::LoopVectorizationCostModel::getReductionPatternCost().

◆ getExtractWithExtendCost()

InstructionCost TargetTransformInfo::getExtractWithExtendCost(unsigned Opcode,
TypeDst,
VectorTypeVecTy,
unsigned Index 
) const
Returns
The expected cost of a sign- or zero-extended vector extract.Use Index = -1 to indicate that there is no information about the index value.

Definition at line1050 of fileTargetTransformInfo.cpp.

Referencesassert().

Referenced byllvm::slpvectorizer::BoUpSLP::getTreeCost().

◆ getFeatureMask()

uint64_t TargetTransformInfo::getFeatureMask(constFunctionF) const

Returns a bitmask constructed from the target-features or fmv-features metadata of a function.

Definition at line1386 of fileTargetTransformInfo.cpp.

ReferencesF.

Referenced byOptimizeNonTrivialIFuncs().

◆ getFlatAddressSpace()

unsigned TargetTransformInfo::getFlatAddressSpace() const

Returns the address space ID for a target's 'flat' address space.

Note this is not necessarily the same as addrspace(0), which LLVM sometimes refers to as the generic address space. The flat address space is a generic address space that can be used access multiple segments of memory with different address spaces. Access of a memory location through a pointer with this address space is expected to be legal but slower compared to the same memory location accessed through a pointer with a different address space. This is for targets with different pointer representations which can be converted with the addrspacecast instruction. If a pointer is converted to this address space, optimizations should attempt to replace the access with the source address space.

Returns
~0u if the target does not have such a flat address space to optimize away.

Definition at line315 of fileTargetTransformInfo.cpp.

◆ getFPOpCost()

InstructionCost TargetTransformInfo::getFPOpCost(TypeTy) const

Return the expected cost of supporting the floating point operation of the specified type.

Definition at line712 of fileTargetTransformInfo.cpp.

Referencesassert().

◆ getGatherScatterOpCost()

InstructionCost TargetTransformInfo::getGatherScatterOpCost(unsigned Opcode,
TypeDataTy,
constValuePtr,
bool VariableMask,
Align Alignment,
TTI::TargetCostKind CostKind =TTI::TCK_RecipThroughput,
constInstructionI =nullptr 
) const
Returns
The cost of Gather or Scatter operationOpcode - is a type of memory access Load or StoreDataTy - a vector type of the data to be loaded or storedPtr - pointer [or vector of pointers] - address[es] in memoryVariableMask - true when the memory access is predicated with a mask that is not a compile-time constantAlignment - alignment of single elementI - the optional original context instruction, if one exists, e.g. the load/store to transform or the call to the gather/scatter intrinsic

Definition at line1146 of fileTargetTransformInfo.cpp.

Referencesassert(),CostKind,I,llvm::InstructionCost::isValid(), andPtr.

Referenced byllvm::slpvectorizer::BoUpSLP::canVectorizeLoads(), andllvm::VPWidenMemoryRecipe::computeCost().

◆ getGEPCost()

InstructionCost TargetTransformInfo::getGEPCost(TypePointeeType,
constValuePtr,
ArrayRef<constValue * > Operands,
TypeAccessType =nullptr,
TTI::TargetCostKind CostKind =TCK_SizeAndLatency 
) const

Estimate the cost of a GEP operation when lowered.

PointeeType is the source element type of the GEP.Ptr is the base pointer operand.Operands is the list of indices following the base pointer.

AccessType is a hint as to what type of memory might be accessed by users of the GEP. getGEPCost will use it to determine if the GEP can be folded into the addressing mode of a load/store. If AccessType is null, then the resulting target type based off of PointeeType will be used as an approximation.

Definition at line248 of fileTargetTransformInfo.cpp.

ReferencesCostKind,Operands, andPtr.

Referenced bygetGEPCosts(), andisGEPFoldable().

◆ getGISelRematGlobalCost()

unsigned TargetTransformInfo::getGISelRematGlobalCost() const
Returns
the size cost of rematerializing aGlobalValue address relative to a stack reload.

Definition at line1408 of fileTargetTransformInfo.cpp.

Referenced byllvm::TargetLoweringBase::shouldLocalize().

◆ getInlineCallPenalty()

unsigned TargetTransformInfo::getInlineCallPenalty(constFunctionF,
constCallBaseCall,
unsigned DefaultCallPenalty 
) const

Returns a penalty for invoking callCall inF.

For example, if a function F calls a function G, which in turn calls function H, then getInlineCallPenalty(F, H()) would return the penalty of calling H from F, e.g. after inlining G into F.DefaultCallPenalty is passed to give a default penalty that the target can amend or override.

Definition at line1290 of fileTargetTransformInfo.cpp.

ReferencesF.

Referenced byllvm::getCallsiteCost().

◆ getInlinerVectorBonusPercent()

int TargetTransformInfo::getInlinerVectorBonusPercent() const
Returns
Vector bonus in percent.

Vector bonuses: We want to more aggressively inline vector-dense kernels and apply this bonus based on the percentage of vector instructions. A bonus is applied if the vector instructions exceed 50% and half that amount is applied if it exceeds 10%. Note that these bonuses are some what arbitrary and evolved over time by accident as much as because they are principled bonuses. FIXME: It would be nice to base the bonus values on something more scientific. A target may has no bonus on vector instructions.

Definition at line244 of fileTargetTransformInfo.cpp.

◆ getInliningCostBenefitAnalysisProfitableMultiplier()

unsigned TargetTransformInfo::getInliningCostBenefitAnalysisProfitableMultiplier() const

Definition at line225 of fileTargetTransformInfo.cpp.

◆ getInliningCostBenefitAnalysisSavingsMultiplier()

unsigned TargetTransformInfo::getInliningCostBenefitAnalysisSavingsMultiplier() const

Definition at line220 of fileTargetTransformInfo.cpp.

◆ getInliningLastCallToStaticBonus()

int TargetTransformInfo::getInliningLastCallToStaticBonus() const
Returns
The bonus of inlining the last call to a static function.

Definition at line230 of fileTargetTransformInfo.cpp.

Referenced byshouldBeDeferred().

◆ getInliningThresholdMultiplier()

unsigned TargetTransformInfo::getInliningThresholdMultiplier() const
Returns
A value by which our inlining threshold should be multiplied. This is primarily used to bump up the inlining threshold wholesale on targets where calls are unusually expensive.

TODO: This is a rather blunt instrument. Perhaps altering the costs of individual classes of instructions would be better.

Definition at line215 of fileTargetTransformInfo.cpp.

◆ getInstructionCost()[1/2]

InstructionCost TargetTransformInfo::getInstructionCost(constUserU,
ArrayRef<constValue * > Operands,
TargetCostKind CostKind 
) const

Estimate the cost of a given IR user when lowered.

This can estimate the cost of either aConstantExpr orInstruction when lowered.

Operands is a list of operands which can be a result of transformations of the current operands. The number of the operands on the list must equal to the number of the current operands the IR user has. Their order on the list must be the same as the order of the current operands the IR user has.

The returned cost is defined in terms ofTargetCostConstants, see its comments for a detailed explanation of the cost values.

Definition at line270 of fileTargetTransformInfo.cpp.

Referencesassert(),CostKind,Operands, andTCK_RecipThroughput.

Referenced byllvm::CodeMetrics::analyzeBasicBlock(),analyzeLoopUnrollCost(),canSplitCallSite(),llvm::slpvectorizer::BoUpSLP::canVectorizeLoads(),checkOuterLoopInsts(),llvm::ComputeSpeculationCost(),computeSpeculationCost(),findBestNonTrivialUnswitchCandidate(),llvm::foldBranchToCommonDest(),getAppleRuntimeUnrollPreferences(),llvm::OutlinableRegion::getBenefit(),getInstructionCost(),llvm::LoopVectorizationCostModel::getInstructionCost(),getJumpThreadDuplicationCost(),llvm::InstCostVisitor::getLatencySavingsForKnownConstants(),getOutliningBenefit(),llvm::slpvectorizer::BoUpSLP::getTreeCost(),isFoldableInLoop(),mergeConditionalStoreToAddress(),llvm::CostModelPrinterPass::run(),llvm::SelectionDAGBuilder::shouldKeepJumpConditionsTogether(), andllvm::slpvectorizer::BoUpSLP::transformNodes().

◆ getInstructionCost()[2/2]

InstructionCost llvm::TargetTransformInfo::getInstructionCost(constUserU,
TargetCostKind CostKind 
) const
inline

This is a helper function which calls the three-argument getInstructionCost withOperands which are the current operands U has.

Definition at line417 of fileTargetTransformInfo.h.

ReferencesCostKind,getInstructionCost(), andOperands.

◆ getInterleavedMemoryOpCost()

InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost(unsigned Opcode,
TypeVecTy,
unsigned Factor,
ArrayRef<unsignedIndices,
Align Alignment,
unsigned AddressSpace,
TTI::TargetCostKind CostKind =TTI::TCK_RecipThroughput,
bool UseMaskForCond =false,
bool UseMaskForGaps =false 
) const
Returns
The cost of the interleaved memory operation.Opcode is the memory operation codeVecTy is the vector type of the interleaved access.Factor is the interleave factorIndices is the indices for interleaved load members (as interleaved load allows gaps)Alignment is the alignment of the memory operationAddressSpace is address space of the pointer.UseMaskForCond indicates if the memory access is predicated.UseMaskForGaps indicates if gaps should be masked.

Definition at line1165 of fileTargetTransformInfo.cpp.

Referencesassert(), andCostKind.

Referenced byllvm::VPInterleaveRecipe::computeCost().

◆ getIntImmCodeSizeCost()

InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opc,
unsigned Idx,
constAPIntImm,
TypeTy 
) const

Return the expected cost for the given integer when optimising for size.

This is different than the other integer immediate cost functions in that it is subtarget agnostic. This is useful when you e.g. target one ISA such as Aarch32 but smaller encodings could be possible with another such as Thumb. This return value is used as a penalty when the total costs for a constant is calculated (the bigger the cost, the more beneficial constant hoisting is).

Definition at line718 of fileTargetTransformInfo.cpp.

Referencesassert(), andIdx.

◆ getIntImmCost()

InstructionCost TargetTransformInfo::getIntImmCost(constAPIntImm,
TypeTy,
TTI::TargetCostKind CostKind 
) const

Return the expected cost of materializing for the given integer immediate of the specified type.

Definition at line728 of fileTargetTransformInfo.cpp.

Referencesassert(), andCostKind.

Referenced bytryUnmergingGEPsAcrossIndirectBr().

◆ getIntImmCostInst()

InstructionCost TargetTransformInfo::getIntImmCostInst(unsigned Opc,
unsigned Idx,
constAPIntImm,
TypeTy,
TTI::TargetCostKind CostKind,
InstructionInst =nullptr 
) const

Return the expected cost of materialization for the given integer immediate of the specified type for a given instruction.

The cost can be zero if the immediate can be folded into the specified instruction.

Definition at line735 of fileTargetTransformInfo.cpp.

Referencesassert(),CostKind, andIdx.

◆ getIntImmCostIntrin()

InstructionCost TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID,
unsigned Idx,
constAPIntImm,
TypeTy,
TTI::TargetCostKind CostKind 
) const

Definition at line745 of fileTargetTransformInfo.cpp.

Referencesassert(),CostKind, andIdx.

◆ getIntrinsicInstrCost()

InstructionCost TargetTransformInfo::getIntrinsicInstrCost(constIntrinsicCostAttributesICA,
TTI::TargetCostKind CostKind 
) const
Returns
The cost ofIntrinsic instructions. Analyses the real arguments. Three cases are handled: 1. scalar instruction 2. vector instruction
  1. scalar instruction which is to be vectorized.

Definition at line1177 of fileTargetTransformInfo.cpp.

Referencesassert(), andCostKind.

Referenced byllvm::VPWidenIntrinsicRecipe::computeCost(),llvm::VPHistogramRecipe::computeCost(),llvm::LoopVectorizationCostModel::getInstructionCost(),llvm::slpvectorizer::BoUpSLP::getSpillCost(),getVectorCallCosts(),llvm::LoopVectorizationCostModel::getVectorIntrinsicCost(),llvm::CostModelPrinterPass::run(),simplifySwitchOfPowersOfTwo(), andtryToFPToSat().

◆ getLoadStoreVecRegBitWidth()

unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AddrSpace) const
Returns
The bitwidth of the largest vector type that should be used to load/store in the given address space.

Definition at line1312 of fileTargetTransformInfo.cpp.

◆ getLoadVectorFactor()

unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF,
unsigned LoadSize,
unsigned ChainSizeInBytes,
VectorTypeVecTy 
) const
Returns
The new vector factor value if the target doesn't supportSizeInBytes loads or has a better vector factor.

Definition at line1345 of fileTargetTransformInfo.cpp.

◆ getMaskedMemoryOpCost()

InstructionCost TargetTransformInfo::getMaskedMemoryOpCost(unsigned Opcode,
TypeSrc,
Align Alignment,
unsigned AddressSpace,
TTI::TargetCostKind CostKind =TTI::TCK_RecipThroughput 
) const
Returns
The cost of masked Load and Store instructions.

Definition at line1137 of fileTargetTransformInfo.cpp.

Referencesassert(), andCostKind.

Referenced byllvm::VPWidenMemoryRecipe::computeCost(),llvm::VPWidenLoadEVLRecipe::computeCost(), andllvm::VPWidenStoreEVLRecipe::computeCost().

◆ getMaximumVF()

unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth,
unsigned Opcode 
) const
Returns
The maximum vectorization factor for types of given element bit width and opcode, or 0 if there is no maximum VF. Currently only used by the SLP vectorizer.

Definition at line807 of fileTargetTransformInfo.cpp.

Referenced byllvm::slpvectorizer::BoUpSLP::getMaximumVF().

◆ getMaxInterleaveFactor()

unsigned TargetTransformInfo::getMaxInterleaveFactor(ElementCount VF) const
Returns
The maximum interleave factor that any transform should try to perform for this target. This number depends on the level of parallelism and the number of execution units in the CPU.

Definition at line875 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationCostModel::isEpilogueVectorizationProfitable(),llvm::LoopVectorizePass::runImpl(), andllvm::LoopVectorizationCostModel::selectInterleaveCount().

◆ getMaxMemIntrinsicInlineSizeThreshold()

uint64_t TargetTransformInfo::getMaxMemIntrinsicInlineSizeThreshold() const

Returns the maximum memset / memcpy size in bytes that still makes it profitable to inline the call.

Definition at line1211 of fileTargetTransformInfo.cpp.

◆ getMaxNumArgs()

unsigned TargetTransformInfo::getMaxNumArgs() const
Returns
The maximum number of function arguments the target supports.

Definition at line1394 of fileTargetTransformInfo.cpp.

Referenced bypromoteArguments().

◆ getMaxPrefetchIterationsAhead()

unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const
Returns
The maximum number of iterations to prefetch ahead. If the required number of iterations is more than this number, no prefetching is performed.

Definition at line854 of fileTargetTransformInfo.cpp.

◆ getMaxVScale()

std::optional<unsigned > TargetTransformInfo::getMaxVScale() const
Returns
The maximum value of vscale if the target specifies an architectural maximum vector length, and std::nullopt otherwise.

Definition at line785 of fileTargetTransformInfo.cpp.

Referenced bygetMaxVScale().

◆ getMemcpyCost()

InstructionCost TargetTransformInfo::getMemcpyCost(constInstructionI) const
Returns
the expected cost of a memcpy, which could e.g. depend on the source/destination type and alignment and the number of bytes copied.

Definition at line1205 of fileTargetTransformInfo.cpp.

Referencesassert(), andI.

◆ getMemcpyLoopLoweringType()

Type * TargetTransformInfo::getMemcpyLoopLoweringType(LLVMContextContext,
ValueLength,
unsigned SrcAddrSpace,
unsigned DestAddrSpace,
Align SrcAlign,
Align DestAlign,
std::optional<uint32_tAtomicElementSize =std::nullopt 
) const
Returns
The type to use in a loop expansion of a memcpy call.

Definition at line1265 of fileTargetTransformInfo.cpp.

Referencesllvm::Length.

Referenced byllvm::createMemCpyLoopKnownSize(),createMemMoveLoopKnownSize(), andcreateMemMoveLoopUnknownSize().

◆ getMemcpyLoopResidualLoweringType()

void TargetTransformInfo::getMemcpyLoopResidualLoweringType(SmallVectorImpl<Type * > & OpsOut,
LLVMContextContext,
unsigned RemainingBytes,
unsigned SrcAddrSpace,
unsigned DestAddrSpace,
Align SrcAlign,
Align DestAlign,
std::optional<uint32_tAtomicCpySize =std::nullopt 
) const
Parameters
[out]OpsOutThe operand types to copy RemainingBytes of memory.
RemainingBytesThe number of bytes to copy.

Calculates the operand types to use when copyingRemainingBytes of memory, where source and destination alignments areSrcAlign andDestAlign respectively.

Definition at line1274 of fileTargetTransformInfo.cpp.

Referenced byllvm::createMemCpyLoopKnownSize(), andcreateMemMoveLoopKnownSize().

◆ getMemoryOpCost()

InstructionCost TargetTransformInfo::getMemoryOpCost(unsigned Opcode,
TypeSrc,
Align Alignment,
unsigned AddressSpace,
TTI::TargetCostKind CostKind =TTI::TCK_RecipThroughput,
TTI::OperandValueInfo OpInfo ={OK_AnyValueOP_None},
constInstructionI =nullptr 
) const
Returns
The cost of Load and Store instructions.

Definition at line1125 of fileTargetTransformInfo.cpp.

Referencesassert(),CostKind, andI.

Referenced byllvm::slpvectorizer::BoUpSLP::canVectorizeLoads(),llvm::VPWidenMemoryRecipe::computeCost(),findCostForOutputBlocks(), andllvm::slpvectorizer::BoUpSLP::transformNodes().

◆ getMinimumVF()

ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth,
bool IsScalable 
) const
Returns
The minimum vectorization factor for types of given element bit width, or 0 if there is no minimum VF. The returned value only applies when shouldMaximizeVectorBandwidth returns true. If IsScalable is true, the returnedElementCount must be a scalable VF.

Definition at line802 of fileTargetTransformInfo.cpp.

◆ getMinMaxReductionCost()

InstructionCost TargetTransformInfo::getMinMaxReductionCost(Intrinsic::ID IID,
VectorTypeTy,
FastMathFlags FMF =FastMathFlags(),
TTI::TargetCostKind CostKind =TTI::TCK_RecipThroughput 
) const

Definition at line1224 of fileTargetTransformInfo.cpp.

Referencesassert(), andCostKind.

Referenced byllvm::VPReductionRecipe::computeCost(), andllvm::LoopVectorizationCostModel::getReductionPatternCost().

◆ getMinPageSize()

std::optional<unsigned > TargetTransformInfo::getMinPageSize() const
Returns
The minimum architectural page size for the target.

Definition at line838 of fileTargetTransformInfo.cpp.

ReferencesMinPageSize.

◆ getMinPrefetchStride()

unsigned TargetTransformInfo::getMinPrefetchStride(unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
unsigned NumPrefetches,
bool HasCall 
) const

Some HW prefetchers can handle accesses up to a certain constant stride.

Sometimes prefetching is beneficial even below the HW prefetcher limit, and the arguments provided are meant to serve as a basis for deciding this for a particular loop.

Parameters
NumMemAccessesNumber of memory accesses in the loop.
NumStridedMemAccessesNumber of the memory accesses thatScalarEvolution could find a known stride for.
NumPrefetchesNumber of software prefetches that will be emitted as determined by the addresses involved and the cache line size.
HasCallTrue if the loop contains a call.
Returns
This is the minimum stride in bytes where it makes sense to start adding SW prefetches. The default is 1, i.e. prefetch with any stride.

Definition at line847 of fileTargetTransformInfo.cpp.

◆ getMinTripCountTailFoldingThreshold()

unsigned TargetTransformInfo::getMinTripCountTailFoldingThreshold() const
Returns
the lower bound of a trip count to decide on vectorization while tail-folding.

Definition at line1412 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizePass::processLoop().

◆ getMinVectorRegisterBitWidth()

unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const
Returns
The width of the smallest vector register type.

Definition at line781 of fileTargetTransformInfo.cpp.

Referenced byllvm::slpvectorizer::BoUpSLP::BoUpSLP(), andcanWidenLoad().

◆ getMulAccReductionCost()

InstructionCost TargetTransformInfo::getMulAccReductionCost(bool IsUnsigned,
TypeResTy,
VectorTypeTy,
TTI::TargetCostKind CostKind =TTI::TCK_RecipThroughput 
) const

Calculate the cost of an extended reduction pattern, similar to getArithmeticReductionCost of an Add reduction with multiply and optional extensions.

This is the cost of as: ResTy vecreduce.add(mul (A, B)). ResTy vecreduce.add(mul(ext(Ty A), ext(Ty B)).

Definition at line1240 of fileTargetTransformInfo.cpp.

ReferencesCostKind.

Referenced byllvm::LoopVectorizationCostModel::getReductionPatternCost().

◆ getNumberOfParts()

unsigned TargetTransformInfo::getNumberOfParts(TypeTp) const
Returns
The number of pieces into which the provided type must be split during legalization. Zero is returned when the answer is unknown.

Definition at line1193 of fileTargetTransformInfo.cpp.

Referenced bygetFloorFullVectorNumberOfElements(),getFullVectorNumberOfElements(),llvm::LoopVectorizationCostModel::getInstructionCost(),llvm::getNumberOfParts(),llvm::hasFullVectorsOrPowerOf2(), andwillGenerateVectors().

◆ getNumberOfRegisters()

unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const
Returns
the number of registers in the target-provided register class.

Definition at line759 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizePass::runImpl(),llvm::SLPVectorizerPass::runImpl(), andllvm::LoopVectorizationCostModel::selectInterleaveCount().

◆ getNumBytesToPadGlobalArray()

unsigned TargetTransformInfo::getNumBytesToPadGlobalArray(unsigned Size,
TypeArrayType 
) const
Returns
For an array of given Size, return alignment boundary to pad to. Default is no padding.

Definition at line1439 of fileTargetTransformInfo.cpp.

ReferencesSize.

◆ getOperandInfo()

TargetTransformInfo::OperandValueInfo TargetTransformInfo::getOperandInfo(constValueV)
static

Collect properties of V used in cost analysis, e.g. OP_PowerOf2.

Definition at line880 of fileTargetTransformInfo.cpp.

Referencesllvm::getSplatValue(),I,OK_AnyValue,OK_NonUniformConstantValue,OK_UniformConstantValue,OK_UniformValue,OP_NegatedPowerOf2,OP_None,OP_PowerOf2, andllvm::Splat.

Referenced byllvm::VPWidenRecipe::computeCost(),llvm::VPWidenMemoryRecipe::computeCost(),llvm::LoopVectorizationCostModel::getDivRemSpeculationCost(),llvm::TargetTransformInfoImplCRTPBase< T >::getInstructionCost(),llvm::LoopVectorizationCostModel::getInstructionCost(),llvm::BasicTTIImplBase< T >::getIntrinsicInstrCost(),llvm::AArch64TTIImpl::getIntrinsicInstrCost(), andllvm::VPCostContext::getOperandInfo().

◆ getOperandsScalarizationOverhead()

InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead(ArrayRef<constValue * > Args,
ArrayRef<Type * > Tys,
TTI::TargetCostKind CostKind 
) const

Estimate the overhead of scalarizing an instructions unique non-constant operands.

The (potentially vector) types to use for each of argument are passes via Tys.

Definition at line635 of fileTargetTransformInfo.cpp.

ReferencesCostKind.

◆ getOrCreateResultFromMemIntrinsic()

Value * TargetTransformInfo::getOrCreateResultFromMemIntrinsic(IntrinsicInstInst,
TypeExpectedType 
) const
Returns
A value which is the result of the given memory intrinsic. New instructions may be created to extract the result from the given intrinsic memory operation. Returns nullptr if the target cannot create a result from the given intrinsic.

Definition at line1260 of fileTargetTransformInfo.cpp.

◆ getPartialReductionCost()

InstructionCost TargetTransformInfo::getPartialReductionCost(unsigned Opcode,
TypeInputTypeA,
TypeInputTypeB,
TypeAccumType,
ElementCount VF,
PartialReductionExtendKind OpAExtend,
PartialReductionExtendKind OpBExtend,
std::optional<unsignedBinOp =std::nullopt 
) const
Returns
The cost of a partial reduction, which is a reduction from a vector to another vector with fewer elements of larger size. They are represented by the llvm.experimental.partial.reduce.add intrinsic, which takes an accumulator and a binary operation operand that itself is fed by two extends. An example of an operation that uses a partial reduction is a dot product, which reduces two vectors to another of 4 times fewer and 4 times larger elements.

Definition at line866 of fileTargetTransformInfo.cpp.

Referenced byllvm::VPPartialReductionRecipe::computeCost().

◆ getPartialReductionExtendKind()

TargetTransformInfo::PartialReductionExtendKind TargetTransformInfo::getPartialReductionExtendKind(InstructionI)
static

Get the kind of extension that an instruction represents.

Definition at line987 of fileTargetTransformInfo.cpp.

ReferencesI,PR_None,PR_SignExtend, andPR_ZeroExtend.

◆ getPeelingPreferences()

void TargetTransformInfo::getPeelingPreferences(LoopL,
ScalarEvolutionSE,
PeelingPreferencesPP 
) const

Get target-customized preferences for the generic loop peeling transformation.

The caller will initializePP with the current target-independent defaults with information fromL andSE.

Definition at line405 of fileTargetTransformInfo.cpp.

Referenced byllvm::gatherPeelingPreferences().

◆ getPointersChainCost()

InstructionCost TargetTransformInfo::getPointersChainCost(ArrayRef<constValue * > Ptrs,
constValueBase,
constPointersChainInfoInfo,
TypeAccessTy,
TTI::TargetCostKind CostKind =TTI::TCK_RecipThroughput 
) const

Estimate the cost of a chain of pointers (typically pointer operands of a chain of loads or stores within same block) operations set when lowered.

AccessTy is the type of the loads/stores that will ultimately use thePtrs.

Definition at line254 of fileTargetTransformInfo.cpp.

Referencesassert(),llvm::sampleprof::Base,CostKind, andInfo.

Referenced bygetGEPCosts().

◆ getPopcntSupport()

TargetTransformInfo::PopcntSupportKind TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const

Return hardware support for population count.

Definition at line695 of fileTargetTransformInfo.cpp.

◆ getPredicatedAddrSpace()

std::pair<constValue *,unsigned > TargetTransformInfo::getPredicatedAddrSpace(constValueV) const

Definition at line343 of fileTargetTransformInfo.cpp.

Referenced byfindAffectedValues().

◆ getPredictableBranchThreshold()

BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const

If a branch or a select condition is skewed in one direction by more than this factor, it is very likely to be predicted correctly.

Definition at line279 of fileTargetTransformInfo.cpp.

ReferencesPredictableBranchThreshold.

Referenced byfoldTwoEntryPHINode(),isFormingBranchFromSelectProfitable(),isProfitableToSpeculate(),shouldFoldCondBranchesToCommonDestination(), andSimplifyCondBranchToCondBranch().

◆ getPreferredAddressingMode()

TTI::AddressingModeKind TargetTransformInfo::getPreferredAddressingMode(constLoopL,
ScalarEvolutionSE 
) const

Return the preferred addressing mode LSR should make efforts to generate.

Definition at line461 of fileTargetTransformInfo.cpp.

◆ getPreferredExpandedReductionShuffle()

TargetTransformInfo::ReductionShuffle TargetTransformInfo::getPreferredExpandedReductionShuffle(constIntrinsicInstII) const
Returns
The shuffle sequence pattern used to expand the given reduction intrinsic.

Definition at line1403 of fileTargetTransformInfo.cpp.

ReferencesII.

◆ getPreferredTailFoldingStyle()

TailFoldingStyle TargetTransformInfo::getPreferredTailFoldingStyle(bool IVUpdateMayOverflow =true) const

Query the target what the preferred style of tail folding is.

Parameters
IVUpdateMayOverflowTells whether it is known if the IV update may (or will never) overflow for the suggested VF/UF in the given loop. Targets can use this information to select a more optimal tail folding style. The value conservatively defaults to true, such that no assumptions are made on overflow.

Definition at line371 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationCostModel::setTailFoldingStyles().

◆ getPrefetchDistance()

unsigned TargetTransformInfo::getPrefetchDistance() const
Returns
How much before a load we should place the prefetch instruction. This is currently measured in number of instructions.

Definition at line843 of fileTargetTransformInfo.cpp.

◆ getRegisterBitWidth()

TypeSize TargetTransformInfo::getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const
Returns
The width of the largest scalar or vector register type.

Definition at line776 of fileTargetTransformInfo.cpp.

Referenced byllvm::slpvectorizer::BoUpSLP::BoUpSLP(),determineVPlanVF(), andllvm::LoopAccessInfo::LoopAccessInfo().

◆ getRegisterClassForType()

unsigned TargetTransformInfo::getRegisterClassForType(bool Vector,
TypeTy =nullptr 
) const
Returns
the target-provided register class ID for the provided type, accounting for type promotion and other type-legalization techniques that the target might apply. However, it specifically does not account for the scalarization or splitting of vector types. Should a vector type require scalarization or splitting into multiple underlying vector registers, that type should be mapped to a register class containing no registers. Specifically, this is designed to provide a simple, high-level view of the register allocation later performed by the backend. These register classes don't necessarily map onto the register classes used by the backend. FIXME: It's not currently possible to determine how many registers are used by the provided type.

Definition at line767 of fileTargetTransformInfo.cpp.

Referencesllvm::Vector.

Referenced byllvm::LoopVectorizationCostModel::calculateRegisterUsage(),llvm::LoopVectorizePass::runImpl(), andllvm::SLPVectorizerPass::runImpl().

◆ getRegisterClassName()

constchar * TargetTransformInfo::getRegisterClassName(unsigned ClassID) const
Returns
the target-provided register class name

Definition at line772 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationCostModel::calculateRegisterUsage(), andllvm::LoopVectorizationCostModel::selectInterleaveCount().

◆ getRegUsageForType()

unsigned TargetTransformInfo::getRegUsageForType(TypeTy) const

Returns the estimated number of registers required to representTy.

Definition at line587 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationCostModel::calculateRegisterUsage().

◆ getReplicationShuffleCost()

InstructionCost TargetTransformInfo::getReplicationShuffleCost(TypeEltTy,
int ReplicationFactor,
int VF,
constAPIntDemandedDstElts,
TTI::TargetCostKind CostKind 
) const
Returns
The cost of replication shuffle ofVF elements typedEltTyReplicationFactor times.

For example, the mask forReplicationFactor=3 andVF=4 is: <0,0,0,1,1,1,2,2,2,3,3,3>

Definition at line1116 of fileTargetTransformInfo.cpp.

Referencesassert(), andCostKind.

◆ getScalarizationOverhead()

InstructionCost TargetTransformInfo::getScalarizationOverhead(VectorTypeTy,
constAPIntDemandedElts,
bool Insert,
bool Extract,
TTI::TargetCostKind CostKind,
ArrayRef<Value * > VL ={} 
) const

Estimate the overhead of scalarizing an instruction.

Insert and Extract are set if the demanded result elements need to be inserted and/or extracted from vectors. The involved values may be passed in VL if Insert is true.

Definition at line628 of fileTargetTransformInfo.cpp.

ReferencesCostKind.

Referenced byllvm::slpvectorizer::BoUpSLP::canVectorizeLoads(),llvm::LoopVectorizationCostModel::getInstructionCost(), andllvm::slpvectorizer::BoUpSLP::isTreeTinyAndNotFullyVectorizable().

◆ getScalingFactorCost()

InstructionCost TargetTransformInfo::getScalingFactorCost(TypeTy,
GlobalValueBaseGV,
StackOffset BaseOffset,
bool HasBaseReg,
int64_t Scale,
unsigned AddrSpace =0 
) const

Return the cost of the scaling factor used in the addressing mode represented by AM for this target, for a load/store of the specified type.

If the AM is supported, the return value must be >= 0. If the AM is not supported, it returns a negative value. TODO: Handle pre/postinc as well.

Definition at line560 of fileTargetTransformInfo.cpp.

Referencesassert().

Referenced bygetScalingFactorCost().

◆ getShuffleCost()

InstructionCost TargetTransformInfo::getShuffleCost(ShuffleKind Kind,
VectorTypeTp,
ArrayRef< int > Mask ={},
TTI::TargetCostKind CostKind =TTI::TCK_RecipThroughput,
int Index =0,
VectorTypeSubTp =nullptr,
ArrayRef<constValue * > Args ={},
constInstructionCxtI =nullptr 
) const
Returns
The cost of a shuffle instruction of kind Kind and of type Tp. The exact mask may be passed as Mask, or else the array will be empty. The index and subtype parameters are used by the subvector insertion and extraction shuffle kinds to show the insert/extract point and the type of the subvector being inserted/extracted. The operands of the shuffle can be passed throughArgs, which helps improve the cost estimation in some cases, like in broadcast loads. NOTE: For subvector extractions Tp represents the source type.

Definition at line976 of fileTargetTransformInfo.cpp.

Referencesassert(), andCostKind.

Referenced byllvm::VPFirstOrderRecurrencePHIRecipe::computeCost(),llvm::VPInterleaveRecipe::computeCost(),llvm::VPWidenMemoryRecipe::computeCost(),llvm::VPWidenLoadEVLRecipe::computeCost(),llvm::VPWidenStoreEVLRecipe::computeCost(),llvm::LoopVectorizationCostModel::getInstructionCost(),isFreeConcat(), andllvm::LoopVectorizationCostModel::setVectorizedCallDecision().

◆ getStoreMinimumVF()

unsigned TargetTransformInfo::getStoreMinimumVF(unsigned VF,
TypeScalarMemTy,
TypeScalarValTy 
) const
Returns
The minimum vectorization factor for the store instruction. Given the initial estimation of the minimum vector factor and store value type, it tries to find possible lowest VF, which still might be profitable for the vectorization.
Parameters
VFInitial estimation of the minimum vector factor.
ScalarMemTyScalar memory type of the store operation.
ScalarValTyScalar type of the stored value. Currently only used by the SLP vectorizer.

Definition at line812 of fileTargetTransformInfo.cpp.

◆ getStoreVectorFactor()

unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF,
unsigned StoreSize,
unsigned ChainSizeInBytes,
VectorTypeVecTy 
) const
Returns
The new vector factor value if the target doesn't supportSizeInBytes stores or has a better vector factor.

Definition at line1352 of fileTargetTransformInfo.cpp.

◆ getStridedMemoryOpCost()

InstructionCost TargetTransformInfo::getStridedMemoryOpCost(unsigned Opcode,
TypeDataTy,
constValuePtr,
bool VariableMask,
Align Alignment,
TTI::TargetCostKind CostKind =TTI::TCK_RecipThroughput,
constInstructionI =nullptr 
) const
Returns
The cost of strided memory operations.Opcode - is a type of memory access Load or StoreDataTy - a vector type of the data to be loaded or storedPtr - pointer [or vector of pointers] - address[es] in memoryVariableMask - true when the memory access is predicated with a mask that is not a compile-time constantAlignment - alignment of single elementI - the optional original context instruction, if one exists, e.g. the load/store to transform or the call to the gather/scatter intrinsic

Definition at line1156 of fileTargetTransformInfo.cpp.

Referencesassert(),CostKind,I, andPtr.

Referenced byllvm::slpvectorizer::BoUpSLP::canVectorizeLoads(), andllvm::slpvectorizer::BoUpSLP::transformNodes().

◆ getTgtMemIntrinsic()

bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInstInst,
MemIntrinsicInfoInfo 
) const
Returns
True if the intrinsic is a supported memory intrinsic. Info will contain additional information - whether the intrinsic may write or read to memory, volatility and the pointer. Info is undefined if false is returned.

Definition at line1251 of fileTargetTransformInfo.cpp.

ReferencesInfo.

Referenced bygetAccessType(), andisAddressUse().

◆ getUnrollingPreferences()

void TargetTransformInfo::getUnrollingPreferences(LoopL,
ScalarEvolutionSE,
UnrollingPreferencesUP,
OptimizationRemarkEmitterORE 
) const

Get target-customized preferences for the generic loop unrolling transformation.

The caller will initialize UP with the current target-independent defaults.

Definition at line399 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationPlanner::executePlan(), andllvm::gatherUnrollingPreferences().

◆ getVectorInstrCost()[1/3]

InstructionCost TargetTransformInfo::getVectorInstrCost(constInstructionI,
TypeVal,
TTI::TargetCostKind CostKind,
unsigned Index =-1 
) const
Returns
The expected cost of vector Insert and Extract. This is used when instruction is available, and implementation asserts 'I' is not nullptr.

A typical suitable use case is cost estimation when vector instruction exists (e.g., from basic blocks during transformation).

Definition at line1105 of fileTargetTransformInfo.cpp.

Referencesassert(),CostKind, andI.

◆ getVectorInstrCost()[2/3]

InstructionCost TargetTransformInfo::getVectorInstrCost(unsigned Opcode,
TypeVal,
TTI::TargetCostKind CostKind,
unsigned Index,
ValueScalar,
ArrayRef< std::tuple<Value *,User *, int > > ScalarUserAndIdx 
) const
Returns
The expected cost of vector Insert and Extract.Use -1 to indicate that there is no information on the index value. This is used when the instruction is not available; a typical use case is to provision the cost of vectorization/scalarization in vectorizer passes.
Parameters
ScalarUserAndIdxencodes the information about extracts from a vector with 'Scalar' being the value being extracted,'User' being the user of theextract(nullptr if user is not known before vectorization) and 'Idx' being the extract lane.

Definition at line1091 of fileTargetTransformInfo.cpp.

Referencesassert(), andCostKind.

◆ getVectorInstrCost()[3/3]

InstructionCost TargetTransformInfo::getVectorInstrCost(unsigned Opcode,
TypeVal,
TTI::TargetCostKind CostKind,
unsigned Index =-1,
ValueOp0 =nullptr,
ValueOp1 =nullptr 
) const
Returns
The expected cost of vector Insert and Extract.Use -1 to indicate that there is no information on the index value. This is used when the instruction is not available; a typical use case is to provision the cost of vectorization/scalarization in vectorizer passes.

Definition at line1079 of fileTargetTransformInfo.cpp.

Referencesassert(), andCostKind.

Referenced byllvm::slpvectorizer::BoUpSLP::getReorderingData(), andllvm::slpvectorizer::BoUpSLP::getTreeCost().

◆ getVPLegalizationStrategy()

TargetTransformInfo::VPLegalization TargetTransformInfo::getVPLegalizationStrategy(constVPIntrinsicPI) const
Returns
How the target needs this vector-predicated operation to be transformed.

Definition at line1378 of fileTargetTransformInfo.cpp.

◆ getVPMemoryOpCost()

InstructionCost llvm::TargetTransformInfo::getVPMemoryOpCost(unsigned Opcode,
TypeSrc,
Align Alignment,
unsigned AddressSpace,
TTI::TargetCostKind CostKind =TTI::TCK_RecipThroughput,
constInstructionI =nullptr 
) const
Returns
The cost of VP Load and Store instructions.

◆ getVScaleForTuning()

std::optional<unsigned > TargetTransformInfo::getVScaleForTuning() const
Returns
the value of vscale to tune the cost model for.

Definition at line789 of fileTargetTransformInfo.cpp.

Referenced bygetVScaleForTuning().

◆ hasActiveVectorLength()

bool TargetTransformInfo::hasActiveVectorLength(unsigned Opcode,
TypeDataType,
Align Alignment 
) const

Definition at line1424 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationCostModel::setTailFoldingStyles().

◆ hasArmWideBranch()

bool TargetTransformInfo::hasArmWideBranch(bool Thumb) const
Returns
Whether a 32-bit branch instruction is available in Arm or Thumb state.

Used by the LowerTypeTests pass, which constructs an IR inline assembler node containing a jump table in a format suitable for the target, so it needs to know what format of jump table it can legally use.

For non-Arm targets, this function isn't used. It defaults to returning false, but it shouldn't matter what it returns anyway.

Definition at line1382 of fileTargetTransformInfo.cpp.

◆ hasBranchDivergence()

bool TargetTransformInfo::hasBranchDivergence(constFunctionF =nullptr) const

Return true if branch divergence exists.

Branch divergence has a significantly negative impact on GPU performance when threads in the same wavefront take different paths due to conditional branches.

IfF is passed, provides a context function. IfF is known to only execute in a single threaded environment, the target may choose to skip uniformity analysis and assume all values are uniform.

Definition at line289 of fileTargetTransformInfo.cpp.

ReferencesF.

Referenced byllvm::LoopVectorizationCostModel::computeMaxVF(),llvm::UniformityInfoAnalysis::run(),llvm::JumpThreadingPass::run(),runImpl(),llvm::SpeculativeExecutionPass::runImpl(), andunswitchLoop().

◆ hasConditionalLoadStoreForType()

bool TargetTransformInfo::hasConditionalLoadStoreForType(TypeTy =nullptr) const
Returns
true if the target supports load/store that enables fault suppression of memory operands when the source condition is false.

Definition at line763 of fileTargetTransformInfo.cpp.

Referenced byisSafeCheapLoadStore().

◆ hasDivRemOp()

bool TargetTransformInfo::hasDivRemOp(TypeDataType,
bool IsSigned 
) const

Return true if the target has a unified operation to calculate division and remainder.

If so, the additional implicit multiplication and subtraction required to calculate a remainder from division are free. This can enable more aggressive transformations for division and remainder than would typically be allowed using throughput or size cost models.

Definition at line547 of fileTargetTransformInfo.cpp.

Referenced byoptimizeDivRem().

◆ hasVolatileVariant()

bool TargetTransformInfo::hasVolatileVariant(InstructionI,
unsigned AddrSpace 
) const

Return true if the given instruction (assumed to be a memory access instruction) has a volatile variant.

If that's the case then we can avoid addrspacecast to generic AS for volatile loads/stores. Default implementation returns false, which prevents address space inference for volatile loads/stores.

Definition at line551 of fileTargetTransformInfo.cpp.

ReferencesI.

Referenced byreplaceSimplePointerUse().

◆ haveFastSqrt()

bool TargetTransformInfo::haveFastSqrt(TypeTy) const

Return true if the hardware has a fast square-root instruction.

Definition at line699 of fileTargetTransformInfo.cpp.

Referenced byfoldSqrt(), andrunPartiallyInlineLibCalls().

◆ instCombineIntrinsic()

std::optional<Instruction * > TargetTransformInfo::instCombineIntrinsic(InstCombinerIC,
IntrinsicInstII 
) const

Targets can implement their own combinations for target-specific intrinsics.

This function will be called from the InstCombine pass every time a target-specific intrinsic is encountered.

Returns
std::nullopt to not do anything target specific or a value that will be returned from theInstCombiner. It is possible to return null and stop further processing of the intrinsic by returning nullptr.

Definition at line377 of fileTargetTransformInfo.cpp.

ReferencesII.

Referenced byllvm::InstCombiner::targetInstCombineIntrinsic().

◆ invalidate()

bool llvm::TargetTransformInfo::invalidate(Function,
constPreservedAnalyses,
FunctionAnalysisManager::Invalidator 
)
inline

Handle the invalidation of this information.

When used as a result ofTargetIRAnalysis this method will be called when the function this was computed for changes. When it returns false, the information is preserved across those changes.

Definition at line247 of fileTargetTransformInfo.h.

◆ isAlwaysUniform()

bool llvm::TargetTransformInfo::isAlwaysUniform(constValueV) const

Definition at line301 of fileTargetTransformInfo.cpp.

Referenced byllvm::GenericUniformityAnalysisImpl< ContextT >::initialize().

◆ isElementTypeLegalForScalableVector()

bool TargetTransformInfo::isElementTypeLegalForScalableVector(TypeTy) const
Returns
True if the given type is supported for scalable vectors

Definition at line1341 of fileTargetTransformInfo.cpp.

◆ isExpensiveToSpeculativelyExecute()

bool TargetTransformInfo::isExpensiveToSpeculativelyExecute(constInstructionI) const

Return true if the cost of the instruction is too high to speculatively execute and should be kept behind a branch.

This normally just wraps around agetInstructionCost() call, but some targets might report a low TCK_SizeAndLatency value that is incompatible with the fixed TCC_Expensive value. NOTE: This assumes the instruction passesisSafeToSpeculativelyExecute().

Definition at line703 of fileTargetTransformInfo.cpp.

ReferencesI.

Referenced bysinkSelectOperand().

◆ isFCmpOrdCheaperThanFCmpZero()

bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(TypeTy) const

Return true if it is faster to check if a floating-point value is NaN (or not-NaN) versus a comparison against a constant FP zero value.

Targets should override this if materializing a 0.0 for comparison is generally as cheap as checking for ordered/unordered.

Definition at line708 of fileTargetTransformInfo.cpp.

Referenced byoptimizeSQRT().

◆ isFPVectorizationPotentiallyUnsafe()

bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const

Indicate that it is potentially unsafe to automatically vectorize floating-point operations because the semantics of vector and scalar floating-point semantics may differ.

For example,ARM NEON v7 SIMD math does not support IEEE-754 denormal numbers, while depending on the platform, scalar floating-point math does. This applies to floating-point math operations and calls, not memory operations, shuffles, or casts.

Definition at line680 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizePass::processLoop().

◆ isHardwareLoopProfitable()

bool TargetTransformInfo::isHardwareLoopProfitable(LoopL,
ScalarEvolutionSE,
AssumptionCacheAC,
TargetLibraryInfoLibInfo,
HardwareLoopInfoHWLoopInfo 
) const

Query the target whether it would be profitable to convert the given loop into a hardware loop.

Definition at line356 of fileTargetTransformInfo.cpp.

◆ isIndexedLoadLegal()

bool TargetTransformInfo::isIndexedLoadLegal(enumMemIndexedMode Mode,
TypeTy 
) const
Returns
True if the specified indexed load for the given type is legal.

Definition at line1302 of fileTargetTransformInfo.cpp.

Referenced bycanHoistIVInc(), andmayUsePostIncMode().

◆ isIndexedStoreLegal()

bool TargetTransformInfo::isIndexedStoreLegal(enumMemIndexedMode Mode,
TypeTy 
) const
Returns
True if the specified indexed store for the given type is legal.

Definition at line1307 of fileTargetTransformInfo.cpp.

Referenced bycanHoistIVInc(), andmayUsePostIncMode().

◆ isLegalAddImmediate()

bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const

Return true if the specified immediate is legal add immediate, that is the target has add instructions which can add a register with the immediate without having to materialize the immediate into a register.

Definition at line410 of fileTargetTransformInfo.cpp.

Referenced byisLegalAddImmediate().

◆ isLegalAddressingMode()

bool TargetTransformInfo::isLegalAddressingMode(TypeTy,
GlobalValueBaseGV,
int64_t BaseOffset,
bool HasBaseReg,
int64_t Scale,
unsigned AddrSpace =0,
InstructionI =nullptr,
int64_t ScalableOffset =0 
) const

Return true if the addressing mode represented by AM is legal for this target, for a load/store of the specified type.

The type may be VoidTy, in which case only return true if the addressing mode is legal for a load/store of any legal type. If target returns true inLSRWithInstrQueries(), I may be valid.

Parameters
ScalableOffsetrepresents a quantity of bytes multiplied by vscale, an invariant value known only at runtime. Most targets should not accept a scalable offset.

TODO: Handle pre/postinc as well.

Definition at line422 of fileTargetTransformInfo.cpp.

ReferencesI.

Referenced byisAddFoldable(),isAMCompletelyFolded(), andIsSimplerBaseSCEVForTarget().

◆ isLegalAddScalableImmediate()

bool TargetTransformInfo::isLegalAddScalableImmediate(int64_t Imm) const

Return true if adding the specified scalable immediate is legal, that is the target has add instructions which can add a register with the immediate (multiplied by vscale) without having to materialize the immediate into a register.

Definition at line414 of fileTargetTransformInfo.cpp.

Referenced byisLegalAddImmediate().

◆ isLegalAltInstr()

bool TargetTransformInfo::isLegalAltInstr(VectorTypeVecTy,
unsigned Opcode0,
unsigned Opcode1,
constSmallBitVectorOpcodeMask 
) const

Return true if this is an alternating opcode pattern that can be lowered to a single instruction on the target.

InX86 this is for the addsub instruction which corrsponds to a Shuffle + Fadd + FSub pattern in IR. This function expectes two opcodes:Opcode1 andOpcode2 being selected byOpcodeMask. The mask contains one bit per lane and is a0 whenOpcode0 is selected and1 when Opcode1 is selected.VecTy is the vector type of the instruction to be generated.

Definition at line495 of fileTargetTransformInfo.cpp.

◆ isLegalBroadcastLoad()

bool TargetTransformInfo::isLegalBroadcastLoad(TypeElementTy,
ElementCount NumElements 
) const

\Returns true if the target supports broadcasting a load to a vector of type <NumElements x ElementTy>.

Definition at line485 of fileTargetTransformInfo.cpp.

◆ isLegalICmpImmediate()

bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const

Return true if the specified immediate is legal icmp immediate, that is the target has icmp instructions which can compare a register against the immediate without having to materialize the immediate into a register.

Definition at line418 of fileTargetTransformInfo.cpp.

Referenced byisAMCompletelyFolded().

◆ isLegalInterleavedAccessType()

bool TargetTransformInfo::isLegalInterleavedAccessType(VectorTypeVTy,
unsigned Factor,
Align Alignment,
unsigned AddrSpace 
) const

Return true is the target supports interleaved access for the given vector typeVTy, interleave factorFactor, alignmentAlignment and address spaceAddrSpace.

Definition at line531 of fileTargetTransformInfo.cpp.

Referenced byllvm::slpvectorizer::BoUpSLP::transformNodes().

◆ isLegalMaskedCompressStore()

bool TargetTransformInfo::isLegalMaskedCompressStore(TypeDataType,
Align Alignment 
) const

Return true if the target supports masked compress store.

Definition at line516 of fileTargetTransformInfo.cpp.

Referenced byoptimizeCallInst().

◆ isLegalMaskedExpandLoad()

bool TargetTransformInfo::isLegalMaskedExpandLoad(TypeDataType,
Align Alignment 
) const

Return true if the target supports masked expand load.

Definition at line521 of fileTargetTransformInfo.cpp.

Referenced byoptimizeCallInst().

◆ isLegalMaskedGather()

bool TargetTransformInfo::isLegalMaskedGather(TypeDataType,
Align Alignment 
) const

Return true if the target supports masked gather.

Definition at line490 of fileTargetTransformInfo.cpp.

Referenced byllvm::slpvectorizer::BoUpSLP::canVectorizeLoads(),llvm::LoopVectorizationCostModel::isLegalGatherOrScatter(),llvm::LoopVectorizationCostModel::isScalarWithPredication(), andoptimizeCallInst().

◆ isLegalMaskedLoad()

bool TargetTransformInfo::isLegalMaskedLoad(TypeDataType,
Align Alignment 
) const

Return true if the target supports masked load.

Definition at line471 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationCostModel::interleavedAccessCanBeWidened(),llvm::LoopVectorizationCostModel::isLegalMaskedLoad(), andoptimizeCallInst().

◆ isLegalMaskedScatter()

bool TargetTransformInfo::isLegalMaskedScatter(TypeDataType,
Align Alignment 
) const

Return true if the target supports masked scatter.

Definition at line501 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationCostModel::isLegalGatherOrScatter(),llvm::LoopVectorizationCostModel::isScalarWithPredication(), andoptimizeCallInst().

◆ isLegalMaskedStore()

bool TargetTransformInfo::isLegalMaskedStore(TypeDataType,
Align Alignment 
) const

Return true if the target supports masked store.

Definition at line466 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationCostModel::interleavedAccessCanBeWidened(),llvm::LoopVectorizationCostModel::isLegalMaskedStore(), andoptimizeCallInst().

◆ isLegalMaskedVectorHistogram()

bool TargetTransformInfo::isLegalMaskedVectorHistogram(TypeAddrType,
TypeDataType 
) const

Definition at line538 of fileTargetTransformInfo.cpp.

Referenced byoptimizeCallInst().

◆ isLegalNTLoad()

bool TargetTransformInfo::isLegalNTLoad(TypeDataType,
Align Alignment 
) const

Return true if the target supports nontemporal load.

Definition at line481 of fileTargetTransformInfo.cpp.

◆ isLegalNTStore()

bool TargetTransformInfo::isLegalNTStore(TypeDataType,
Align Alignment 
) const

Return true if the target supports nontemporal store.

Definition at line476 of fileTargetTransformInfo.cpp.

◆ isLegalStridedLoadStore()

bool TargetTransformInfo::isLegalStridedLoadStore(TypeDataType,
Align Alignment 
) const

Return true if the target supports strided load.

Definition at line526 of fileTargetTransformInfo.cpp.

Referenced byllvm::slpvectorizer::BoUpSLP::canVectorizeLoads(), andllvm::slpvectorizer::BoUpSLP::transformNodes().

◆ isLegalToVectorizeLoad()

bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInstLI) const
Returns
True if the load instruction is legal to vectorize.

Definition at line1316 of fileTargetTransformInfo.cpp.

◆ isLegalToVectorizeLoadChain()

bool TargetTransformInfo::isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace 
) const
Returns
True if it is legal to vectorize the given load chain.

Definition at line1324 of fileTargetTransformInfo.cpp.

◆ isLegalToVectorizeReduction()

bool TargetTransformInfo::isLegalToVectorizeReduction(constRecurrenceDescriptorRdxDesc,
ElementCount VF 
) const
Returns
True if it is legal to vectorize the given reduction kind.

Definition at line1336 of fileTargetTransformInfo.cpp.

◆ isLegalToVectorizeStore()

bool TargetTransformInfo::isLegalToVectorizeStore(StoreInstSI) const
Returns
True if the store instruction is legal to vectorize.

Definition at line1320 of fileTargetTransformInfo.cpp.

◆ isLegalToVectorizeStoreChain()

bool TargetTransformInfo::isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace 
) const
Returns
True if it is legal to vectorize the given store chain.

Definition at line1330 of fileTargetTransformInfo.cpp.

◆ isLoweredToCall()

bool TargetTransformInfo::isLoweredToCall(constFunctionF) const

Test whether calls to a function lower to actual program function calls.

The idea is to test whether the program is likely to require a 'call' instruction or equivalent in order to call the given function.

FIXME: It's not clear that this is a good or useful query API. Client's should probably move to simpler cost metrics using the above. Alternatively, we could split the cost interface into distinct code-size and execution-speed costs. This would allow modelling the core of this query more accurately as a call is a single small instruction, but incurs significant execution cost.

Definition at line352 of fileTargetTransformInfo.cpp.

ReferencesF.

Referenced byllvm::CodeMetrics::analyzeBasicBlock(),analyzeLoopUnrollCost(), andrunCGProfilePass().

◆ isLSRCostLess()

bool TargetTransformInfo::isLSRCostLess(constTargetTransformInfo::LSRCostC1,
constTargetTransformInfo::LSRCostC2 
) const

Return true if LSR cost of C1 is lower than C2.

Definition at line432 of fileTargetTransformInfo.cpp.

◆ isMultiversionedFunction()

bool TargetTransformInfo::isMultiversionedFunction(constFunctionF) const

Returns true if this is an instance of a function with multiple versions.

Definition at line1390 of fileTargetTransformInfo.cpp.

ReferencesF.

Referenced bycollectVersions(), andOptimizeNonTrivialIFuncs().

◆ isNoopAddrSpaceCast()

bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS,
unsigned ToAS 
) const

Definition at line324 of fileTargetTransformInfo.cpp.

Referenced byisNoopPtrIntCastPair().

◆ isNumRegsMajorCostOfLSR()

bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const

Return true if LSR major cost is number of registers.

Targets which implement their own isLSRCostLess and unset number of registers as major cost should return false, otherwise return true.

Definition at line437 of fileTargetTransformInfo.cpp.

◆ isProfitableLSRChainElement()

bool TargetTransformInfo::isProfitableLSRChainElement(InstructionI) const
Returns
true if LSR should not optimize a chain that includesI.

Definition at line445 of fileTargetTransformInfo.cpp.

ReferencesI.

Referenced byisProfitableChain().

◆ isProfitableToHoist()

bool TargetTransformInfo::isProfitableToHoist(InstructionI) const

Return true if it is profitable to hoist instruction in the then/else to before if.

Definition at line577 of fileTargetTransformInfo.cpp.

ReferencesI.

Referenced byshouldHoistCommonInstructions().

◆ isProfitableToSinkOperands()

bool TargetTransformInfo::isProfitableToSinkOperands(InstructionI,
SmallVectorImpl<Use * > & Ops 
) const

Return true if sinking I's operands to the same basic block as I is profitable, e.g.

because the operands can be folded into a target instruction during instruction selection. After calling the functionOps contains the Uses to sink ordered by dominance (dominating users come first).

Definition at line1429 of fileTargetTransformInfo.cpp.

ReferencesI.

◆ isSingleThreaded()

bool TargetTransformInfo::isSingleThreaded() const

Definition at line338 of fileTargetTransformInfo.cpp.

◆ isSourceOfDivergence()

bool TargetTransformInfo::isSourceOfDivergence(constValueV) const

Returns whether V is a source of divergence.

This function provides the target-dependent information for the target-independent UniformityAnalysis.

Definition at line293 of fileTargetTransformInfo.cpp.

Referenced byllvm::GenericUniformityAnalysisImpl< ContextT >::initialize().

◆ isTargetIntrinsicTriviallyScalarizable()

bool TargetTransformInfo::isTargetIntrinsicTriviallyScalarizable(Intrinsic::ID ID) const

Definition at line608 of fileTargetTransformInfo.cpp.

Referenced byllvm::isTriviallyScalarizable().

◆ isTargetIntrinsicWithOverloadTypeAtArg()

bool TargetTransformInfo::isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID,
int OpdIdx 
) const

Identifies if the vector form of the intrinsic is overloaded on the type of the operand at indexOpdIdx, or on the return type ifOpdIdx is -1.

Definition at line618 of fileTargetTransformInfo.cpp.

Referenced byllvm::isVectorIntrinsicWithOverloadTypeAtArg().

◆ isTargetIntrinsicWithScalarOpAtArg()

bool TargetTransformInfo::isTargetIntrinsicWithScalarOpAtArg(Intrinsic::ID ID,
unsigned ScalarOpdIdx 
) const

Identifies if the vector form of the intrinsic has a scalar operand.

Definition at line613 of fileTargetTransformInfo.cpp.

Referenced byllvm::isVectorIntrinsicWithScalarOpAtArg().

◆ isTargetIntrinsicWithStructReturnOverloadAtField()

bool TargetTransformInfo::isTargetIntrinsicWithStructReturnOverloadAtField(Intrinsic::ID ID,
int RetIdx 
) const

Identifies if the vector form of the intrinsic that returns a struct is overloaded at the struct element indexRetIdx.

Definition at line623 of fileTargetTransformInfo.cpp.

Referenced byllvm::isVectorIntrinsicWithStructReturnOverloadAtField().

◆ isTruncateFree()

bool TargetTransformInfo::isTruncateFree(TypeTy1,
TypeTy2 
) const

Return true if it's free to truncate a value of type Ty1 to type Ty2.

e.g. On x86 it's free to truncate a i32 value in register EAX to i16 by referencing its sub-register AX.

Definition at line573 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationCostModel::isOptimizableIVTruncate(), andllvm::SCEVExpander::replaceCongruentIVs().

◆ isTypeLegal()

bool TargetTransformInfo::isTypeLegal(TypeTy) const

Return true if this type is legal.

Definition at line583 of fileTargetTransformInfo.cpp.

Referenced byllvm::slpvectorizer::BoUpSLP::canVectorizeLoads(),llvm::computeMinimumValueSizes(),foldConsecutiveLoads(),isLoadCombineCandidateImpl(), andisTypeLegalForLookupTable().

◆ isValidAddrSpaceCast()

bool llvm::TargetTransformInfo::isValidAddrSpaceCast(unsigned FromAS,
unsigned ToAS 
) const

Query the target whether the specified address space cast from FromAS to ToAS is valid.

Definition at line305 of fileTargetTransformInfo.cpp.

Referenced byllvm::expandMemMoveAsLoop(),llvm::InstCombiner::isValidAddrSpaceCast(), andtryInsertCastToCommonAddrSpace().

◆ isVectorShiftByScalarCheap()

bool TargetTransformInfo::isVectorShiftByScalarCheap(TypeTy) const

Return true if it's significantly cheaper to shift a vector by a uniform scalar than by an amount which will vary across each lane.

On x86 before AVX2 for example, there is a "psllw" instruction for the former case, but no simple instruction for a general "a << b" operation on vectors. This should also apply to lowering for vector funnel shifts (rotates).

Definition at line1434 of fileTargetTransformInfo.cpp.

◆ isVScaleKnownToBeAPowerOfTwo()

bool TargetTransformInfo::isVScaleKnownToBeAPowerOfTwo() const
Returns
true if vscale is known to be a power of 2

Definition at line793 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationCostModel::computeMaxVF().

◆ LSRWithInstrQueries()

bool TargetTransformInfo::LSRWithInstrQueries() const

Return true if the loop strength reduce pass should make Instruction* based TTI queries toisLegalAddressingMode().

This is needed onSystemZ, where e.g. a memcpy can only have a 12 bit unsigned immediate offset and no index register.

Definition at line569 of fileTargetTransformInfo.cpp.

Referenced byisAMCompletelyFolded().

◆ operator=()

TargetTransformInfo & TargetTransformInfo::operator=(TargetTransformInfo && RHS)

Definition at line210 of fileTargetTransformInfo.cpp.

ReferencesRHS.

◆ preferEpilogueVectorization()

bool TargetTransformInfo::preferEpilogueVectorization() const

Return true if the loop vectorizer should consider vectorizing an otherwise scalar epilogue loop.

Definition at line1373 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationCostModel::isEpilogueVectorizationProfitable().

◆ preferFixedOverScalableIfEqualCost()

bool TargetTransformInfo::preferFixedOverScalableIfEqualCost() const
Returns
True if the targets prefers fixed width vectorization if the loop vectorizer's cost-model assigns an equal cost to the fixed and scalable version of the vectorized loop.

Definition at line1359 of fileTargetTransformInfo.cpp.

◆ preferInLoopReduction()

bool TargetTransformInfo::preferInLoopReduction(unsigned Opcode,
TypeTy,
ReductionFlags Flags 
) const
Returns
True if the target prefers reductions in loop.

Definition at line1363 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationCostModel::collectElementTypesForWidening(), andllvm::LoopVectorizationCostModel::collectInLoopReductions().

◆ preferPredicatedReductionSelect()

bool TargetTransformInfo::preferPredicatedReductionSelect(unsigned Opcode,
TypeTy,
ReductionFlags Flags 
) const
Returns
True if the target prefers reductions select kept in the loop when tail folding. i.e. loop: p = phi (0, s) a = add (p, x) s = select (mask, a, p) vecreduce.add(s)

As opposed to the normal scheme of p = phi (0, a) which allows the select to be pulled out of the loop. If the select(.., add, ..) can be predicated by the target, this can lead to cleaner code generation.

Definition at line1368 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationCostModel::usePredicatedReductionSelect().

◆ preferPredicateOverEpilogue()

bool TargetTransformInfo::preferPredicateOverEpilogue(TailFoldingInfoTFI) const

Query the target whether it would be prefered to create a predicated vector loop, which can avoid the need to emit a scalar epilogue loop.

Definition at line366 of fileTargetTransformInfo.cpp.

Referenced bygetScalarEpilogueLowering().

◆ prefersVectorizedAddressing()

bool TargetTransformInfo::prefersVectorizedAddressing() const

Return true if target doesn't mind addresses in vectors.

Definition at line556 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationCostModel::setCostBasedWideningDecision().

◆ preferToKeepConstantsAttached()

bool TargetTransformInfo::preferToKeepConstantsAttached(constInstructionInst,
constFunctionFn 
) const

It can be advantageous to detach complex constants from their uses to make their generation cheaper.

This hook allows targets to report when such transformations might negatively effect the code generation of the underlying operation. The motivating example is divides whereby hoisting constants prevents the code generator's ability to transform them into combinations of simpler operations.

Definition at line754 of fileTargetTransformInfo.cpp.

◆ requiresOrderedReduction()

staticbool llvm::TargetTransformInfo::requiresOrderedReduction(std::optional<FastMathFlagsFMF)
inlinestatic

A helper function to determine the type of reduction algorithm used for a givenOpcode and set ofFastMathFlagsFMF.

Definition at line1552 of fileTargetTransformInfo.h.

Referenced byllvm::BasicTTIImplBase< T >::getArithmeticReductionCost(),llvm::AArch64TTIImpl::getArithmeticReductionCost(),llvm::GCNTTIImpl::getArithmeticReductionCost(),llvm::RISCVTTIImpl::getArithmeticReductionCost(),llvm::SystemZTTIImpl::getArithmeticReductionCost(),llvm::X86TTIImpl::getArithmeticReductionCost(), andllvm::ARMTTIImpl::getArithmeticReductionCost().

◆ rewriteIntrinsicWithAddressSpace()

Value * TargetTransformInfo::rewriteIntrinsicWithAddressSpace(IntrinsicInstII,
ValueOldV,
ValueNewV 
) const

Rewrite intrinsic callII such thatOldV will be replaced withNewV, which has a different address space.

This should happen for every operand index that collectFlatAddressOperands returned for the intrinsic.

Returns
nullptr if the intrinsic was not handled. Otherwise, returns the new value (which may be the originalII with modified operands).

Definition at line347 of fileTargetTransformInfo.cpp.

ReferencesII.

◆ shouldBuildLookupTables()

bool TargetTransformInfo::shouldBuildLookupTables() const

Return true if switches should be turned into lookup tables for the target.

Definition at line591 of fileTargetTransformInfo.cpp.

Referenced byswitchToLookupTable().

◆ shouldBuildLookupTablesForConstant()

bool TargetTransformInfo::shouldBuildLookupTablesForConstant(ConstantC) const

Return true if switches should be turned into lookup tables containing this constant value for the target.

Definition at line595 of fileTargetTransformInfo.cpp.

Referencesllvm::CallingConv::C.

Referenced byvalidLookupTableConstant().

◆ shouldBuildRelLookupTables()

bool TargetTransformInfo::shouldBuildRelLookupTables() const

Return true if lookup tables should be turned into relative lookup tables.

Definition at line600 of fileTargetTransformInfo.cpp.

◆ shouldConsiderAddressTypePromotion()

bool TargetTransformInfo::shouldConsiderAddressTypePromotion(constInstructionI,
boolAllowPromotionWithoutCommonHeader 
) const
Returns
True if it should be considered for address type promotion.AllowPromotionWithoutCommonHeader Set true if promotingI is profitable without finding other extensions fed by the same input.

Definition at line817 of fileTargetTransformInfo.cpp.

ReferencesI.

◆ shouldDropLSRSolutionIfLessProfitable()

bool TargetTransformInfo::shouldDropLSRSolutionIfLessProfitable() const

Return true if LSR should drop a found solution if it's calculated to be less profitable than the baseline.

Definition at line441 of fileTargetTransformInfo.cpp.

◆ shouldExpandReduction()

bool TargetTransformInfo::shouldExpandReduction(constIntrinsicInstII) const
Returns
True if the target wants to expand the given reduction intrinsic into a shuffle sequence.

Definition at line1398 of fileTargetTransformInfo.cpp.

ReferencesII.

◆ shouldMaximizeVectorBandwidth()

bool TargetTransformInfo::shouldMaximizeVectorBandwidth(TargetTransformInfo::RegisterKind K) const
Returns
True if the vectorization factor should be chosen to make the vector of the smallest element type match the size of a vector register. For wider element types, this could result in creating vectors that span multiple vector registers. If false, the vectorization factor will be chosen based on the size of the widest element type.KRegister Kind for vectorization.

Definition at line797 of fileTargetTransformInfo.cpp.

◆ shouldPrefetchAddressSpace()

bool TargetTransformInfo::shouldPrefetchAddressSpace(unsigned AS) const
Returns
if target want to issue a prefetch in address spaceAS.

Definition at line862 of fileTargetTransformInfo.cpp.

◆ shouldTreatInstructionLikeSelect()

bool TargetTransformInfo::shouldTreatInstructionLikeSelect(constInstructionI) const

Should the Select Optimization pass treat the given instruction like a select, potentially converting it to a conditional branch.

This can include select-like instructions like or(zext(c), x) that can be converted to selects.

Definition at line667 of fileTargetTransformInfo.cpp.

ReferencesI.

◆ simplifyDemandedUseBitsIntrinsic()

std::optional<Value * > TargetTransformInfo::simplifyDemandedUseBitsIntrinsic(InstCombinerIC,
IntrinsicInstII,
APInt DemandedMask,
KnownBitsKnown,
boolKnownBitsComputed 
) const

Can be used to implement target-specific instruction combining.

See also
instCombineIntrinsic

Definition at line382 of fileTargetTransformInfo.cpp.

ReferencesII.

Referenced byllvm::InstCombiner::targetSimplifyDemandedUseBitsIntrinsic().

◆ simplifyDemandedVectorEltsIntrinsic()

std::optional<Value * > TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic(InstCombinerIC,
IntrinsicInstII,
APInt DemandedElts,
APIntUndefElts,
APIntUndefElts2,
APIntUndefElts3,
std::function< void(Instruction *,unsigned,APInt,APInt &)> SimplifyAndSetOp 
) const

Can be used to implement target-specific instruction combining.

See also
instCombineIntrinsic

Definition at line389 of fileTargetTransformInfo.cpp.

ReferencesII.

Referenced byllvm::InstCombiner::targetSimplifyDemandedVectorEltsIntrinsic().

◆ supportsEfficientVectorElementLoadStore()

bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const

If target has efficient vector element load/store instructions, it can return true here so that insertion/extraction costs are not added to the scalarization cost of a load/store.

Definition at line641 of fileTargetTransformInfo.cpp.

◆ supportsScalableVectors()

bool TargetTransformInfo::supportsScalableVectors() const
Returns
True if the target supports scalable vectors.

Definition at line1416 of fileTargetTransformInfo.cpp.

Referenced byllvm::LoopVectorizationPlanner::planInVPlanNativePath().

◆ supportsTailCallFor()

bool TargetTransformInfo::supportsTailCallFor(constCallBaseCB) const

If target supports tail call onCB.

Definition at line649 of fileTargetTransformInfo.cpp.

Referenced byllvm::coro::BaseCloner::create(), andllvm::coro::createMustTailCall().

◆ supportsTailCalls()

bool TargetTransformInfo::supportsTailCalls() const

If the target supports tail calls.

Definition at line645 of fileTargetTransformInfo.cpp.

◆ useAA()

bool TargetTransformInfo::useAA() const

Definition at line581 of fileTargetTransformInfo.cpp.

◆ useColdCCForColdCall()

bool TargetTransformInfo::useColdCCForColdCall(FunctionF) const

Return true if the input function which is cold at all call sites, should use coldcc calling convention.

Definition at line604 of fileTargetTransformInfo.cpp.

ReferencesF.

Referenced byOptimizeFunctions().


The documentation for this class was generated from the following files:

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