1//==- WebAssemblyDisassembler.cpp - Disassembler for WebAssembly -*- C++ -*-==// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7//===----------------------------------------------------------------------===// 10/// This file is part of the WebAssembly Disassembler. 12/// It contains code to translate the data produced by the decoder into 15//===----------------------------------------------------------------------===// 34#define DEBUG_TYPE "wasm-disassembler" 38#include "WebAssemblyGenDisassemblerTables.inc" 41staticconstexprint WebAssemblyInstructionTableSize = 256;
44 std::unique_ptr<const MCInstrInfo> MCII;
56 std::unique_ptr<const MCInstrInfo> MCII)
59}
// end anonymous namespace 64 std::unique_ptr<const MCInstrInfo> MCII(
T.createMCInstrInfo());
65returnnew WebAssemblyDisassembler(STI, Ctx, std::move(MCII));
70// Register the disassembler for each target. 88constchar *
Error =
nullptr;
114 support::endian::read<T, llvm::endianness::little>(Bytes.
data() +
Size);
116if (std::is_floating_point<T>::value) {
131// Start of a code section: we're parsing only the function count. 132 int64_t FunctionCount;
135outs() <<
" # " << FunctionCount <<
" functions in section.";
137// Parse the start of a single function. 138 int64_t BodySize, LocalEntryCount;
142if (LocalEntryCount) {
144for (int64_t
I = 0;
I < LocalEntryCount;
I++) {
149for (int64_t J = 0; J < Count; J++) {
169constauto *WasmInst = &InstructionTable0[Opc];
170// If this is a prefix byte, indirect to another table. 171if (WasmInst->ET == ET_Prefix) {
173// Linear search, so far only 2 entries. 174for (
auto PT = PrefixTable; PT->Table; PT++) {
175if (PT->Prefix == Opc) {
176 WasmInst = PT->Table;
185if (PrefixedOpc < 0 || PrefixedOpc >= WebAssemblyInstructionTableSize)
187 WasmInst += PrefixedOpc;
189if (WasmInst->ET == ET_Unused)
191// At this point we must have a valid instruction to decode. 192assert(WasmInst->ET == ET_Instruction);
193MI.setOpcode(WasmInst->Opcode);
194// Parse any operands. 195for (
uint8_t OPI = 0; OPI < WasmInst->NumOperands; OPI++) {
196auto OT = OperandTable[WasmInst->OperandStart + OPI];
221// block_type operands: 228// Negative values are single septet value types or empty types 229if (
Size != PrevSize + 1) {
236// We don't have access to the signature, so create a symbol without one 237MCSymbol *
Sym = getContext().createTempSymbol(
"typeindex",
true);
238auto *WasmSym = cast<MCSymbolWasm>(
Sym);
248if (!parseImmediate<float>(
MI,
Size, Bytes))
253if (!parseImmediate<double>(
MI,
Size, Bytes))
257// Vector lane operands (not LEB encoded). 259if (!parseImmediate<uint8_t>(
MI,
Size, Bytes))
264if (!parseImmediate<uint16_t>(
MI,
Size, Bytes))
269if (!parseImmediate<uint32_t>(
MI,
Size, Bytes))
274if (!parseImmediate<uint64_t>(
MI,
Size, Bytes))
279 int64_t TargetTableLen;
282for (int64_t
I = 0;
I < TargetTableLen;
I++) {
294 int64_t NumCatches =
MI.getOperand(
MI.getNumOperands() - 1).getImm();
295for (int64_t
I = 0;
I < NumCatches;
I++) {
296if (!parseImmediate<uint8_t>(
MI,
Size, Bytes))
298 int64_t CatchOpcode =
MI.getOperand(
MI.getNumOperands() - 1).getImm();
310// The tablegen header currently does not have any register operands since 311// we use only the stack (_S) instructions. 312// If you hit this that probably means a bad instruction definition in #define LLVM_EXTERNAL_VISIBILITY
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyDisassembler()
static int nextByte(ArrayRef< uint8_t > Bytes, uint64_t &Size)
static bool nextLEB(int64_t &Val, ArrayRef< uint8_t > Bytes, uint64_t &Size, bool Signed)
static MCDisassembler * createWebAssemblyDisassembler(const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)
bool parseImmediate(MCInst &MI, uint64_t &Size, ArrayRef< uint8_t > Bytes)
static bool parseLEBImmediate(MCInst &MI, uint64_t &Size, ArrayRef< uint8_t > Bytes, bool Signed)
This file contains the declaration of the WebAssembly-specific type parsing utility functions.
This file registers the WebAssembly target.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
size_t size() const
size - Get the array size.
Lightweight error class with error context and mandatory checking.
Tagged union holding either a T or a Error.
Context object for machine code objects.
Superclass for all disassemblers.
virtual Expected< bool > onSymbolStart(SymbolInfoTy &Symbol, uint64_t &Size, ArrayRef< uint8_t > Bytes, uint64_t Address) const
Used to perform separate target specific disassembly for a particular symbol.
DecodeStatus
Ternary decode status.
virtual DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size, ArrayRef< uint8_t > Bytes, uint64_t Address, raw_ostream &CStream) const =0
Returns the disassembly of a single instruction.
Base class for the full range of assembler expressions which are needed for parsing.
Instances of this class represent a single low-level machine instruction.
static MCOperand createExpr(const MCExpr *Val)
static MCOperand createImm(int64_t Val)
static MCOperand createDFPImm(uint64_t Val)
Generic base class for all target subtargets.
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Target - Wrapper for Target specific information.
The instances of the Type class are immutable: once they are created, they are never changed.
This class implements an extremely fast bulk output stream that can only output to a stream.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ OPERAND_GLOBAL
Global index.
@ OPERAND_CATCH_LIST
A list of catch clauses for try_table.
@ OPERAND_OFFSET64
64-bit unsigned memory offsets.
@ OPERAND_I32IMM
32-bit integer immediates.
@ OPERAND_P2ALIGN
p2align immediate for load and store address alignment.
@ OPERAND_TABLE
32-bit unsigned table number.
@ OPERAND_LOCAL
Local index.
@ OPERAND_VEC_I64IMM
64-bit vector lane immediate
@ OPERAND_VEC_I16IMM
16-bit vector lane immediate
@ OPERAND_TYPEINDEX
type signature immediate for call_indirect.
@ OPERAND_FUNCTION32
32-bit unsigned function indices.
@ OPERAND_F32IMM
32-bit floating-point immediates.
@ OPERAND_BASIC_BLOCK
Basic block label in a branch construct.
@ OPERAND_VEC_I32IMM
32-bit vector lane immediate
@ OPERAND_BRLIST
A list of branch targets for br_list.
@ OPERAND_F64IMM
64-bit floating-point immediates.
@ OPERAND_VEC_I8IMM
8-bit vector lane immediate
@ OPERAND_SIGNATURE
signature immediate for block/loop.
@ OPERAND_I64IMM
64-bit integer immediates.
@ OPERAND_OFFSET32
32-bit unsigned memory offsets.
const char * anyTypeToString(unsigned Type)
@ WASM_SYMBOL_TYPE_SECTION
@ WASM_SYMBOL_TYPE_FUNCTION
This is an optimization pass for GlobalISel generic memory operations.
raw_fd_ostream & outs()
This returns a reference to a raw_fd_ostream for standard output.
uint64_t decodeULEB128(const uint8_t *p, unsigned *n=nullptr, const uint8_t *end=nullptr, const char **error=nullptr)
Utility function to decode a ULEB128 value.
int64_t decodeSLEB128(const uint8_t *p, unsigned *n=nullptr, const uint8_t *end=nullptr, const char **error=nullptr)
Utility function to decode a SLEB128 value.
Target & getTheWebAssemblyTarget32()
Target & getTheWebAssemblyTarget64()
static void RegisterMCDisassembler(Target &T, Target::MCDisassemblerCtorTy Fn)
RegisterMCDisassembler - Register a MCDisassembler implementation for the given target.
