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1//===- StackSlotColoring.cpp - Stack slot coloring pass. ------------------===//

2//

3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.

4// See https://llvm.org/LICENSE.txt for license information.

5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception

6//

7//===----------------------------------------------------------------------===//

8//

9// This file implements the stack slot coloring pass.

10//

11//===----------------------------------------------------------------------===//

13#include "llvm/ADT/BitVector.h"

14#include "llvm/ADT/SmallVector.h"

15#include "llvm/ADT/Statistic.h"

16#include "llvm/CodeGen/LiveDebugVariables.h"

17#include "llvm/CodeGen/LiveInterval.h"

18#include "llvm/CodeGen/LiveIntervalUnion.h"

19#include "llvm/CodeGen/LiveIntervals.h"

20#include "llvm/CodeGen/LiveStacks.h"

21#include "llvm/CodeGen/MachineBasicBlock.h"

22#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"

23#include "llvm/CodeGen/MachineFrameInfo.h"

24#include "llvm/CodeGen/MachineFunction.h"

25#include "llvm/CodeGen/MachineFunctionPass.h"

26#include "llvm/CodeGen/MachineInstr.h"

27#include "llvm/CodeGen/MachineMemOperand.h"

28#include "llvm/CodeGen/MachineOperand.h"

29#include "llvm/CodeGen/Passes.h"

30#include "llvm/CodeGen/PseudoSourceValue.h"

31#include "llvm/CodeGen/PseudoSourceValueManager.h"

32#include "llvm/CodeGen/SlotIndexes.h"

33#include "llvm/CodeGen/TargetInstrInfo.h"

34#include "llvm/CodeGen/TargetSubtargetInfo.h"

35#include "llvm/InitializePasses.h"

36#include "llvm/Pass.h"

37#include "llvm/Support/Casting.h"

38#include "llvm/Support/CommandLine.h"

39#include "llvm/Support/Debug.h"

40#include "llvm/Support/raw_ostream.h"

41#include <cassert>

42#include <cstdint>

43#include <iterator>

44#include <vector>

46using namespacellvm;

48#define DEBUG_TYPE "stack-slot-coloring"

50staticcl::opt<bool>

51DisableSharing("no-stack-slot-sharing",

52cl::init(false),cl::Hidden,

53cl::desc("Suppress slot sharing during stack coloring"));

55staticcl::opt<int>DCELimit("ssc-dce-limit",cl::init(-1),cl::Hidden);

57STATISTIC(NumEliminated,"Number of stack slots eliminated due to coloring");

58STATISTIC(NumDead,"Number of trivially dead stack accesses eliminated");

60namespace{

62classStackSlotColoring :publicMachineFunctionPass {

63LiveStacks *LS =nullptr;

64MachineFrameInfo *MFI =nullptr;

65constTargetInstrInfo *TII =nullptr;

66constMachineBlockFrequencyInfo *MBFI =nullptr;

67SlotIndexes *Indexes =nullptr;

69// SSIntervals - Spill slot intervals.

70 std::vector<LiveInterval*> SSIntervals;

72// SSRefs - Keep a list of MachineMemOperands for each spill slot.

73// MachineMemOperands can be shared between instructions, so we need

74// to be careful that renames like [FI0, FI1] -> [FI1, FI2] do not

75// become FI0 -> FI1 -> FI2.

76SmallVector<SmallVector<MachineMemOperand *, 8>, 16> SSRefs;

78// OrigAlignments - Alignments of stack objects before coloring.

79SmallVector<Align, 16> OrigAlignments;

81// OrigSizes - Sizes of stack objects before coloring.

82SmallVector<unsigned, 16> OrigSizes;

84// AllColors - If index is set, it's a spill slot, i.e. color.

85// FIXME: This assumes PEI locate spill slot with smaller indices

86// closest to stack pointer / frame pointer. Therefore, smaller

87// index == better color. This is per stack ID.

88SmallVector<BitVector, 2> AllColors;

90// NextColor - Next "color" that's not yet used. This is per stack ID.

91SmallVector<int, 2> NextColors = { -1 };

93// UsedColors - "Colors" that have been assigned. This is per stack ID

94SmallVector<BitVector, 2> UsedColors;

96// Join all intervals sharing one color into a single LiveIntervalUnion to

97// speedup range overlap test.

98classColorAssignmentInfo {

99// Single liverange (used to avoid creation of LiveIntervalUnion).

100LiveInterval *SingleLI =nullptr;

101// LiveIntervalUnion to perform overlap test.

102LiveIntervalUnion *LIU =nullptr;

103// LiveIntervalUnion has a parameter in its constructor so doing this

104// dirty magic.

105uint8_t LIUPad[sizeof(LiveIntervalUnion)];

106

107public:

108 ~ColorAssignmentInfo() {

109if (LIU)

110 LIU->~LiveIntervalUnion();// Dirty magic again.

111 }

112

113// Return true if LiveInterval overlaps with any

114// intervals that have already been assigned to this color.

115bool overlaps(LiveInterval *LI) const{

116if (LIU)

117returnLiveIntervalUnion::Query(*LI, *LIU).checkInterference();

118return SingleLI ? SingleLI->overlaps(*LI) :false;

119 }

120

121// Add new LiveInterval to this color.

122voidadd(LiveInterval *LI,LiveIntervalUnion::Allocator &Alloc) {

123assert(!overlaps(LI));

124if (LIU) {

125 LIU->unify(*LI, *LI);

126 }elseif (SingleLI) {

127 LIU =new (LIUPad)LiveIntervalUnion(Alloc);

128 LIU->unify(*SingleLI, *SingleLI);

129 LIU->unify(*LI, *LI);

130 SingleLI =nullptr;

131 }else

132 SingleLI = LI;

133 }

134 };

135

136LiveIntervalUnion::Allocator LIUAlloc;

137

138// Assignments - Color to intervals mapping.

139SmallVector<ColorAssignmentInfo, 16> Assignments;

140

141public:

142staticcharID;// Pass identification

143

144 StackSlotColoring() :MachineFunctionPass(ID) {

145initializeStackSlotColoringPass(*PassRegistry::getPassRegistry());

146 }

147

148voidgetAnalysisUsage(AnalysisUsage &AU) const override{

149 AU.setPreservesCFG();

150 AU.addRequired<SlotIndexesWrapperPass>();

151 AU.addPreserved<SlotIndexesWrapperPass>();

152 AU.addRequired<LiveStacksWrapperLegacy>();

153 AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();

154 AU.addPreserved<MachineBlockFrequencyInfoWrapperPass>();

155 AU.addPreservedID(MachineDominatorsID);

156

157// In some Target's pipeline, register allocation (RA) might be

158// split into multiple phases based on register class. So, this pass

159// may be invoked multiple times requiring it to save these analyses to be

160// used by RA later.

161 AU.addPreserved<LiveIntervalsWrapperPass>();

162 AU.addPreserved<LiveDebugVariablesWrapperLegacy>();

163

164MachineFunctionPass::getAnalysisUsage(AU);

165 }

166

167boolrunOnMachineFunction(MachineFunction &MF)override;

168

169private:

170void InitializeSlots();

171void ScanForSpillSlotRefs(MachineFunction &MF);

172int ColorSlot(LiveInterval *li);

173bool ColorSlots(MachineFunction &MF);

174void RewriteInstruction(MachineInstr &MI,SmallVectorImpl<int> &SlotMapping,

175MachineFunction &MF);

176bool RemoveDeadStores(MachineBasicBlock*MBB);

177 };

178

179}// end anonymous namespace

180

181char StackSlotColoring::ID = 0;

182

183char &llvm::StackSlotColoringID = StackSlotColoring::ID;

184

185INITIALIZE_PASS_BEGIN(StackSlotColoring,DEBUG_TYPE,

186"Stack Slot Coloring",false,false)

187INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)

188INITIALIZE_PASS_DEPENDENCY(LiveStacksWrapperLegacy)

189INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)

190INITIALIZE_PASS_END(StackSlotColoring,DEBUG_TYPE,

191 "Stack SlotColoring",false,false)

192

193namespace {

194

195// IntervalSorter - Comparison predicate that sort live intervals by

196// their weight.

197structIntervalSorter {

198booloperator()(LiveInterval*LHS,LiveInterval*RHS) const{

199returnLHS->weight() >RHS->weight();

200 }

201};

202

203}// end anonymous namespace

204

205/// ScanForSpillSlotRefs - Scan all the machine instructions for spill slot

206/// references and update spill slot weights.

207void StackSlotColoring::ScanForSpillSlotRefs(MachineFunction &MF) {

208 SSRefs.resize(MFI->getObjectIndexEnd());

209

210// FIXME: Need the equivalent of MachineRegisterInfo for frameindex operands.

211for (MachineBasicBlock &MBB : MF) {

212for (MachineInstr &MI :MBB) {

213for (constMachineOperand &MO :MI.operands()) {

214if (!MO.isFI())

215continue;

216int FI = MO.getIndex();

217if (FI < 0)

218continue;

219if (!LS->hasInterval(FI))

220continue;

221LiveInterval &li =LS->getInterval(FI);

222if (!MI.isDebugInstr())

223 li.incrementWeight(

224LiveIntervals::getSpillWeight(false,true, MBFI,MI));

225 }

226for (MachineMemOperand *MMO :MI.memoperands()) {

227if (constFixedStackPseudoSourceValue *FSV =

228 dyn_cast_or_null<FixedStackPseudoSourceValue>(

229 MMO->getPseudoValue())) {

230int FI = FSV->getFrameIndex();

231if (FI >= 0)

232 SSRefs[FI].push_back(MMO);

233 }

234 }

235 }

236 }

237}

238

239/// InitializeSlots - Process all spill stack slot liveintervals and add them

240/// to a sorted (by weight) list.

241void StackSlotColoring::InitializeSlots() {

242int LastFI = MFI->getObjectIndexEnd();

243

244// There is always at least one stack ID.

245 AllColors.resize(1);

246 UsedColors.resize(1);

247

248 OrigAlignments.resize(LastFI);

249 OrigSizes.resize(LastFI);

250 AllColors[0].resize(LastFI);

251 UsedColors[0].resize(LastFI);

252 Assignments.resize(LastFI);

253

254usingPair = std::iterator_traits<LiveStacks::iterator>::value_type;

255

256SmallVector<Pair *, 16> Intervals;

257

258 Intervals.reserve(LS->getNumIntervals());

259for (auto &I : *LS)

260 Intervals.push_back(&I);

261llvm::sort(Intervals,

262 [](Pair *LHS, Pair *RHS) {returnLHS->first <RHS->first; });

263

264// Gather all spill slots into a list.

265LLVM_DEBUG(dbgs() <<"Spill slot intervals:\n");

266for (auto *I : Intervals) {

267LiveInterval &li =I->second;

268LLVM_DEBUG(li.dump());

269int FI =Register::stackSlot2Index(li.reg());

270if (MFI->isDeadObjectIndex(FI))

271continue;

272

273 SSIntervals.push_back(&li);

274 OrigAlignments[FI] = MFI->getObjectAlign(FI);

275 OrigSizes[FI] = MFI->getObjectSize(FI);

276

277auto StackID = MFI->getStackID(FI);

278if (StackID != 0) {

279 AllColors.resize(StackID + 1);

280 UsedColors.resize(StackID + 1);

281 AllColors[StackID].resize(LastFI);

282 UsedColors[StackID].resize(LastFI);

283 }

284

285 AllColors[StackID].set(FI);

286 }

287LLVM_DEBUG(dbgs() <<'\n');

288

289// Sort them by weight.

290llvm::stable_sort(SSIntervals, IntervalSorter());

291

292 NextColors.resize(AllColors.size());

293

294// Get first "color".

295for (unsignedI = 0, E = AllColors.size();I != E; ++I)

296 NextColors[I] = AllColors[I].find_first();

297}

298

299/// ColorSlot - Assign a "color" (stack slot) to the specified stack slot.

300int StackSlotColoring::ColorSlot(LiveInterval *li) {

301int Color = -1;

302bool Share =false;

303int FI =Register::stackSlot2Index(li->reg());

304uint8_t StackID = MFI->getStackID(FI);

305

306if (!DisableSharing) {

307

308// Check if it's possible to reuse any of the used colors.

309 Color = UsedColors[StackID].find_first();

310while (Color != -1) {

311if (!Assignments[Color].overlaps(li)) {

312 Share =true;

313 ++NumEliminated;

314break;

315 }

316 Color = UsedColors[StackID].find_next(Color);

317 }

318 }

319

320if (Color != -1 && MFI->getStackID(Color) != MFI->getStackID(FI)) {

321LLVM_DEBUG(dbgs() <<"cannot share FIs with different stack IDs\n");

322 Share =false;

323 }

324

325// Assign it to the first available color (assumed to be the best) if it's

326// not possible to share a used color with other objects.

327if (!Share) {

328assert(NextColors[StackID] != -1 &&"No more spill slots?");

329 Color = NextColors[StackID];

330 UsedColors[StackID].set(Color);

331 NextColors[StackID] = AllColors[StackID].find_next(NextColors[StackID]);

332 }

333

334assert(MFI->getStackID(Color) == MFI->getStackID(FI));

335

336// Record the assignment.

337 Assignments[Color].add(li, LIUAlloc);

338LLVM_DEBUG(dbgs() <<"Assigning fi#" << FI <<" to fi#" << Color <<"\n");

339

340// Change size and alignment of the allocated slot. If there are multiple

341// objects sharing the same slot, then make sure the size and alignment

342// are large enough for all.

343Align Alignment = OrigAlignments[FI];

344if (!Share || Alignment > MFI->getObjectAlign(Color))

345 MFI->setObjectAlignment(Color, Alignment);

346 int64_tSize = OrigSizes[FI];

347if (!Share ||Size > MFI->getObjectSize(Color))

348 MFI->setObjectSize(Color,Size);

349return Color;

350}

351

352/// Colorslots - Color all spill stack slots and rewrite all frameindex machine

353/// operands in the function.

354bool StackSlotColoring::ColorSlots(MachineFunction &MF) {

355unsigned NumObjs = MFI->getObjectIndexEnd();

356SmallVector<int, 16>SlotMapping(NumObjs, -1);

357SmallVector<float, 16> SlotWeights(NumObjs, 0.0);

358SmallVector<SmallVector<int, 4>, 16> RevMap(NumObjs);

359BitVector UsedColors(NumObjs);

360

361LLVM_DEBUG(dbgs() <<"Color spill slot intervals:\n");

362bool Changed =false;

363for (LiveInterval *li : SSIntervals) {

364intSS =Register::stackSlot2Index(li->reg());

365int NewSS = ColorSlot(li);

366assert(NewSS >= 0 &&"Stack coloring failed?");

367SlotMapping[SS] = NewSS;

368 RevMap[NewSS].push_back(SS);

369 SlotWeights[NewSS] += li->weight();

370 UsedColors.set(NewSS);

371 Changed |= (SS != NewSS);

372 }

373

374LLVM_DEBUG(dbgs() <<"\nSpill slots after coloring:\n");

375for (LiveInterval *li : SSIntervals) {

376intSS =Register::stackSlot2Index(li->reg());

377 li->setWeight(SlotWeights[SS]);

378 }

379// Sort them by new weight.

380llvm::stable_sort(SSIntervals, IntervalSorter());

381

382#ifndef NDEBUG

383for (LiveInterval *li : SSIntervals)

384LLVM_DEBUG(li->dump());

385LLVM_DEBUG(dbgs() <<'\n');

386#endif

387

388if (!Changed)

389returnfalse;

390

391// Rewrite all MachineMemOperands.

392for (unsigned SS = 0, SE = SSRefs.size(); SS != SE; ++SS) {

393int NewFI =SlotMapping[SS];

394if (NewFI == -1 || (NewFI == (int)SS))

395continue;

396

397constPseudoSourceValue *NewSV = MF.getPSVManager().getFixedStack(NewFI);

398SmallVectorImpl<MachineMemOperand *> &RefMMOs = SSRefs[SS];

399for (MachineMemOperand *MMO : RefMMOs)

400 MMO->setValue(NewSV);

401 }

402

403// Rewrite all MO_FrameIndex operands. Look for dead stores.

404for (MachineBasicBlock &MBB : MF) {

405for (MachineInstr &MI :MBB)

406 RewriteInstruction(MI,SlotMapping, MF);

407 RemoveDeadStores(&MBB);

408 }

409

410// Delete unused stack slots.

411for (int StackID = 0, E = AllColors.size(); StackID != E; ++StackID) {

412int NextColor = NextColors[StackID];

413while (NextColor != -1) {

414LLVM_DEBUG(dbgs() <<"Removing unused stack object fi#" << NextColor <<"\n");

415 MFI->RemoveStackObject(NextColor);

416 NextColor = AllColors[StackID].find_next(NextColor);

417 }

418 }

419

420returntrue;

421}

422

423/// RewriteInstruction - Rewrite specified instruction by replacing references

424/// to old frame index with new one.

425void StackSlotColoring::RewriteInstruction(MachineInstr &MI,

426SmallVectorImpl<int> &SlotMapping,

427MachineFunction &MF) {

428// Update the operands.

429for (MachineOperand &MO :MI.operands()) {

430if (!MO.isFI())

431continue;

432int OldFI = MO.getIndex();

433if (OldFI < 0)

434continue;

435int NewFI =SlotMapping[OldFI];

436if (NewFI == -1 || NewFI == OldFI)

437continue;

438

439assert(MFI->getStackID(OldFI) == MFI->getStackID(NewFI));

440 MO.setIndex(NewFI);

441 }

442

443// The MachineMemOperands have already been updated.

444}

445

446/// RemoveDeadStores - Scan through a basic block and look for loads followed

447/// by stores. If they're both using the same stack slot, then the store is

448/// definitely dead. This could obviously be much more aggressive (consider

449/// pairs with instructions between them), but such extensions might have a

450/// considerable compile time impact.

451bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock*MBB) {

452// FIXME: This could be much more aggressive, but we need to investigate

453// the compile time impact of doing so.

454bool changed =false;

455

456SmallVector<MachineInstr*, 4> toErase;

457

458for (MachineBasicBlock::iterator I =MBB->begin(), E =MBB->end();

459I != E; ++I) {

460if (DCELimit != -1 && (int)NumDead >=DCELimit)

461break;

462int FirstSS, SecondSS;

463if (TII->isStackSlotCopy(*I, FirstSS, SecondSS) && FirstSS == SecondSS &&

464 FirstSS != -1) {

465 ++NumDead;

466 changed =true;

467 toErase.push_back(&*I);

468continue;

469 }

470

471MachineBasicBlock::iterator NextMI = std::next(I);

472MachineBasicBlock::iterator ProbableLoadMI =I;

473

474Register LoadReg;

475Register StoreReg;

476unsigned LoadSize = 0;

477unsigned StoreSize = 0;

478if (!(LoadReg =TII->isLoadFromStackSlot(*I, FirstSS, LoadSize)))

479continue;

480// Skip the ...pseudo debugging... instructions between a load and store.

481while ((NextMI != E) && NextMI->isDebugInstr()) {

482 ++NextMI;

483 ++I;

484 }

485if (NextMI == E)continue;

486if (!(StoreReg =TII->isStoreToStackSlot(*NextMI, SecondSS, StoreSize)))

487continue;

488if (FirstSS != SecondSS || LoadReg != StoreReg || FirstSS == -1 ||

489 LoadSize != StoreSize || !MFI->isSpillSlotObjectIndex(FirstSS))

490continue;

491

492 ++NumDead;

493 changed =true;

494

495if (NextMI->findRegisterUseOperandIdx(LoadReg,/*TRI=*/nullptr,true) !=

496 -1) {

497 ++NumDead;

498 toErase.push_back(&*ProbableLoadMI);

499 }

500

501 toErase.push_back(&*NextMI);

502 ++I;

503 }

504

505for (MachineInstr *MI : toErase) {

506if (Indexes)

507 Indexes->removeMachineInstrFromMaps(*MI);

508MI->eraseFromParent();

509 }

510

511return changed;

512}

513

514bool StackSlotColoring::runOnMachineFunction(MachineFunction &MF) {

515LLVM_DEBUG({

516dbgs() <<"********** Stack Slot Coloring **********\n"

517 <<"********** Function: " << MF.getName() <<'\n';

518 });

519

520if (skipFunction(MF.getFunction()))

521returnfalse;

522

523 MFI = &MF.getFrameInfo();

524TII = MF.getSubtarget().getInstrInfo();

525LS = &getAnalysis<LiveStacksWrapperLegacy>().getLS();

526 MBFI = &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();

527 Indexes = &getAnalysis<SlotIndexesWrapperPass>().getSI();

528

529bool Changed =false;

530

531unsigned NumSlots =LS->getNumIntervals();

532if (NumSlots == 0)

533// Nothing to do!

534returnfalse;

535

536// If there are calls to setjmp or sigsetjmp, don't perform stack slot

537// coloring. The stack could be modified before the longjmp is executed,

538// resulting in the wrong value being used afterwards.

539if (MF.exposesReturnsTwice())

540returnfalse;

541

542// Gather spill slot references

543 ScanForSpillSlotRefs(MF);

544 InitializeSlots();

545 Changed = ColorSlots(MF);

546

547for (int &Next : NextColors)

548 Next = -1;

549

550 SSIntervals.clear();

551for (auto &RefMMOs : SSRefs)

552 RefMMOs.clear();

553 SSRefs.clear();

554 OrigAlignments.clear();

555 OrigSizes.clear();

556 AllColors.clear();

557 UsedColors.clear();

558 Assignments.clear();

559

560return Changed;

561}

MBB

MachineBasicBlock & MBB

Definition:ARMSLSHardening.cpp:71

BitVector.h

This file implements the BitVector class.

#define LLVM_DEBUG(...)

Definition:Debug.h:106

Size

uint64_t Size

Definition:ELFObjHandler.cpp:81

TII

const HexagonInstrInfo * TII

Definition:HexagonCopyToCombine.cpp:125

IRTranslator LLVM IR MI

Definition:IRTranslator.cpp:112

#define I(x, y, z)

Definition:MD5.cpp:58

MachineBasicBlock.h

MachineBlockFrequencyInfo.h

MachineFrameInfo.h

MachineFunctionPass.h

INITIALIZE_PASS_DEPENDENCY

#define INITIALIZE_PASS_DEPENDENCY(depName)

Definition:PassSupport.h:55

INITIALIZE_PASS_END

#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)

Definition:PassSupport.h:57

INITIALIZE_PASS_BEGIN

#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)

Definition:PassSupport.h:52

Pass.h

PseudoSourceValueManager.h

PseudoSourceValue.h

assert

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

SlotIndexes.h

SmallVector.h

This file defines the SmallVector class.

Coloring

Stack Slot Coloring

Definition:StackSlotColoring.cpp:191

DisableSharing

static cl::opt< bool > DisableSharing("no-stack-slot-sharing", cl::init(false), cl::Hidden, cl::desc("Suppress slot sharing during stack coloring"))

DEBUG_TYPE

#define DEBUG_TYPE

Definition:StackSlotColoring.cpp:48

DCELimit

static cl::opt< int > DCELimit("ssc-dce-limit", cl::init(-1), cl::Hidden)

Statistic.h

This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...

STATISTIC

#define STATISTIC(VARNAME, DESC)

Definition:Statistic.h:166

TargetInstrInfo.h

TargetSubtargetInfo.h

RHS

Value * RHS

Definition:X86PartialReduction.cpp:74

LHS

Value * LHS

Definition:X86PartialReduction.cpp:73

llvm::AnalysisUsage

Represent the analysis usage information of a pass.

Definition:PassAnalysisSupport.h:47

llvm::AnalysisUsage::addPreservedID

AnalysisUsage & addPreservedID(const void *ID)

Definition:PassAnalysisSupport.h:88

llvm::AnalysisUsage::addRequired

AnalysisUsage & addRequired()

Definition:PassAnalysisSupport.h:75

llvm::AnalysisUsage::addPreserved

AnalysisUsage & addPreserved()

Add the specified Pass class to the set of analyses preserved by this pass.

Definition:PassAnalysisSupport.h:98

llvm::AnalysisUsage::setPreservesCFG

void setPreservesCFG()

This function should be called by the pass, iff they do not:

Definition:Pass.cpp:256

llvm::BitVector

Definition:BitVector.h:82

llvm::FixedStackPseudoSourceValue

A specialized PseudoSourceValue for holding FixedStack values, which must include a frame index.

Definition:PseudoSourceValue.h:90

llvm::HexagonInstrInfo::isLoadFromStackSlot

TargetInstrInfo overrides.

Definition:HexagonInstrInfo.cpp:288

llvm::HexagonInstrInfo::isStoreToStackSlot

If the specified machine instruction is a direct store to a stack slot, return the virtual or physica...

Definition:HexagonInstrInfo.cpp:336

llvm::LiveDebugVariablesWrapperLegacy

Definition:LiveDebugVariables.h:71

llvm::LiveIntervalUnion::Query

Query interferences between a single live virtual register and a live interval union.

Definition:LiveIntervalUnion.h:112

llvm::LiveIntervalUnion::Query::checkInterference

bool checkInterference()

Definition:LiveIntervalUnion.h:159

llvm::LiveIntervalUnion

Union of live intervals that are strong candidates for coalescing into a single register (either phys...

Definition:LiveIntervalUnion.h:42

llvm::LiveIntervalUnion::unify

void unify(const LiveInterval &VirtReg, const LiveRange &Range)

Definition:LiveIntervalUnion.cpp:28

llvm::LiveIntervalUnion::Allocator

LiveSegments::Allocator Allocator

Definition:LiveIntervalUnion.h:58

llvm::LiveInterval

LiveInterval - This class represents the liveness of a register, or stack slot.

Definition:LiveInterval.h:687

llvm::LiveInterval::weight

float weight() const

Definition:LiveInterval.h:719

llvm::LiveInterval::reg

Definition:LiveInterval.h:718

llvm::LiveInterval::dump

void dump() const

Definition:LiveInterval.cpp:1052

llvm::LiveInterval::incrementWeight

void incrementWeight(float Inc)

Definition:LiveInterval.h:720

llvm::LiveInterval::setWeight

void setWeight(float Value)

Definition:LiveInterval.h:721

llvm::LiveIntervalsWrapperPass

Definition:LiveIntervals.h:527

llvm::LiveIntervals::getSpillWeight

static float getSpillWeight(bool isDef, bool isUse, const MachineBlockFrequencyInfo *MBFI, const MachineInstr &MI, ProfileSummaryInfo *PSI=nullptr)

Calculate the spill weight to assign to a single instruction.

Definition:LiveIntervals.cpp:901

llvm::LiveRange::overlaps

bool overlaps(const LiveRange &other) const

overlaps - Return true if the intersection of the two live ranges is not empty.

Definition:LiveInterval.h:448

llvm::LiveStacksWrapperLegacy

Definition:LiveStacks.h:96

llvm::LiveStacks

Definition:LiveStacks.h:36

llvm::MachineBasicBlock

Definition:MachineBasicBlock.h:125

llvm::MachineBasicBlock::begin

iterator begin()

Definition:MachineBasicBlock.h:355

llvm::MachineBasicBlock::end

iterator end()

Definition:MachineBasicBlock.h:357

llvm::MachineBlockFrequencyInfoWrapperPass

Definition:MachineBlockFrequencyInfo.h:137

llvm::MachineBlockFrequencyInfo

MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...

Definition:MachineBlockFrequencyInfo.h:34

llvm::MachineFrameInfo

The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.

Definition:MachineFrameInfo.h:106

llvm::MachineFrameInfo::setObjectSize

void setObjectSize(int ObjectIdx, int64_t Size)

Change the size of the specified stack object.

Definition:MachineFrameInfo.h:479

llvm::MachineFrameInfo::getObjectAlign

Align getObjectAlign(int ObjectIdx) const

Return the alignment of the specified stack object.

Definition:MachineFrameInfo.h:486

llvm::MachineFrameInfo::isSpillSlotObjectIndex

bool isSpillSlotObjectIndex(int ObjectIdx) const

Returns true if the specified index corresponds to a spill slot.

Definition:MachineFrameInfo.h:737

llvm::MachineFrameInfo::getObjectSize

int64_t getObjectSize(int ObjectIdx) const

Return the size of the specified object.

Definition:MachineFrameInfo.h:472

llvm::MachineFrameInfo::RemoveStackObject

void RemoveStackObject(int ObjectIdx)

Remove or mark dead a statically sized stack object.

Definition:MachineFrameInfo.h:795

llvm::MachineFrameInfo::getObjectIndexEnd

int getObjectIndexEnd() const

Return one past the maximum frame object index.

Definition:MachineFrameInfo.h:412

llvm::MachineFrameInfo::getStackID

uint8_t getStackID(int ObjectIdx) const

Definition:MachineFrameInfo.h:750

llvm::MachineFrameInfo::setObjectAlignment

void setObjectAlignment(int ObjectIdx, Align Alignment)

setObjectAlignment - Change the alignment of the specified stack object.

Definition:MachineFrameInfo.h:499

llvm::MachineFrameInfo::isDeadObjectIndex

bool isDeadObjectIndex(int ObjectIdx) const

Returns true if the specified index corresponds to a dead object.

Definition:MachineFrameInfo.h:764

llvm::MachineFunctionPass

MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...

Definition:MachineFunctionPass.h:30

llvm::MachineFunctionPass::getAnalysisUsage

void getAnalysisUsage(AnalysisUsage &AU) const override

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.

Definition:MachineFunctionPass.cpp:169

llvm::MachineFunctionPass::runOnMachineFunction

virtual bool runOnMachineFunction(MachineFunction &MF)=0

runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...

llvm::MachineFunction

Definition:MachineFunction.h:267

llvm::MachineFunction::getPSVManager

PseudoSourceValueManager & getPSVManager() const

Definition:MachineFunction.h:698

llvm::MachineFunction::getSubtarget

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

Definition:MachineFunction.h:733

llvm::MachineFunction::getName

StringRef getName() const

getName - Return the name of the corresponding LLVM function.

Definition:MachineFunction.cpp:645

llvm::MachineFunction::exposesReturnsTwice

bool exposesReturnsTwice() const

exposesReturnsTwice - Returns true if the function calls setjmp or any other similar functions with a...

Definition:MachineFunction.h:795

llvm::MachineFunction::getFrameInfo

MachineFrameInfo & getFrameInfo()

getFrameInfo - Return the frame info object for the current function.

Definition:MachineFunction.h:749

llvm::MachineFunction::getFunction

Function & getFunction()

Return the LLVM function that this machine code represents.

Definition:MachineFunction.h:704

llvm::MachineInstrBundleIterator< MachineInstr >

llvm::MachineInstr

Representation of each machine instruction.

Definition:MachineInstr.h:71

llvm::MachineLoopInfoWrapperPass

Definition:MachineLoopInfo.h:156

llvm::MachineMemOperand

A description of a memory reference used in the backend.

Definition:MachineMemOperand.h:129

llvm::MachineOperand

MachineOperand class - Representation of each machine instruction operand.

Definition:MachineOperand.h:48

llvm::PassRegistry::getPassRegistry

static PassRegistry * getPassRegistry()

getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...

Definition:PassRegistry.cpp:24

llvm::PseudoSourceValueManager::getFixedStack

const PseudoSourceValue * getFixedStack(int FI)

Return a pseudo source value referencing a fixed stack frame entry, e.g., a spill slot.

Definition:PseudoSourceValue.cpp:125

llvm::PseudoSourceValue

Special value supplied for machine level alias analysis.

Definition:PseudoSourceValue.h:31

llvm::Register

Wrapper class representing virtual and physical registers.

Definition:Register.h:19

llvm::Register::stackSlot2Index

static int stackSlot2Index(Register Reg)

Compute the frame index from a register value representing a stack slot.

Definition:Register.h:52

llvm::SlotIndexesWrapperPass

Definition:SlotIndexes.h:663

llvm::SlotIndexes

SlotIndexes pass.

Definition:SlotIndexes.h:297

llvm::SlotIndexes::removeMachineInstrFromMaps

void removeMachineInstrFromMaps(MachineInstr &MI, bool AllowBundled=false)

Removes machine instruction (bundle) MI from the mapping.

Definition:SlotIndexes.cpp:127

llvm::SmallVectorBase::size

size_t size() const

Definition:SmallVector.h:78

llvm::SmallVectorImpl

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

Definition:SmallVector.h:573

llvm::SmallVectorImpl::reserve

void reserve(size_type N)

Definition:SmallVector.h:663

llvm::SmallVectorImpl::clear

void clear()

Definition:SmallVector.h:610

llvm::SmallVectorImpl::resize

void resize(size_type N)

Definition:SmallVector.h:638

llvm::SmallVectorTemplateBase::push_back

void push_back(const T &Elt)

Definition:SmallVector.h:413

llvm::SmallVector

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

Definition:SmallVector.h:1196

llvm::TargetInstrInfo

TargetInstrInfo - Interface to description of machine instruction set.

Definition:TargetInstrInfo.h:112

llvm::TargetSubtargetInfo::getInstrInfo

virtual const TargetInstrInfo * getInstrInfo() const

Definition:TargetSubtargetInfo.h:97

llvm::cl::opt

Definition:CommandLine.h:1423

uint8_t

unsigned

false

Definition:StackSlotColoring.cpp:193

llvm::AArch64CC::LS

@ LS

Definition:AArch64BaseInfo.h:264

llvm::ARM_AM::add

@ add

Definition:ARMAddressingModes.h:39

llvm::CallingConv::ID

unsigned ID

LLVM IR allows to use arbitrary numbers as calling convention identifiers.

Definition:CallingConv.h:24

llvm::X86AS::SS

@ SS

Definition:X86.h:212

llvm::cl::Hidden

@ Hidden

Definition:CommandLine.h:137

llvm::cl::init

initializer< Ty > init(const Ty &Val)

Definition:CommandLine.h:443

llvm

This is an optimization pass for GlobalISel generic memory operations.

Definition:AddressRanges.h:18

llvm::stable_sort

void stable_sort(R &&Range)

Definition:STLExtras.h:2037

llvm::initializeStackSlotColoringPass

void initializeStackSlotColoringPass(PassRegistry &)

llvm::MachineDominatorsID

char & MachineDominatorsID

MachineDominators - This pass is a machine dominators analysis pass.

Definition:MachineDominators.cpp:98

llvm::sort

void sort(IteratorTy Start, IteratorTy End)

Definition:STLExtras.h:1664

llvm::dbgs

raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

Definition:Debug.cpp:163

llvm::StackSlotColoringID

char & StackSlotColoringID

StackSlotColoring - This pass performs stack slot coloring.

Definition:StackSlotColoring.cpp:183

raw_ostream.h

false::IntervalSorter

Definition:StackSlotColoring.cpp:197

false::IntervalSorter::operator()

bool operator()(LiveInterval *LHS, LiveInterval *RHS) const

Definition:StackSlotColoring.cpp:198

llvm::Align

This struct is a compact representation of a valid (non-zero power of two) alignment.

Definition:Alignment.h:39

llvm::SlotMapping

This struct contains the mappings from the slot numbers to unnamed metadata nodes,...

Definition:SlotMapping.h:33

llvm::cl::desc

Definition:CommandLine.h:409