LLVM 20.0.0git |
#include "SelectionDAGBuilder.h"
#include "SDNodeDbgValue.h"
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/BranchProbabilityInfo.h"
#include "llvm/Analysis/ConstantFolding.h"
#include "llvm/Analysis/Loads.h"
#include "llvm/Analysis/MemoryLocation.h"
#include "llvm/Analysis/TargetLibraryInfo.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/Analysis/VectorUtils.h"
#include "llvm/CodeGen/Analysis.h"
#include "llvm/CodeGen/AssignmentTrackingAnalysis.h"
#include "llvm/CodeGen/CodeGenCommonISel.h"
#include "llvm/CodeGen/FunctionLoweringInfo.h"
#include "llvm/CodeGen/GCMetadata.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineInstrBundleIterator.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/CodeGen/StackMaps.h"
#include "llvm/CodeGen/SwiftErrorValueTracking.h"
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/CodeGen/WinEHFuncInfo.h"
#include "llvm/IR/Argument.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/CFG.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/Constant.h"
#include "llvm/IR/ConstantRange.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DebugInfo.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/EHPersonalities.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/GetElementPtrTypeIterator.h"
#include "llvm/IR/InlineAsm.h"
#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/IntrinsicsAArch64.h"
#include "llvm/IR/IntrinsicsAMDGPU.h"
#include "llvm/IR/IntrinsicsWebAssembly.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/MemoryModelRelaxationAnnotations.h"
#include "llvm/IR/Metadata.h"
#include "llvm/IR/Module.h"
#include "llvm/IR/Operator.h"
#include "llvm/IR/PatternMatch.h"
#include "llvm/IR/Statepoint.h"
#include "llvm/IR/Type.h"
#include "llvm/IR/User.h"
#include "llvm/IR/Value.h"
#include "llvm/MC/MCContext.h"
#include "llvm/Support/AtomicOrdering.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/InstructionCost.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetIntrinsicInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/TargetParser/Triple.h"
#include "llvm/Transforms/Utils/Local.h"
#include <cstddef>
#include <limits>
#include <optional>
#include <tuple>
#include "llvm/IR/Instruction.def"
#include "llvm/IR/ConstrainedOps.def"
#include "llvm/IR/VPIntrinsics.def"
#include "llvm/CodeGen/SelectionDAGISel.h"
Go to the source code of this file.
Macros | |
#define | DEBUG_TYPE "isel" |
#define | HANDLE_INST(NUM,OPCODE, CLASS) case Instruction::OPCODE:visit##OPCODE((const CLASS&)I); break; |
#define | INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC) case Intrinsic::INTRINSIC: |
#define | BEGIN_REGISTER_VP_INTRINSIC(VPID, ...) case Intrinsic::VPID: |
#define | DAG_INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC, DAGN) |
#define | HELPER_MAP_VPID_TO_VPSD(VPID, VPSD) |
Typedefs | |
using | ArgCopyElisionMapTy =DenseMap<constArgument *, std::pair<constAllocaInst *,constStoreInst * > > |
Functions | |
staticSDValue | getCopyFromPartsVector (SelectionDAG &DAG,constSDLoc &DL,constSDValue *Parts,unsigned NumParts,MVT PartVT,EVT ValueVT,constValue *V,SDValue InChain, std::optional<CallingConv::ID > CallConv) |
getCopyFromPartsVector - Create a value that contains the specified legal parts combined into the value they represent. | |
staticSDValue | getCopyFromParts (SelectionDAG &DAG,constSDLoc &DL,constSDValue *Parts,unsigned NumParts,MVT PartVT,EVT ValueVT,constValue *V,SDValue InChain, std::optional<CallingConv::ID >CC=std::nullopt, std::optional<ISD::NodeType > AssertOp=std::nullopt) |
getCopyFromParts - Create a value that contains the specified legal parts combined into the value they represent. | |
static void | diagnosePossiblyInvalidConstraint (LLVMContext &Ctx,constValue *V,constTwine &ErrMsg) |
static void | getCopyToPartsVector (SelectionDAG &DAG,constSDLoc &DL,SDValue Val,SDValue *Parts,unsigned NumParts,MVT PartVT,constValue *V, std::optional<CallingConv::ID > CallConv) |
getCopyToPartsVector - Create a series of nodes that contain the specified value split into legal parts. | |
static void | getCopyToParts (SelectionDAG &DAG,constSDLoc &DL,SDValue Val,SDValue *Parts,unsigned NumParts,MVT PartVT,constValue *V, std::optional<CallingConv::ID > CallConv=std::nullopt,ISD::NodeType ExtendKind=ISD::ANY_EXTEND) |
getCopyToParts - Create a series of nodes that contain the specified value split into legal parts. | |
staticSDValue | widenVectorToPartType (SelectionDAG &DAG,SDValue Val,constSDLoc &DL,EVT PartVT) |
staticbool | handleDanglingVariadicDebugInfo (SelectionDAG &DAG,DILocalVariable *Variable,DebugLocDL,unsigned Order,SmallVectorImpl<Value * > &Values,DIExpression *Expression) |
static void | findWasmUnwindDestinations (FunctionLoweringInfo &FuncInfo,constBasicBlock *EHPadBB,BranchProbability Prob,SmallVectorImpl< std::pair<MachineBasicBlock *,BranchProbability > > &UnwindDests) |
static void | findUnwindDestinations (FunctionLoweringInfo &FuncInfo,constBasicBlock *EHPadBB,BranchProbability Prob,SmallVectorImpl< std::pair<MachineBasicBlock *,BranchProbability > > &UnwindDests) |
When an invoke or a cleanupret unwinds to the next EH pad, there are many places it could ultimately go. | |
staticbool | InBlock (constValue *V,constBasicBlock *BB) |
staticbool | collectInstructionDeps (SmallMapVector<constInstruction *,bool, 8 > *Deps,constValue *V,SmallMapVector<constInstruction *,bool, 8 > *Necessary=nullptr,unsigned Depth=0) |
staticSDValue | getLoadStackGuard (SelectionDAG &DAG,constSDLoc &DL,SDValue &Chain) |
Create a LOAD_STACK_GUARD node, and let it carry the target specific global variable if there exists one. | |
staticbool | hasOnlySelectUsers (constValue *Cond) |
staticconstMDNode * | getRangeMetadata (constInstruction &I) |
static std::optional<ConstantRange > | getRange (constInstruction &I) |
staticbool | getUniformBase (constValue *Ptr,SDValue &Base,SDValue &Index,ISD::MemIndexType &IndexType,SDValue &Scale,SelectionDAGBuilder *SDB,constBasicBlock *CurBB,uint64_t ElemSize) |
staticSDValue | GetSignificand (SelectionDAG &DAG,SDValueOp,constSDLoc &dl) |
GetSignificand - Get the significand and build it into a floating-point number with exponent of 1: | |
staticSDValue | GetExponent (SelectionDAG &DAG,SDValueOp,constTargetLowering &TLI,constSDLoc &dl) |
GetExponent - Get the exponent: | |
staticSDValue | getF32Constant (SelectionDAG &DAG,unsignedFlt,constSDLoc &dl) |
getF32Constant - Get 32-bit floating point constant. | |
staticSDValue | getLimitedPrecisionExp2 (SDValue t0,constSDLoc &dl,SelectionDAG &DAG) |
staticSDValue | expandExp (constSDLoc &dl,SDValueOp,SelectionDAG &DAG,constTargetLowering &TLI,SDNodeFlags Flags) |
expandExp - Lower an exp intrinsic. | |
staticSDValue | expandLog (constSDLoc &dl,SDValueOp,SelectionDAG &DAG,constTargetLowering &TLI,SDNodeFlags Flags) |
expandLog - Lower a log intrinsic. | |
staticSDValue | expandLog2 (constSDLoc &dl,SDValueOp,SelectionDAG &DAG,constTargetLowering &TLI,SDNodeFlags Flags) |
expandLog2 - Lower a log2 intrinsic. | |
staticSDValue | expandLog10 (constSDLoc &dl,SDValueOp,SelectionDAG &DAG,constTargetLowering &TLI,SDNodeFlags Flags) |
expandLog10 - Lower a log10 intrinsic. | |
staticSDValue | expandExp2 (constSDLoc &dl,SDValueOp,SelectionDAG &DAG,constTargetLowering &TLI,SDNodeFlags Flags) |
expandExp2 - Lower an exp2 intrinsic. | |
staticSDValue | expandPow (constSDLoc &dl,SDValueLHS,SDValueRHS,SelectionDAG &DAG,constTargetLowering &TLI,SDNodeFlags Flags) |
visitPow - Lower a pow intrinsic. | |
staticSDValue | ExpandPowI (constSDLoc &DL,SDValueLHS,SDValueRHS,SelectionDAG &DAG) |
ExpandPowI - Expand a llvm.powi intrinsic. | |
staticSDValue | expandDivFix (unsigned Opcode,constSDLoc &DL,SDValueLHS,SDValueRHS,SDValue Scale,SelectionDAG &DAG,constTargetLowering &TLI) |
static void | getUnderlyingArgRegs (SmallVectorImpl< std::pair<Register,TypeSize > > &Regs,constSDValue &N) |
staticunsigned | FixedPointIntrinsicToOpcode (unsigned Intrinsic) |
staticconstCallBase * | FindPreallocatedCall (constValue *PreallocatedSetup) |
Given a @llvm.call.preallocated.setup, return the corresponding preallocated call. | |
staticunsigned | getISDForVPIntrinsic (constVPIntrinsic &VPIntrin) |
staticSDValue | getMemCmpLoad (constValue *PtrVal,MVT LoadVT,SelectionDAGBuilder &Builder) |
static void | patchMatchingInput (const SDISelAsmOperandInfo &OpInfo, SDISelAsmOperandInfo &MatchingOpInfo,SelectionDAG &DAG) |
Make sure that the output operandOpInfo and its corresponding input operandMatchingOpInfo have compatible constraint types (otherwise error out). | |
staticSDValue | getAddressForMemoryInput (SDValue Chain,constSDLoc &Location, SDISelAsmOperandInfo &OpInfo,SelectionDAG &DAG) |
Get a direct memory input to behave well as an indirect operand. | |
static std::optional<unsigned > | getRegistersForValue (SelectionDAG &DAG,constSDLoc &DL, SDISelAsmOperandInfo &OpInfo, SDISelAsmOperandInfo &RefOpInfo) |
GetRegistersForValue - Assign registers (virtual or physical) for the specified operand. | |
staticunsigned | findMatchingInlineAsmOperand (unsigned OperandNo,const std::vector<SDValue > &AsmNodeOperands) |
staticbool | isFunction (SDValueOp) |
static void | addStackMapLiveVars (constCallBase &Call,unsigned StartIdx,constSDLoc &DL,SmallVectorImpl<SDValue > &Ops,SelectionDAGBuilder &Builder) |
Add a stack map intrinsic call's live variable operands to a stackmap or patchpoint target node's operand list. | |
staticAttributeList | getReturnAttrs (TargetLowering::CallLoweringInfo &CLI) |
Returns an AttributeList representing the attributes applied to the return value of the given call. | |
staticbool | isOnlyUsedInEntryBlock (constArgument *A,boolFastISel) |
isOnlyUsedInEntryBlock - If the specified argument is only used in the entry block, return true. | |
static void | findArgumentCopyElisionCandidates (constDataLayout &DL,FunctionLoweringInfo *FuncInfo,ArgCopyElisionMapTy &ArgCopyElisionCandidates) |
Scan the entry block of the function in FuncInfo for arguments that look like copies into a local alloca. | |
static void | tryToElideArgumentCopy (FunctionLoweringInfo &FuncInfo,SmallVectorImpl<SDValue > &Chains,DenseMap< int, int > &ArgCopyElisionFrameIndexMap,SmallPtrSetImpl<constInstruction * > &ElidedArgCopyInstrs,ArgCopyElisionMapTy &ArgCopyElisionCandidates,constArgument &Arg,ArrayRef<SDValue > ArgVals,bool &ArgHasUses) |
Try to elide argument copies from memory into a local alloca. | |
staticBranchProbability | scaleCaseProbality (BranchProbability CaseProb,BranchProbability PeeledCaseProb) |
staticRegister | FollowCopyChain (MachineRegisterInfo &MRI,RegisterReg) |
Variables | |
staticunsigned | LimitFloatPrecision |
LimitFloatPrecision - Generate low-precision inline sequences for some float libcalls (6, 8 or 12 bits). | |
staticcl::opt<bool > | InsertAssertAlign ("insert-assert-align", cl::init(true),cl::desc("Insert the experimental `assertalign` node."), cl::ReallyHidden) |
staticcl::opt<unsigned,true > | LimitFPPrecision ("limit-float-precision",cl::desc("Generate low-precisioninline sequences " "for some float libcalls"), cl::location(LimitFloatPrecision), cl::Hidden, cl::init(0)) |
staticcl::opt<unsigned > | SwitchPeelThreshold ("switch-peel-threshold", cl::Hidden, cl::init(66),cl::desc("Set the case probability thresholdfor peeling the case from a " "switch statement.Avalue greater than 100 will void this " "optimization")) |
staticconstunsigned | MaxParallelChains = 64 |
#define BEGIN_REGISTER_VP_INTRINSIC | ( | VPID, | |
... | |||
) | case Intrinsic::VPID: |
#define DAG_INSTRUCTION | ( | NAME, | |
NARG, | |||
ROUND_MODE, | |||
INTRINSIC, | |||
DAGN | |||
) |
#define DEBUG_TYPE "isel" |
Definition at line114 of fileSelectionDAGBuilder.cpp.
#define HELPER_MAP_VPID_TO_VPSD | ( | VPID, | |
VPSD | |||
) |
#define INSTRUCTION | ( | NAME, | |
NARG, | |||
ROUND_MODE, | |||
INTRINSIC | |||
) | case Intrinsic::INTRINSIC: |
usingArgCopyElisionMapTy =DenseMap<constArgument *, std::pair<constAllocaInst *,constStoreInst *> > |
Definition at line11421 of fileSelectionDAGBuilder.cpp.
| static |
Add a stack map intrinsic call's live variable operands to a stackmap or patchpoint target node's operand list.
Constants are converted to TargetConstants purely as an optimization to avoid constant materialization and register allocation.
FrameIndex operands are converted to TargetFrameIndex so that ISEL does not generate addess computation nodes, and so FinalizeISel can convert the TargetFrameIndex into a DirectMemRefOp StackMap location. This avoids address materialization and register allocation, but may also be required for correctness. If a StackMap (or PatchPoint) intrinsic directly uses an alloca in the entry block, then the runtime may assume that the alloca's StackMap location can be read immediately after compilation and that the location is valid at any point during execution (this is similar to the assumption made by the llvm.gcroot intrinsic). If the alloca's location were only available in a register, then the runtime would need to trap when execution reaches the StackMap in order to read the alloca's location.
Definition at line10631 of fileSelectionDAGBuilder.cpp.
Referencesllvm::SelectionDAGBuilder::DAG,llvm::SelectionDAG::getTargetFrameIndex(),llvm::SelectionDAGBuilder::getValue(),I, andllvm::SmallVectorTemplateBase< T, bool >::push_back().
| static |
Definition at line2482 of fileSelectionDAGBuilder.cpp.
ReferencescollectInstructionDeps(),llvm::Depth,I,llvm::SelectionDAG::MaxRecursionDepth, andllvm::MapVector< KeyT, ValueT, MapType, VectorType >::try_emplace().
Referenced bycollectInstructionDeps(), andllvm::SelectionDAGBuilder::shouldKeepJumpConditionsTogether().
| static |
Definition at line319 of fileSelectionDAGBuilder.cpp.
Referencesllvm::LLVMContext::diagnose(),llvm::LLVMContext::emitError(), andI.
Referenced bygetCopyFromPartsVector(), andgetCopyToParts().
| static |
Definition at line5922 of fileSelectionDAGBuilder.cpp.
Referencesllvm::TargetLoweringBase::Custom,DL,llvm::SDNode::getAsZExtVal(),llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getContext(),llvm::SelectionDAG::getDataLayout(),llvm::SelectionDAG::getExtOrTrunc(),llvm::TargetLoweringBase::getFixedPointOperationAction(),llvm::EVT::getIntegerVT(),llvm::SelectionDAG::getNode(),llvm::TargetLoweringBase::getShiftAmountTy(),llvm::EVT::getSizeInBits(),llvm::EVT::getVectorElementCount(),llvm::EVT::getVectorElementType(),llvm::EVT::getVectorVT(),llvm::SelectionDAG::getZExtOrTrunc(),llvm::EVT::isScalarInteger(),llvm::TargetLoweringBase::isTypeLegal(),llvm::EVT::isVector(),llvm::TargetLoweringBase::Legal,LHS,llvm_unreachable,RHS,llvm::ISD::SDIVFIX,llvm::ISD::SDIVFIXSAT,llvm::ISD::SHL,Signed,llvm::ISD::SRA,llvm::ISD::SRL, andllvm::ISD::UDIVFIXSAT.
| static |
expandExp - Lower an exp intrinsic.
Handles the special sequences for limited-precision mode.
Definition at line5522 of fileSelectionDAGBuilder.cpp.
Referencesllvm::ISD::FEXP,llvm::ISD::FMUL,llvm::SelectionDAG::getConstantFP(),getLimitedPrecisionExp2(),llvm::SelectionDAG::getNode(),LimitFloatPrecision, andllvm::numbers::log2ef.
| static |
expandExp2 - Lower an exp2 intrinsic.
Handles the special sequences for limited-precision mode.
Definition at line5830 of fileSelectionDAGBuilder.cpp.
Referencesllvm::ISD::FEXP2,getLimitedPrecisionExp2(),llvm::SelectionDAG::getNode(), andLimitFloatPrecision.
| static |
expandLog - Lower a log intrinsic.
Handles the special sequences for limited-precision mode.
Definition at line5544 of fileSelectionDAGBuilder.cpp.
Referencesllvm::ISD::BITCAST,llvm::ISD::FADD,llvm::ISD::FLOG,llvm::ISD::FMUL,llvm::ISD::FSUB,llvm::SelectionDAG::getConstantFP(),GetExponent(),getF32Constant(),llvm::SelectionDAG::getNode(),GetSignificand(),LimitFloatPrecision,llvm::numbers::ln2f, andX.
| static |
expandLog10 - Lower a log10 intrinsic.
Handles the special sequences for limited-precision mode.
Definition at line5740 of fileSelectionDAGBuilder.cpp.
Referencesllvm::ISD::BITCAST,llvm::ISD::FADD,llvm::ISD::FLOG10,llvm::ISD::FMUL,llvm::ISD::FSUB,GetExponent(),getF32Constant(),llvm::SelectionDAG::getNode(),GetSignificand(),LimitFloatPrecision, andX.
| static |
expandLog2 - Lower a log2 intrinsic.
Handles the special sequences for limited-precision mode.
Definition at line5643 of fileSelectionDAGBuilder.cpp.
Referencesllvm::ISD::BITCAST,llvm::ISD::FADD,llvm::ISD::FLOG2,llvm::ISD::FMUL,llvm::ISD::FSUB,GetExponent(),getF32Constant(),llvm::SelectionDAG::getNode(),GetSignificand(),LimitFloatPrecision, andX.
| static |
visitPow - Lower a pow intrinsic.
Handles the special sequences for limited-precision mode with x == 10.0f.
Definition at line5842 of fileSelectionDAGBuilder.cpp.
Referencesllvm::ISD::FMUL,llvm::ISD::FPOW,getF32Constant(),getLimitedPrecisionExp2(),llvm::SelectionDAG::getNode(),LHS,LimitFloatPrecision, andRHS.
ExpandPowI - Expand a llvm.powi intrinsic.
Definition at line5871 of fileSelectionDAGBuilder.cpp.
ReferencesDL,llvm::ISD::FDIV,llvm::ISD::FMUL,llvm::ISD::FPOWI,llvm::SelectionDAG::getConstantFP(),llvm::SDValue::getNode(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::SDValue::getValueType(),llvm::TargetLoweringBase::isBeneficialToExpandPowI(),LHS,RHS, andllvm::SelectionDAG::shouldOptForSize().
| static |
Scan the entry block of the function in FuncInfo for arguments that look like copies into a local alloca.
Record any copied arguments in ArgCopyElisionCandidates.
Definition at line11429 of fileSelectionDAGBuilder.cpp.
Referencesllvm::Function::arg_size(),llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::count(),llvm::dbgs(),DL,llvm::FunctionLoweringInfo::Fn,llvm::AllocaInst::getAllocatedType(),llvm::Function::getEntryBlock(),I,Info,llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::insert(),LLVM_DEBUG,llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::reserve(),llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::size(),llvm::FunctionLoweringInfo::StaticAllocaMap, andllvm::Unknown.
| static |
Definition at line9869 of fileSelectionDAGBuilder.cpp.
Referencesassert(),F, andllvm::InlineAsm::Op_FirstOperand.
Given a @llvm.call.preallocated.setup, return the corresponding preallocated call.
Definition at line6297 of fileSelectionDAGBuilder.cpp.
Referencesassert(),getCalledFunction(),llvm::Function::getIntrinsicID(),getIntrinsicID(),llvm_unreachable, andllvm::Value::users().
| static |
When an invoke or a cleanupret unwinds to the next EH pad, there are many places it could ultimately go.
In the IR, we have a single unwind destination, but in the machine CFG, we enumerate all the possible blocks. This function skips over imaginary basic blocks that hold catchswitch instructions, and finds all the "real" machine basic block destinations. As those destinations may not be successors of EHPadBB, here we also calculate the edge probability to those destinations. The passed-in Prob is the edge probability to EHPadBB.
Definition at line2094 of fileSelectionDAGBuilder.cpp.
Referencesassert(),llvm::BasicBlock::back(),llvm::FunctionLoweringInfo::BPI,llvm::classifyEHPersonality(),llvm::CoreCLR,findWasmUnwindDestinations(),llvm::FunctionLoweringInfo::Fn,llvm::BranchProbabilityInfo::getEdgeProbability(),llvm::BasicBlock::getFirstNonPHIIt(),llvm::FunctionLoweringInfo::getMBB(),llvm::Function::getPersonalityFn(),llvm::isAsynchronousEHPersonality(),llvm::MSVC_CXX, andllvm::Wasm_CXX.
| static |
Definition at line2060 of fileSelectionDAGBuilder.cpp.
Referencesllvm::BasicBlock::getFirstNonPHIIt(), andllvm::FunctionLoweringInfo::getMBB().
Referenced byfindUnwindDestinations().
Definition at line6263 of fileSelectionDAGBuilder.cpp.
Referencesllvm_unreachable,llvm::ISD::SDIVFIX,llvm::ISD::SDIVFIXSAT,llvm::ISD::SMULFIX,llvm::ISD::SMULFIXSAT,llvm::ISD::UDIVFIX,llvm::ISD::UDIVFIXSAT,llvm::ISD::UMULFIX, andllvm::ISD::UMULFIXSAT.
| static |
Definition at line12692 of fileSelectionDAGBuilder.cpp.
| static |
Get a direct memory input to behave well as an indirect operand.
This may introduce stores, hence the need for aChain
.
Definition at line9707 of fileSelectionDAGBuilder.cpp.
Referencesllvm::MachineFrameInfo::CreateStackObject(),DL,llvm::SelectionDAG::getConstantPool(),llvm::SelectionDAG::getDataLayout(),llvm::MachinePointerInfo::getFixedStack(),llvm::SelectionDAG::getFrameIndex(),llvm::TargetLoweringBase::getFrameIndexTy(),llvm::MachineFunction::getFrameInfo(),llvm::TargetSubtargetInfo::getFrameLowering(),llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::getKnownMinValue(),llvm::SelectionDAG::getMachineFunction(),llvm::TargetLoweringBase::getMemValueType(),llvm::TargetLoweringBase::getPointerTy(),llvm::TargetFrameLowering::getStackIDForScalableVectors(),llvm::MachineFunction::getSubtarget(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::SelectionDAG::getTruncStore(),llvm::Value::getType(), andllvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::isScalable().
| static |
getCopyFromParts - Create a value that contains the specified legal parts combined into the value they represent.
If the parts combine to a type larger than ValueVT then AssertOp can be used to specify whether the extra bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT (ISD::AssertSext).
Definition at line166 of fileSelectionDAGBuilder.cpp.
Referencesllvm::ISD::ANY_EXTEND,assert(),llvm::bit_floor(),llvm::ISD::BITCAST,llvm::EVT::bitsLT(),llvm::ISD::BUILD_PAIR,CC,DL,llvm::ISD::FP_EXTEND,llvm::ISD::FP_ROUND,llvm::Function::getAttributes(),llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getContext(),getCopyFromParts(),getCopyFromPartsVector(),llvm::SelectionDAG::getDataLayout(),llvm::MachineFunction::getFunction(),llvm::EVT::getIntegerVT(),llvm::SelectionDAG::getMachineFunction(),llvm::SelectionDAG::getNode(),llvm::TargetLoweringBase::getPointerTy(),llvm::TargetLoweringBase::getShiftAmountTy(),llvm::EVT::getSizeInBits(),llvm::MVT::getSizeInBits(),llvm::SelectionDAG::getTargetConstant(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::SDValue::getValueType(),llvm::SelectionDAG::getValueType(),llvm::SelectionDAG::getVTList(),llvm::TargetLoweringBase::hasBigEndianPartOrdering(),llvm::AttributeList::hasFnAttr(),Hi,llvm::DataLayout::isBigEndian(),llvm::EVT::isFloatingPoint(),llvm::MVT::isFloatingPoint(),llvm::EVT::isInteger(),llvm::MVT::isInteger(),llvm::EVT::isVector(),llvm::MVT::isVector(),llvm::TargetLowering::joinRegisterPartsIntoValue(),Lo,llvm::ISD::OR,llvm::report_fatal_error(),llvm::ISD::SHL,llvm::ISD::STRICT_FP_ROUND,std::swap(),llvm::ISD::TRUNCATE, andllvm::ISD::ZERO_EXTEND.
Referenced bygetCopyFromParts(),getCopyFromPartsVector(),llvm::RegsForValue::getCopyFromRegs(), andllvm::TargetLowering::LowerCallTo().
| static |
getCopyFromPartsVector - Create a value that contains the specified legal parts combined into the value they represent.
If the parts combine to a type larger than ValueVT then AssertOp can be used to specify whether the extra bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT (ISD::AssertSext).
Definition at line339 of fileSelectionDAGBuilder.cpp.
Referencesassert(),llvm::ISD::BITCAST,llvm::EVT::bitsLT(),llvm::ISD::BUILD_VECTOR,llvm::ISD::CONCAT_VECTORS,diagnosePossiblyInvalidConstraint(),DL,llvm::ISD::EXTRACT_SUBVECTOR,llvm::SelectionDAG::getAnyExtOrTrunc(),llvm::SelectionDAG::getBitcast(),llvm::SelectionDAG::getBuildVector(),llvm::SelectionDAG::getContext(),getCopyFromParts(),llvm::EVT::getFixedSizeInBits(),llvm::SelectionDAG::getFPExtendOrRound(),llvm::EVT::getIntegerVT(),llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::getKnownMinValue(),llvm::SelectionDAG::getNode(),llvm::EVT::getScalarType(),llvm::SDValue::getSimpleValueType(),llvm::EVT::getSizeInBits(),llvm::MVT::getSizeInBits(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::SelectionDAG::getUNDEF(),llvm::SDValue::getValueType(),llvm::EVT::getVectorElementCount(),llvm::EVT::getVectorElementType(),llvm::SelectionDAG::getVectorIdxConstant(),llvm::EVT::getVectorNumElements(),llvm::TargetLoweringBase::getVectorTypeBreakdown(),llvm::TargetLoweringBase::getVectorTypeBreakdownForCallingConv(),llvm::EVT::getVectorVT(),llvm::EVT::isFloatingPoint(),llvm::EVT::isInteger(),llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::isScalable(),llvm::TargetLoweringBase::isTypeLegal(),llvm::EVT::isVector(), andllvm::ISD::TRUNCATE.
Referenced bygetCopyFromParts().
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getCopyToParts - Create a series of nodes that contain the specified value split into legal parts.
If the parts contain more bits than Val, then, for integers, ExtendKind can be used to specify how to generate the extra bits.
Definition at line505 of fileSelectionDAGBuilder.cpp.
Referencesassert(),llvm::bit_floor(),llvm::ISD::BITCAST,diagnosePossiblyInvalidConstraint(),DL,llvm::ISD::EXTRACT_ELEMENT,llvm::ISD::FP_EXTEND,llvm::SelectionDAG::getContext(),getCopyToParts(),getCopyToPartsVector(),llvm::SelectionDAG::getDataLayout(),llvm::EVT::getIntegerVT(),llvm::SelectionDAG::getIntPtrConstant(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getShiftAmountConstant(),llvm::EVT::getSizeInBits(),llvm::MVT::getSizeInBits(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::SDValue::getValueType(),llvm::DataLayout::isBigEndian(),llvm::EVT::isFloatingPoint(),llvm::MVT::isFloatingPoint(),llvm::EVT::isInteger(),llvm::MVT::isInteger(),llvm::TargetLoweringBase::isTypeLegal(),llvm::EVT::isVector(),llvm::TargetLowering::splitValueIntoRegisterParts(),llvm::ISD::SRL, andllvm::ISD::TRUNCATE.
Referenced bygetCopyToParts(),getCopyToPartsVector(),llvm::RegsForValue::getCopyToRegs(), andllvm::TargetLowering::LowerCallTo().
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getCopyToPartsVector - Create a series of nodes that contain the specified value split into legal parts.
Definition at line688 of fileSelectionDAGBuilder.cpp.
Referencesllvm::ISD::ANY_EXTEND,assert(),llvm::ISD::BITCAST,llvm::EVT::bitsGE(),llvm::EVT::bitsGT(),DL,llvm::ISD::EXTRACT_SUBVECTOR,llvm::ISD::EXTRACT_VECTOR_ELT,llvm::ISD::FP_EXTEND,llvm::SelectionDAG::getAnyExtOrTrunc(),llvm::SelectionDAG::getBitcast(),llvm::SelectionDAG::getContext(),getCopyToParts(),llvm::ElementCount::getFixed(),llvm::EVT::getFixedSizeInBits(),llvm::MVT::getFixedSizeInBits(),llvm::EVT::getIntegerVT(),llvm::SelectionDAG::getNode(),llvm::EVT::getScalarType(),llvm::EVT::getSizeInBits(),llvm::MVT::getSizeInBits(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::TargetLoweringBase::getTypeAction(),llvm::SDValue::getValueType(),llvm::EVT::getVectorElementCount(),llvm::MVT::getVectorElementCount(),llvm::EVT::getVectorElementType(),llvm::SelectionDAG::getVectorIdxConstant(),llvm::EVT::getVectorMinNumElements(),llvm::TargetLoweringBase::getVectorTypeBreakdown(),llvm::TargetLoweringBase::getVectorTypeBreakdownForCallingConv(),llvm::EVT::getVectorVT(),llvm::EVT::isFloatingPoint(),llvm::MVT::isFloatingPoint(),llvm::MVT::isInteger(),llvm::EVT::isScalableVector(),llvm::ElementCount::isScalar(),llvm::EVT::isVector(),llvm::MVT::isVector(), andwidenVectorToPartType().
Referenced bygetCopyToParts().
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GetExponent - Get the exponent:
(float)(int)(((Op & 0x7f800000) >> 23) - 127);
where Op is the hexadecimal representation of floating point value.
Definition at line5409 of fileSelectionDAGBuilder.cpp.
Referencesllvm::ISD::AND,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getDataLayout(),llvm::SelectionDAG::getNode(),llvm::TargetLoweringBase::getShiftAmountTy(),llvm::ISD::SINT_TO_FP,llvm::ISD::SRL, andllvm::ISD::SUB.
Referenced byexpandLog(),expandLog10(), andexpandLog2().
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getF32Constant - Get 32-bit floating point constant.
Definition at line5423 of fileSelectionDAGBuilder.cpp.
ReferencesFlt,llvm::SelectionDAG::getConstantFP(), andllvm::APFloatBase::IEEEsingle().
Referenced byexpandLog(),expandLog10(),expandLog2(),expandPow(), andgetLimitedPrecisionExp2().
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Definition at line8385 of fileSelectionDAGBuilder.cpp.
Referencesllvm::FastMathFlags::allowReassoc(),llvm::CallBase::getArgOperand(),llvm::Instruction::getFastMathFlags(),llvm::IntrinsicInst::getIntrinsicID(), andllvm_unreachable.
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Definition at line5429 of fileSelectionDAGBuilder.cpp.
Referencesllvm::ISD::ADD,llvm::ISD::BITCAST,llvm::ISD::FADD,llvm::ISD::FMUL,llvm::ISD::FP_TO_SINT,llvm::ISD::FSUB,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getDataLayout(),getF32Constant(),llvm::SelectionDAG::getNode(),llvm::TargetLoweringBase::getShiftAmountTy(),llvm::SelectionDAG::getTargetLoweringInfo(),LimitFloatPrecision,llvm::ISD::SHL,llvm::ISD::SINT_TO_FP, andX.
Referenced byexpandExp(),expandExp2(), andexpandPow().
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Create a LOAD_STACK_GUARD node, and let it carry the target specific global variable if there exists one.
Definition at line3060 of fileSelectionDAGBuilder.cpp.
ReferencesDL,llvm::SelectionDAG::getDataLayout(),llvm::SelectionDAG::getEVTAlign(),llvm::MachineFunction::getFunction(),llvm::SelectionDAG::getMachineFunction(),llvm::MachineFunction::getMachineMemOperand(),llvm::SelectionDAG::getMachineNode(),llvm::GlobalValue::getParent(),llvm::TargetLoweringBase::getPointerMemTy(),llvm::TargetLoweringBase::getPointerTy(),llvm::SelectionDAG::getPtrExtOrTrunc(),llvm::TargetLoweringBase::getSDagStackGuard(),llvm::EVT::getSizeInBits(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::Global,llvm::MachineMemOperand::MODereferenceable,llvm::MachineMemOperand::MOInvariant,llvm::MachineMemOperand::MOLoad,llvm::LocationSize::precise(), andllvm::SelectionDAG::setNodeMemRefs().
Referenced byllvm::SelectionDAGBuilder::visitSPDescriptorParent().
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Definition at line8998 of fileSelectionDAGBuilder.cpp.
Referencesllvm::SelectionDAGBuilder::BatchAA,llvm::ConstantFoldLoadFromConstPtr(),llvm::SelectionDAGBuilder::DAG,llvm::FixedVectorType::get(),llvm::Value::getContext(),llvm::SelectionDAGBuilder::getCurSDLoc(),llvm::SelectionDAG::getDataLayout(),llvm::SelectionDAG::getEntryNode(),llvm::Type::getIntNTy(),llvm::SelectionDAG::getLoad(),llvm::SelectionDAG::getRoot(),llvm::MVT::getScalarSizeInBits(),llvm::SelectionDAGBuilder::getValue(),llvm::SDValue::getValue(),llvm::MVT::getVectorNumElements(),llvm::MVT::isVector(),llvm::SelectionDAGBuilder::PendingLoads,llvm::BatchAAResults::pointsToConstantMemory(), andPtr.
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Definition at line4533 of fileSelectionDAGBuilder.cpp.
Referencesllvm::getConstantRangeFromMetadata(),getRangeMetadata(),I, andRange.
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GetRegistersForValue - Assign registers (virtual or physical) for the specified operand.
We prefer to assign virtual registers, to allow the register allocator to handle the assignment process. However, if the asm uses features that we can't model on machineinstrs, we have SDISel do the allocation. This produces generally horrible, but correct, code.
OpInfo describes the operand RefOpInfo describes the matching operand if any, the operand otherwise
Definition at line9759 of fileSelectionDAGBuilder.cpp.
Referencesassert(),llvm::TargetRegisterClass::begin(),llvm::ISD::BITCAST,llvm::TargetLowering::C_Address,llvm::TargetLowering::C_Memory,DL,llvm::TargetRegisterClass::end(),llvm::SelectionDAG::getContext(),llvm::MVT::getIntegerVT(),llvm::SelectionDAG::getMachineFunction(),llvm::SelectionDAG::getNode(),llvm::TargetLoweringBase::getNumRegisters(),llvm::TargetLowering::getRegForInlineAsmConstraint(),llvm::MachineFunction::getRegInfo(),llvm::TargetSubtargetInfo::getRegisterInfo(),llvm::MVT::getSizeInBits(),llvm::MachineFunction::getSubtarget(),llvm::SelectionDAG::getTargetLoweringInfo(),I,llvm::InlineAsm::isInput,llvm::MVT::isInteger(),llvm::InlineAsm::isOutput,llvm::SmallVectorTemplateBase< T, bool >::push_back(), andTRI.
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Returns an AttributeList representing the attributes applied to the return value of the given call.
Definition at line10940 of fileSelectionDAGBuilder.cpp.
Referencesllvm::AttributeList::get(),llvm::Type::getContext(),llvm::TargetLowering::CallLoweringInfo::IsInReg,llvm::TargetLowering::CallLoweringInfo::RetSExt,llvm::TargetLowering::CallLoweringInfo::RetTy,llvm::AttributeList::ReturnIndex, andllvm::TargetLowering::CallLoweringInfo::RetZExt.
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GetSignificand - Get the significand and build it into a floating-point number with exponent of 1:
Op = (Op & 0x007fffff) | 0x3f800000;
where Op is the hexadecimal representation of floating point value.
Definition at line5396 of fileSelectionDAGBuilder.cpp.
Referencesllvm::ISD::AND,llvm::ISD::BITCAST,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(), andllvm::ISD::OR.
Referenced byexpandLog(),expandLog10(), andexpandLog2().
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Definition at line5985 of fileSelectionDAGBuilder.cpp.
Referencesllvm::ISD::AssertSext,llvm::ISD::AssertZext,llvm::ISD::BITCAST,llvm::ISD::BUILD_PAIR,llvm::ISD::BUILD_VECTOR,llvm::ISD::CONCAT_VECTORS,llvm::ISD::CopyFromReg,getReg(),getUnderlyingArgRegs(),N, andllvm::ISD::TRUNCATE.
Referenced bygetUnderlyingArgRegs().
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Definition at line4860 of fileSelectionDAGBuilder.cpp.
Referencesassert(),llvm::sampleprof::Base,llvm::CallingConv::C,llvm::SelectionDAGBuilder::DAG,DL,GEP,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getContext(),llvm::SelectionDAGBuilder::getCurSDLoc(),llvm::SelectionDAG::getDataLayout(),llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::getFixedValue(),llvm::TargetLoweringBase::getPointerTy(),llvm::SelectionDAG::getTargetConstant(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::Value::getType(),llvm::SelectionDAGBuilder::getValue(),llvm::EVT::getVectorVT(),llvm::TargetLoweringBase::isLegalScaleForGatherScatter(),llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::isScalable(),llvm::Type::isVectorTy(),Ptr, andllvm::ISD::SIGNED_SCALED.
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Definition at line1384 of fileSelectionDAGBuilder.cpp.
Referencesllvm::SelectionDAG::AddDbgValue(),DL,llvm::SDDbgOperand::fromConst(),llvm::UndefValue::get(),llvm::SelectionDAG::getDbgValueList(), andllvm::SmallVectorTemplateBase< T, bool >::push_back().
Referenced byllvm::SelectionDAGBuilder::addDanglingDebugInfo().
Definition at line3690 of fileSelectionDAGBuilder.cpp.
Referencesllvm::all_of(), andCond.
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Definition at line2423 of fileSelectionDAGBuilder.cpp.
ReferencesI.
Referenced byllvm::SelectionDAGBuilder::FindMergedConditions().
Definition at line9923 of fileSelectionDAGBuilder.cpp.
Referencesllvm::ISD::GlobalAddress, andllvm::GlobalValue::hasDLLImportStorageClass().
isOnlyUsedInEntryBlock - If the specified argument is only used in the entry block, return true.
This includes arguments used by switches, since the switch may expand into multiple basic blocks.
Definition at line11407 of fileSelectionDAGBuilder.cpp.
ReferencesA, andgetParent().
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Make sure that the output operandOpInfo
and its corresponding input operandMatchingOpInfo
have compatible constraint types (otherwise error out).
Definition at line9676 of fileSelectionDAGBuilder.cpp.
Referencesllvm::TargetLowering::getRegForInlineAsmConstraint(),llvm::TargetSubtargetInfo::getRegisterInfo(),llvm::SelectionDAG::getSubtarget(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::report_fatal_error(), andTRI.
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| static |
Try to elide argument copies from memory into a local alloca.
Succeeds if ArgVal is a load from a suitable fixed stack object.
Definition at line11525 of fileSelectionDAGBuilder.cpp.
Referencesassert(),llvm::dbgs(),llvm::dwarf_linker::DebugStr,llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(),llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(),llvm::AllocaInst::getAlign(),llvm::MachineFunction::getFrameInfo(),llvm::MachineFrameInfo::getObjectAlign(),llvm::MachineFrameInfo::getObjectSize(),llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::insert(),llvm::SmallPtrSetImpl< PtrType >::insert(),LLVM_DEBUG,llvm::FunctionLoweringInfo::MF,llvm::SmallVectorTemplateBase< T, bool >::push_back(),llvm::MachineFrameInfo::RemoveStackObject(),llvm::MachineFrameInfo::setIsAliasedObjectIndex(),llvm::MachineFrameInfo::setIsImmutableObjectIndex(),llvm::FunctionLoweringInfo::StaticAllocaMap, andllvm::Value::users().
| static |
Definition at line641 of fileSelectionDAGBuilder.cpp.
Referencesllvm::SmallVectorImpl< T >::append(),assert(),llvm::ISD::BITCAST,llvm::EVT::changeVectorElementType(),DL,llvm::SelectionDAG::ExtractVectorElements(),llvm::SelectionDAG::getBuildVector(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::SelectionDAG::getUNDEF(),llvm::SDValue::getValueType(),llvm::EVT::getVectorElementCount(),llvm::EVT::getVectorElementType(),llvm::SelectionDAG::getVectorIdxConstant(),llvm::ISD::INSERT_SUBVECTOR,llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::isScalable(),llvm::TargetLoweringBase::isTypeLegal(), andllvm::EVT::isVector().
Referenced bygetCopyToPartsVector().
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LimitFloatPrecision - Generate low-precision inline sequences for some float libcalls (6, 8 or 12 bits).
Definition at line118 of fileSelectionDAGBuilder.cpp.
Referenced byexpandExp(),expandExp2(),expandLog(),expandLog10(),expandLog2(),expandPow(), andgetLimitedPrecisionExp2().
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Definition at line152 of fileSelectionDAGBuilder.cpp.
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