#include "RISCVISelLowering.h"#include "MCTargetDesc/RISCVMatInt.h"#include "RISCV.h"#include "RISCVConstantPoolValue.h"#include "RISCVMachineFunctionInfo.h"#include "RISCVRegisterInfo.h"#include "RISCVSelectionDAGInfo.h"#include "RISCVSubtarget.h"#include "llvm/ADT/SmallSet.h"#include "llvm/ADT/Statistic.h"#include "llvm/Analysis/MemoryLocation.h"#include "llvm/Analysis/VectorUtils.h"#include "llvm/CodeGen/MachineFrameInfo.h"#include "llvm/CodeGen/MachineFunction.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/MachineJumpTableInfo.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/CodeGen/SelectionDAGAddressAnalysis.h"#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"#include "llvm/CodeGen/ValueTypes.h"#include "llvm/IR/DiagnosticInfo.h"#include "llvm/IR/DiagnosticPrinter.h"#include "llvm/IR/IRBuilder.h"#include "llvm/IR/Instructions.h"#include "llvm/IR/IntrinsicsRISCV.h"#include "llvm/IR/PatternMatch.h"#include "llvm/MC/MCCodeEmitter.h"#include "llvm/MC/MCInstBuilder.h"#include "llvm/Support/CommandLine.h"#include "llvm/Support/Debug.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/InstructionCost.h"#include "llvm/Support/KnownBits.h"#include "llvm/Support/MathExtras.h"#include "llvm/Support/raw_ostream.h"#include <optional>#include "RISCVGenAsmMatcher.inc"#include "RISCVGenSearchableTables.inc"Go to the source code of this file.
Classes | |
| struct | VIDSequence |
Namespaces | |
| namespace | llvm |
| This is an optimization pass for GlobalISel generic memory operations. | |
| namespace | llvm::RISCVVIntrinsicsTable |
Macros | |
| #define | DEBUG_TYPE "riscv-lower" |
| #define | OP_CASE(NODE) |
| #define | VP_CASE(NODE) |
| #define | NODE_NAME_CASE(NODE) |
| #define | GET_REGISTER_MATCHER |
| #define | GET_RISCVVIntrinsicsTable_IMPL |
Variables | |
| staticcl::opt<unsigned > | ExtensionMaxWebSize (DEBUG_TYPE "-ext-max-web-size", cl::Hidden,cl::desc("Give the maximum size (in number ofnodes) of the web of " "instructions that we will considerfor VW expansion"), cl::init(18)) |
| staticcl::opt<bool > | AllowSplatInVW_W (DEBUG_TYPE "-form-vw-w-with-splat", cl::Hidden,cl::desc("Allow the formation of VW_Woperations (e.g., " "VWADD_W) with splat constants"), cl::init(false)) |
| staticcl::opt<unsigned > | NumRepeatedDivisors (DEBUG_TYPE "-fp-repeated-divisors", cl::Hidden,cl::desc("Set the minimum number of repetitions of a divisor to allow " "transformation to multiplications by the reciprocal"), cl::init(2)) |
| staticcl::opt< int > | FPImmCost (DEBUG_TYPE "-fpimm-cost", cl::Hidden,cl::desc("Give the maximum number ofinstructions that we will " "usefor creating a floating-point immediate value"), cl::init(2)) |
| staticconstIntrinsic::ID | FixedVlsegIntrIds [] |
| staticconstIntrinsic::ID | FixedVssegIntrIds [] |
| #define DEBUG_TYPE "riscv-lower" |
Definition at line53 of fileRISCVISelLowering.cpp.
| #define GET_REGISTER_MATCHER |
Definition at line22629 of fileRISCVISelLowering.cpp.
| #define GET_RISCVVIntrinsicsTable_IMPL |
Definition at line22848 of fileRISCVISelLowering.cpp.
| #define NODE_NAME_CASE | ( | NODE | ) |
| #define OP_CASE | ( | NODE | ) |
| static |
Definition at line16647 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::AND,CC,llvm::ISD::Constant,DL,llvm::APInt::getBitsSetFrom(),llvm::SelectionDAG::getCondCode(),llvm::SelectionDAG::getConstant(),llvm::SDValue::getConstantOperandVal(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::ISD::getSetCCInverse(),llvm::RISCVSubtarget::getXLenVT(),llvm::Value::hasOneUse(),llvm::ISD::isIntEqualitySetCC(),llvm::isNullConstant(),llvm::isOneConstant(),llvm::isPowerOf2_64(),LHS,llvm::Log2_64(),llvm::SelectionDAG::MaskedValueIsZero(),RHS,llvm::ISD::SETCC,llvm::ISD::SETEQ,llvm::ISD::SETGE,llvm::ISD::SETLT,llvm::ISD::SHL,llvm::ISD::SRA,llvm::ISD::SRL,translateSetCCForBranch(),tryDemorganOfBooleanCondition(), andllvm::ISD::XOR.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line14091 of fileRISCVISelLowering.cpp.
ReferencesDL,llvm::APInt::getBitsSetFrom(),llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::EVT::getSizeInBits(),llvm::isAllOnesConstant(),llvm::isOneConstant(),llvm::SelectionDAG::MaskedValueIsZero(),N,llvm::ISD::SUB, andllvm::ISD::XOR.
Referenced byperformADDCombine().
| static |
Perform two related transforms whose purpose is to incrementally recognize an explode_vector followed by scalar reduction as a vector reduction node.
This exists to recover from a deficiency in SLP which can't handle forests with multiple roots sharing common nodes. In some cases, one of the trees will be vectorized, and the other will remain (unprofitably) scalarized.
Definition at line13638 of fileRISCVISelLowering.cpp.
Referencesassert(),DL,llvm::ISD::EXTRACT_SUBVECTOR,llvm::ISD::EXTRACT_VECTOR_ELT,llvm::ISD::FADD,llvm::SelectionDAG::getContext(),llvm::RISCVSubtarget::getELen(),llvm::SDNode::getFlags(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::EVT::getScalarSizeInBits(),llvm::SDValue::getValueType(),llvm::ISD::getVecReduceBaseOpcode(),getVecReduceOpcode(),llvm::EVT::getVectorElementType(),llvm::SelectionDAG::getVectorIdxConstant(),llvm::EVT::getVectorNumElements(),llvm::EVT::getVectorVT(),llvm::SDValue::hasOneUse(),llvm::Value::hasOneUse(),llvm::RISCVSubtarget::hasVInstructions(),llvm::EVT::isInteger(),llvm::isNullConstant(),llvm::EVT::isScalableVector(),LHS,N,llvm::SelectionDAG::NewNodesMustHaveLegalTypes,RHS, andstd::swap().
Referenced byperformADDCombine(),performANDCombine(),llvm::RISCVTargetLowering::PerformDAGCombine(),performORCombine(), andperformXORCombine().
| static |
Definition at line14049 of fileRISCVISelLowering.cpp.
Referencesllvm::CallingConv::C,llvm::SelectionDAG::getContext(),llvm::EVT::getHalfSizedIntegerVT(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::EVT::getScalarSizeInBits(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::SDValue::getValueType(),llvm::EVT::getVectorElementCount(),llvm::EVT::getVectorElementType(),llvm::EVT::getVectorVT(),llvm::SDValue::hasOneUse(),llvm::TargetLoweringBase::isTypeLegal(),llvm::EVT::isVector(),N,llvm::ISD::SIGN_EXTEND,llvm::ISD::SUB, andllvm::ISD::ZERO_EXTEND.
Referenced byperformADDCombine(),llvm::RISCVTargetLowering::PerformDAGCombine(),performMULCombine(), andperformSUBCombine().
| static |
Definition at line13733 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ADD,llvm::ISD::AND,DL,llvm::ISD::EXTRACT_VECTOR_ELT,llvm::ISD::FADD,llvm::ISD::FMAXNUM,llvm::ISD::FMINNUM,llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::SDValue::getSimpleValueType(),llvm::SelectionDAG::getUNDEF(),llvm::SDValue::getValueType(),llvm::SelectionDAG::getVectorIdxConstant(),llvm::SDValue::hasOneUse(),llvm::ISD::INSERT_SUBVECTOR,llvm::isNeutralConstant(),isNonZeroAVL(),llvm::isNullConstant(),llvm::SDNode::isUndef(),llvm_unreachable,lowerScalarInsert(),N,llvm::ISD::OR,llvm::ISD::SMAX,llvm::ISD::SMIN,llvm::ISD::UMAX,llvm::ISD::UMIN,llvm::RISCVISD::VECREDUCE_ADD_VL,llvm::RISCVISD::VECREDUCE_AND_VL,llvm::RISCVISD::VECREDUCE_FADD_VL,llvm::RISCVISD::VECREDUCE_FMAX_VL,llvm::RISCVISD::VECREDUCE_FMIN_VL,llvm::RISCVISD::VECREDUCE_OR_VL,llvm::RISCVISD::VECREDUCE_SMAX_VL,llvm::RISCVISD::VECREDUCE_SMIN_VL,llvm::RISCVISD::VECREDUCE_UMAX_VL,llvm::RISCVISD::VECREDUCE_UMIN_VL,llvm::RISCVISD::VECREDUCE_XOR_VL,llvm::RISCVISD::VFMV_S_F_VL,llvm::RISCVISD::VMV_S_X_VL,llvm::RISCVISD::VMV_V_X_VL, andllvm::ISD::XOR.
Referenced byperformADDCombine(),performANDCombine(),llvm::RISCVTargetLowering::PerformDAGCombine(),performORCombine(), andperformXORCombine().
| static |
Definition at line14269 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::AND,DL,llvm::APInt::getBitsSetFrom(),llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::EVT::getSizeInBits(),llvm::SDValue::hasOneUse(),llvm::isAllOnesConstant(),llvm::isOneConstant(),llvm::SelectionDAG::MaskedValueIsZero(),N,llvm::ISD::OR, andllvm::ISD::XOR.
Referenced byperformANDCombine(), andperformORCombine().
| static |
Combine a binary or FMA operation to its equivalent VW or VW_W form.
The supported combines are: add | add_vl | or disjoint -> vwadd(u) | vwadd(u)_w sub | sub_vl -> vwsub(u) | vwsub(u)_w mul | mul_vl -> vwmul(u) | vwmul_su shl | shl_vl -> vwsll fadd_vl -> vfwadd | vfwadd_w fsub_vl -> vfwsub | vfwsub_w fmul_vl -> vfwmul vwadd_w(u) -> vwadd(u) vwsub_w(u) -> vwsub(u) vfwadd_w -> vfwadd vfwsub_w -> vfwsub
Definition at line15770 of fileRISCVISelLowering.cpp.
Referencesllvm::TargetLowering::DAGCombinerInfo::AddToWorklist(),assert(),llvm::TargetLowering::DAGCombinerInfo::DAG,llvm::SmallVectorImpl< T >::emplace_back(),llvm::SmallVectorBase< Size_T >::empty(),ExtensionMaxWebSize,llvm::Use::getOperandNo(),llvm::Use::getUser(),llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalize(),LHS,N,llvm::SmallVectorImpl< T >::pop_back_val(),llvm::SmallVectorTemplateBase< T, bool >::push_back(),llvm::SelectionDAG::ReplaceAllUsesOfValueWith(),llvm::SmallVectorImpl< T >::reserve(),RHS,llvm::SmallVectorBase< Size_T >::size(), andstd::swap().
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine(),performVFMADD_VLCombine(), andperformVWADDSUBW_VLCombine().
| static |
Definition at line14449 of fileRISCVISelLowering.cpp.
Referencesassert(),Cond,llvm::RISCVISD::CZERO_EQZ,llvm::RISCVISD::CZERO_NEZ,DL,llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::SDValue::hasOneUse(),llvm::isOneConstant(),N,llvm::ISD::OR, andllvm::ISD::XOR.
Referenced byperformORCombine().
| static |
Definition at line17637 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::BITCAST,convertToScalableVector(),DL,getContainerForFixedLengthVector(),getDefaultVLOps(),llvm::SelectionDAG::getNode(),llvm::EVT::getSimpleVT(),llvm::MVT::getVectorElementType(),llvm::RISCVSubtarget::getXLenVT(),llvm::SelectionDAG::getZExtOrTrunc(),llvm::EVT::isScalarInteger(),llvm::EVT::isSimple(),llvm::MVT::isVector(),N,useRVVForFixedLengthVectorVT(),llvm::RISCVISD::VCPOP_VL, andllvm::ISD::ZERO_EXTEND.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line13894 of fileRISCVISelLowering.cpp.
Referencesllvm::AllOnes,llvm::ISD::AND,llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::EVT::getSizeInBits(),llvm::RISCVSubtarget::getXLen(),llvm::RISCVSubtarget::hasConditionalMoveFusion(),llvm::SDValue::hasOneUse(),llvm::isAllOnesConstant(),llvm::isNullConstant(),llvm::EVT::isVector(),isZeroOrAllOnes(),N,llvm::ISD::SELECT,llvm::RISCVISD::SELECT_CC, andstd::swap().
| static |
Definition at line13959 of fileRISCVISelLowering.cpp.
Referencesllvm::AllOnes,combineSelectAndUse(), andN.
| static |
Definition at line8197 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ADD,llvm::ISD::AND,CC,DL,llvm::SelectionDAG::getAllOnesConstant(),llvm::SDNode::getAsAPIntVal(),llvm::SelectionDAG::getFreeze(),llvm::SelectionDAG::getNegative(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::RISCVSubtarget::hasConditionalMoveFusion(),llvm::isAllOnesConstant(),llvm::isNullConstant(),LHS,matchSetCC(),N,llvm::ISD::OR,RHS,llvm::ISD::SETCC, andllvm::ISD::XOR.
| static |
Definition at line14139 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ADD,DL,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::SelectionDAG::getSetCC(),llvm::ISD::getSetCCInverse(),llvm::SDValue::getValueType(),llvm::SDValue::hasOneUse(),llvm::EVT::isInteger(),llvm::isOneConstant(),llvm::APInt::isSignedIntN(),N,llvm::ISD::SETCC, andllvm::ISD::XOR.
Referenced byperformSUBCombine().
| static |
Definition at line14183 of fileRISCVISelLowering.cpp.
Referencesllvm::SelectionDAG::getNode(),llvm::SDNode::getOpcode(),llvm::SDValue::getOperand(),llvm::SDNode::getOperand(),llvm::EVT::getSizeInBits(),llvm::APInt::getSplat(),llvm::RISCVSubtarget::getXLenVT(),llvm::SDValue::hasOneUse(),llvm::SelectionDAG::MaskedValueIsZero(),N,llvm::RISCVISD::ORC_B,llvm::ISD::SHL, andllvm::ISD::SRL.
Referenced byperformSUBCombine().
| static |
Definition at line17264 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ADD,llvm::RISCVISD::ADD_VL,assert(),DL,getDefaultScalableVLOps(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::SDValue::isUndef(),N,std::swap(),llvm::RISCVISD::VWMACC_VL,llvm::RISCVISD::VWMACCSU_VL,llvm::RISCVISD::VWMACCU_VL,llvm::RISCVISD::VWMUL_VL,llvm::RISCVISD::VWMULSU_VL, andllvm::RISCVISD::VWMULU_VL.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line17451 of fileRISCVISelLowering.cpp.
Referencesllvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::EVT::getScalarSizeInBits(),llvm::SDValue::getValueType(),llvm::SDValue::hasOneUse(),llvm::isAllOnesConstant(),llvm::EVT::isVector(),N,llvm::ISD::SIGN_EXTEND,llvm::SMin,llvm::ISD::SMIN,llvm::ISD::SRA,llvm::RISCVISD::TRUNCATE_VECTOR_VL,llvm::RISCVISD::VMSET_VL, andllvm::ISD::ZERO_EXTEND.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line14319 of fileRISCVISelLowering.cpp.
ReferencesCond,DL,llvm::ConstantSDNode::getAPIntValue(),llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::EVT::getScalarSizeInBits(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::SDValue::getValueType(),llvm::SDValue::hasOneUse(),llvm::isConstOrConstSplat(),llvm::TargetLoweringBase::isTypeLegal(),llvm::EVT::isVector(),llvm::ConstantSDNode::isZero(),N,llvm::ISD::SETCC,llvm::ISD::SETGT,llvm::ISD::SETULT,llvm::ISD::SIGN_EXTEND,llvm::ISD::SMAX,llvm::ISD::SMIN,llvm::ISD::TRUNCATE, andllvm::ISD::VSELECT.
Referenced byperformTRUNCATECombine().
| static |
Definition at line17505 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::MVT::changeVectorElementType(),DL,llvm::ISD::EXTRACT_SUBVECTOR,llvm::MVT::getIntegerVT(),llvm::SelectionDAG::getNode(),llvm::MVT::getScalarSizeInBits(),llvm::APInt::getSignedMaxValue(),llvm::APInt::getSignedMinValue(),llvm::SDValue::getSimpleValueType(),llvm::SelectionDAG::getUNDEF(),llvm::ISD::INSERT_SUBVECTOR,llvm::ISD::isConstantSplatVector(),llvm::APInt::isMask(),llvm::APInt::isNonNegative(),llvm::isNullConstant(),N,llvm::APInt::sext(),llvm::ISD::SMAX,llvm::RISCVISD::SMAX_VL,llvm::ISD::SMIN,llvm::RISCVISD::SMIN_VL,llvm::RISCVISD::TRUNCATE_VECTOR_VL,llvm::RISCVISD::TRUNCATE_VECTOR_VL_SSAT,llvm::RISCVISD::TRUNCATE_VECTOR_VL_USAT,llvm::APInt::uge(),llvm::ISD::UMIN,llvm::RISCVISD::UMIN_VL, andllvm::RISCVISD::VMV_V_X_VL.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line14745 of fileRISCVISelLowering.cpp.
Referencesllvm::And,llvm::ISD::AND,llvm::ISD::BITCAST,DL,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getContext(),llvm::EVT::getIntegerVT(),llvm::SDValue::getNode(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOperand(),llvm::EVT::getScalarSizeInBits(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::EVT::getVectorElementCount(),llvm::EVT::getVectorVT(),llvm::ISD::isConstantSplatVector(),llvm::APInt::isMask(),llvm::TargetLoweringBase::isTypeLegal(),llvm::EVT::isVector(),N,llvm::ISD::SRA, andllvm::ISD::SRL.
Referenced byperformMULCombine().
| static |
Definition at line16417 of fileRISCVISelLowering.cpp.
ReferencesA,B,llvm::CallingConv::C,llvm::RISCVISD::FNEG_VL,llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getSelectionDAGInfo(),llvm::SelectionDAGTargetInfo::isTargetStrictFPOpcode(),N,negateFMAOpcode(), andllvm::Offset.
Referenced byperformVFMADD_VLCombine().
| static |
Definition at line15875 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDNode::getOperand(),llvm::SDValue::hasOneUse(),llvm::ISD::INSERT_SUBVECTOR,llvm::ISD::isConstantSplatVectorAllZeros(),llvm::isNullOrNullSplat(),llvm::SDValue::isUndef(),N,llvm::RISCVISD::VMERGE_VL,llvm::RISCVISD::VMSET_VL,llvm::ISD::VSELECT,llvm::RISCVISD::VWADD_W_VL,llvm::RISCVISD::VWADDU_W_VL,llvm::RISCVISD::VWSUB_W_VL,llvm::RISCVISD::VWSUBU_W_VL,X, andY.
Referenced byperformVWADDSUBW_VLCombine().
Definition at line18870 of fileRISCVISelLowering.cpp.
Referenced byllvm::RISCVTargetLowering::computeKnownBitsForTargetNode().
| static |
Definition at line2727 of fileRISCVISelLowering.cpp.
Referencesassert(),DL,llvm::ISD::EXTRACT_SUBVECTOR,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::RISCVSubtarget::getXLenVT(), andllvm::EVT::isFixedLengthVector().
| static |
Definition at line19993 of fileRISCVISelLowering.cpp.
Referencesllvm::CCValAssign::BCvt,llvm::ISD::BITCAST,convertFromScalableVector(),DL,llvm::RISCVISD::FMV_H_X,llvm::RISCVISD::FMV_W_X_RV64,llvm::CCValAssign::Full,llvm::CCValAssign::getLocInfo(),llvm::CCValAssign::getLocVT(),llvm::SelectionDAG::getNode(),llvm::CCValAssign::getValVT(),llvm::MVT::isFixedLengthVector(),llvm::MVT::isInteger(),llvm::MVT::isScalableVector(),llvm_unreachable, andllvm::CCValAssign::needsCustom().
| static |
Definition at line2715 of fileRISCVISelLowering.cpp.
Referencesassert(),DL,llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getUNDEF(),llvm::SelectionDAG::getVectorIdxConstant(),llvm::ISD::INSERT_SUBVECTOR, andllvm::EVT::isScalableVector().
| static |
Definition at line20054 of fileRISCVISelLowering.cpp.
Referencesllvm::CCValAssign::BCvt,llvm::ISD::BITCAST,convertToScalableVector(),DL,llvm::RISCVISD::FMV_X_ANYEXTH,llvm::RISCVISD::FMV_X_ANYEXTW_RV64,llvm::CCValAssign::Full,llvm::CCValAssign::getLocInfo(),llvm::CCValAssign::getLocVT(),llvm::SelectionDAG::getNode(),llvm::CCValAssign::getValVT(),llvm::MVT::isFixedLengthVector(),llvm::EVT::isInteger(),llvm::EVT::isScalableVector(),llvm_unreachable, andllvm::CCValAssign::needsCustom().
| static |
Definition at line12875 of fileRISCVISelLowering.cpp.
ReferencesDL,llvm::SelectionDAG::getNode(),getRISCVWOpcode(),N, andllvm::ISD::TRUNCATE.
| static |
Definition at line12888 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ANY_EXTEND,DL,llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getValueType(),N,llvm::ISD::SIGN_EXTEND_INREG, andllvm::ISD::TRUNCATE.
| static |
Definition at line19278 of fileRISCVISelLowering.cpp.
Referencesllvm::MachineInstrBuilder::addFrameIndex(),llvm::MachineInstrBuilder::addImm(),llvm::MachineInstrBuilder::addMemOperand(),llvm::MachineInstrBuilder::addReg(),assert(),llvm::BuildMI(),DL,llvm::MachinePointerInfo::getFixedStack(),llvm::MachineFunction::getInfo(),llvm::TargetSubtargetInfo::getInstrInfo(),llvm::getKillRegState(),llvm::MachineFunction::getMachineMemOperand(),llvm::MachineBasicBlock::getParent(),llvm::TargetSubtargetInfo::getRegisterInfo(),llvm::MachineFunction::getSubtarget(),llvm::MachinePointerInfo::getWithOffset(),llvm::HexagonInstrInfo::loadRegFromStackSlot(),MI,llvm::MachineMemOperand::MOStore, andTII.
Referenced byllvm::RISCVTargetLowering::EmitInstrWithCustomInserter().
| static |
Definition at line19696 of fileRISCVISelLowering.cpp.
Referencesllvm::MachineInstrBuilder::addImm(),llvm::MachineInstrBuilder::addMBB(),llvm::MachineInstrBuilder::addReg(),llvm::MachineBasicBlock::addSuccessor(),assert(),llvm::MachineBasicBlock::begin(),llvm::BuildMI(),DL,llvm::MachineBasicBlock::end(),F,llvm::MachineBasicBlock::getBasicBlock(),llvm::RISCVSubtarget::getInstrInfo(),llvm::ilist_node_impl< OptionsT >::getIterator(),llvm::MachineBasicBlock::getParent(),llvm::MachineFunction::getRegInfo(),I,llvm::RISCVSubtarget::is64Bit(),llvm_unreachable,MBB,MI,MRI,llvm::MachineInstr::NoFPExcept,llvm::MachineInstr::setFlag(),llvm::MachineBasicBlock::splice(),TII, andllvm::MachineBasicBlock::transferSuccessorsAndUpdatePHIs().
Referenced byllvm::RISCVTargetLowering::EmitInstrWithCustomInserter().
| static |
Definition at line19369 of fileRISCVISelLowering.cpp.
Referencesllvm::MachineInstrBuilder::addMBB(),llvm::MachineInstrBuilder::addReg(),llvm::MachineBasicBlock::addSuccessor(),llvm::MachineBasicBlock::begin(),llvm::BuildMI(),DL,llvm::MachineBasicBlock::end(),llvm::MachineInstr::eraseFromParent(),F,llvm::First,llvm::MachineBasicBlock::getBasicBlock(),llvm::MachineOperand::getImm(),llvm::RISCVSubtarget::getInstrInfo(),llvm::ilist_node_impl< OptionsT >::getIterator(),llvm::MachineInstr::getOperand(),llvm::MachineBasicBlock::getParent(),llvm::MachineOperand::getReg(),llvm::MachineBasicBlock::splice(),TII, andllvm::MachineBasicBlock::transferSuccessorsAndUpdatePHIs().
Referenced byemitSelectPseudo().
| static |
Definition at line19332 of fileRISCVISelLowering.cpp.
Referencesllvm::MachineInstrBuilder::addReg(),llvm::BuildMI(),DL,llvm::TargetSubtargetInfo::getInstrInfo(),llvm::getKillRegState(),llvm::MachineBasicBlock::getParent(),llvm::MachineFunction::getRegInfo(),llvm::MachineFunction::getSubtarget(),llvm::RegState::Kill,MI,MRI,llvm::MachineInstr::NoFPExcept,llvm::MachineInstr::setFlag(), andTII.
Referenced byllvm::RISCVTargetLowering::EmitInstrWithCustomInserter().
| static |
Definition at line19178 of fileRISCVISelLowering.cpp.
Referencesllvm::MachineInstrBuilder::addImm(),llvm::MachineInstrBuilder::addMBB(),llvm::MachineInstrBuilder::addReg(),llvm::MachineBasicBlock::addSuccessor(),assert(),llvm::MachineBasicBlock::begin(),llvm::BuildMI(),llvm::MachineFunction::CreateMachineBasicBlock(),DL,llvm::MachineBasicBlock::end(),llvm::MachineBasicBlock::getBasicBlock(),llvm::TargetSubtargetInfo::getInstrInfo(),llvm::ilist_node_impl< OptionsT >::getIterator(),llvm::MachineBasicBlock::getParent(),llvm::MachineFunction::getRegInfo(),llvm::MachineFunction::getSubtarget(),llvm::MachineFunction::insert(),MI,llvm::MachineBasicBlock::splice(),TII, andllvm::MachineBasicBlock::transferSuccessorsAndUpdatePHIs().
Referenced byllvm::RISCVTargetLowering::EmitInstrWithCustomInserter().
| static |
Definition at line19471 of fileRISCVISelLowering.cpp.
Referencesllvm::MachineInstrBuilder::addImm(),llvm::MachineInstrBuilder::addMBB(),llvm::MachineInstrBuilder::addReg(),llvm::MachineBasicBlock::addSuccessor(),llvm::any_of(),llvm::MachineBasicBlock::begin(),llvm::BuildMI(),CC,llvm::MachineInstr::collectDebugValues(),llvm::SmallSet< T, N, C >::count(),DL,EmitLoweredCascadedSelect(),llvm::MachineBasicBlock::end(),llvm::MachineInstr::eraseFromParent(),F,llvm::MachineBasicBlock::getBasicBlock(),llvm::RISCVSubtarget::getInstrInfo(),llvm::ilist_node_impl< OptionsT >::getIterator(),llvm::MachineBasicBlock::getParent(),I,llvm::SmallSet< T, N, C >::insert(),llvm::MachineBasicBlock::instr_end(),isSelectPseudo(),LHS,MI,llvm::next_nodbg(),llvm::MachineFunctionProperties::NoPHIs,llvm::MachineBasicBlock::push_back(),RHS,llvm::MachineBasicBlock::setCallFrameSize(),llvm::MachineBasicBlock::splice(),TII, andllvm::MachineBasicBlock::transferSuccessorsAndUpdatePHIs().
| static |
Definition at line19243 of fileRISCVISelLowering.cpp.
Referencesllvm::MachineInstrBuilder::addFrameIndex(),llvm::MachineInstrBuilder::addImm(),llvm::MachineInstrBuilder::addMemOperand(),assert(),llvm::BuildMI(),DL,llvm::MachinePointerInfo::getFixedStack(),llvm::MachineFunction::getInfo(),llvm::TargetSubtargetInfo::getInstrInfo(),llvm::MachineFunction::getMachineMemOperand(),llvm::MachineBasicBlock::getParent(),llvm::TargetSubtargetInfo::getRegisterInfo(),llvm::MachineFunction::getSubtarget(),llvm::MachinePointerInfo::getWithOffset(),MI,llvm::MachineMemOperand::MOLoad,llvm::HexagonInstrInfo::storeRegToStackSlot(), andTII.
Referenced byllvm::RISCVTargetLowering::EmitInstrWithCustomInserter().
| static |
Definition at line19633 of fileRISCVISelLowering.cpp.
Referencesllvm::MachineInstrBuilder::add(),llvm::MachineInstrBuilder::addReg(),assert(),llvm::BuildMI(),llvm::MachineOperand::CreateImm(),llvm::MachineOperand::CreateReg(),DL,llvm::TargetSubtargetInfo::getInstrInfo(),llvm::RISCVII::getLMul(),llvm::MachineBasicBlock::getParent(),llvm::MachineFunction::getRegInfo(),llvm::TargetSubtargetInfo::getRegisterInfo(),llvm::RISCVII::getSEWOpNum(),llvm::MachineFunction::getSubtarget(),llvm::RegState::Kill,lookupMaskedIntrinsic(),llvm::RISCV::RISCVMaskedPseudoInfo::MaskedPseudo,MI,MRI,TII, andTRI.
Referenced byllvm::RISCVTargetLowering::EmitInstrWithCustomInserter().
| static |
Definition at line14566 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ADD,llvm::ISD::AND,llvm::CallingConv::C,llvm::countr_zero(),DL,llvm::SelectionDAG::getConstant(),llvm::MachineFunction::getFunction(),llvm::SelectionDAG::getMachineFunction(),llvm::SelectionDAG::getNode(),llvm::RISCVSubtarget::getXLenVT(),llvm::ConstantSDNode::getZExtValue(),llvm::Function::hasMinSize(),llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalize(),llvm::TargetLowering::DAGCombinerInfo::isCalledByLegalizer(),llvm::isPowerOf2_64(),llvm::Log2_64(),N,llvm::Offset,llvm::ISD::SHL,llvm::RISCVISD::SHL_ADD,llvm::ISD::SUB, andX.
Referenced byperformMULCombine().
| static |
Definition at line8273 of fileRISCVISelLowering.cpp.
ReferencesDL,llvm::SelectionDAG::FoldConstantArithmetic(),llvm::SDNode::getAsAPIntVal(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDNode::getOpcode(),llvm::SDValue::getOperand(),llvm::SDNode::getOperand(),llvm::SelectionDAG::getSelect(),llvm::SDNode::getValueType(),llvm::SDValue::hasOneUse(),llvm::APInt::isAllOnes(),llvm::ConstantSDNode::isOpaque(),llvm::APInt::isZero(),llvm::ISD::SELECT, andstd::swap().
| static |
Definition at line16790 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::AND,llvm::BitWidth,Cond,llvm::ISD::CTLZ,llvm::ISD::CTLZ_ZERO_UNDEF,llvm::ISD::CTTZ,llvm::ISD::CTTZ_ZERO_UNDEF,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::SDNode::getOperand(),llvm::SDValue::getValueSizeInBits(),llvm::SDValue::getValueType(),llvm::SelectionDAG::getZExtOrTrunc(),llvm::isNullConstant(),N,llvm::ISD::SETCC,llvm::ISD::SETEQ,llvm::ISD::SETNE,llvm::ISD::TRUNCATE, andllvm::ISD::ZERO_EXTEND.
Referenced byperformSELECTCombine().
Creates an all ones mask suitable for masking a vector of type VecTy with vector length VL.
Definition at line2749 of fileRISCVISelLowering.cpp.
ReferencesDL,getMaskTypeFor(),llvm::SelectionDAG::getNode(), andllvm::RISCVISD::VMSET_VL.
Referenced bygetDefaultScalableVLOps(),getDefaultVLOps(), andlowerVectorIntrinsicScalars().
| static |
Definition at line2669 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::RISCVSubtarget::getELen(),llvm::RISCVSubtarget::getRealMinVLen(),llvm::MVT::getScalableVectorVT(),llvm::MVT::getVectorElementType(),llvm::MVT::getVectorNumElements(),llvm::MVT::isFixedLengthVector(),llvm::isPowerOf2_32(),llvm::TargetLoweringBase::isTypeLegal(),llvm_unreachable,llvm::RISCV::RVVBitsPerBlock,llvm::MVT::SimpleTy, anduseRVVForFixedLengthVectorVT().
| static |
Definition at line2704 of fileRISCVISelLowering.cpp.
ReferencesgetContainerForFixedLengthVector(), andllvm::SelectionDAG::getTargetLoweringInfo().
| static |
Definition at line2756 of fileRISCVISelLowering.cpp.
Referencesassert(),DL,getAllOnesMask(),llvm::SelectionDAG::getRegister(),llvm::RISCVSubtarget::getXLenVT(), andllvm::MVT::isScalableVector().
Referenced bycombineToVWMACC(), andgetDefaultVLOps().
| static |
Definition at line2778 of fileRISCVISelLowering.cpp.
Referencesassert(),DL,getDefaultScalableVLOps(),getDefaultVLOps(),llvm::MVT::getVectorNumElements(),llvm::MVT::isFixedLengthVector(), andllvm::MVT::isScalableVector().
| static |
Definition at line2765 of fileRISCVISelLowering.cpp.
Referencesassert(),DL,getAllOnesMask(),llvm::SelectionDAG::getConstant(),llvm::RISCVSubtarget::getXLenVT(), andllvm::MVT::isScalableVector().
Referenced bycombineScalarCTPOPToVCPOP(),getDefaultVLOps(),getWideningInterleave(),lowerBUILD_VECTOR(),lowerBuildVectorOfConstants(),lowerBuildVectorViaDominantValues(),lowerCttzElts(),lowerFMAXIMUM_FMINIMUM(),lowerFP_TO_INT_SAT(),llvm::RISCVTargetLowering::LowerOperation(),lowerVECTOR_SHUFFLE(),lowerVECTOR_SHUFFLEAsVSlide1(),lowerVECTOR_SHUFFLEAsVSlidedown(),lowerVECTOR_SHUFFLEAsVSlideup(),lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND(),lowerVectorStrictFTRUNC_FCEIL_FFLOOR_FROUND(),lowerVectorXRINT(),matchSplatAsGather(),performFP_TO_INTCombine(), andllvm::RISCVTargetLowering::ReplaceNodeResults().
| static |
Definition at line4642 of fileRISCVISelLowering.cpp.
Referencesllvm::MVT::changeVectorElementTypeToInteger(),llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::divideCoefficientBy(),DL,llvm::SelectionDAG::getBitcast(),llvm::SelectionDAG::getConstant(),llvm::MVT::getIntegerVT(),llvm::SelectionDAG::getNode(),llvm::MVT::getScalarSizeInBits(),llvm::SelectionDAG::getUNDEF(),llvm::SelectionDAG::getVectorIdxConstant(),llvm::MVT::getVectorVT(),llvm::ISD::INSERT_SUBVECTOR,llvm::ISD::SRL, andllvm::ISD::TRUNCATE.
Referenced bylowerVECTOR_SHUFFLE().
Definition at line3379 of fileRISCVISelLowering.cpp.
Referencesllvm::BitWidth,llvm::APFloat::convertToInteger(),llvm::APInt::extractBits(),llvm::APFloatBase::opInvalidOp, andllvm::TowardZero.
Referenced byisSimpleVIDSequence().
| static |
| static |
Definition at line7924 of fileRISCVISelLowering.cpp.
Referencesllvm::RISCVConstantPoolValue::Create(),DL,llvm::MachinePointerInfo::getConstantPool(),llvm::SelectionDAG::getContext(),llvm::SelectionDAG::getEntryNode(),llvm::SelectionDAG::getLoad(),llvm::SelectionDAG::getMachineFunction(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getTargetConstantPool(),llvm::RISCVISD::LLA, andN.
Referenced byllvm::RISCVTargetLowering::LowerCall().
| static |
Definition at line7914 of fileRISCVISelLowering.cpp.
Referencesllvm::RISCVConstantPoolValue::Create(),DL,llvm::MachinePointerInfo::getConstantPool(),llvm::SelectionDAG::getEntryNode(),llvm::SelectionDAG::getLoad(),llvm::SelectionDAG::getMachineFunction(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getTargetConstantPool(),llvm::RISCVISD::LLA, andN.
Referenced byllvm::RISCVTargetLowering::LowerCall().
Definition at line3365 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::MVT::getScalableVectorVT(),llvm::MVT::getSizeInBits(),llvm::MVT::getVectorElementType(), andllvm::RISCV::RVVBitsPerBlock.
Referenced bygetSmallestVTForIndex(),lowerBUILD_VECTOR(),llvm::RISCVTargetLowering::LowerOperation(),lowerReductionSeq(),lowerShuffleViaVRegSplitting(), andllvm::RISCVTargetLowering::PerformDAGCombine().
Return the type of the mask type suitable for masking the provided vector type.
This is simply an i1 element type vector of the same (possibly scalable) length.
Definition at line2741 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::MVT::getVectorElementCount(),llvm::MVT::getVectorVT(), andllvm::MVT::isVector().
| static |
Definition at line3988 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::RISCVSubtarget::is64Bit(), andllvm_unreachable.
Referenced bylowerBuildVectorViaPacking().
| static |
Definition at line20376 of fileRISCVISelLowering.cpp.
Referencesllvm::SelectionDAG::getContext(),llvm::SelectionDAG::getDataLayout(),llvm::DataLayout::getPrefTypeAlign(), andllvm::EVT::getTypeForEVT().
Get a RISC-V target specified VL op for a given SDNode.
Definition at line6357 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::AND,llvm::RISCVISD::AND_VL,llvm::RISCVISD::CTLZ_VL,llvm::ISD::CTLZ_ZERO_UNDEF,llvm::RISCVISD::CTTZ_VL,llvm::ISD::CTTZ_ZERO_UNDEF,llvm::ISD::FMA,llvm::ISD::FMAXNUM,llvm::ISD::FMINNUM,llvm::RISCVISD::FSQRT_VL,llvm::ISD::LLRINT,llvm_unreachable,llvm::ISD::LRINT,OP_CASE,llvm::ISD::OR,llvm::RISCVISD::OR_VL,ROTL,ROTR,llvm::RISCVISD::SRA_VL,llvm::RISCVISD::SRL_VL,llvm::ISD::STRICT_FMA,llvm::RISCVISD::STRICT_VFMADD_VL,llvm::RISCVISD::VFCVT_RM_X_F_VL,llvm::RISCVISD::VFCVT_RTZ_X_F_VL,llvm::RISCVISD::VFCVT_RTZ_XU_F_VL,llvm::RISCVISD::VFMADD_VL,llvm::RISCVISD::VFMAX_VL,llvm::RISCVISD::VFMIN_VL,llvm::RISCVISD::VMAND_VL,llvm::RISCVISD::VMERGE_VL,llvm::RISCVISD::VMOR_VL,llvm::RISCVISD::VMXOR_VL,VP_CASE,llvm::RISCVISD::VSEXT_VL,llvm::RISCVISD::VZEXT_VL,llvm::ISD::XOR, andllvm::RISCVISD::XOR_VL.
| static |
Definition at line12847 of fileRISCVISelLowering.cpp.
Referencesllvm::RISCVISD::DIVUW,llvm::RISCVISD::DIVW,llvm_unreachable,llvm::RISCVISD::REMUW,llvm::RISCVISD::ROLW,llvm::RISCVISD::RORW,llvm::ISD::ROTL,llvm::ISD::ROTR,llvm::ISD::SDIV,llvm::ISD::SHL,llvm::RISCVISD::SLLW,llvm::ISD::SRA,llvm::RISCVISD::SRAW,llvm::ISD::SRL,llvm::RISCVISD::SRLW,llvm::ISD::UDIV, andllvm::ISD::UREM.
| static |
Definition at line10400 of fileRISCVISelLowering.cpp.
ReferencesDL,llvm::ISD::EXTRACT_VECTOR_ELT,llvm::SelectionDAG::getConstantFP(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getVectorIdxConstant(),llvm_unreachable,llvm::ISD::VECREDUCE_FADD,llvm::RISCVISD::VECREDUCE_FADD_VL,llvm::ISD::VECREDUCE_FMAX,llvm::RISCVISD::VECREDUCE_FMAX_VL,llvm::ISD::VECREDUCE_FMAXIMUM,llvm::ISD::VECREDUCE_FMIN,llvm::RISCVISD::VECREDUCE_FMIN_VL,llvm::ISD::VECREDUCE_FMINIMUM,llvm::ISD::VECREDUCE_SEQ_FADD, andllvm::RISCVISD::VECREDUCE_SEQ_FADD_VL.
Definition at line10185 of fileRISCVISelLowering.cpp.
Referencesllvm_unreachable,llvm::ISD::VECREDUCE_ADD,llvm::RISCVISD::VECREDUCE_ADD_VL,llvm::ISD::VECREDUCE_AND,llvm::RISCVISD::VECREDUCE_AND_VL,llvm::RISCVISD::VECREDUCE_FADD_VL,llvm::RISCVISD::VECREDUCE_FMAX_VL,llvm::RISCVISD::VECREDUCE_FMIN_VL,llvm::ISD::VECREDUCE_OR,llvm::RISCVISD::VECREDUCE_OR_VL,llvm::RISCVISD::VECREDUCE_SEQ_FADD_VL,llvm::ISD::VECREDUCE_SMAX,llvm::RISCVISD::VECREDUCE_SMAX_VL,llvm::ISD::VECREDUCE_SMIN,llvm::RISCVISD::VECREDUCE_SMIN_VL,llvm::ISD::VECREDUCE_UMAX,llvm::RISCVISD::VECREDUCE_UMAX_VL,llvm::ISD::VECREDUCE_UMIN,llvm::RISCVISD::VECREDUCE_UMIN_VL,llvm::ISD::VECREDUCE_XOR, andllvm::RISCVISD::VECREDUCE_XOR_VL.
Definition at line4496 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::EXTRACT_SUBVECTOR,llvm::SDValue::getConstantOperandVal(),llvm::RISCVTargetLowering::getLMUL(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::MVT::getVectorNumElements(), andllvm::RISCVII::LMUL_8.
Referenced bylowerVECTOR_SHUFFLE().
| static |
| static |
Definition at line7897 of fileRISCVISelLowering.cpp.
Referencesllvm::SelectionDAG::getTargetBlockAddress(), andN.
| static |
Definition at line7903 of fileRISCVISelLowering.cpp.
Referencesllvm::SelectionDAG::getTargetConstantPool(), andN.
| static |
Definition at line7892 of fileRISCVISelLowering.cpp.
ReferencesDL,llvm::SelectionDAG::getTargetGlobalAddress(), andN.
| static |
Definition at line7909 of fileRISCVISelLowering.cpp.
Referencesllvm::SelectionDAG::getTargetJumpTable(), andN.
| inlinestatic |
Definition at line10006 of fileRISCVISelLowering.cpp.
Referencesllvm::SelectionDAG::getNode(),Operands, andprocessVCIXOperands().
| inlinestatic |
Definition at line9969 of fileRISCVISelLowering.cpp.
ReferencesconvertFromScalableVector(),DL,llvm::SelectionDAG::getBitcast(),getContainerForFixedLengthVector(),llvm::MVT::getIntegerVT(),llvm::SelectionDAG::getMachineFunction(),llvm::SelectionDAG::getMergeValues(),llvm::SelectionDAG::getNode(),llvm::MachineFunction::getSubtarget(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::SDValue::getValue(),llvm::MVT::getVectorElementCount(),llvm::MVT::getVectorVT(),llvm::SelectionDAG::getVTList(),Operands, andprocessVCIXOperands().
Given a binary operator, return theassociative generic ISD::VECREDUCE_OP which corresponds to it.
Definition at line13605 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ADD,llvm::ISD::AND,llvm::ISD::FADD,llvm_unreachable,llvm::ISD::OR,llvm::ISD::SMAX,llvm::ISD::SMIN,llvm::ISD::UMAX,llvm::ISD::UMIN,llvm::ISD::VECREDUCE_ADD,llvm::ISD::VECREDUCE_AND,llvm::ISD::VECREDUCE_FADD,llvm::ISD::VECREDUCE_OR,llvm::ISD::VECREDUCE_SMAX,llvm::ISD::VECREDUCE_SMIN,llvm::ISD::VECREDUCE_UMAX,llvm::ISD::VECREDUCE_UMIN,llvm::ISD::VECREDUCE_XOR, andllvm::ISD::XOR.
Referenced bycombineBinOpOfExtractToReduceTree().
Definition at line2580 of fileRISCVISelLowering.cpp.
Referencesassert(),II,llvm::ISD::INTRINSIC_W_CHAIN, andllvm::ISD::INTRINSIC_WO_CHAIN.
Referenced bylowerVectorIntrinsicScalars().
| static |
Definition at line3342 of fileRISCVISelLowering.cpp.
ReferencesDL,llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getTargetConstant(),llvm::RISCVSubtarget::getXLenVT(),llvm::SDValue::isUndef(),llvm::RISCVII::MASK_AGNOSTIC,llvm::Offset,llvm::RISCVII::TAIL_AGNOSTIC, andllvm::RISCVISD::VSLIDEDOWN_VL.
Referenced bylowerBUILD_VECTOR(),lowerVECTOR_SHUFFLE(),lowerVECTOR_SHUFFLEAsVSlidedown(), andllvm::RISCVTargetLowering::ReplaceNodeResults().
| static |
Definition at line3354 of fileRISCVISelLowering.cpp.
ReferencesDL,llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getTargetConstant(),llvm::RISCVSubtarget::getXLenVT(),llvm::SDValue::isUndef(),llvm::RISCVII::MASK_AGNOSTIC,llvm::Offset,llvm::RISCVII::TAIL_AGNOSTIC, andllvm::RISCVISD::VSLIDEUP_VL.
Referenced bylowerVECTOR_SHUFFLE(), andlowerVECTOR_SHUFFLEAsVSlideup().
| static |
Definition at line4924 of fileRISCVISelLowering.cpp.
Referencesllvm::RISCVISD::ADD_VL,assert(),llvm::MVT::changeTypeToInteger(),convertFromScalableVector(),convertToScalableVector(),DL,llvm::SelectionDAG::getAllOnesConstant(),llvm::SelectionDAG::getBitcast(),llvm::SelectionDAG::getConstant(),getContainerForFixedLengthVector(),getDefaultVLOps(),llvm::RISCVSubtarget::getELen(),llvm::MVT::getIntegerVT(),llvm::SelectionDAG::getNode(),llvm::MVT::getScalarSizeInBits(),llvm::SDValue::getSimpleValueType(),llvm::SelectionDAG::getSplatVector(),llvm::SelectionDAG::getUNDEF(),llvm::MVT::getVectorElementCount(),llvm::MVT::getVectorElementType(),llvm::MVT::getVectorVT(),getWideningSpread(),llvm::RISCVSubtarget::getXLenVT(),llvm::MVT::isFixedLengthVector(),llvm::SDValue::isUndef(),llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::multiplyCoefficientBy(),llvm::RISCVISD::VWADDU_VL,llvm::RISCVISD::VWADDU_W_VL,llvm::RISCVISD::VWMULU_VL, andllvm::RISCVISD::VWSLL_VL.
Referenced bylowerVECTOR_SHUFFLE().
| static |
Definition at line4899 of fileRISCVISelLowering.cpp.
Referencesllvm::MVT::changeTypeToInteger(),DL,llvm::SelectionDAG::getBitcast(),llvm::SelectionDAG::getConstant(),llvm::MVT::getIntegerVT(),llvm::SelectionDAG::getNode(),llvm::MVT::getScalarSizeInBits(),llvm::MVT::getVectorElementCount(),llvm::MVT::getVectorElementType(),llvm::MVT::getVectorVT(),llvm::ISD::SHL, andllvm::ISD::ZERO_EXTEND.
Referenced bygetWideningInterleave(), andlowerVECTOR_SHUFFLE().
Return true if a RISC-V target specified op has a mask operand.
Definition at line6527 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::RISCVISD::FIRST_NUMBER,llvm::RISCVISD::FIRST_STRICTFP_OPCODE,llvm::RISCVISD::FIRST_VL_VECTOR_OP,llvm::RISCVISD::LAST_STRICTFP_OPCODE,llvm::RISCVISD::LAST_VL_VECTOR_OP,llvm::RISCVISD::SETCC_VL,llvm::RISCVISD::STRICT_FADD_VL,llvm::RISCVISD::STRICT_VFROUND_NOEXCEPT_VL,llvm::RISCVISD::TRUNCATE_VECTOR_VL,llvm::RISCVISD::VFIRST_VL, andllvm::RISCVISD::VRGATHER_VX_VL.
Return true if a RISC-V target specified op has a passthru operand.
Definition at line6503 of fileRISCVISelLowering.cpp.
Referencesllvm::RISCVISD::ADD_VL,assert(),llvm::RISCVISD::FCOPYSIGN_VL,llvm::RISCVISD::FIRST_NUMBER,llvm::RISCVISD::FIRST_STRICTFP_OPCODE,llvm::RISCVISD::FIRST_VL_VECTOR_OP,llvm::RISCVISD::LAST_STRICTFP_OPCODE,llvm::RISCVISD::LAST_VL_VECTOR_OP,llvm::RISCVISD::SETCC_VL,llvm::RISCVISD::STRICT_FADD_VL,llvm::RISCVISD::STRICT_FDIV_VL,llvm::RISCVISD::VFMAX_VL,llvm::RISCVISD::VFWSUB_W_VL,llvm::RISCVISD::VMERGE_VL, andllvm::RISCVISD::VWMUL_VL.
Definition at line5248 of fileRISCVISelLowering.cpp.
Referencesllvm::Last.
Referenced bylowerVECTOR_SHUFFLE().
| static |
Match shuffles that concatenate two vectors, rotate the concatenation, and then extract the original number of elements from the rotated result.
This is equivalent to vector.splice or X86's PALIGNR instruction. The returned rotation amount is for a rotate right, where elements move from higher elements to lower elements.LoSrc indicates the first source vector of the rotate or -1 for undef.HiSrc indicates the second vector of the rotate or -1 for undef. At least one ofLoSrc andHiSrc will be 0 or 1 if a rotation is found.
NOTE: We talk about rotate to the right which matches how bit shift and rotate instructions are described where LSBs are on the right, but LLVM IR and the table below write vectors with the lowest elements on the left.
Definition at line4576 of fileRISCVISelLowering.cpp.
Referenced byllvm::RISCVTargetLowering::isShuffleMaskLegal(), andlowerVECTOR_SHUFFLE().
| static |
Is this shuffle interleaving contiguous elements from one vector into the even elements and contiguous elements from another vector into the odd elements.
EvenSrc will contain the element that should be in the first even element.OddSrc will contain the element that should be in the first odd element. These can be the first element in a source or the element half way through the source.
Definition at line4532 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::RISCVSubtarget::getELen(),llvm::MVT::getScalarSizeInBits(),llvm::MVT::getVectorNumElements(),llvm::ShuffleVectorInst::isInterleaveMask(), andSize.
Referenced byllvm::RISCVTargetLowering::isShuffleMaskLegal(), andlowerVECTOR_SHUFFLE().
| static |
Definition at line5069 of fileRISCVISelLowering.cpp.
ReferencesDL,llvm::MVT::getIntegerVT(),llvm::ShuffleVectorSDNode::getMask(),llvm::EVT::getScalarSizeInBits(),llvm::RISCVSubtarget::getTargetLowering(),llvm::SDNode::getValueType(),llvm::EVT::getVectorNumElements(),llvm::MVT::getVectorVT(),llvm::ShuffleVectorInst::isBitRotateMask(), andllvm::TargetLoweringBase::isTypeLegal().
Referenced bylowerShuffleViaVRegSplitting(), andlowerVECTOR_SHUFFLEAsRotate().
Definition at line10308 of fileRISCVISelLowering.cpp.
Referenced bycombineBinOpToReduce(), andlowerReductionSeq().
| static |
Definition at line6545 of fileRISCVISelLowering.cpp.
Referencesllvm::RISCVSubtarget::hasVInstructionsF16(), andllvm::RISCVSubtarget::hasVInstructionsF16Minimal().
Referenced byllvm::RISCVTargetLowering::LowerOperation().
| static |
| static |
Definition at line3412 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::ISD::BUILD_VECTOR,llvm::enumerate(),getExactInteger(),llvm::DWARFExpression::Operation::getNumOperands(),llvm::APInt::getSExtValue(),Idx,isConstant(),llvm::APInt::sdiv(), andllvm::APInt::srem().
Referenced bylowerBuildVectorOfConstants(), andllvm::RISCVTargetLowering::PerformDAGCombine().
Definition at line4870 of fileRISCVISelLowering.cpp.
Referenced byllvm::RISCVTargetLowering::lowerInterleavedStore(), andlowerVECTOR_SHUFFLE().
| inlinestatic |
| static |
Definition at line17336 of fileRISCVISelLowering.cpp.
Referencesllvm::EVT::bitsLT(),llvm::EVT::changeVectorElementType(),llvm::TargetLowering::DAGCombinerInfo::DAG,DL,llvm::SelectionDAG::getMachineFunction(),llvm::SelectionDAG::getNode(),llvm::MachineFunction::getSubtarget(),llvm::EVT::getVectorElementType(),llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalize(),llvm::ISD::SIGN_EXTEND, andllvm::ISD::UNSIGNED_SCALED.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line19623 of fileRISCVISelLowering.cpp.
Referencesassert(), andllvm::Masked.
Referenced byemitVFROUND_NOEXCEPT_MASK().
| static |
Definition at line6058 of fileRISCVISelLowering.cpp.
Referencesllvm::SelectionDAG::getNode(),llvm::ISD::MEMBARRIER,llvm::SequentiallyConsistent,llvm::SyncScope::SingleThread, andllvm::SyncScope::System.
| static |
Definition at line5017 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::ISD::BITREVERSE,DL,llvm::ISD::EXTRACT_SUBVECTOR,llvm::SelectionDAG::getBitcast(),llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getContext(),llvm::EVT::getIntegerVT(),llvm::ShuffleVectorSDNode::getMask(),llvm::SelectionDAG::getNode(),llvm::SDNode::getOperand(),llvm::EVT::getScalarSizeInBits(),llvm::SDNode::getSimpleValueType(),llvm::RISCVSubtarget::getTargetLowering(),llvm::SelectionDAG::getUNDEF(),llvm::MVT::getVectorElementType(),llvm::SelectionDAG::getVectorIdxConstant(),llvm::MVT::getVectorNumElements(),llvm::EVT::getVectorVT(),llvm::ISD::INSERT_SUBVECTOR,llvm::TargetLoweringBase::isOperationLegalOrCustom(),llvm::ShuffleVectorInst::isReverseMask(),llvm::TargetLoweringBase::isTypeLegal(),llvm::SDValue::isUndef(),llvm::PowerOf2Ceil(),llvm::ArrayRef< T >::size(), andllvm::ISD::SRL.
Referenced bylowerVECTOR_SHUFFLE().
| static |
Definition at line4065 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::AND,llvm::ISD::ANY_EXTEND,assert(),llvm::MVT::bitsLE(),llvm::ISD::BUILD_VECTOR,llvm::CallingConv::C,llvm::MVT::changeVectorElementType(),convertFromScalableVector(),convertToScalableVector(),llvm::count_if(),DL,llvm::RISCVISD::FMV_X_ANYEXTH,llvm::SelectionDAG::getBitcast(),llvm::SelectionDAG::getBuildVector(),llvm::SelectionDAG::getConstant(),getContainerForFixedLengthVector(),getDefaultVLOps(),llvm::MVT::getFixedSizeInBits(),llvm::RISCVSubtarget::getFLen(),llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::getKnownMinValue(),llvm::RISCVTargetLowering::getLMUL(),getLMUL1VT(),llvm::SelectionDAG::getNode(),llvm::DWARFExpression::Operation::getNumOperands(),llvm::RISCVSubtarget::getRealVLen(),llvm::SelectionDAG::getSetCC(),llvm::MVT::getSizeInBits(),llvm::SelectionDAG::getSplatBuildVector(),llvm::getSplatValue(),llvm::SelectionDAG::getSplatVector(),llvm::SelectionDAG::getUNDEF(),llvm::MVT::getVectorElementType(),llvm::SelectionDAG::getVectorIdxConstant(),llvm::MVT::getVectorMinNumElements(),llvm::MVT::getVectorNumElements(),llvm::MVT::getVectorVT(),getVSlidedown(),llvm::RISCVSubtarget::getXLenVT(),I,llvm::ISD::INSERT_SUBVECTOR,llvm::ISD::isBuildVectorOfConstantFPSDNodes(),llvm::ISD::isBuildVectorOfConstantSDNodes(),llvm::MVT::isFixedLengthVector(),llvm::MVT::isFloatingPoint(),llvm::RISCVII::LMUL_2,llvm::RISCVII::LMUL_4,llvm::RISCVII::LMUL_8,lowerBuildVectorOfConstants(),lowerBuildVectorViaDominantValues(),lowerBuildVectorViaPacking(),llvm::RISCVII::MASK_AGNOSTIC,matchSplatAsGather(),llvm::Offset,llvm::SmallVectorTemplateBase< T, bool >::push_back(),llvm::SmallVectorImpl< T >::reserve(),llvm::ISD::SETNE,llvm::SmallVectorBase< Size_T >::size(),llvm::ArrayRef< T >::slice(),llvm::Splat,llvm::RISCVII::TAIL_AGNOSTIC,llvm::RISCVISD::VFMV_V_F_VL,llvm::RISCVISD::VFSLIDE1DOWN_VL,llvm::RISCVISD::VMV_V_X_VL,llvm::ISD::VSELECT, andllvm::RISCVISD::VSLIDE1DOWN_VL.
Referenced byllvm::RISCVTargetLowering::LowerOperation().
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Definition at line3687 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ADD,llvm::ISD::ANY_EXTEND,assert(),llvm::MVT::bitsLE(),llvm::MVT::changeVectorElementType(),llvm::MVT::changeVectorElementTypeToInteger(),llvm::SelectionDAG::ComputeMaxSignificantBits(),convertFromScalableVector(),convertToScalableVector(),llvm::divideCeil(),DL,llvm::enumerate(),llvm::ISD::EXTRACT_SUBVECTOR,llvm::SelectionDAG::getBitcast(),llvm::SelectionDAG::getBuildVector(),llvm::SelectionDAG::getConstant(),getContainerForFixedLengthVector(),getDefaultVLOps(),llvm::RISCVSubtarget::getELen(),llvm::MVT::getIntegerVT(),llvm::SelectionDAG::getNode(),llvm::DWARFExpression::Operation::getNumOperands(),llvm::RISCVSubtarget::getRealMinVLen(),llvm::MVT::getScalarSizeInBits(),llvm::SelectionDAG::getSignedConstant(),llvm::MVT::getSizeInBits(),llvm::getSplatValue(),llvm::SelectionDAG::getUNDEF(),llvm::MVT::getVectorElementType(),llvm::SelectionDAG::getVectorIdxConstant(),llvm::MVT::getVectorNumElements(),llvm::MVT::getVectorVT(),llvm::RISCVSubtarget::getXLen(),llvm::RISCVSubtarget::getXLenVT(),I,llvm::ISD::INSERT_VECTOR_ELT,INT64_MIN,llvm::RISCVSubtarget::is64Bit(),llvm::ISD::isBuildVectorAllOnes(),llvm::ISD::isBuildVectorAllZeros(),llvm::ISD::isBuildVectorOfConstantSDNodes(),llvm::MVT::isFixedLengthVector(),llvm::MVT::isFloatingPoint(),llvm::MVT::isInteger(),llvm::isPowerOf2_32(),llvm::isPowerOf2_64(),isSimpleVIDSequence(),llvm::Log2_64(),lowerBuildVectorViaDominantValues(),llvm::ISD::MUL,llvm::ISD::SHL,llvm::SelectionDAG::shouldOptForSize(),llvm::ISD::SINT_TO_FP,llvm::Splat,llvm::ISD::SRL,llvm::ISD::SUB,llvm::RISCVISD::VFMV_V_F_VL,llvm::RISCVISD::VID_VL,llvm::RISCVISD::VMCLR_VL,llvm::RISCVISD::VMSET_VL,llvm::RISCVISD::VMV_V_X_VL, andllvm::RISCVISD::VSEXT_VL.
Referenced bylowerBUILD_VECTOR().
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Try and optimize BUILD_VECTORs with "dominant values" - these are values which constitute a large proportion of the elements.
In such cases we can splat a vector with the dominant element and make up the shortfall with INSERT_VECTOR_ELTs. Returns SDValue if not profitable. Note that this includes vectors of 2 elements by association. The upper-most element is the "dominant" one, allowing us to use a splat to "insert" the upper element, and an insert of the lower element at position 0, which improves codegen.
Definition at line3581 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ANY_EXTEND,assert(),llvm::MVT::changeVectorElementType(),convertFromScalableVector(),convertToScalableVector(),llvm::count_if(),DL,llvm::enumerate(),llvm::SelectionDAG::getBuildVector(),getContainerForFixedLengthVector(),getDefaultVLOps(),llvm::SelectionDAG::getNode(),llvm::DWARFExpression::Operation::getNumOperands(),llvm::SelectionDAG::getSplatBuildVector(),llvm::SelectionDAG::getUNDEF(),llvm::SelectionDAG::getVectorIdxConstant(),llvm::RISCVSubtarget::getXLenVT(),llvm::ISD::INSERT_VECTOR_ELT,llvm::ISD::isBuildVectorOfConstantSDNodes(),llvm::MVT::isFixedLengthVector(),llvm::MVT::isFloatingPoint(),llvm::Log2_32(),llvm::SelectionDAG::shouldOptForSize(),llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::size(),llvm::transform(),llvm::RISCVISD::VFSLIDE1DOWN_VL,llvm::ISD::VSELECT, andllvm::RISCVISD::VSLIDE1DOWN_VL.
Referenced bylowerBUILD_VECTOR(), andlowerBuildVectorOfConstants().
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Double the element size of the build vector to reduce the number of vslide1down in the build vector chain.
In the worst case, this trades three scalar operations for 1 vector operation. Scalar operations are generally lower latency, and for out-of-order cores we also benefit from additional parallelism.
Definition at line4008 of fileRISCVISelLowering.cpp.
ReferencesA,llvm::ISD::AND,assert(),B,llvm::ISD::BITCAST,llvm::SDNodeFlags::Disjoint,DL,llvm::SelectionDAG::getBuildVector(),llvm::SelectionDAG::getConstant(),llvm::RISCVSubtarget::getELen(),llvm::MVT::getIntegerVT(),llvm::APInt::getLowBitsSet(),llvm::SelectionDAG::getMachineNode(),llvm::SelectionDAG::getNode(),getPACKOpcode(),llvm::MVT::getSizeInBits(),llvm::MVT::getVectorElementType(),llvm::MVT::getVectorNumElements(),llvm::MVT::getVectorVT(),llvm::RISCVSubtarget::getXLen(),llvm::RISCVSubtarget::getXLenVT(),llvm::MVT::isFixedLengthVector(),llvm::MVT::isInteger(),llvm::ISD::OR,llvm::SmallVectorTemplateBase< T, bool >::push_back(),llvm::SmallVectorImpl< T >::reserve(),llvm::ISD::SHL, andllvm::SmallVectorBase< Size_T >::size().
Referenced bylowerBUILD_VECTOR().
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Definition at line5988 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::SmallVectorBase< Size_T >::empty(),llvm::RISCVMatInt::generateInstSeq(),llvm::RISCVMatInt::generateTwoRegInstSeq(),llvm::RISCVSubtarget::getMaxBuildIntsCost(),llvm::SelectionDAG::shouldOptForSize(),llvm::SmallVectorBase< Size_T >::size(), andllvm::RISCVSubtarget::useConstantPoolForLargeInts().
Referenced byllvm::RISCVTargetLowering::LowerOperation().
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Definition at line9646 of fileRISCVISelLowering.cpp.
ReferencesconvertToScalableVector(),DL,llvm::SelectionDAG::getConstant(),getContainerForFixedLengthVector(),getDefaultVLOps(),llvm::SelectionDAG::getElementCount(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getSelect(),llvm::SelectionDAG::getSetCC(),llvm::SDValue::getSimpleValueType(),llvm::MVT::getVectorElementCount(),llvm::RISCVSubtarget::getXLenVT(),llvm::MVT::isFixedLengthVector(),llvm::isOneConstant(),N,llvm::ISD::SETLT, andllvm::RISCVISD::VFIRST_VL.
Referenced byllvm::RISCVTargetLowering::ReplaceNodeResults().
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Given a shuffle where the indices are disjoint between the two sources, e.g.:
t2:v4i8 = vector_shuffle t0:v4i8, t1:v4i8, <2, 7, 1, 4>
Merge the two sources into one and do a single source shuffle:
t2:v4i8 = vselect t1:v4i8, t0:v4i8, <0, 1, 0, 1> t3:v4i8 = vector_shuffle t2:v4i8, undef, <2, 3, 1, 0>
A vselect will either be merged into a masked instruction or be lowered as a vmerge.vvm, which is cheaper than a vrgather.vv.
Definition at line5279 of fileRISCVISelLowering.cpp.
Referencesllvm::MVT::changeVectorElementType(),DL,llvm::SelectionDAG::getBuildVector(),llvm::SelectionDAG::getConstant(),llvm::ShuffleVectorSDNode::getMask(),llvm::SelectionDAG::getNode(),llvm::SDNode::getOperand(),llvm::SDNode::getSimpleValueType(),llvm::SelectionDAG::getUNDEF(),llvm::SelectionDAG::getVectorShuffle(),llvm::RISCVSubtarget::getXLenVT(),I,Idx,llvm::SmallVectorTemplateBase< T, bool >::push_back(),Select, andllvm::ISD::VSELECT.
Referenced bylowerVECTOR_SHUFFLE().
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Definition at line6273 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::AND,assert(),DL,llvm::ISD::FABS,llvm::RISCVISD::FMV_H_X,llvm::RISCVISD::FMV_X_ANYEXTH,llvm::ISD::FNEG,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::APInt::getSignedMaxValue(),llvm::APInt::getSignMask(),llvm::RISCVSubtarget::getXLen(),llvm::RISCVSubtarget::getXLenVT(), andllvm::ISD::XOR.
Referenced byllvm::RISCVTargetLowering::LowerOperation().
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Definition at line6296 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::AND,assert(),llvm::ISD::BITCAST,llvm::SDNodeFlags::Disjoint,DL,llvm::ISD::FCOPYSIGN,llvm::RISCVISD::FMV_H_X,llvm::RISCVISD::FMV_X_ANYEXTH,llvm::RISCVISD::FMV_X_ANYEXTW_RV64,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::APInt::getSignedMaxValue(),llvm::APInt::getSignMask(),llvm::SDValue::getValueSizeInBits(),llvm::RISCVSubtarget::getXLen(),llvm::RISCVSubtarget::getXLenVT(),llvm_unreachable,llvm::ISD::OR,llvm::APInt::sext(),llvm::ISD::SHL,llvm::RISCVISD::SplitF64, andllvm::ISD::SRL.
Referenced byllvm::RISCVTargetLowering::LowerOperation().
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Definition at line6189 of fileRISCVISelLowering.cpp.
ReferencesconvertFromScalableVector(),convertToScalableVector(),DL,llvm::RISCVISD::FMAX,llvm::ISD::FMAXIMUM,llvm::RISCVISD::FMIN,getContainerForFixedLengthVector(),getDefaultVLOps(),getMaskTypeFor(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getSelect(),llvm::SelectionDAG::getSetCC(),llvm::SelectionDAG::getUNDEF(),llvm::RISCVSubtarget::getXLenVT(),llvm::MVT::isFixedLengthVector(),llvm::SelectionDAG::isKnownNeverNaN(),llvm::MVT::isVector(),llvm::RISCVISD::SETCC_VL,llvm::ISD::SETOEQ,llvm::RISCVISD::VFMAX_VL,llvm::RISCVISD::VFMIN_VL,llvm::RISCVISD::VMERGE_VL,X, andY.
Referenced byllvm::RISCVTargetLowering::LowerOperation().
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Definition at line3019 of fileRISCVISelLowering.cpp.
ReferencesDL,llvm::ISD::FP_EXTEND,llvm::SelectionDAG::getNode(),llvm::SDValue::getValueType(),llvm::RISCVSubtarget::hasStdExtZfhOrZhinx(), andllvm::ISD::STRICT_FP_EXTEND.
Referenced byllvm::RISCVTargetLowering::LowerOperation().
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Definition at line2906 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::MVT::changeVectorElementType(),convertFromScalableVector(),convertToScalableVector(),DL,llvm::RISCVISD::FCVT_W_RV64,llvm::RISCVISD::FCVT_WU_RV64,llvm::RISCVISD::FCVT_X,llvm::RISCVISD::FCVT_XU,llvm::ISD::FP_EXTEND,llvm::RISCVISD::FP_EXTEND_VL,llvm::ISD::FP_TO_SINT_SAT,llvm::SelectionDAG::getConstant(),getContainerForFixedLengthVector(),getDefaultVLOps(),llvm::MVT::getIntegerVT(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getSelectCC(),llvm::MVT::getSizeInBits(),llvm::SelectionDAG::getTargetConstant(),llvm::SelectionDAG::getUNDEF(),llvm::MVT::getVectorElementCount(),llvm::MVT::getVectorElementType(),llvm::RISCVSubtarget::getXLenVT(),llvm::SelectionDAG::getZeroExtendInReg(),llvm::RISCVSubtarget::hasStdExtZfhOrZhinx(),llvm::MVT::isFixedLengthVector(),llvm::MVT::isVector(),llvm::RISCVFPRndMode::RTZ,llvm::RISCVISD::SETCC_VL,llvm::ISD::SETUO,llvm::RISCVISD::TRUNCATE_VECTOR_VL_SSAT,llvm::RISCVISD::TRUNCATE_VECTOR_VL_USAT,llvm::RISCVISD::VFCVT_RTZ_X_F_VL,llvm::RISCVISD::VFCVT_RTZ_XU_F_VL,llvm::RISCVISD::VMERGE_VL, andllvm::RISCVISD::VMV_V_X_VL.
Referenced byllvm::RISCVTargetLowering::LowerOperation().
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Definition at line3287 of fileRISCVISelLowering.cpp.
Referencesllvm::APFloat::convertFromAPInt(),DL,llvm::RISCVISD::FROUND,llvm::SelectionDAG::getConstantFP(),llvm::MVT::getFltSemantics(),llvm::SelectionDAG::getNode(),llvm::APInt::getOneBitSet(),llvm::SelectionDAG::getTargetConstant(),llvm::RISCVSubtarget::getXLenVT(),llvm::MVT::isVector(),lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND(),matchRoundingOp(),llvm::APFloatBase::rmNearestTiesToEven,llvm::APFloatBase::semanticsPrecision(), andllvm::SelectionDAG::shouldOptForSize().
Referenced byllvm::RISCVTargetLowering::LowerOperation().
| static |
Definition at line9611 of fileRISCVISelLowering.cpp.
Referencesassert(),DL,llvm::RISCVVType::encodeLMUL(),llvm::RISCVVType::encodeSEW(),llvm::RISCVSubtarget::getELen(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getTargetConstant(),llvm::RISCVSubtarget::getXLenVT(),llvm::ISD::INTRINSIC_WO_CHAIN,llvm::isPowerOf2_32(),N,llvm::RISCV::RVVBitsPerBlock,llvm::ISD::TRUNCATE, andllvm::ISD::ZERO_EXTEND.
Referenced byllvm::RISCVTargetLowering::ReplaceNodeResults().
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Definition at line2879 of fileRISCVISelLowering.cpp.
ReferencesDL,llvm::ISD::FP_ROUND,llvm::SelectionDAG::getIntPtrConstant(),llvm::SelectionDAG::getNode(),llvm::SDValue::getValue(),llvm::RISCVSubtarget::hasStdExtZfhOrZhinx(), andllvm::ISD::STRICT_FP_ROUND.
Referenced byllvm::RISCVTargetLowering::LowerOperation().
| static |
Helper to lower a reduction sequence of the form: scalar = reduce_op vec, scalar_start.
Definition at line10317 of fileRISCVISelLowering.cpp.
Referencesllvm::MVT::bitsLE(),DL,llvm::ISD::EXTRACT_VECTOR_ELT,llvm::SelectionDAG::getConstant(),getLMUL1VT(),llvm::SelectionDAG::getNode(),llvm::SDValue::getSimpleValueType(),llvm::SelectionDAG::getTargetConstant(),llvm::SelectionDAG::getUNDEF(),llvm::SelectionDAG::getVectorIdxConstant(),llvm::RISCVSubtarget::getXLenVT(),llvm::ISD::INSERT_SUBVECTOR,isNonZeroAVL(),lowerScalarInsert(),Reduction, andllvm::RISCVII::TAIL_AGNOSTIC.
| static |
Definition at line4442 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ANY_EXTEND,assert(),llvm::MVT::bitsLE(),convertToScalableVector(),DL,llvm::ISD::EXTRACT_SUBVECTOR,llvm::ISD::EXTRACT_VECTOR_ELT,llvm::SelectionDAG::getConstant(),getContainerForFixedLengthVector(),llvm::SelectionDAG::getNode(),llvm::SDValue::getSimpleValueType(),llvm::SelectionDAG::getUNDEF(),llvm::SDValue::getValueType(),llvm::EVT::getVectorElementType(),llvm::MVT::getVectorElementType(),llvm::SelectionDAG::getVectorIdxConstant(),llvm::RISCVSubtarget::getXLenVT(),llvm::ISD::INSERT_SUBVECTOR,llvm::MVT::isFixedLengthVector(),llvm::MVT::isFloatingPoint(),llvm::isNullConstant(),llvm::MVT::isScalableVector(),lowerScalarSplat(),llvm::ISD::SIGN_EXTEND,llvm::RISCVISD::VFMV_S_F_VL, andllvm::RISCVISD::VMV_S_X_VL.
Referenced bycombineBinOpToReduce(), andlowerReductionSeq().
| static |
Definition at line4388 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ANY_EXTEND,assert(),llvm::ISD::BITCAST,llvm::MVT::changeVectorElementType(),DL,llvm::RISCVISD::FMV_X_ANYEXTH,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getUNDEF(),llvm::MVT::getVectorElementType(),llvm::RISCVSubtarget::getXLenVT(),llvm::MVT::isFloatingPoint(),llvm::isNullConstant(),llvm::isOneConstant(),llvm::SDValue::isUndef(),lowerScalarSplat(),llvm::ISD::SIGN_EXTEND,llvm::Splat,splatSplitI64WithVL(),llvm::RISCVISD::VFMV_V_F_VL,llvm::RISCVISD::VMV_S_X_VL, andllvm::RISCVISD::VMV_V_X_VL.
Referenced bylowerScalarInsert(), andlowerScalarSplat().
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Definition at line5120 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::ArrayRef< T >::begin(),convertToScalableVector(),llvm::Data,DL,llvm::ArrayRef< T >::end(),getContainerForFixedLengthVector(),llvm::MVT::getFixedSizeInBits(),llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::getFixedValue(),getLMUL1VT(),llvm::ShuffleVectorSDNode::getMask(),llvm::SDNode::getOperand(),llvm::RISCVSubtarget::getRealVLen(),llvm::SDNode::getSimpleValueType(),llvm::MVT::getSizeInBits(),llvm::MVT::getVectorElementType(),llvm::EVT::getVectorMinNumElements(),llvm::MVT::getVectorMinNumElements(),llvm::MVT::getVectorVT(),isLegalBitRotate(),N,Operands, andllvm::processShuffleMasks().
Referenced bylowerVECTOR_SHUFFLE().
| static |
Definition at line5361 of fileRISCVISelLowering.cpp.
Referencesllvm::any_of(),assert(),llvm::MVT::bitsGT(),llvm::MVT::changeTypeToInteger(),llvm::MVT::changeVectorElementType(),llvm::ISD::CONCAT_VECTORS,convertFromScalableVector(),convertToScalableVector(),llvm::count_if(),llvm::SmallVectorTemplateCommon< T, typename >::data(),DL,llvm::ISD::EXTLOAD,llvm::ISD::EXTRACT_SUBVECTOR,llvm::SelectionDAG::getBitcast(),llvm::SelectionDAG::getBuildVector(),llvm::SelectionDAG::getConstant(),getContainerForFixedLengthVector(),getDefaultVLOps(),getDeinterleaveShiftAndTrunc(),llvm::RISCVSubtarget::getELen(),llvm::SelectionDAG::getExtLoad(),llvm::TypeSize::getFixed(),llvm::SDNode::getFlags(),llvm::MVT::getHalfNumVectorElementsVT(),llvm::SelectionDAG::getLoad(),llvm::SelectionDAG::getMachineFunction(),llvm::MachineFunction::getMachineMemOperand(),llvm::ShuffleVectorSDNode::getMask(),llvm::SelectionDAG::getMemBasePlusOffset(),llvm::SelectionDAG::getMemIntrinsicNode(),llvm::SelectionDAG::getNode(),llvm::RISCVSubtarget::getRealMinVLen(),llvm::SelectionDAG::getRegister(),llvm::MVT::getScalarSizeInBits(),llvm::MVT::getScalarType(),llvm::SelectionDAG::getSetCC(),getSingleShuffleSrc(),llvm::MVT::getSizeInBits(),llvm::ShuffleVectorSDNode::getSplatIndex(),llvm::MVT::getStoreSize(),llvm::SelectionDAG::getTargetConstant(),llvm::SelectionDAG::getUNDEF(),llvm::MVT::getVectorElementCount(),llvm::MVT::getVectorElementType(),llvm::SelectionDAG::getVectorIdxConstant(),llvm::MVT::getVectorNumElements(),llvm::SelectionDAG::getVectorShuffle(),llvm::MVT::getVectorVT(),getVSlidedown(),getVSlideup(),llvm::SelectionDAG::getVTList(),getWideningInterleave(),getWideningSpread(),llvm::RISCVSubtarget::getXLenVT(),Idx,llvm::ISD::INTRINSIC_W_CHAIN,isCompressMask(),llvm::ShuffleVectorInst::isDeInterleaveMaskOfFactor(),isElementRotate(),llvm::MVT::isFloatingPoint(),llvm::ShuffleVectorInst::isIdentityMask(),llvm::MVT::isInteger(),isInterleaveShuffle(),llvm::ISD::isNormalLoad(),llvm::ShuffleVectorInst::isReverseMask(),llvm::ShuffleVectorSDNode::isSplat(),llvm::ShuffleVectorSDNode::isSplatMask(),llvm::SelectionDAG::isSplatValue(),isSpreadMask(),llvm::SDValue::isUndef(),lowerBitreverseShuffle(),lowerDisjointIndicesShuffle(),lowerShuffleViaVRegSplitting(),lowerVECTOR_SHUFFLEAsRotate(),lowerVECTOR_SHUFFLEAsVSlide1(),lowerVECTOR_SHUFFLEAsVSlidedown(),lowerVECTOR_SHUFFLEAsVSlideup(),llvm::SelectionDAG::makeEquivalentMemoryOrdering(),llvm::Offset,llvm::SmallVectorTemplateBase< T, bool >::push_back(),llvm::ISD::SETNE,llvm::SmallVectorBase< Size_T >::size(),Size,llvm::Splat,llvm::RISCVII::TAIL_AGNOSTIC,tryWidenMaskForShuffle(),llvm::ISD::VECTOR_COMPRESS,llvm::ISD::VECTOR_REVERSE,llvm::RISCVISD::VFMV_V_F_VL,llvm::RISCVISD::VMV_V_X_VL,llvm::RISCVISD::VRGATHER_VV_VL,llvm::RISCVISD::VRGATHER_VX_VL,llvm::RISCVISD::VRGATHEREI16_VV_VL,llvm::ISD::VSELECT, andllvm::ISD::ZERO_EXTEND.
Referenced byllvm::RISCVTargetLowering::LowerOperation(), andllvm::X86TargetLowering::LowerOperation().
| static |
Definition at line5092 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::BSWAP,DL,llvm::SelectionDAG::getBitcast(),llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::SDNode::getOperand(),llvm::MVT::getScalarType(),llvm::SDNode::getValueType(),isLegalBitRotate(), andllvm::ISD::ROTL.
Referenced bylowerVECTOR_SHUFFLE().
| static |
Match v(f)slide1up/down idioms.
These operations involve sliding N-1 elements to make room for an inserted scalar at one end.
Definition at line4796 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ANY_EXTEND,llvm::sampleprof::Base,llvm::MVT::changeVectorElementTypeToInteger(),convertFromScalableVector(),convertToScalableVector(),DL,llvm::RISCVISD::FMV_X_ANYEXTH,llvm::SelectionDAG::getBitcast(),getContainerForFixedLengthVector(),getDefaultVLOps(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getUNDEF(),llvm::MVT::getVectorElementType(),llvm::MVT::getVectorNumElements(),llvm::RISCVSubtarget::getXLenVT(),llvm::RISCVSubtarget::hasVInstructionsF16(),llvm::MVT::isFloatingPoint(),llvm::Offset,llvm::Splat,std::swap(),llvm::RISCVISD::VFSLIDE1DOWN_VL,llvm::RISCVISD::VFSLIDE1UP_VL,llvm::RISCVISD::VSLIDE1DOWN_VL, andllvm::RISCVISD::VSLIDE1UP_VL.
Referenced bylowerVECTOR_SHUFFLE().
| static |
Definition at line4675 of fileRISCVISelLowering.cpp.
ReferencesconvertFromScalableVector(),convertToScalableVector(),DL,llvm::ISD::EXTRACT_SUBVECTOR,llvm::SelectionDAG::getConstant(),getContainerForFixedLengthVector(),getDefaultVLOps(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getUNDEF(),getVSlidedown(),llvm::RISCVSubtarget::getXLenVT(),llvm::Offset, andllvm::SmallVectorBase< Size_T >::size().
Referenced bylowerVECTOR_SHUFFLE().
| static |
Definition at line4752 of fileRISCVISelLowering.cpp.
ReferencesconvertFromScalableVector(),convertToScalableVector(),DL,llvm::SelectionDAG::getConstant(),getContainerForFixedLengthVector(),getDefaultVLOps(),llvm::SelectionDAG::getNode(),llvm::MVT::getVectorNumElements(),getVSlideup(),llvm::RISCVSubtarget::getXLenVT(),llvm::ShuffleVectorInst::isInsertSubvectorMask(),llvm::RISCVII::MASK_AGNOSTIC,llvm::RISCVII::TAIL_AGNOSTIC,llvm::RISCVII::TAIL_UNDISTURBED_MASK_UNDISTURBED, andllvm::RISCVISD::VMV_V_V_VL.
Referenced bylowerVECTOR_SHUFFLE().
| static |
Definition at line3079 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::MVT::changeVectorElementTypeToInteger(),llvm::APFloat::convertFromAPInt(),convertFromScalableVector(),convertToScalableVector(),DL,llvm::RISCVISD::FABS_VL,llvm::ISD::FCEIL,llvm::RISCVISD::FCOPYSIGN_VL,llvm::ISD::FFLOOR,llvm::ISD::FNEARBYINT,llvm::ISD::FRINT,llvm::ISD::FROUND,llvm::ISD::FROUNDEVEN,llvm::ISD::FTRUNC,llvm::SelectionDAG::getCondCode(),llvm::SelectionDAG::getConstantFP(),getContainerForFixedLengthVector(),getDefaultVLOps(),llvm::MVT::getFltSemantics(),llvm::SelectionDAG::getFreeze(),getMaskTypeFor(),llvm::SelectionDAG::getNode(),llvm::APInt::getOneBitSet(),llvm::SDValue::getOpcode(),llvm::SelectionDAG::getTargetConstant(),llvm::SelectionDAG::getUNDEF(),llvm::MVT::getVectorElementCount(),llvm::MVT::getVectorElementType(),llvm::MVT::getVectorVT(),llvm::RISCVSubtarget::getXLenVT(),llvm::RISCVFPRndMode::Invalid,llvm::MVT::isFixedLengthVector(),llvm::MVT::isVector(),llvm_unreachable,matchRoundingOp(),llvm::APFloatBase::rmNearestTiesToEven,llvm::APFloatBase::semanticsPrecision(),llvm::RISCVISD::SETCC_VL,llvm::ISD::SETOLT,llvm::RISCVISD::SINT_TO_FP_VL,llvm::RISCVISD::VFCVT_RM_X_F_VL,llvm::RISCVISD::VFCVT_RTZ_X_F_VL,llvm::RISCVISD::VFMV_V_F_VL, andllvm::RISCVISD::VFROUND_NOEXCEPT_VL.
Referenced bylowerFTRUNC_FCEIL_FFLOOR_FROUND(), andllvm::RISCVTargetLowering::LowerOperation().
| static |
Definition at line9430 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ANY_EXTEND,assert(),llvm::MVT::bitsLT(),llvm::SelectionDAG::ComputeNumSignBits(),llvm::RISCVTargetLowering::computeVLMAXBounds(),DL,llvm::RISCVVType::encodeSEW(),getAllOnesMask(),llvm::SDNode::getAsZExtVal(),llvm::SelectionDAG::getBitcast(),llvm::SelectionDAG::getConstant(),llvm::RISCVTargetLowering::getLMUL(),llvm::SelectionDAG::getNode(),llvm::DWARFExpression::Operation::getNumOperands(),llvm::SelectionDAG::getRegister(),llvm::MVT::getScalarSizeInBits(),llvm::SDValue::getSimpleValueType(),llvm::SelectionDAG::getTargetConstant(),llvm::SelectionDAG::getUNDEF(),llvm::SDValue::getValueType(),llvm::MVT::getVectorElementCount(),llvm::MVT::getVectorElementType(),llvm::MVT::getVectorVT(),getVLOperand(),llvm::RISCVSubtarget::getXLenVT(),llvm::RISCVSubtarget::hasVInstructions(),II,llvm::ISD::INTRINSIC_VOID,llvm::ISD::INTRINSIC_W_CHAIN,llvm::ISD::INTRINSIC_WO_CHAIN,llvm::MVT::isScalarInteger(),llvm::SDValue::isUndef(),Operands,llvm::ISD::SHL,llvm::ISD::SIGN_EXTEND,splatSplitI64WithVL(),llvm::SelectionDAG::SplitScalar(),llvm::RISCVII::TAIL_AGNOSTIC,llvm::ISD::TRUNCATE,llvm::RISCVISD::VMERGE_VL,llvm::RISCVISD::VSLIDE1DOWN_VL, andllvm::RISCVISD::VSLIDE1UP_VL.
| static |
Definition at line3186 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::MVT::changeVectorElementTypeToInteger(),llvm::APFloat::convertFromAPInt(),convertFromScalableVector(),convertToScalableVector(),DL,llvm::RISCVISD::FABS_VL,llvm::RISCVISD::FCOPYSIGN_VL,llvm::SelectionDAG::getCondCode(),llvm::SelectionDAG::getConstantFP(),getContainerForFixedLengthVector(),getDefaultVLOps(),llvm::MVT::getFltSemantics(),llvm::SelectionDAG::getFreeze(),llvm::SelectionDAG::getMergeValues(),llvm::SelectionDAG::getNode(),llvm::APInt::getOneBitSet(),llvm::SelectionDAG::getUNDEF(),llvm::SDValue::getValue(),llvm::MVT::getVectorElementType(),llvm::SelectionDAG::getVTList(),llvm::RISCVSubtarget::getXLenVT(),llvm::RISCVFPRndMode::Invalid,llvm::MVT::isFixedLengthVector(),llvm_unreachable,matchRoundingOp(),llvm::APFloatBase::rmNearestTiesToEven,llvm::APFloatBase::semanticsPrecision(),llvm::RISCVISD::SETCC_VL,llvm::ISD::SETOLT,llvm::RISCVISD::STRICT_FADD_VL,llvm::ISD::STRICT_FCEIL,llvm::ISD::STRICT_FFLOOR,llvm::ISD::STRICT_FNEARBYINT,llvm::ISD::STRICT_FROUND,llvm::ISD::STRICT_FROUNDEVEN,llvm::RISCVISD::STRICT_FSETCC_VL,llvm::ISD::STRICT_FTRUNC,llvm::RISCVISD::STRICT_SINT_TO_FP_VL,llvm::RISCVISD::STRICT_VFCVT_RM_X_F_VL,llvm::RISCVISD::STRICT_VFCVT_RTZ_X_F_VL,llvm::RISCVISD::STRICT_VFROUND_NOEXCEPT_VL, andllvm::RISCVISD::VFMV_V_F_VL.
Referenced byllvm::RISCVTargetLowering::LowerOperation().
| static |
Definition at line3315 of fileRISCVISelLowering.cpp.
Referencesassert(),convertFromScalableVector(),convertToScalableVector(),DL,llvm::RISCVFPRndMode::DYN,getContainerForFixedLengthVector(),getDefaultVLOps(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getTargetConstant(),llvm::RISCVSubtarget::getXLenVT(),llvm::MVT::isFixedLengthVector(),llvm::MVT::isVector(), andllvm::RISCVISD::VFCVT_RM_X_F_VL.
Referenced byllvm::RISCVTargetLowering::LowerOperation().
| static |
Match the index vector of a scatter or gather node as the shuffle mask which performs the rearrangement if possible.
Will only match if all lanes are touched, and thus replacing the scatter or gather with a unit strided access and shuffle is legal.
Definition at line17369 of fileRISCVISelLowering.cpp.
Referencesllvm::BitVector::all(),assert(),llvm::CallingConv::C,llvm::SmallVectorBase< Size_T >::empty(),llvm::EVT::getScalarStoreSize(),llvm::EVT::getVectorNumElements(),llvm::ISD::isBuildVectorOfConstantSDNodes(),llvm::ISD::isConstantSplatVectorAllOnes(),llvm::SmallVectorTemplateBase< T, bool >::push_back(), andllvm::BitVector::set().
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Match the index of a gather or scatter operation as an operation with twice the element width and half the number of elements.
This is generally profitable (if legal) because these operations are linear in VL, so even if we cause some extract VTYPE/VL toggles, we still come out ahead.
Definition at line17404 of fileRISCVISelLowering.cpp.
Referencesllvm::CallingConv::C,llvm::EVT::getScalarStoreSize(),llvm::EVT::getVectorNumElements(),llvm::ISD::isBuildVectorOfConstantSDNodes(),llvm::ISD::isConstantSplatVectorAllOnes(), andllvm::Last.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line3044 of fileRISCVISelLowering.cpp.
Referencesllvm::RISCVFPRndMode::DYN,llvm::ISD::FCEIL,llvm::ISD::FFLOOR,llvm::ISD::FRINT,llvm::ISD::FROUND,llvm::ISD::FROUNDEVEN,llvm::ISD::FTRUNC,llvm::RISCVFPRndMode::Invalid,llvm::RISCVFPRndMode::RDN,llvm::RISCVFPRndMode::RMM,llvm::RISCVFPRndMode::RNE,llvm::RISCVFPRndMode::RTZ,llvm::RISCVFPRndMode::RUP,llvm::ISD::STRICT_FCEIL,llvm::ISD::STRICT_FFLOOR,llvm::ISD::STRICT_FROUND,llvm::ISD::STRICT_FROUNDEVEN, andllvm::ISD::STRICT_FTRUNC.
Referenced bylowerFTRUNC_FCEIL_FFLOOR_FROUND(),lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND(),lowerVectorStrictFTRUNC_FCEIL_FFLOOR_FROUND(),performFP_TO_INT_SATCombine(), andperformFP_TO_INTCombine().
Definition at line16880 of fileRISCVISelLowering.cpp.
ReferencesA,llvm::ISD::ADD,B,llvm::ISD::SUB, andstd::swap().
Referenced byperformVECTOR_SHUFFLECombine(), andperformVSELECTCombine().
| static |
Definition at line8174 of fileRISCVISelLowering.cpp.
Referencesassert(),CC,llvm::SDNode::getOpcode(),llvm::SDValue::getOperand(),llvm::ISD::getSetCCInverse(),llvm::ISD::getSetCCSwappedOperands(),llvm::SDValue::getValueType(),LHS,RHS, andllvm::ISD::SETCC.
Referenced bycombineSelectToBinOp().
| static |
Definition at line3518 of fileRISCVISelLowering.cpp.
ReferencesconvertFromScalableVector(),convertToScalableVector(),DL,llvm::ISD::EXTRACT_SUBVECTOR,llvm::ISD::EXTRACT_VECTOR_ELT,getContainerForFixedLengthVector(),getDefaultVLOps(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::MVT::getSizeInBits(),llvm::SelectionDAG::getUNDEF(),llvm::MVT::getVectorElementType(),llvm::SelectionDAG::getVectorIdxConstant(),llvm::MVT::getVectorMinNumElements(),llvm::RISCVSubtarget::getXLenVT(),Idx,llvm::ISD::INSERT_SUBVECTOR,llvm::MVT::isFixedLengthVector(),llvm::details::FixedOrScalableQuantity< TypeSize, uint64_t >::isKnownLE(), andllvm::RISCVISD::VRGATHER_VX_VL.
Referenced bylowerBUILD_VECTOR(), andllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
According to the property that indexed load/store instructions zero-extend their indices, try to narrow the type of index operand.
Definition at line14832 of fileRISCVISelLowering.cpp.
Referencesllvm::EVT::bitsLT(),llvm::CallingConv::C,llvm::EVT::changeVectorElementType(),llvm::SelectionDAG::computeKnownBits(),llvm::KnownBits::countMaxActiveBits(),DL,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getContext(),llvm::EVT::getIntegerVT(),llvm::SDValue::getNode(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDNode::getOpcode(),llvm::SDValue::getOperand(),llvm::EVT::getRoundIntegerType(),llvm::EVT::getScalarSizeInBits(),llvm::SDValue::getValueType(),llvm::EVT::getVectorElementType(),llvm::APInt::getZExtValue(),llvm::SDNode::hasOneUse(),llvm::ISD::isBuildVectorOfConstantSDNodes(),llvm::ISD::isConstantSplatVector(),N,llvm::SDNode::ops(),llvm::PowerOf2Ceil(),llvm::ISD::SHL,llvm::ISD::TRUNCATE,llvm::RISCVISD::VZEXT_VL, andllvm::ISD::ZERO_EXTEND.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
Definition at line16379 of fileRISCVISelLowering.cpp.
Referencesllvm_unreachable,llvm::RISCVISD::STRICT_VFMADD_VL,llvm::RISCVISD::STRICT_VFMSUB_VL,llvm::RISCVISD::STRICT_VFNMADD_VL,llvm::RISCVISD::STRICT_VFNMSUB_VL,llvm::RISCVISD::VFMADD_VL,llvm::RISCVISD::VFMSUB_VL,llvm::RISCVISD::VFNMADD_VL, andllvm::RISCVISD::VFNMSUB_VL.
Referenced bycombineFMA(),combineFMADDSUB(),combineVFMADD_VLWithVFNEG_VL(), andllvm::X86TargetLowering::getNegatedExpression().
| static |
Definition at line14115 of fileRISCVISelLowering.cpp.
ReferencescombineAddOfBooleanXor(),combineBinOpOfExtractToReduceTree(),combineBinOpOfZExt(),combineBinOpToReduce(),combineSelectAndUseCommutative(),llvm::TargetLowering::DAGCombinerInfo::DAG,llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalize(),llvm::TargetLowering::DAGCombinerInfo::isCalledByLegalizer(),N,transformAddImmMulImm(), andtransformAddShlImm().
| static |
Definition at line14409 of fileRISCVISelLowering.cpp.
Referencesllvm::And,llvm::ISD::AND,llvm::ISD::ANY_EXTEND,combineBinOpOfExtractToReduceTree(),combineBinOpToReduce(),combineDeMorganOfBoolean(),combineSelectAndUseCommutative(),llvm::TargetLowering::DAGCombinerInfo::DAG,DL,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::SDValue::hasOneUse(),llvm::RISCVSubtarget::is64Bit(),llvm::TargetLowering::DAGCombinerInfo::isAfterLegalizeDAG(),llvm::isOneConstant(),N,llvm::ISD::SRL,llvm::ISD::TRUNCATE, andllvm::ISD::ZERO_EXTEND.
| static |
Definition at line16238 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::RISCVISD::BREV8,llvm::ISD::BSWAP,DL,llvm::SelectionDAG::getNode(),llvm::EVT::getSizeInBits(),llvm::RISCVSubtarget::getXLen(),llvm::EVT::isScalarInteger(), andN.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
If we have a build_vector where each lane is binop X, C, where C is a constant (but not necessarily the same constant on all lanes), form binop (build_vector x1, x2, ...), (build_vector c1, c2, c3, ..).
We assume that materializing a constant build vector will be no more expensive that performing O(n) binops.
Definition at line16950 of fileRISCVISelLowering.cpp.
Referencesassert(),DL,llvm::SelectionDAG::getBuildVector(),llvm::SelectionDAG::getNode(),llvm::EVT::getVectorElementType(),llvm::EVT::getVectorNumElements(),llvm::TargetLoweringBase::isBinOp(),llvm::TargetLoweringBase::isOperationLegalOrCustom(),llvm::SelectionDAG::isSafeToSpeculativelyExecute(),llvm::EVT::isScalableVector(),llvm::TargetLoweringBase::isTypeLegal(),N, andllvm::SmallVectorTemplateBase< T, bool >::push_back().
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line17080 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ADD,llvm::SmallVectorTemplateCommon< T, typename >::begin(),llvm::MVT::changeVectorElementType(),DL,llvm::SmallVectorTemplateCommon< T, typename >::end(),llvm::LoadSDNode::getBasePtr(),llvm::SelectionDAG::getBitcast(),llvm::SelectionDAG::getConstant(),llvm::MVT::getIntegerVT(),llvm::SelectionDAG::getMachineFunction(),llvm::MachineFunction::getMachineMemOperand(),llvm::SelectionDAG::getNegative(),llvm::GISelAddressing::BaseIndexOffset::getOffset(),llvm::getOffset(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::EVT::getScalarSizeInBits(),llvm::SelectionDAG::getSignedConstant(),llvm::EVT::getSimpleVT(),llvm::MVT::getSizeInBits(),llvm::SelectionDAG::getSplat(),llvm::SelectionDAG::getStridedLoadVP(),llvm::SDValue::getValueType(),getValueType(),llvm::EVT::getVectorNumElements(),llvm::MVT::getVectorVT(),llvm::RISCVSubtarget::getXLenVT(),llvm::RISCVTargetLowering::isLegalStridedLoadStore(),llvm::ISD::isNormalLoad(),llvm::EVT::isScalableVector(),llvm::TargetLoweringBase::isTypeLegal(),llvm::SelectionDAG::makeEquivalentMemoryOrdering(),llvm::BaseIndexOffset::match(),N,llvm::SmallVectorTemplateBase< T, bool >::push_back(), andllvm::MemoryLocation::UnknownSize.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line16175 of fileRISCVISelLowering.cpp.
Referencesllvm::TargetLowering::DAGCombinerInfo::DAG,DL,llvm::RISCVISD::FCVT_W_RV64,llvm::RISCVISD::FCVT_WU_RV64,llvm::RISCVISD::FCVT_X,llvm::RISCVISD::FCVT_XU,llvm::ISD::FP_TO_SINT_SAT,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getSelectCC(),llvm::SelectionDAG::getTargetConstant(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::RISCVSubtarget::getXLenVT(),llvm::SelectionDAG::getZeroExtendInReg(),llvm::RISCVFPRndMode::Invalid,llvm::TargetLoweringBase::isTypeLegal(),matchRoundingOp(),N, andllvm::ISD::SETUO.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line16076 of fileRISCVISelLowering.cpp.
ReferencesconvertFromScalableVector(),convertToScalableVector(),llvm::TargetLowering::DAGCombinerInfo::DAG,DL,llvm::RISCVISD::FCVT_W_RV64,llvm::RISCVISD::FCVT_WU_RV64,llvm::RISCVISD::FCVT_X,llvm::RISCVISD::FCVT_XU,llvm::ISD::FP_TO_SINT,getContainerForFixedLengthVector(),getDefaultVLOps(),llvm::SelectionDAG::getNode(),llvm::EVT::getScalarSizeInBits(),llvm::MVT::getScalarSizeInBits(),llvm::EVT::getSimpleVT(),llvm::SelectionDAG::getTargetConstant(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::RISCVSubtarget::getXLenVT(),llvm::RISCVFPRndMode::Invalid,llvm::EVT::isFixedLengthVector(),llvm::MVT::isFixedLengthVector(),llvm::TargetLoweringBase::isTypeLegal(),llvm::EVT::isVector(),matchRoundingOp(),N,llvm::RISCVFPRndMode::RTZ,llvm::ISD::TRUNCATE,llvm::RISCVISD::VFCVT_RM_X_F_VL,llvm::RISCVISD::VFCVT_RM_XU_F_VL,llvm::RISCVISD::VFCVT_RTZ_X_F_VL, andllvm::RISCVISD::VFCVT_RTZ_XU_F_VL.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line17008 of fileRISCVISelLowering.cpp.
Referencesllvm::SmallVectorImpl< T >::append(),llvm::ISD::CONCAT_VECTORS,DL,llvm::SDValue::getNode(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDNode::getOpcode(),llvm::SDValue::getOperand(),llvm::SDNode::getOperand(),llvm::SDValue::getValueType(),llvm::EVT::getVectorElementType(),llvm::SelectionDAG::getVectorIdxConstant(),llvm::EVT::getVectorNumElements(),llvm::SDValue::hasOneUse(),llvm::ISD::INSERT_VECTOR_ELT,llvm::TargetLoweringBase::isBinOp(),llvm::ISD::isBuildVectorOfConstantSDNodes(),llvm::EVT::isScalableVector(),LHS,N,llvm::SDNode::op_begin(),llvm::SDNode::op_end(), andRHS.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line15991 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ADD,llvm::TargetLowering::DAGCombinerInfo::DAG,getExtensionType(),llvm::SelectionDAG::getMachineFunction(),llvm::MemSDNode::getMemoryVT(),llvm::SDNode::getOpcode(),llvm::SDNode::getOperand(),llvm::MachineFunction::getSubtarget(),llvm::Use::getUser(),llvm::LSBaseSDNode::isIndexed(),llvm::MemSDNode::isSimple(),llvm::ISD::LOAD,N,Ptr,tryMemPairCombine(), andllvm::SDNode::uses().
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
| static |
Definition at line14483 of fileRISCVISelLowering.cpp.
ReferencescombineBinOpOfExtractToReduceTree(),combineBinOpToReduce(),combineDeMorganOfBoolean(),combineOrOfCZERO(),combineSelectAndUseCommutative(),llvm::TargetLowering::DAGCombinerInfo::DAG,llvm::TargetLowering::DAGCombinerInfo::isAfterLegalizeDAG(), andN.
| static |
Definition at line16927 of fileRISCVISelLowering.cpp.
ReferencesfoldSelectOfCTTZOrCTLZ(),llvm::RISCVSubtarget::hasConditionalMoveFusion(),N,tryFoldSelectIntoOp(), anduseInversedSetcc().
| static |
Definition at line14901 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::AND,Cond,llvm::APInt::getActiveBits(),llvm::SelectionDAG::getBoolConstant(),llvm::SelectionDAG::getConstant(),llvm::SDValue::getConstantOperandVal(),llvm::SelectionDAG::getNode(),llvm::APInt::getOneBitSet(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::SelectionDAG::getSetCC(),llvm::SDValue::getValueType(),llvm::SelectionDAG::getValueType(),llvm::SDValue::hasOneUse(),llvm::RISCVSubtarget::is64Bit(),llvm::SelectionDAG::MaskedValueIsZero(),N,llvm::ISD::SETNE,llvm::APInt::sext(),llvm::ISD::SIGN_EXTEND_INREG, andllvm::APInt::trunc().
| static |
Definition at line14948 of fileRISCVISelLowering.cpp.
Referencesllvm::EVT::bitsGE(),llvm::SelectionDAG::computeKnownBits(),llvm::KnownBits::countMaxActiveBits(),llvm::RISCVISD::FMV_X_ANYEXTH,llvm::RISCVISD::FMV_X_SIGNEXTH,llvm::SelectionDAG::getNode(),llvm::MVT::getVT(),llvm::RISCVSubtarget::is64Bit(),N,llvm::ISD::SHL, andllvm::RISCVISD::SLLW.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line16471 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ADD,assert(),llvm::countr_zero(),DL,llvm::SelectionDAG::getConstant(),llvm::SDValue::getConstantOperandVal(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::EVT::getSizeInBits(),llvm::SelectionDAG::getValueType(),llvm::RISCVSubtarget::getXLenVT(),llvm::ConstantSDNode::getZExtValue(),llvm::SDValue::hasOneUse(),N,llvm::ISD::SHL,llvm::ISD::SIGN_EXTEND_INREG,Size,llvm::ISD::SRA,llvm::ISD::SUB, andllvm::SDNode::users().
| static |
Definition at line14236 of fileRISCVISelLowering.cpp.
ReferencescombineBinOpOfZExt(),combineSelectAndUse(),combineSubOfBoolean(),combineSubShiftToOrcB(),DL,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::SDValue::getValueSizeInBits(),llvm::SDValue::hasOneUse(),llvm::isNullConstant(),N,llvm::ISD::SETCC,llvm::ISD::SETLT, andllvm::ISD::SRA.
| static |
Definition at line14383 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ANY_EXTEND,combineTruncSelectToSMaxUSat(),DL,llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::SDValue::getValueType(),llvm::SDValue::hasOneUse(),llvm::RISCVSubtarget::is64Bit(),N,llvm::ISD::SRL,llvm::ISD::TRUNCATE, andllvm::ISD::ZERO_EXTEND.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line17206 of fileRISCVISelLowering.cpp.
ReferencesA,llvm::ISD::ADD,assert(),B,llvm::CallingConv::C,CC,DL,llvm::SelectionDAG::getBitcast(),llvm::SelectionDAG::getBuildVector(),llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getContext(),llvm::RISCVSubtarget::getELen(),llvm::EVT::getIntegerVT(),llvm::SelectionDAG::getLogicalNOT(),llvm::SelectionDAG::getNegative(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOperand(),llvm::EVT::getScalarSizeInBits(),llvm::EVT::getVectorNumElements(),llvm::SelectionDAG::getVectorShuffle(),llvm::EVT::getVectorVT(),llvm::RISCVSubtarget::getXLenVT(),llvm::EVT::isFloatingPoint(),llvm::isPowerOf2_64(),llvm::ShuffleVectorInst::isSelectMask(),llvm::RISCVTargetLowering::isShuffleMaskLegal(),llvm::TargetLoweringBase::isTypeLegal(),matchSelectAddSub(),N,llvm::narrowShuffleMaskElts(),llvm::SmallVectorTemplateBase< T, bool >::push_back(),llvm::SmallVectorBase< Size_T >::size(), andllvm::ISD::VSELECT.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line16456 of fileRISCVISelLowering.cpp.
ReferencescombineOp_VLToVWOp_VL(),combineVFMADD_VLWithVFNEG_VL(),llvm::TargetLowering::DAGCombinerInfo::DAG,llvm::SelectionDAG::getSelectionDAGInfo(),llvm::SelectionDAGTargetInfo::isTargetStrictFPOpcode(), andN.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line16255 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ADD,llvm::sampleprof::Base,llvm::LocationSize::beforeOrAfterPointer(),DL,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getMachineFunction(),llvm::MachineFunction::getMachineMemOperand(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::SelectionDAG::getStridedLoadVP(),llvm::EVT::getVectorElementType(),llvm::RISCVSubtarget::getXLenVT(),llvm::EVT::isByteSized(),llvm::isOneOrOneSplat(),llvm::ISD::MUL,N,llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), andllvm::ISD::SUB.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line16317 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ADD,llvm::sampleprof::Base,llvm::LocationSize::beforeOrAfterPointer(),DL,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getMachineFunction(),llvm::MachineFunction::getMachineMemOperand(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::EVT::getScalarSizeInBits(),llvm::SelectionDAG::getStridedStoreVP(),llvm::SDValue::getValueType(),llvm::SDNode::getValueType(),llvm::EVT::getVectorElementType(),llvm::RISCVSubtarget::getXLenVT(),llvm::SDValue::hasOneUse(),llvm::EVT::isByteSized(),llvm::isOneOrOneSplat(),llvm::ISD::MUL,N, andllvm::ISD::SUB.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Convert vselect CC, (add a, b), (sub a, b) to add a, (vselect CC, -b, b).
This allows us match a vadd.vv fed by a masked vrsub, which reduces register pressure over the add followed by masked vsub sequence.
Definition at line16903 of fileRISCVISelLowering.cpp.
ReferencesA,llvm::ISD::ADD,B,CC,DL,llvm::SelectionDAG::getLogicalNOT(),llvm::SelectionDAG::getNegative(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOperand(),matchSelectAddSub(),N, andllvm::ISD::VSELECT.
| static |
Definition at line15917 of fileRISCVISelLowering.cpp.
Referencesassert(),combineOp_VLToVWOp_VL(),combineVWADDSUBWSelect(),llvm::TargetLowering::DAGCombinerInfo::DAG,N,llvm::RISCVISD::VWADD_W_VL,llvm::RISCVISD::VWADDU_W_VL,llvm::RISCVISD::VWSUB_W_VL, andllvm::RISCVISD::VWSUBU_W_VL.
Referenced byllvm::RISCVTargetLowering::PerformDAGCombine().
| static |
Definition at line14510 of fileRISCVISelLowering.cpp.
Referencesllvm::And,llvm::ISD::ANY_EXTEND,CC,combineBinOpOfExtractToReduceTree(),combineBinOpToReduce(),combineSelectAndUseCommutative(),DL,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getNOT(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::SelectionDAG::getSetCC(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::SDValue::getValueType(),llvm::SDValue::hasOneUse(),llvm::RISCVSubtarget::is64Bit(),llvm::isAllOnesConstant(),llvm::isOneConstant(),llvm::TargetLoweringBase::isOperationLegal(),N,llvm::RISCVISD::ROLW,llvm::ISD::ROTL,llvm::ISD::SETCC,llvm::ISD::SETLT,llvm::ISD::SHL,llvm::RISCVISD::SLLW,llvm::ISD::TRUNCATE, andllvm::ISD::ZERO_EXTEND.
| static |
Definition at line9705 of fileRISCVISelLowering.cpp.
ReferencesconvertToScalableVector(),llvm::SelectionDAG::getBitcast(),getContainerForFixedLengthVector(),llvm::MVT::getIntegerVT(),llvm::SelectionDAG::getMachineFunction(),llvm::MachineFunction::getSubtarget(),llvm::MVT::getVectorVT(),Operands, andpromoteVCIXScalar().
Referenced bygetVCIXISDNodeVOID(), andgetVCIXISDNodeWCHAIN().
| inlinestatic |
Definition at line9669 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ANY_EXTEND,assert(),llvm::MVT::bitsLT(),DL,llvm::SelectionDAG::getMachineFunction(),llvm::SelectionDAG::getNode(),llvm::DWARFExpression::Operation::getNumOperands(),llvm::SDValue::getSimpleValueType(),llvm::MachineFunction::getSubtarget(),llvm::RISCVSubtarget::getXLenVT(),II,llvm::ISD::INTRINSIC_VOID,llvm::ISD::INTRINSIC_W_CHAIN,llvm::MVT::isScalarInteger(),Operands, andllvm::ISD::SIGN_EXTEND.
Referenced byprocessVCIXOperands().
| static |
Definition at line4320 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ADD,llvm::ISD::BITCAST,DL,llvm::SDNode::getAsZExtVal(),llvm::SelectionDAG::getNode(),getReg(),llvm::SelectionDAG::getRegister(),llvm::SelectionDAG::getUNDEF(),llvm::SDValue::getValueType(),llvm::MVT::getVectorElementCount(),llvm::MVT::getVectorVT(),llvm::Hi,llvm::isAllOnesConstant(),llvm::Lo,llvm::RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL,llvm::ISD::SRA, andllvm::RISCVISD::VMV_V_X_VL.
Referenced bysplatSplitI64WithVL().
| static |
Definition at line4376 of fileRISCVISelLowering.cpp.
Referencesassert(),DL,llvm::Hi,llvm::Lo,splatPartsI64WithVL(), andllvm::SelectionDAG::SplitScalar().
Referenced bylowerScalarSplat(), andlowerVectorIntrinsicScalars().
| static |
Definition at line6627 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::ISD::CONCAT_VECTORS,DL,llvm::SelectionDAG::getMergeValues(),llvm::SelectionDAG::getNode(),llvm::DWARFExpression::Operation::getNumOperands(),llvm::SelectionDAG::GetSplitDestVTs(),llvm::SDValue::getValue(),llvm::SelectionDAG::getVTList(), andllvm::SelectionDAG::SplitVector().
Referenced byllvm::RISCVTargetLowering::LowerOperation().
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Definition at line6556 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::CONCAT_VECTORS,DL,llvm::SelectionDAG::getNode(),llvm::DWARFExpression::Operation::getNumOperands(),llvm::SelectionDAG::GetSplitDestVTs(), andllvm::SelectionDAG::SplitVector().
Referenced byllvm::RISCVTargetLowering::LowerOperation().
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Definition at line6612 of fileRISCVISelLowering.cpp.
ReferencesDL,llvm::SelectionDAG::getNode(),llvm::Hi,llvm::Lo,llvm::SelectionDAG::SplitEVL(), andllvm::SelectionDAG::SplitVector().
Referenced byllvm::RISCVTargetLowering::LowerOperation().
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Definition at line6581 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::ISD::CONCAT_VECTORS,DL,llvm::SelectionDAG::getNode(),llvm::DWARFExpression::Operation::getNumOperands(),llvm::SelectionDAG::GetSplitDestVTs(),llvm::ISD::getVPExplicitVectorLengthIdx(),llvm::ISD::isVPOpcode(),llvm::SelectionDAG::SplitEVL(), andllvm::SelectionDAG::SplitVector().
Referenced byllvm::RISCVTargetLowering::LowerOperation().
| STATISTIC | ( | NumTailCalls | , |
| "Number of tail calls" | |||
| ) |
| static |
Definition at line13989 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ADD,DL,llvm::SelectionDAG::getNode(),llvm::SDNode::getOpcode(),llvm::SDNode::getOperand(),llvm::SelectionDAG::getSignedConstant(),llvm::EVT::getSizeInBits(),llvm::RISCVSubtarget::getXLen(),llvm::SDNode::hasOneUse(),llvm::EVT::isVector(),llvm::ISD::MUL, andN.
Referenced byperformADDCombine().
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Definition at line13839 of fileRISCVISelLowering.cpp.
ReferencesDL,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::SDNode::getOpcode(),llvm::SDNode::getOperand(),llvm::EVT::getSizeInBits(),llvm::RISCVSubtarget::getXLen(),llvm::SDNode::hasOneUse(),llvm::EVT::isVector(),N,llvm::ISD::SHL, andllvm::RISCVISD::SHL_ADD.
Referenced byperformADDCombine().
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Definition at line2297 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::AND,llvm::bit_width(),llvm::CallingConv::C,CC,DL,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::ISD::getSetCCSwappedOperands(),llvm::Value::hasOneUse(),llvm::isMask_64(),llvm::isNullConstant(),llvm::isPowerOf2_64(),LHS,llvm::Log2_64(),RHS,llvm::ISD::SETEQ,llvm::ISD::SETGE,llvm::ISD::SETGT,llvm::ISD::SETLE,llvm::ISD::SETLT,llvm::ISD::SETUGT,llvm::ISD::SETULE,llvm::ISD::SHL, andstd::swap().
Referenced bycombine_CC().
| static |
Definition at line16588 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::AND,Cond,llvm::APInt::getBitsSetFrom(),llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNode(),llvm::SDValue::getOpcode(),llvm::SDValue::getOperand(),llvm::SelectionDAG::getSetCC(),llvm::ISD::getSetCCInverse(),llvm::EVT::getSizeInBits(),llvm::SDValue::getValueType(),llvm::SDValue::hasOneUse(),llvm::isAllOnesConstant(),llvm::ISD::isIntEqualitySetCC(),llvm::isNullConstant(),llvm::isOneConstant(),llvm::EVT::isScalarInteger(),llvm::SelectionDAG::MaskedValueIsZero(),llvm::ISD::OR,llvm::ISD::SETCC,llvm::ISD::SETLT,std::swap(),llvm::Xor, andllvm::ISD::XOR.
Referenced bycombine_CC().
| static |
Definition at line16740 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::ADD,assert(),DL,llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getNeutralElement(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getSelect(),llvm::SDValue::getValueType(),N,llvm::ISD::OR,llvm::ISD::SHL,llvm::ISD::SRA,llvm::ISD::SRL,llvm::ISD::SUB,std::swap(), andllvm::ISD::XOR.
Referenced byperformSELECTCombine().
| static |
Definition at line15933 of fileRISCVISelLowering.cpp.
Referencesllvm::MemSDNode::getChain(),llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getMachineFunction(),llvm::MachineFunction::getMachineMemOperand(),llvm::SelectionDAG::getMemIntrinsicNode(),llvm::MemSDNode::getMemOperand(),llvm::MemSDNode::getMemoryVT(),llvm::SelectionDAG::getMergeValues(),llvm::SDValue::getNode(),llvm::SDNode::getOpcode(),llvm::SDNode::getOperand(),llvm::MachineMemOperand::getPointerInfo(),llvm::MachineFunction::getSubtarget(),llvm::SDValue::getValue(),llvm::SelectionDAG::getVTList(),llvm::RISCVSubtarget::getXLenVT(),llvm::SDNode::hasPredecessorHelper(),llvm::ISD::LOAD,llvm::SelectionDAG::ReplaceAllUsesWith(),llvm::RISCVISD::TH_LDD,llvm::RISCVISD::TH_LWD,llvm::RISCVISD::TH_LWUD,llvm::RISCVISD::TH_SDD,llvm::RISCVISD::TH_SWD, andllvm::ISD::ZEXTLOAD.
Referenced byperformMemPairCombine().
| static |
Try to widen element type to get a new mask value for a better permutation sequence.
This doesn't try to inspect the widened mask for profitability; we speculate the widened form is equal or better. This has the effect of reducing mask constant sizes - allowing cheaper materialization sequences
Definition at line5334 of fileRISCVISelLowering.cpp.
ReferencesDL,llvm::SelectionDAG::getBitcast(),llvm::MVT::getFixedSizeInBits(),llvm::MVT::getFloatingPointVT(),llvm::MVT::getIntegerVT(),llvm::SelectionDAG::getTargetLoweringInfo(),llvm::MVT::getVectorElementType(),llvm::MVT::getVectorNumElements(),llvm::SelectionDAG::getVectorShuffle(),llvm::MVT::getVectorVT(),llvm::MVT::isFloatingPoint(),llvm::TargetLoweringBase::isTypeLegal(), andllvm::widenShuffleMaskElts().
| static |
Definition at line20117 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::RISCVISD::BuildPairF64,llvm::MachineFrameInfo::CreateFixedObject(),DL,llvm::SelectionDAG::getCopyFromReg(),llvm::MachinePointerInfo::getFixedStack(),llvm::SelectionDAG::getFrameIndex(),llvm::MachineFunction::getFrameInfo(),llvm::SelectionDAG::getLoad(),llvm::CCValAssign::getLocMemOffset(),llvm::CCValAssign::getLocReg(),llvm::CCValAssign::getLocVT(),llvm::SelectionDAG::getMachineFunction(),llvm::SelectionDAG::getNode(),llvm::MachineFunction::getRegInfo(),llvm::CCValAssign::getValVT(),llvm::Hi,llvm::CCValAssign::isMemLoc(),llvm::CCValAssign::isRegLoc(), andllvm::Lo.
Referenced byllvm::RISCVTargetLowering::LowerFormalArguments().
| static |
Definition at line20084 of fileRISCVISelLowering.cpp.
Referencesllvm::CCValAssign::BCvt,llvm::MachineFrameInfo::CreateFixedObject(),DL,llvm::CCValAssign::Full,llvm::SelectionDAG::getDataLayout(),llvm::SelectionDAG::getExtLoad(),llvm::MachinePointerInfo::getFixedStack(),llvm::SelectionDAG::getFrameIndex(),llvm::MachineFunction::getFrameInfo(),llvm::MVT::getIntegerVT(),llvm::CCValAssign::getLocInfo(),llvm::CCValAssign::getLocMemOffset(),llvm::CCValAssign::getLocVT(),llvm::SelectionDAG::getMachineFunction(),llvm::DataLayout::getPointerSizeInBits(),llvm::EVT::getStoreSize(),llvm::CCValAssign::getValVT(),llvm::CCValAssign::Indirect,llvm_unreachable, andllvm::ISD::NON_EXTLOAD.
| static |
Definition at line20021 of fileRISCVISelLowering.cpp.
Referencesllvm::RISCVMachineFunctionInfo::addSExt32Register(),llvm::BitWidth,convertLocVTToValVT(),DL,llvm::Function::getArg(),llvm::SelectionDAG::getCopyFromReg(),llvm::MachineFunction::getFunction(),llvm::MachineFunction::getInfo(),llvm::Type::getIntegerBitWidth(),llvm::CCValAssign::getLocInfo(),llvm::CCValAssign::getLocReg(),llvm::CCValAssign::getLocVT(),llvm::SelectionDAG::getMachineFunction(),llvm::TargetLoweringBase::getRegClassFor(),llvm::MachineFunction::getRegInfo(),llvm::EVT::getSimpleVT(),llvm::RISCVTargetLowering::getSubtarget(),llvm::Value::getType(),llvm::CCValAssign::Indirect, andllvm::Type::isIntegerTy().
| static |
Definition at line16849 of fileRISCVISelLowering.cpp.
Referencesllvm::ISD::AND,CC,Cond,DL,llvm::SelectionDAG::getSelect(),llvm::SelectionDAG::getSetCC(),llvm::isNullConstant(),llvm::APInt::isPowerOf2(),llvm::EVT::isScalarInteger(),llvm::APInt::isSignedIntN(),LHS,N,RHS,llvm::ISD::SETCC,llvm::ISD::SETEQ, andllvm::ISD::SETNE.
Referenced byperformSELECTCombine().
| static |
Definition at line2593 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::divideCeil(),llvm::RISCVSubtarget::getELen(),llvm::MVT::getFixedSizeInBits(),llvm::RISCVSubtarget::getMaxLMULForFixedLengthVectors(),llvm::RISCVSubtarget::getRealMinVLen(),llvm::MVT::getSizeInBits(),llvm::MVT::getVectorElementType(),llvm::MVT::getVectorNumElements(),llvm::RISCVSubtarget::hasVInstructionsBF16Minimal(),llvm::RISCVSubtarget::hasVInstructionsF16Minimal(),llvm::RISCVSubtarget::hasVInstructionsF32(),llvm::RISCVSubtarget::hasVInstructionsF64(),llvm::RISCVSubtarget::hasVInstructionsI64(),llvm::MVT::isFixedLengthVector(),llvm::MVT::isPow2VectorType(),llvm::MVT::SimpleTy, andllvm::RISCVSubtarget::useRVVForFixedLengthVectors().
Referenced bycombineScalarCTPOPToVCPOP(), andgetContainerForFixedLengthVector().
| static |
Definition at line22237 of fileRISCVISelLowering.cpp.
Referencesllvm::IRBuilderBase::CreateCall(),llvm::IRBuilderBase::CreateConstGEP1_32(),llvm::IRBuilderBase::GetInsertBlock(),llvm::IRBuilderBase::getInt8Ty(),llvm::BasicBlock::getModule(),llvm::Intrinsic::getOrInsertDeclaration(), andllvm::Offset.
Referenced byllvm::RISCVTargetLowering::getIRStackGuard().
| static |
Definition at line10944 of fileRISCVISelLowering.cpp.
Referencesassert(),llvm::MVT::changeVectorElementType(),DL,llvm::SmallVectorTemplateCommon< T, typename >::front(),llvm::SelectionDAG::getConstant(),llvm::SelectionDAG::getMergeValues(),llvm::SelectionDAG::getNode(),llvm::SelectionDAG::getSetCC(),llvm::SDValue::getValue(),llvm::SelectionDAG::getVTList(),I,N,llvm::SmallVectorTemplateBase< T, bool >::push_back(),llvm::ISD::SETNE,llvm::SmallVectorBase< Size_T >::size(), andllvm::ISD::ZERO_EXTEND.
| static |
| static |
Referenced bycombineOp_VLToVWOp_VL().
| static |
Definition at line22326 of fileRISCVISelLowering.cpp.
Referenced byllvm::RISCVTargetLowering::lowerDeinterleaveIntrinsicToLoad(), andllvm::RISCVTargetLowering::lowerInterleavedLoad().
| static |
Definition at line22394 of fileRISCVISelLowering.cpp.
Referenced byllvm::RISCVTargetLowering::lowerInterleavedStore(), andllvm::RISCVTargetLowering::lowerInterleaveIntrinsicToStore().
| static |
Referenced byllvm::RISCVTargetLowering::isFPImmLegal().
| static |
1.9.6