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1//===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===//

2//

3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.

4// See https://llvm.org/LICENSE.txt for license information.

5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception

6//

7//===----------------------------------------------------------------------===//

8//

9// This file contains a printer that converts from our internal representation

10// of machine-dependent LLVM code to PowerPC assembly language. This printer is

11// the output mechanism used by `llc'.

12//

13// Documentation at http://developer.apple.com/documentation/DeveloperTools/

14// Reference/Assembler/ASMIntroduction/chapter_1_section_1.html

15//

16//===----------------------------------------------------------------------===//

18#include "MCTargetDesc/PPCInstPrinter.h"

19#include "MCTargetDesc/PPCMCExpr.h"

20#include "MCTargetDesc/PPCMCTargetDesc.h"

21#include "MCTargetDesc/PPCPredicates.h"

22#include "PPC.h"

23#include "PPCInstrInfo.h"

24#include "PPCMachineFunctionInfo.h"

25#include "PPCSubtarget.h"

26#include "PPCTargetMachine.h"

27#include "PPCTargetStreamer.h"

28#include "TargetInfo/PowerPCTargetInfo.h"

29#include "llvm/ADT/MapVector.h"

30#include "llvm/ADT/SetVector.h"

31#include "llvm/ADT/Statistic.h"

32#include "llvm/ADT/StringExtras.h"

33#include "llvm/ADT/StringRef.h"

34#include "llvm/ADT/Twine.h"

35#include "llvm/BinaryFormat/ELF.h"

36#include "llvm/CodeGen/AsmPrinter.h"

37#include "llvm/CodeGen/MachineBasicBlock.h"

38#include "llvm/CodeGen/MachineFrameInfo.h"

39#include "llvm/CodeGen/MachineFunction.h"

40#include "llvm/CodeGen/MachineInstr.h"

41#include "llvm/CodeGen/MachineModuleInfoImpls.h"

42#include "llvm/CodeGen/MachineOperand.h"

43#include "llvm/CodeGen/MachineRegisterInfo.h"

44#include "llvm/CodeGen/StackMaps.h"

45#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"

46#include "llvm/IR/DataLayout.h"

47#include "llvm/IR/GlobalValue.h"

48#include "llvm/IR/GlobalVariable.h"

49#include "llvm/IR/Module.h"

50#include "llvm/MC/MCAsmInfo.h"

51#include "llvm/MC/MCContext.h"

52#include "llvm/MC/MCDirectives.h"

53#include "llvm/MC/MCExpr.h"

54#include "llvm/MC/MCInst.h"

55#include "llvm/MC/MCInstBuilder.h"

56#include "llvm/MC/MCSectionELF.h"

57#include "llvm/MC/MCSectionXCOFF.h"

58#include "llvm/MC/MCStreamer.h"

59#include "llvm/MC/MCSymbol.h"

60#include "llvm/MC/MCSymbolELF.h"

61#include "llvm/MC/MCSymbolXCOFF.h"

62#include "llvm/MC/SectionKind.h"

63#include "llvm/MC/TargetRegistry.h"

64#include "llvm/Support/Casting.h"

65#include "llvm/Support/CodeGen.h"

66#include "llvm/Support/Debug.h"

67#include "llvm/Support/Error.h"

68#include "llvm/Support/ErrorHandling.h"

69#include "llvm/Support/MathExtras.h"

70#include "llvm/Support/Process.h"

71#include "llvm/Support/Threading.h"

72#include "llvm/Support/raw_ostream.h"

73#include "llvm/Target/TargetMachine.h"

74#include "llvm/TargetParser/PPCTargetParser.h"

75#include "llvm/TargetParser/Triple.h"

76#include "llvm/Transforms/Utils/ModuleUtils.h"

77#include <cassert>

78#include <cstdint>

79#include <memory>

80#include <new>

82using namespacellvm;

83using namespacellvm::XCOFF;

85#define DEBUG_TYPE "asmprinter"

87STATISTIC(NumTOCEntries,"Number of Total TOC Entries Emitted.");

88STATISTIC(NumTOCConstPool,"Number of Constant Pool TOC Entries.");

89STATISTIC(NumTOCGlobalInternal,

90"Number of Internal Linkage Global TOC Entries.");

91STATISTIC(NumTOCGlobalExternal,

92"Number of External Linkage Global TOC Entries.");

93STATISTIC(NumTOCJumpTable,"Number of Jump Table TOC Entries.");

94STATISTIC(NumTOCThreadLocal,"Number of Thread Local TOC Entries.");

95STATISTIC(NumTOCBlockAddress,"Number of Block Address TOC Entries.");

96STATISTIC(NumTOCEHBlock,"Number of EH Block TOC Entries.");

98staticcl::opt<bool>EnableSSPCanaryBitInTB(

99"aix-ssp-tb-bit",cl::init(false),

100cl::desc("Enable Passing SSP Canary info in Trackback on AIX"),cl::Hidden);

101

102// Specialize DenseMapInfo to allow

103// std::pair<const MCSymbol *, MCSymbolRefExpr::VariantKind> in DenseMap.

104// This specialization is needed here because that type is used as keys in the

105// map representing TOC entries.

106namespacellvm {

107template <>

108structDenseMapInfo<std::pair<const MCSymbol *, MCSymbolRefExpr::VariantKind>> {

109usingTOCKey = std::pair<const MCSymbol *, MCSymbolRefExpr::VariantKind>;

110

111staticinlineTOCKey getEmptyKey() {

112return {nullptr,MCSymbolRefExpr::VariantKind::VK_None};

113 }

114staticinlineTOCKey getTombstoneKey() {

115return {nullptr,MCSymbolRefExpr::VariantKind::VK_Invalid};

116 }

117staticunsignedgetHashValue(constTOCKey &PairVal) {

118returndetail::combineHashValue(

119DenseMapInfo<const MCSymbol *>::getHashValue(PairVal.first),

120DenseMapInfo<int>::getHashValue(PairVal.second));

121 }

122staticboolisEqual(constTOCKey &A,constTOCKey &B) {returnA ==B; }

123};

124}// end namespace llvm

125

126namespace{

127

128enum {

129// GNU attribute tags for PowerPC ABI

130 Tag_GNU_Power_ABI_FP = 4,

131 Tag_GNU_Power_ABI_Vector = 8,

132 Tag_GNU_Power_ABI_Struct_Return = 12,

133

134// GNU attribute values for PowerPC float ABI, as combination of two parts

135 Val_GNU_Power_ABI_NoFloat = 0b00,

136 Val_GNU_Power_ABI_HardFloat_DP = 0b01,

137 Val_GNU_Power_ABI_SoftFloat_DP = 0b10,

138 Val_GNU_Power_ABI_HardFloat_SP = 0b11,

139

140 Val_GNU_Power_ABI_LDBL_IBM128 = 0b0100,

141 Val_GNU_Power_ABI_LDBL_64 = 0b1000,

142 Val_GNU_Power_ABI_LDBL_IEEE128 = 0b1100,

143};

144

145classPPCAsmPrinter :publicAsmPrinter {

146protected:

147// For TLS on AIX, we need to be able to identify TOC entries of specific

148// VariantKind so we can add the right relocations when we generate the

149// entries. So each entry is represented by a pair of MCSymbol and

150// VariantKind. For example, we need to be able to identify the following

151// entry as a TLSGD entry so we can add the @m relocation:

152// .tc .i[TC],i[TL]@m

153// By default, VK_None is used for the VariantKind.

154MapVector<std::pair<const MCSymbol *, MCSymbolRefExpr::VariantKind>,

155MCSymbol *>

156TOC;

157constPPCSubtarget *Subtarget =nullptr;

158

159// Keep track of the number of TLS variables and their corresponding

160// addresses, which is then used for the assembly printing of

161// non-TOC-based local-exec variables.

162MapVector<const GlobalValue *, uint64_t> TLSVarsToAddressMapping;

163

164public:

165explicit PPCAsmPrinter(TargetMachine &TM,

166 std::unique_ptr<MCStreamer> Streamer)

167 :AsmPrinter(TM,std::move(Streamer)) {}

168

169StringRef getPassName() const override{return"PowerPC Assembly Printer"; }

170

171enum TOCEntryType {

172 TOCType_ConstantPool,

173 TOCType_GlobalExternal,

174 TOCType_GlobalInternal,

175 TOCType_JumpTable,

176 TOCType_ThreadLocal,

177 TOCType_BlockAddress,

178 TOCType_EHBlock

179 };

180

181MCSymbol *lookUpOrCreateTOCEntry(constMCSymbol *Sym, TOCEntryTypeType,

182MCSymbolRefExpr::VariantKind Kind =

183 MCSymbolRefExpr::VariantKind::VK_None);

184

185booldoInitialization(Module &M) override{

186if (!TOC.empty())

187TOC.clear();

188returnAsmPrinter::doInitialization(M);

189 }

190

191voidemitInstruction(constMachineInstr *MI)override;

192

193 /// This function is for PrintAsmOperand and PrintAsmMemoryOperand,

194 /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only.

195 /// The \p MI would be INLINEASM ONLY.

196voidprintOperand(constMachineInstr *MI,unsigned OpNo,raw_ostream &O);

197

198voidPrintSymbolOperand(constMachineOperand &MO,raw_ostream &O)override;

199boolPrintAsmOperand(constMachineInstr *MI,unsigned OpNo,

200constchar *ExtraCode,raw_ostream &O)override;

201boolPrintAsmMemoryOperand(constMachineInstr *MI,unsigned OpNo,

202constchar *ExtraCode,raw_ostream &O)override;

203

204void LowerSTACKMAP(StackMaps &SM,constMachineInstr &MI);

205void LowerPATCHPOINT(StackMaps &SM,constMachineInstr &MI);

206void EmitTlsCall(constMachineInstr *MI,MCSymbolRefExpr::VariantKind VK);

207void EmitAIXTlsCallHelper(constMachineInstr *MI);

208constMCExpr *getAdjustedFasterLocalExpr(constMachineOperand &MO,

209 int64_tOffset);

210boolrunOnMachineFunction(MachineFunction &MF) override{

211 Subtarget = &MF.getSubtarget<PPCSubtarget>();

212bool Changed =AsmPrinter::runOnMachineFunction(MF);

213emitXRayTable();

214return Changed;

215 }

216};

217

218/// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux

219classPPCLinuxAsmPrinter :public PPCAsmPrinter {

220public:

221explicit PPCLinuxAsmPrinter(TargetMachine &TM,

222 std::unique_ptr<MCStreamer> Streamer)

223 : PPCAsmPrinter(TM,std::move(Streamer)) {}

224

225StringRef getPassName() const override{

226return"Linux PPC Assembly Printer";

227 }

228

229void emitGNUAttributes(Module &M);

230

231void emitStartOfAsmFile(Module &M)override;

232void emitEndOfAsmFile(Module &)override;

233

234void emitFunctionEntryLabel()override;

235

236void emitFunctionBodyStart()override;

237void emitFunctionBodyEnd()override;

238voidemitInstruction(constMachineInstr *MI)override;

239};

240

241classPPCAIXAsmPrinter :public PPCAsmPrinter {

242private:

243 /// Symbols lowered from ExternalSymbolSDNodes, we will need to emit extern

244 /// linkage for them in AIX.

245SmallSetVector<MCSymbol *, 8> ExtSymSDNodeSymbols;

246

247 /// A format indicator and unique trailing identifier to form part of the

248 /// sinit/sterm function names.

249 std::string FormatIndicatorAndUniqueModId;

250

251// Record a list of GlobalAlias associated with a GlobalObject.

252// This is used for AIX's extra-label-at-definition aliasing strategy.

253DenseMap<const GlobalObject *, SmallVector<const GlobalAlias *, 1>>

254 GOAliasMap;

255

256uint16_t getNumberOfVRSaved();

257void emitTracebackTable();

258

259SmallVector<const GlobalVariable *, 8> TOCDataGlobalVars;

260

261void emitGlobalVariableHelper(constGlobalVariable *);

262

263// Get the offset of an alias based on its AliaseeObject.

264uint64_t getAliasOffset(constConstant *C);

265

266public:

267 PPCAIXAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)

268 : PPCAsmPrinter(TM,std::move(Streamer)) {

269if (MAI->isLittleEndian())

270report_fatal_error(

271"cannot create AIX PPC Assembly Printer for a little-endian target");

272 }

273

274StringRef getPassName() const override{return"AIX PPC Assembly Printer"; }

275

276bool doInitialization(Module &M)override;

277

278void emitXXStructorList(constDataLayout &DL,constConstant *List,

279bool IsCtor)override;

280

281void SetupMachineFunction(MachineFunction &MF)override;

282

283void emitGlobalVariable(constGlobalVariable *GV)override;

284

285void emitFunctionDescriptor()override;

286

287void emitFunctionEntryLabel()override;

288

289void emitFunctionBodyEnd()override;

290

291void emitPGORefs(Module &M);

292

293void emitGCOVRefs();

294

295void emitEndOfAsmFile(Module &)override;

296

297void emitLinkage(constGlobalValue *GV,MCSymbol *GVSym)const override;

298

299voidemitInstruction(constMachineInstr *MI)override;

300

301bool doFinalization(Module &M)override;

302

303void emitTTypeReference(constGlobalValue *GV,unsigned Encoding)override;

304

305void emitModuleCommandLines(Module &M)override;

306};

307

308}// end anonymous namespace

309

310void PPCAsmPrinter::PrintSymbolOperand(constMachineOperand &MO,

311raw_ostream &O) {

312// Computing the address of a global symbol, not calling it.

313constGlobalValue *GV = MO.getGlobal();

314 getSymbol(GV)->print(O, MAI);

315 printOffset(MO.getOffset(), O);

316}

317

318void PPCAsmPrinter::printOperand(constMachineInstr *MI,unsigned OpNo,

319raw_ostream &O) {

320constDataLayout &DL = getDataLayout();

321constMachineOperand &MO =MI->getOperand(OpNo);

322

323switch (MO.getType()) {

324caseMachineOperand::MO_Register: {

325// The MI is INLINEASM ONLY and UseVSXReg is always false.

326constchar *RegName =PPCInstPrinter::getRegisterName(MO.getReg());

327

328// Linux assembler (Others?) does not take register mnemonics.

329// FIXME - What about special registers used in mfspr/mtspr?

330O <<PPC::stripRegisterPrefix(RegName);

331return;

332 }

333caseMachineOperand::MO_Immediate:

334O << MO.getImm();

335return;

336

337caseMachineOperand::MO_MachineBasicBlock:

338 MO.getMBB()->getSymbol()->print(O, MAI);

339return;

340caseMachineOperand::MO_ConstantPoolIndex:

341O <<DL.getPrivateGlobalPrefix() <<"CPI" << getFunctionNumber() <<'_'

342 << MO.getIndex();

343return;

344caseMachineOperand::MO_BlockAddress:

345 GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI);

346return;

347caseMachineOperand::MO_GlobalAddress: {

348 PrintSymbolOperand(MO, O);

349return;

350 }

351

352default:

353O <<"<unknown operand type: " << (unsigned)MO.getType() <<">";

354return;

355 }

356}

357

358/// PrintAsmOperand - Print out an operand for an inline asm expression.

359///

360bool PPCAsmPrinter::PrintAsmOperand(constMachineInstr *MI,unsigned OpNo,

361constchar *ExtraCode,raw_ostream &O) {

362// Does this asm operand have a single letter operand modifier?

363if (ExtraCode && ExtraCode[0]) {

364if (ExtraCode[1] != 0)returntrue;// Unknown modifier.

365

366switch (ExtraCode[0]) {

367default:

368// See if this is a generic print operand

369returnAsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O);

370case'L':// Write second word of DImode reference.

371// Verify that this operand has two consecutive registers.

372if (!MI->getOperand(OpNo).isReg() ||

373 OpNo+1 ==MI->getNumOperands() ||

374 !MI->getOperand(OpNo+1).isReg())

375returntrue;

376 ++OpNo;// Return the high-part.

377break;

378case'I':

379// Write 'i' if an integer constant, otherwise nothing. Used to print

380// addi vs add, etc.

381if (MI->getOperand(OpNo).isImm())

382O <<"i";

383returnfalse;

384case'x':

385if(!MI->getOperand(OpNo).isReg())

386returntrue;

387// This operand uses VSX numbering.

388// If the operand is a VMX register, convert it to a VSX register.

389Register Reg =MI->getOperand(OpNo).getReg();

390if (PPC::isVRRegister(Reg))

391Reg = PPC::VSX32 + (Reg - PPC::V0);

392elseif (PPC::isVFRegister(Reg))

393 Reg = PPC::VSX32 + (Reg - PPC::VF0);

394constchar *RegName;

395RegName =PPCInstPrinter::getRegisterName(Reg);

396RegName =PPC::stripRegisterPrefix(RegName);

397O <<RegName;

398returnfalse;

399 }

400 }

401

402printOperand(MI, OpNo, O);

403returnfalse;

404}

405

406// At the moment, all inline asm memory operands are a single register.

407// In any case, the output of this routine should always be just one

408// assembler operand.

409bool PPCAsmPrinter::PrintAsmMemoryOperand(constMachineInstr *MI,unsigned OpNo,

410constchar *ExtraCode,

411raw_ostream &O) {

412if (ExtraCode && ExtraCode[0]) {

413if (ExtraCode[1] != 0)returntrue;// Unknown modifier.

414

415switch (ExtraCode[0]) {

416default:returntrue;// Unknown modifier.

417case'L':// A memory reference to the upper word of a double word op.

418O << getDataLayout().getPointerSize() <<"(";

419printOperand(MI, OpNo, O);

420O <<")";

421returnfalse;

422case'y':// A memory reference for an X-form instruction

423O <<"0, ";

424printOperand(MI, OpNo, O);

425returnfalse;

426case'I':

427// Write 'i' if an integer constant, otherwise nothing. Used to print

428// addi vs add, etc.

429if (MI->getOperand(OpNo).isImm())

430O <<"i";

431returnfalse;

432case'U':// Print 'u' for update form.

433case'X':// Print 'x' for indexed form.

434// FIXME: Currently for PowerPC memory operands are always loaded

435// into a register, so we never get an update or indexed form.

436// This is bad even for offset forms, since even if we know we

437// have a value in -16(r1), we will generate a load into r<n>

438// and then load from 0(r<n>). Until that issue is fixed,

439// tolerate 'U' and 'X' but don't output anything.

440assert(MI->getOperand(OpNo).isReg());

441returnfalse;

442 }

443 }

444

445assert(MI->getOperand(OpNo).isReg());

446O <<"0(";

447printOperand(MI, OpNo, O);

448O <<")";

449returnfalse;

450}

451

452staticvoidcollectTOCStats(PPCAsmPrinter::TOCEntryTypeType) {

453 ++NumTOCEntries;

454switch (Type) {

455case PPCAsmPrinter::TOCType_ConstantPool:

456 ++NumTOCConstPool;

457break;

458case PPCAsmPrinter::TOCType_GlobalInternal:

459 ++NumTOCGlobalInternal;

460break;

461case PPCAsmPrinter::TOCType_GlobalExternal:

462 ++NumTOCGlobalExternal;

463break;

464case PPCAsmPrinter::TOCType_JumpTable:

465 ++NumTOCJumpTable;

466break;

467case PPCAsmPrinter::TOCType_ThreadLocal:

468 ++NumTOCThreadLocal;

469break;

470case PPCAsmPrinter::TOCType_BlockAddress:

471 ++NumTOCBlockAddress;

472break;

473case PPCAsmPrinter::TOCType_EHBlock:

474 ++NumTOCEHBlock;

475break;

476 }

477}

478

479staticCodeModel::Model getCodeModel(constPPCSubtarget &S,

480constTargetMachine &TM,

481constMachineOperand &MO) {

482CodeModel::Model ModuleModel = TM.getCodeModel();

483

484// If the operand is not a global address then there is no

485// global variable to carry an attribute.

486if (!(MO.getType() ==MachineOperand::MO_GlobalAddress))

487return ModuleModel;

488

489constGlobalValue *GV = MO.getGlobal();

490assert(GV &&"expected global for MO_GlobalAddress");

491

492return S.getCodeModel(TM, GV);

493}

494

495staticvoidsetOptionalCodeModel(MCSymbolXCOFF *XSym,CodeModel::Model CM) {

496switch (CM) {

497caseCodeModel::Large:

498 XSym->setPerSymbolCodeModel(MCSymbolXCOFF::CM_Large);

499return;

500caseCodeModel::Small:

501 XSym->setPerSymbolCodeModel(MCSymbolXCOFF::CM_Small);

502return;

503default:

504report_fatal_error("Invalid code model for AIX");

505 }

506}

507

508/// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry

509/// exists for it. If not, create one. Then return a symbol that references

510/// the TOC entry.

511MCSymbol *

512PPCAsmPrinter::lookUpOrCreateTOCEntry(constMCSymbol *Sym, TOCEntryTypeType,

513MCSymbolRefExpr::VariantKind Kind) {

514// If this is a new TOC entry add statistics about it.

515if (!TOC.contains({Sym, Kind}))

516collectTOCStats(Type);

517

518MCSymbol *&TOCEntry =TOC[{Sym,Kind}];

519if (!TOCEntry)

520 TOCEntry = createTempSymbol("C");

521return TOCEntry;

522}

523

524void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM,constMachineInstr &MI) {

525unsigned NumNOPBytes =MI.getOperand(1).getImm();

526

527auto &Ctx = OutStreamer->getContext();

528MCSymbol *MILabel = Ctx.createTempSymbol();

529 OutStreamer->emitLabel(MILabel);

530

531 SM.recordStackMap(*MILabel,MI);

532assert(NumNOPBytes % 4 == 0 &&"Invalid number of NOP bytes requested!");

533

534// Scan ahead to trim the shadow.

535constMachineBasicBlock &MBB = *MI.getParent();

536MachineBasicBlock::const_iterator MII(MI);

537 ++MII;

538while (NumNOPBytes > 0) {

539if (MII ==MBB.end() || MII->isCall() ||

540 MII->getOpcode() == PPC::DBG_VALUE ||

541 MII->getOpcode() == TargetOpcode::PATCHPOINT ||

542 MII->getOpcode() == TargetOpcode::STACKMAP)

543break;

544 ++MII;

545 NumNOPBytes -= 4;

546 }

547

548// Emit nops.

549for (unsigned i = 0; i < NumNOPBytes; i += 4)

550 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::NOP));

551}

552

553// Lower a patchpoint of the form:

554// [<def>], <id>, <numBytes>, <target>, <numArgs>

555void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM,constMachineInstr &MI) {

556auto &Ctx = OutStreamer->getContext();

557MCSymbol *MILabel = Ctx.createTempSymbol();

558 OutStreamer->emitLabel(MILabel);

559

560 SM.recordPatchPoint(*MILabel,MI);

561PatchPointOpers Opers(&MI);

562

563unsigned EncodedBytes = 0;

564constMachineOperand &CalleeMO = Opers.getCallTarget();

565

566if (CalleeMO.isImm()) {

567 int64_t CallTarget = CalleeMO.getImm();

568if (CallTarget) {

569assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget &&

570"High 16 bits of call target should be zero.");

571Register ScratchReg =MI.getOperand(Opers.getNextScratchIdx()).getReg();

572 EncodedBytes = 0;

573// Materialize the jump address:

574 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::LI8)

575 .addReg(ScratchReg)

576 .addImm((CallTarget >> 32) & 0xFFFF));

577 ++EncodedBytes;

578 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::RLDIC)

579 .addReg(ScratchReg)

580 .addReg(ScratchReg)

581 .addImm(32).addImm(16));

582 ++EncodedBytes;

583 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::ORIS8)

584 .addReg(ScratchReg)

585 .addReg(ScratchReg)

586 .addImm((CallTarget >> 16) & 0xFFFF));

587 ++EncodedBytes;

588 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::ORI8)

589 .addReg(ScratchReg)

590 .addReg(ScratchReg)

591 .addImm(CallTarget & 0xFFFF));

592

593// Save the current TOC pointer before the remote call.

594int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset();

595 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::STD)

596 .addReg(PPC::X2)

597 .addImm(TOCSaveOffset)

598 .addReg(PPC::X1));

599 ++EncodedBytes;

600

601// If we're on ELFv1, then we need to load the actual function pointer

602// from the function descriptor.

603if (!Subtarget->isELFv2ABI()) {

604// Load the new TOC pointer and the function address, but not r11

605// (needing this is rare, and loading it here would prevent passing it

606// via a 'nest' parameter.

607 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::LD)

608 .addReg(PPC::X2)

609 .addImm(8)

610 .addReg(ScratchReg));

611 ++EncodedBytes;

612 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::LD)

613 .addReg(ScratchReg)

614 .addImm(0)

615 .addReg(ScratchReg));

616 ++EncodedBytes;

617 }

618

619 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::MTCTR8)

620 .addReg(ScratchReg));

621 ++EncodedBytes;

622 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::BCTRL8));

623 ++EncodedBytes;

624

625// Restore the TOC pointer after the call.

626 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::LD)

627 .addReg(PPC::X2)

628 .addImm(TOCSaveOffset)

629 .addReg(PPC::X1));

630 ++EncodedBytes;

631 }

632 }elseif (CalleeMO.isGlobal()) {

633constGlobalValue *GValue = CalleeMO.getGlobal();

634MCSymbol *MOSymbol = getSymbol(GValue);

635constMCExpr *SymVar =MCSymbolRefExpr::create(MOSymbol, OutContext);

636

637 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::BL8_NOP)

638 .addExpr(SymVar));

639 EncodedBytes += 2;

640 }

641

642// Each instruction is 4 bytes.

643 EncodedBytes *= 4;

644

645// Emit padding.

646unsigned NumBytes = Opers.getNumPatchBytes();

647assert(NumBytes >= EncodedBytes &&

648"Patchpoint can't request size less than the length of a call.");

649assert((NumBytes - EncodedBytes) % 4 == 0 &&

650"Invalid number of NOP bytes requested!");

651for (unsigned i = EncodedBytes; i < NumBytes; i += 4)

652 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::NOP));

653}

654

655/// This helper function creates the TlsGetAddr/TlsGetMod MCSymbol for AIX. We

656/// will create the csect and use the qual-name symbol instead of creating just

657/// the external symbol.

658staticMCSymbol *createMCSymbolForTlsGetAddr(MCContext &Ctx,unsigned MIOpc) {

659StringRef SymName;

660switch (MIOpc) {

661default:

662 SymName =".__tls_get_addr";

663break;

664case PPC::GETtlsTpointer32AIX:

665 SymName =".__get_tpointer";

666break;

667case PPC::GETtlsMOD32AIX:

668case PPC::GETtlsMOD64AIX:

669 SymName =".__tls_get_mod";

670break;

671 }

672return Ctx

673 .getXCOFFSection(SymName,SectionKind::getText(),

674XCOFF::CsectProperties(XCOFF::XMC_PR,XCOFF::XTY_ER))

675 ->getQualNameSymbol();

676}

677

678void PPCAsmPrinter::EmitAIXTlsCallHelper(constMachineInstr *MI) {

679assert(Subtarget->isAIXABI() &&

680"Only expecting to emit calls to get the thread pointer on AIX!");

681

682MCSymbol *TlsCall =createMCSymbolForTlsGetAddr(OutContext,MI->getOpcode());

683constMCExpr *TlsRef =

684MCSymbolRefExpr::create(TlsCall,MCSymbolRefExpr::VK_None, OutContext);

685 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::BLA).addExpr(TlsRef));

686}

687

688/// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a

689/// call to __tls_get_addr to the current output stream.

690void PPCAsmPrinter::EmitTlsCall(constMachineInstr *MI,

691MCSymbolRefExpr::VariantKind VK) {

692MCSymbolRefExpr::VariantKind Kind =MCSymbolRefExpr::VK_None;

693unsigned Opcode = PPC::BL8_NOP_TLS;

694

695assert(MI->getNumOperands() >= 3 &&"Expecting at least 3 operands from MI");

696if (MI->getOperand(2).getTargetFlags() ==PPCII::MO_GOT_TLSGD_PCREL_FLAG ||

697MI->getOperand(2).getTargetFlags() ==PPCII::MO_GOT_TLSLD_PCREL_FLAG) {

698Kind =MCSymbolRefExpr::VK_PPC_NOTOC;

699 Opcode = PPC::BL8_NOTOC_TLS;

700 }

701constModule *M = MF->getFunction().getParent();

702

703assert(MI->getOperand(0).isReg() &&

704 ((Subtarget->isPPC64() &&MI->getOperand(0).getReg() == PPC::X3) ||

705 (!Subtarget->isPPC64() &&MI->getOperand(0).getReg() == PPC::R3)) &&

706"GETtls[ld]ADDR[32] must define GPR3");

707assert(MI->getOperand(1).isReg() &&

708 ((Subtarget->isPPC64() &&MI->getOperand(1).getReg() == PPC::X3) ||

709 (!Subtarget->isPPC64() &&MI->getOperand(1).getReg() == PPC::R3)) &&

710"GETtls[ld]ADDR[32] must read GPR3");

711

712if (Subtarget->isAIXABI()) {

713// For TLSGD, the variable offset should already be in R4 and the region

714// handle should already be in R3. We generate an absolute branch to

715// .__tls_get_addr. For TLSLD, the module handle should already be in R3.

716// We generate an absolute branch to .__tls_get_mod.

717Register VarOffsetReg = Subtarget->isPPC64() ? PPC::X4 : PPC::R4;

718 (void)VarOffsetReg;

719assert((MI->getOpcode() == PPC::GETtlsMOD32AIX ||

720MI->getOpcode() == PPC::GETtlsMOD64AIX ||

721 (MI->getOperand(2).isReg() &&

722MI->getOperand(2).getReg() == VarOffsetReg)) &&

723"GETtls[ld]ADDR[32] must read GPR4");

724 EmitAIXTlsCallHelper(MI);

725return;

726 }

727

728MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol("__tls_get_addr");

729

730if (Subtarget->is32BitELFABI() && isPositionIndependent())

731Kind =MCSymbolRefExpr::VK_PLT;

732

733constMCExpr *TlsRef =

734MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext);

735

736// Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI.

737if (Kind ==MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt() &&

738M->getPICLevel() ==PICLevel::BigPIC)

739 TlsRef =MCBinaryExpr::createAdd(

740 TlsRef,MCConstantExpr::create(32768, OutContext), OutContext);

741constMachineOperand &MO =MI->getOperand(2);

742constGlobalValue *GValue = MO.getGlobal();

743MCSymbol *MOSymbol = getSymbol(GValue);

744constMCExpr *SymVar =MCSymbolRefExpr::create(MOSymbol, VK, OutContext);

745 EmitToStreamer(*OutStreamer,

746MCInstBuilder(Subtarget->isPPC64() ? Opcode

747 : (unsigned)PPC::BL_TLS)

748 .addExpr(TlsRef)

749 .addExpr(SymVar));

750}

751

752/// Map a machine operand for a TOC pseudo-machine instruction to its

753/// corresponding MCSymbol.

754staticMCSymbol *getMCSymbolForTOCPseudoMO(constMachineOperand &MO,

755AsmPrinter &AP) {

756switch (MO.getType()) {

757caseMachineOperand::MO_GlobalAddress:

758return AP.getSymbol(MO.getGlobal());

759caseMachineOperand::MO_ConstantPoolIndex:

760return AP.GetCPISymbol(MO.getIndex());

761caseMachineOperand::MO_JumpTableIndex:

762return AP.GetJTISymbol(MO.getIndex());

763caseMachineOperand::MO_BlockAddress:

764return AP.GetBlockAddressSymbol(MO.getBlockAddress());

765default:

766llvm_unreachable("Unexpected operand type to get symbol.");

767 }

768}

769

770static PPCAsmPrinter::TOCEntryType

771getTOCEntryTypeForMO(constMachineOperand &MO) {

772// Use the target flags to determine if this MO is Thread Local.

773// If we don't do this it comes out as Global.

774if (PPCInstrInfo::hasTLSFlag(MO.getTargetFlags()))

775return PPCAsmPrinter::TOCType_ThreadLocal;

776

777switch (MO.getType()) {

778caseMachineOperand::MO_GlobalAddress: {

779constGlobalValue *GlobalV = MO.getGlobal();

780GlobalValue::LinkageTypes Linkage = GlobalV->getLinkage();

781if (Linkage ==GlobalValue::ExternalLinkage ||

782 Linkage ==GlobalValue::AvailableExternallyLinkage ||

783 Linkage ==GlobalValue::ExternalWeakLinkage)

784return PPCAsmPrinter::TOCType_GlobalExternal;

785

786return PPCAsmPrinter::TOCType_GlobalInternal;

787 }

788caseMachineOperand::MO_ConstantPoolIndex:

789return PPCAsmPrinter::TOCType_ConstantPool;

790caseMachineOperand::MO_JumpTableIndex:

791return PPCAsmPrinter::TOCType_JumpTable;

792caseMachineOperand::MO_BlockAddress:

793return PPCAsmPrinter::TOCType_BlockAddress;

794default:

795llvm_unreachable("Unexpected operand type to get TOC type.");

796 }

797}

798/// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to

799/// the current output stream.

800///

801void PPCAsmPrinter::emitInstruction(constMachineInstr *MI) {

802 PPC_MC::verifyInstructionPredicates(MI->getOpcode(),

803 getSubtargetInfo().getFeatureBits());

804

805MCInst TmpInst;

806constbool IsPPC64 = Subtarget->isPPC64();

807constbool IsAIX = Subtarget->isAIXABI();

808constbool HasAIXSmallLocalTLS = Subtarget->hasAIXSmallLocalExecTLS() ||

809 Subtarget->hasAIXSmallLocalDynamicTLS();

810constModule *M = MF->getFunction().getParent();

811PICLevel::Level PL =M->getPICLevel();

812

813#ifndef NDEBUG

814// Validate that SPE and FPU are mutually exclusive in codegen

815if (!MI->isInlineAsm()) {

816for (constMachineOperand &MO:MI->operands()) {

817if (MO.isReg()) {

818Register Reg = MO.getReg();

819if (Subtarget->hasSPE()) {

820if (PPC::F4RCRegClass.contains(Reg) ||

821 PPC::F8RCRegClass.contains(Reg) ||

822 PPC::VFRCRegClass.contains(Reg) ||

823 PPC::VRRCRegClass.contains(Reg) ||

824 PPC::VSFRCRegClass.contains(Reg) ||

825 PPC::VSSRCRegClass.contains(Reg)

826 )

827llvm_unreachable("SPE targets cannot have FPRegs!");

828 }else {

829if (PPC::SPERCRegClass.contains(Reg))

830llvm_unreachable("SPE register found in FPU-targeted code!");

831 }

832 }

833 }

834 }

835#endif

836

837auto getTOCRelocAdjustedExprForXCOFF = [this](constMCExpr *Expr,

838ptrdiff_t OriginalOffset) {

839// Apply an offset to the TOC-based expression such that the adjusted

840// notional offset from the TOC base (to be encoded into the instruction's D

841// or DS field) is the signed 16-bit truncation of the original notional

842// offset from the TOC base.

843// This is consistent with the treatment used both by XL C/C++ and

844// by AIX ld -r.

845ptrdiff_t Adjustment =

846 OriginalOffset - llvm::SignExtend32<16>(OriginalOffset);

847returnMCBinaryExpr::createAdd(

848 Expr,MCConstantExpr::create(-Adjustment, OutContext), OutContext);

849 };

850

851auto getTOCEntryLoadingExprForXCOFF =

852 [IsPPC64, getTOCRelocAdjustedExprForXCOFF,

853this](constMCSymbol *MOSymbol,constMCExpr *Expr,

854MCSymbolRefExpr::VariantKind VK =

855 MCSymbolRefExpr::VariantKind::VK_None) ->constMCExpr * {

856constunsigned EntryByteSize = IsPPC64 ? 8 : 4;

857constauto TOCEntryIter =TOC.find({MOSymbol, VK});

858assert(TOCEntryIter !=TOC.end() &&

859"Could not find the TOC entry for this symbol.");

860constptrdiff_t EntryDistanceFromTOCBase =

861 (TOCEntryIter -TOC.begin()) * EntryByteSize;

862constexpr int16_t PositiveTOCRange = INT16_MAX;

863

864if (EntryDistanceFromTOCBase > PositiveTOCRange)

865return getTOCRelocAdjustedExprForXCOFF(Expr, EntryDistanceFromTOCBase);

866

867return Expr;

868 };

869auto GetVKForMO = [&](constMachineOperand &MO) {

870// For TLS initial-exec and local-exec accesses on AIX, we have one TOC

871// entry for the symbol (with the variable offset), which is differentiated

872// by MO_TPREL_FLAG.

873unsignedFlag = MO.getTargetFlags();

874if (Flag ==PPCII::MO_TPREL_FLAG ||

875 Flag ==PPCII::MO_GOT_TPREL_PCREL_FLAG ||

876 Flag ==PPCII::MO_TPREL_PCREL_FLAG) {

877assert(MO.isGlobal() &&"Only expecting a global MachineOperand here!\n");

878TLSModel::Model Model =TM.getTLSModel(MO.getGlobal());

879if (Model ==TLSModel::LocalExec)

880return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLE;

881if (Model ==TLSModel::InitialExec)

882return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSIE;

883// On AIX, TLS model opt may have turned local-dynamic accesses into

884// initial-exec accesses.

885PPCFunctionInfo *FuncInfo = MF->getInfo<PPCFunctionInfo>();

886if (Model ==TLSModel::LocalDynamic &&

887 FuncInfo->isAIXFuncUseTLSIEForLD()) {

888LLVM_DEBUG(

889dbgs() <<"Current function uses IE access for default LD vars.\n");

890return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSIE;

891 }

892llvm_unreachable("Only expecting local-exec or initial-exec accesses!");

893 }

894// For GD TLS access on AIX, we have two TOC entries for the symbol (one for

895// the variable offset and the other for the region handle). They are

896// differentiated by MO_TLSGD_FLAG and MO_TLSGDM_FLAG.

897if (Flag ==PPCII::MO_TLSGDM_FLAG)

898return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM;

899if (Flag ==PPCII::MO_TLSGD_FLAG || Flag ==PPCII::MO_GOT_TLSGD_PCREL_FLAG)

900return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGD;

901// For local-dynamic TLS access on AIX, we have one TOC entry for the symbol

902// (the variable offset) and one shared TOC entry for the module handle.

903// They are differentiated by MO_TLSLD_FLAG and MO_TLSLDM_FLAG.

904if (Flag ==PPCII::MO_TLSLD_FLAG && IsAIX)

905return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLD;

906if (Flag ==PPCII::MO_TLSLDM_FLAG && IsAIX)

907return MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSML;

908return MCSymbolRefExpr::VariantKind::VK_None;

909 };

910

911// Lower multi-instruction pseudo operations.

912switch (MI->getOpcode()) {

913default:break;

914case TargetOpcode::PATCHABLE_FUNCTION_ENTER: {

915assert(!Subtarget->isAIXABI() &&

916"AIX does not support patchable function entry!");

917// PATCHABLE_FUNCTION_ENTER on little endian is for XRAY support which is

918// handled in PPCLinuxAsmPrinter.

919if (MAI->isLittleEndian())

920return;

921constFunction &F = MF->getFunction();

922unsigned Num = 0;

923 (void)F.getFnAttribute("patchable-function-entry")

924 .getValueAsString()

925 .getAsInteger(10, Num);

926if (!Num)

927return;

928 emitNops(Num);

929return;

930 }

931case TargetOpcode::DBG_VALUE:

932llvm_unreachable("Should be handled target independently");

933case TargetOpcode::STACKMAP:

934return LowerSTACKMAP(SM, *MI);

935case TargetOpcode::PATCHPOINT:

936return LowerPATCHPOINT(SM, *MI);

937

938case PPC::MoveGOTtoLR: {

939// Transform %lr = MoveGOTtoLR

940// Into this: bl _GLOBAL_OFFSET_TABLE_@local-4

941// _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding

942// _GLOBAL_OFFSET_TABLE_) has exactly one instruction:

943// blrl

944// This will return the pointer to _GLOBAL_OFFSET_TABLE_@local

945MCSymbol *GOTSymbol =

946 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));

947constMCExpr *OffsExpr =

948MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol,

949MCSymbolRefExpr::VK_PPC_LOCAL,

950 OutContext),

951MCConstantExpr::create(4, OutContext),

952 OutContext);

953

954// Emit the 'bl'.

955 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::BL).addExpr(OffsExpr));

956return;

957 }

958case PPC::MovePCtoLR:

959case PPC::MovePCtoLR8: {

960// Transform %lr = MovePCtoLR

961// Into this, where the label is the PIC base:

962// bl L1$pb

963// L1$pb:

964MCSymbol *PICBase = MF->getPICBaseSymbol();

965

966// Emit the 'bl'.

967 EmitToStreamer(*OutStreamer,

968MCInstBuilder(PPC::BL)

969// FIXME: We would like an efficient form for this, so we

970// don't have to do a lot of extra uniquing.

971 .addExpr(MCSymbolRefExpr::create(PICBase, OutContext)));

972

973// Emit the label.

974 OutStreamer->emitLabel(PICBase);

975return;

976 }

977case PPC::UpdateGBR: {

978// Transform %rd = UpdateGBR(%rt, %ri)

979// Into: lwz %rt, .L0$poff - .L0$pb(%ri)

980// add %rd, %rt, %ri

981// or into (if secure plt mode is on):

982// addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha

983// addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l

984// Get the offset from the GOT Base Register to the GOT

985LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);

986if (Subtarget->isSecurePlt() && isPositionIndependent() ) {

987unsigned PICR = TmpInst.getOperand(0).getReg();

988MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol(

989M->getPICLevel() ==PICLevel::SmallPIC ?"_GLOBAL_OFFSET_TABLE_"

990 :".LTOC");

991constMCExpr *PB =

992MCSymbolRefExpr::create(MF->getPICBaseSymbol(), OutContext);

993

994constMCExpr *DeltaExpr =MCBinaryExpr::createSub(

995MCSymbolRefExpr::create(BaseSymbol, OutContext),PB, OutContext);

996

997constMCExpr *DeltaHi =PPCMCExpr::createHa(DeltaExpr, OutContext);

998 EmitToStreamer(

999 *OutStreamer,

1000MCInstBuilder(PPC::ADDIS).addReg(PICR).addReg(PICR).addExpr(DeltaHi));

1001

1002constMCExpr *DeltaLo =PPCMCExpr::createLo(DeltaExpr, OutContext);

1003 EmitToStreamer(

1004 *OutStreamer,

1005MCInstBuilder(PPC::ADDI).addReg(PICR).addReg(PICR).addExpr(DeltaLo));

1006return;

1007 }else {

1008MCSymbol *PICOffset =

1009 MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol(*MF);

1010 TmpInst.setOpcode(PPC::LWZ);

1011constMCExpr *Exp =

1012MCSymbolRefExpr::create(PICOffset,MCSymbolRefExpr::VK_None, OutContext);

1013constMCExpr *PB =

1014MCSymbolRefExpr::create(MF->getPICBaseSymbol(),

1015MCSymbolRefExpr::VK_None,

1016 OutContext);

1017constMCOperand TR = TmpInst.getOperand(1);

1018constMCOperand PICR = TmpInst.getOperand(0);

1019

1020// Step 1: lwz %rt, .L$poff - .L$pb(%ri)

1021 TmpInst.getOperand(1) =

1022MCOperand::createExpr(MCBinaryExpr::createSub(Exp,PB, OutContext));

1023 TmpInst.getOperand(0) = TR;

1024 TmpInst.getOperand(2) = PICR;

1025 EmitToStreamer(*OutStreamer, TmpInst);

1026

1027 TmpInst.setOpcode(PPC::ADD4);

1028 TmpInst.getOperand(0) = PICR;

1029 TmpInst.getOperand(1) = TR;

1030 TmpInst.getOperand(2) = PICR;

1031 EmitToStreamer(*OutStreamer, TmpInst);

1032return;

1033 }

1034 }

1035case PPC::LWZtoc: {

1036// Transform %rN = LWZtoc @op1, %r2

1037LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);

1038

1039// Change the opcode to LWZ.

1040 TmpInst.setOpcode(PPC::LWZ);

1041

1042constMachineOperand &MO =MI->getOperand(1);

1043assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&

1044"Invalid operand for LWZtoc.");

1045

1046// Map the operand to its corresponding MCSymbol.

1047constMCSymbol *const MOSymbol =getMCSymbolForTOCPseudoMO(MO, *this);

1048

1049// Create a reference to the GOT entry for the symbol. The GOT entry will be

1050// synthesized later.

1051if (PL ==PICLevel::SmallPIC && !IsAIX) {

1052constMCExpr *Exp =

1053MCSymbolRefExpr::create(MOSymbol,MCSymbolRefExpr::VK_GOT,

1054 OutContext);

1055 TmpInst.getOperand(1) =MCOperand::createExpr(Exp);

1056 EmitToStreamer(*OutStreamer, TmpInst);

1057return;

1058 }

1059

1060MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);

1061

1062// Otherwise, use the TOC. 'TOCEntry' is a label used to reference the

1063// storage allocated in the TOC which contains the address of

1064// 'MOSymbol'. Said TOC entry will be synthesized later.

1065MCSymbol *TOCEntry =

1066 lookUpOrCreateTOCEntry(MOSymbol,getTOCEntryTypeForMO(MO), VK);

1067constMCExpr *Exp =

1068MCSymbolRefExpr::create(TOCEntry,MCSymbolRefExpr::VK_None, OutContext);

1069

1070// AIX uses the label directly as the lwz displacement operand for

1071// references into the toc section. The displacement value will be generated

1072// relative to the toc-base.

1073if (IsAIX) {

1074assert(

1075getCodeModel(*Subtarget, TM, MO) ==CodeModel::Small &&

1076"This pseudo should only be selected for 32-bit small code model.");

1077Exp = getTOCEntryLoadingExprForXCOFF(MOSymbol, Exp, VK);

1078 TmpInst.getOperand(1) =MCOperand::createExpr(Exp);

1079

1080// Print MO for better readability

1081if (isVerbose())

1082 OutStreamer->getCommentOS() << MO <<'\n';

1083 EmitToStreamer(*OutStreamer, TmpInst);

1084return;

1085 }

1086

1087// Create an explicit subtract expression between the local symbol and

1088// '.LTOC' to manifest the toc-relative offset.

1089constMCExpr *PB =MCSymbolRefExpr::create(

1090 OutContext.getOrCreateSymbol(Twine(".LTOC")), OutContext);

1091Exp =MCBinaryExpr::createSub(Exp,PB, OutContext);

1092 TmpInst.getOperand(1) =MCOperand::createExpr(Exp);

1093 EmitToStreamer(*OutStreamer, TmpInst);

1094return;

1095 }

1096case PPC::ADDItoc:

1097case PPC::ADDItoc8: {

1098assert(IsAIX &&TM.getCodeModel() ==CodeModel::Small &&

1099"PseudoOp only valid for small code model AIX");

1100

1101// Transform %rN = ADDItoc/8 %r2, @op1.

1102LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);

1103

1104// Change the opcode to load address.

1105 TmpInst.setOpcode((!IsPPC64) ? (PPC::LA) : (PPC::LA8));

1106

1107constMachineOperand &MO =MI->getOperand(2);

1108assert(MO.isGlobal() &&"Invalid operand for ADDItoc[8].");

1109

1110// Map the operand to its corresponding MCSymbol.

1111constMCSymbol *const MOSymbol =getMCSymbolForTOCPseudoMO(MO, *this);

1112

1113constMCExpr *Exp =

1114MCSymbolRefExpr::create(MOSymbol,MCSymbolRefExpr::VK_None, OutContext);

1115

1116 TmpInst.getOperand(2) =MCOperand::createExpr(Exp);

1117 EmitToStreamer(*OutStreamer, TmpInst);

1118return;

1119 }

1120case PPC::LDtocJTI:

1121case PPC::LDtocCPT:

1122case PPC::LDtocBA:

1123case PPC::LDtoc: {

1124// Transform %x3 = LDtoc @min1, %x2

1125LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);

1126

1127// Change the opcode to LD.

1128 TmpInst.setOpcode(PPC::LD);

1129

1130constMachineOperand &MO =MI->getOperand(1);

1131assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&

1132"Invalid operand!");

1133

1134// Map the operand to its corresponding MCSymbol.

1135constMCSymbol *const MOSymbol =getMCSymbolForTOCPseudoMO(MO, *this);

1136

1137MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);

1138

1139// Map the machine operand to its corresponding MCSymbol, then map the

1140// global address operand to be a reference to the TOC entry we will

1141// synthesize later.

1142MCSymbol *TOCEntry =

1143 lookUpOrCreateTOCEntry(MOSymbol,getTOCEntryTypeForMO(MO), VK);

1144

1145MCSymbolRefExpr::VariantKind VKExpr =

1146 IsAIX ?MCSymbolRefExpr::VK_None :MCSymbolRefExpr::VK_PPC_TOC;

1147constMCExpr *Exp =MCSymbolRefExpr::create(TOCEntry, VKExpr, OutContext);

1148 TmpInst.getOperand(1) =MCOperand::createExpr(

1149 IsAIX ? getTOCEntryLoadingExprForXCOFF(MOSymbol, Exp, VK) : Exp);

1150

1151// Print MO for better readability

1152if (isVerbose() && IsAIX)

1153 OutStreamer->getCommentOS() << MO <<'\n';

1154 EmitToStreamer(*OutStreamer, TmpInst);

1155return;

1156 }

1157case PPC::ADDIStocHA: {

1158constMachineOperand &MO =MI->getOperand(2);

1159

1160assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&

1161"Invalid operand for ADDIStocHA.");

1162assert((IsAIX && !IsPPC64 &&

1163getCodeModel(*Subtarget, TM, MO) ==CodeModel::Large) &&

1164"This pseudo should only be selected for 32-bit large code model on"

1165" AIX.");

1166

1167// Transform %rd = ADDIStocHA %rA, @sym(%r2)

1168LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);

1169

1170// Change the opcode to ADDIS.

1171 TmpInst.setOpcode(PPC::ADDIS);

1172

1173// Map the machine operand to its corresponding MCSymbol.

1174MCSymbol *MOSymbol =getMCSymbolForTOCPseudoMO(MO, *this);

1175

1176MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);

1177

1178// Map the global address operand to be a reference to the TOC entry we

1179// will synthesize later. 'TOCEntry' is a label used to reference the

1180// storage allocated in the TOC which contains the address of 'MOSymbol'.

1181// If the symbol does not have the toc-data attribute, then we create the

1182// TOC entry on AIX. If the toc-data attribute is used, the TOC entry

1183// contains the data rather than the address of the MOSymbol.

1184if (![](constMachineOperand &MO) {

1185if (!MO.isGlobal())

1186returnfalse;

1187

1188constGlobalVariable *GV = dyn_cast<GlobalVariable>(MO.getGlobal());

1189if (!GV)

1190returnfalse;

1191return GV->hasAttribute("toc-data");

1192 }(MO)) {

1193 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol,getTOCEntryTypeForMO(MO), VK);

1194 }

1195

1196constMCExpr *Exp =MCSymbolRefExpr::create(

1197 MOSymbol,MCSymbolRefExpr::VK_PPC_U, OutContext);

1198 TmpInst.getOperand(2) =MCOperand::createExpr(Exp);

1199 EmitToStreamer(*OutStreamer, TmpInst);

1200return;

1201 }

1202case PPC::LWZtocL: {

1203constMachineOperand &MO =MI->getOperand(1);

1204

1205assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&

1206"Invalid operand for LWZtocL.");

1207assert(IsAIX && !IsPPC64 &&

1208getCodeModel(*Subtarget, TM, MO) ==CodeModel::Large &&

1209"This pseudo should only be selected for 32-bit large code model on"

1210" AIX.");

1211

1212// Transform %rd = LWZtocL @sym, %rs.

1213LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);

1214

1215// Change the opcode to lwz.

1216 TmpInst.setOpcode(PPC::LWZ);

1217

1218// Map the machine operand to its corresponding MCSymbol.

1219MCSymbol *MOSymbol =getMCSymbolForTOCPseudoMO(MO, *this);

1220

1221MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);

1222

1223// Always use TOC on AIX. Map the global address operand to be a reference

1224// to the TOC entry we will synthesize later. 'TOCEntry' is a label used to

1225// reference the storage allocated in the TOC which contains the address of

1226// 'MOSymbol'.

1227MCSymbol *TOCEntry =

1228 lookUpOrCreateTOCEntry(MOSymbol,getTOCEntryTypeForMO(MO), VK);

1229constMCExpr *Exp =MCSymbolRefExpr::create(TOCEntry,

1230MCSymbolRefExpr::VK_PPC_L,

1231 OutContext);

1232 TmpInst.getOperand(1) =MCOperand::createExpr(Exp);

1233 EmitToStreamer(*OutStreamer, TmpInst);

1234return;

1235 }

1236case PPC::ADDIStocHA8: {

1237// Transform %xd = ADDIStocHA8 %x2, @sym

1238LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);

1239

1240// Change the opcode to ADDIS8. If the global address is the address of

1241// an external symbol, is a jump table address, is a block address, or is a

1242// constant pool index with large code model enabled, then generate a TOC

1243// entry and reference that. Otherwise, reference the symbol directly.

1244 TmpInst.setOpcode(PPC::ADDIS8);

1245

1246constMachineOperand &MO =MI->getOperand(2);

1247assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&

1248"Invalid operand for ADDIStocHA8!");

1249

1250constMCSymbol *MOSymbol =getMCSymbolForTOCPseudoMO(MO, *this);

1251

1252MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);

1253

1254constbool GlobalToc =

1255 MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal());

1256

1257constCodeModel::Model CM =

1258 IsAIX ?getCodeModel(*Subtarget, TM, MO) :TM.getCodeModel();

1259

1260if (GlobalToc || MO.isJTI() || MO.isBlockAddress() ||

1261 (MO.isCPI() && CM ==CodeModel::Large))

1262 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol,getTOCEntryTypeForMO(MO), VK);

1263

1264 VK = IsAIX ?MCSymbolRefExpr::VK_PPC_U :MCSymbolRefExpr::VK_PPC_TOC_HA;

1265

1266constMCExpr *Exp =

1267MCSymbolRefExpr::create(MOSymbol, VK, OutContext);

1268

1269if (!MO.isJTI() && MO.getOffset())

1270Exp =MCBinaryExpr::createAdd(Exp,

1271MCConstantExpr::create(MO.getOffset(),

1272 OutContext),

1273 OutContext);

1274

1275 TmpInst.getOperand(2) =MCOperand::createExpr(Exp);

1276 EmitToStreamer(*OutStreamer, TmpInst);

1277return;

1278 }

1279case PPC::LDtocL: {

1280// Transform %xd = LDtocL @sym, %xs

1281LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);

1282

1283// Change the opcode to LD. If the global address is the address of

1284// an external symbol, is a jump table address, is a block address, or is

1285// a constant pool index with large code model enabled, then generate a

1286// TOC entry and reference that. Otherwise, reference the symbol directly.

1287 TmpInst.setOpcode(PPC::LD);

1288

1289constMachineOperand &MO =MI->getOperand(1);

1290assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() ||

1291 MO.isBlockAddress()) &&

1292"Invalid operand for LDtocL!");

1293

1294LLVM_DEBUG(assert(

1295 (!MO.isGlobal() || Subtarget->isGVIndirectSymbol(MO.getGlobal())) &&

1296"LDtocL used on symbol that could be accessed directly is "

1297"invalid. Must match ADDIStocHA8."));

1298

1299constMCSymbol *MOSymbol =getMCSymbolForTOCPseudoMO(MO, *this);

1300

1301MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);

1302CodeModel::Model CM =

1303 IsAIX ?getCodeModel(*Subtarget, TM, MO) :TM.getCodeModel();

1304if (!MO.isCPI() || CM ==CodeModel::Large)

1305 MOSymbol = lookUpOrCreateTOCEntry(MOSymbol,getTOCEntryTypeForMO(MO), VK);

1306

1307 VK = IsAIX ?MCSymbolRefExpr::VK_PPC_L :MCSymbolRefExpr::VK_PPC_TOC_LO;

1308constMCExpr *Exp =

1309MCSymbolRefExpr::create(MOSymbol, VK, OutContext);

1310 TmpInst.getOperand(1) =MCOperand::createExpr(Exp);

1311 EmitToStreamer(*OutStreamer, TmpInst);

1312return;

1313 }

1314case PPC::ADDItocL:

1315case PPC::ADDItocL8: {

1316// Transform %xd = ADDItocL %xs, @sym

1317LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);

1318

1319unsignedOp =MI->getOpcode();

1320

1321// Change the opcode to load address for toc-data.

1322// ADDItocL is only used for 32-bit toc-data on AIX and will always use LA.

1323 TmpInst.setOpcode(Op == PPC::ADDItocL8 ? (IsAIX ? PPC::LA8 : PPC::ADDI8)

1324 : PPC::LA);

1325

1326constMachineOperand &MO =MI->getOperand(2);

1327assert((Op == PPC::ADDItocL8)

1328 ? (MO.isGlobal() || MO.isCPI())

1329 : MO.isGlobal() &&"Invalid operand for ADDItocL8.");

1330assert(!(MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal())) &&

1331"Interposable definitions must use indirect accesses.");

1332

1333// Map the operand to its corresponding MCSymbol.

1334constMCSymbol *const MOSymbol =getMCSymbolForTOCPseudoMO(MO, *this);

1335

1336constMCExpr *Exp =MCSymbolRefExpr::create(

1337 MOSymbol,

1338 IsAIX ?MCSymbolRefExpr::VK_PPC_L :MCSymbolRefExpr::VK_PPC_TOC_LO,

1339 OutContext);

1340

1341 TmpInst.getOperand(2) =MCOperand::createExpr(Exp);

1342 EmitToStreamer(*OutStreamer, TmpInst);

1343return;

1344 }

1345case PPC::ADDISgotTprelHA: {

1346// Transform: %xd = ADDISgotTprelHA %x2, @sym

1347// Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha

1348assert(IsPPC64 &&"Not supported for 32-bit PowerPC");

1349constMachineOperand &MO =MI->getOperand(2);

1350constGlobalValue *GValue = MO.getGlobal();

1351MCSymbol *MOSymbol = getSymbol(GValue);

1352constMCExpr *SymGotTprel =

1353MCSymbolRefExpr::create(MOSymbol,MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA,

1354 OutContext);

1355 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::ADDIS8)

1356 .addReg(MI->getOperand(0).getReg())

1357 .addReg(MI->getOperand(1).getReg())

1358 .addExpr(SymGotTprel));

1359return;

1360 }

1361case PPC::LDgotTprelL:

1362case PPC::LDgotTprelL32: {

1363// Transform %xd = LDgotTprelL @sym, %xs

1364LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);

1365

1366// Change the opcode to LD.

1367 TmpInst.setOpcode(IsPPC64 ? PPC::LD : PPC::LWZ);

1368constMachineOperand &MO =MI->getOperand(1);

1369constGlobalValue *GValue = MO.getGlobal();

1370MCSymbol *MOSymbol = getSymbol(GValue);

1371constMCExpr *Exp =MCSymbolRefExpr::create(

1372 MOSymbol, IsPPC64 ?MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO

1373 :MCSymbolRefExpr::VK_PPC_GOT_TPREL,

1374 OutContext);

1375 TmpInst.getOperand(1) =MCOperand::createExpr(Exp);

1376 EmitToStreamer(*OutStreamer, TmpInst);

1377return;

1378 }

1379

1380case PPC::PPC32PICGOT: {

1381MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));

1382MCSymbol *GOTRef = OutContext.createTempSymbol();

1383MCSymbol *NextInstr = OutContext.createTempSymbol();

1384

1385 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::BL)

1386// FIXME: We would like an efficient form for this, so we don't have to do

1387// a lot of extra uniquing.

1388 .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext)));

1389constMCExpr *OffsExpr =

1390MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext),

1391MCSymbolRefExpr::create(GOTRef, OutContext),

1392 OutContext);

1393 OutStreamer->emitLabel(GOTRef);

1394 OutStreamer->emitValue(OffsExpr, 4);

1395 OutStreamer->emitLabel(NextInstr);

1396 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::MFLR)

1397 .addReg(MI->getOperand(0).getReg()));

1398 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::LWZ)

1399 .addReg(MI->getOperand(1).getReg())

1400 .addImm(0)

1401 .addReg(MI->getOperand(0).getReg()));

1402 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::ADD4)

1403 .addReg(MI->getOperand(0).getReg())

1404 .addReg(MI->getOperand(1).getReg())

1405 .addReg(MI->getOperand(0).getReg()));

1406return;

1407 }

1408case PPC::PPC32GOT: {

1409MCSymbol *GOTSymbol =

1410 OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));

1411constMCExpr *SymGotTlsL =MCSymbolRefExpr::create(

1412 GOTSymbol,MCSymbolRefExpr::VK_PPC_LO, OutContext);

1413constMCExpr *SymGotTlsHA =MCSymbolRefExpr::create(

1414 GOTSymbol,MCSymbolRefExpr::VK_PPC_HA, OutContext);

1415 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::LI)

1416 .addReg(MI->getOperand(0).getReg())

1417 .addExpr(SymGotTlsL));

1418 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::ADDIS)

1419 .addReg(MI->getOperand(0).getReg())

1420 .addReg(MI->getOperand(0).getReg())

1421 .addExpr(SymGotTlsHA));

1422return;

1423 }

1424case PPC::ADDIStlsgdHA: {

1425// Transform: %xd = ADDIStlsgdHA %x2, @sym

1426// Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha

1427assert(IsPPC64 &&"Not supported for 32-bit PowerPC");

1428constMachineOperand &MO =MI->getOperand(2);

1429constGlobalValue *GValue = MO.getGlobal();

1430MCSymbol *MOSymbol = getSymbol(GValue);

1431constMCExpr *SymGotTlsGD =

1432MCSymbolRefExpr::create(MOSymbol,MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA,

1433 OutContext);

1434 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::ADDIS8)

1435 .addReg(MI->getOperand(0).getReg())

1436 .addReg(MI->getOperand(1).getReg())

1437 .addExpr(SymGotTlsGD));

1438return;

1439 }

1440case PPC::ADDItlsgdL:

1441// Transform: %xd = ADDItlsgdL %xs, @sym

1442// Into: %xd = ADDI8 %xs, sym@got@tlsgd@l

1443case PPC::ADDItlsgdL32: {

1444// Transform: %rd = ADDItlsgdL32 %rs, @sym

1445// Into: %rd = ADDI %rs, sym@got@tlsgd

1446constMachineOperand &MO =MI->getOperand(2);

1447constGlobalValue *GValue = MO.getGlobal();

1448MCSymbol *MOSymbol = getSymbol(GValue);

1449constMCExpr *SymGotTlsGD =MCSymbolRefExpr::create(

1450 MOSymbol, IsPPC64 ?MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO

1451 :MCSymbolRefExpr::VK_PPC_GOT_TLSGD,

1452 OutContext);

1453 EmitToStreamer(*OutStreamer,

1454MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)

1455 .addReg(MI->getOperand(0).getReg())

1456 .addReg(MI->getOperand(1).getReg())

1457 .addExpr(SymGotTlsGD));

1458return;

1459 }

1460case PPC::GETtlsMOD32AIX:

1461case PPC::GETtlsMOD64AIX:

1462// Transform: %r3 = GETtlsMODNNAIX %r3 (for NN == 32/64).

1463// Into: BLA .__tls_get_mod()

1464// Input parameter is a module handle (_$TLSML[TC]@ml) for all variables.

1465case PPC::GETtlsADDR:

1466// Transform: %x3 = GETtlsADDR %x3, @sym

1467// Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd)

1468case PPC::GETtlsADDRPCREL:

1469case PPC::GETtlsADDR32AIX:

1470case PPC::GETtlsADDR64AIX:

1471// Transform: %r3 = GETtlsADDRNNAIX %r3, %r4 (for NN == 32/64).

1472// Into: BLA .__tls_get_addr()

1473// Unlike on Linux, there is no symbol or relocation needed for this call.

1474case PPC::GETtlsADDR32: {

1475// Transform: %r3 = GETtlsADDR32 %r3, @sym

1476// Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT

1477 EmitTlsCall(MI,MCSymbolRefExpr::VK_PPC_TLSGD);

1478return;

1479 }

1480case PPC::GETtlsTpointer32AIX: {

1481// Transform: %r3 = GETtlsTpointer32AIX

1482// Into: BLA .__get_tpointer()

1483 EmitAIXTlsCallHelper(MI);

1484return;

1485 }

1486case PPC::ADDIStlsldHA: {

1487// Transform: %xd = ADDIStlsldHA %x2, @sym

1488// Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha

1489assert(IsPPC64 &&"Not supported for 32-bit PowerPC");

1490constMachineOperand &MO =MI->getOperand(2);

1491constGlobalValue *GValue = MO.getGlobal();

1492MCSymbol *MOSymbol = getSymbol(GValue);

1493constMCExpr *SymGotTlsLD =

1494MCSymbolRefExpr::create(MOSymbol,MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA,

1495 OutContext);

1496 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::ADDIS8)

1497 .addReg(MI->getOperand(0).getReg())

1498 .addReg(MI->getOperand(1).getReg())

1499 .addExpr(SymGotTlsLD));

1500return;

1501 }

1502case PPC::ADDItlsldL:

1503// Transform: %xd = ADDItlsldL %xs, @sym

1504// Into: %xd = ADDI8 %xs, sym@got@tlsld@l

1505case PPC::ADDItlsldL32: {

1506// Transform: %rd = ADDItlsldL32 %rs, @sym

1507// Into: %rd = ADDI %rs, sym@got@tlsld

1508constMachineOperand &MO =MI->getOperand(2);

1509constGlobalValue *GValue = MO.getGlobal();

1510MCSymbol *MOSymbol = getSymbol(GValue);

1511constMCExpr *SymGotTlsLD =MCSymbolRefExpr::create(

1512 MOSymbol, IsPPC64 ?MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO

1513 :MCSymbolRefExpr::VK_PPC_GOT_TLSLD,

1514 OutContext);

1515 EmitToStreamer(*OutStreamer,

1516MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)

1517 .addReg(MI->getOperand(0).getReg())

1518 .addReg(MI->getOperand(1).getReg())

1519 .addExpr(SymGotTlsLD));

1520return;

1521 }

1522case PPC::GETtlsldADDR:

1523// Transform: %x3 = GETtlsldADDR %x3, @sym

1524// Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld)

1525case PPC::GETtlsldADDRPCREL:

1526case PPC::GETtlsldADDR32: {

1527// Transform: %r3 = GETtlsldADDR32 %r3, @sym

1528// Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT

1529 EmitTlsCall(MI,MCSymbolRefExpr::VK_PPC_TLSLD);

1530return;

1531 }

1532case PPC::ADDISdtprelHA:

1533// Transform: %xd = ADDISdtprelHA %xs, @sym

1534// Into: %xd = ADDIS8 %xs, sym@dtprel@ha

1535case PPC::ADDISdtprelHA32: {

1536// Transform: %rd = ADDISdtprelHA32 %rs, @sym

1537// Into: %rd = ADDIS %rs, sym@dtprel@ha

1538constMachineOperand &MO =MI->getOperand(2);

1539constGlobalValue *GValue = MO.getGlobal();

1540MCSymbol *MOSymbol = getSymbol(GValue);

1541constMCExpr *SymDtprel =

1542MCSymbolRefExpr::create(MOSymbol,MCSymbolRefExpr::VK_PPC_DTPREL_HA,

1543 OutContext);

1544 EmitToStreamer(

1545 *OutStreamer,

1546MCInstBuilder(IsPPC64 ? PPC::ADDIS8 : PPC::ADDIS)

1547 .addReg(MI->getOperand(0).getReg())

1548 .addReg(MI->getOperand(1).getReg())

1549 .addExpr(SymDtprel));

1550return;

1551 }

1552case PPC::PADDIdtprel: {

1553// Transform: %rd = PADDIdtprel %rs, @sym

1554// Into: %rd = PADDI8 %rs, sym@dtprel

1555constMachineOperand &MO =MI->getOperand(2);

1556constGlobalValue *GValue = MO.getGlobal();

1557MCSymbol *MOSymbol = getSymbol(GValue);

1558constMCExpr *SymDtprel =MCSymbolRefExpr::create(

1559 MOSymbol,MCSymbolRefExpr::VK_DTPREL, OutContext);

1560 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::PADDI8)

1561 .addReg(MI->getOperand(0).getReg())

1562 .addReg(MI->getOperand(1).getReg())

1563 .addExpr(SymDtprel));

1564return;

1565 }

1566

1567case PPC::ADDIdtprelL:

1568// Transform: %xd = ADDIdtprelL %xs, @sym

1569// Into: %xd = ADDI8 %xs, sym@dtprel@l

1570case PPC::ADDIdtprelL32: {

1571// Transform: %rd = ADDIdtprelL32 %rs, @sym

1572// Into: %rd = ADDI %rs, sym@dtprel@l

1573constMachineOperand &MO =MI->getOperand(2);

1574constGlobalValue *GValue = MO.getGlobal();

1575MCSymbol *MOSymbol = getSymbol(GValue);

1576constMCExpr *SymDtprel =

1577MCSymbolRefExpr::create(MOSymbol,MCSymbolRefExpr::VK_PPC_DTPREL_LO,

1578 OutContext);

1579 EmitToStreamer(*OutStreamer,

1580MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)

1581 .addReg(MI->getOperand(0).getReg())

1582 .addReg(MI->getOperand(1).getReg())

1583 .addExpr(SymDtprel));

1584return;

1585 }

1586case PPC::MFOCRF:

1587case PPC::MFOCRF8:

1588if (!Subtarget->hasMFOCRF()) {

1589// Transform: %r3 = MFOCRF %cr7

1590// Into: %r3 = MFCR ;; cr7

1591unsigned NewOpcode =

1592MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8;

1593 OutStreamer->AddComment(PPCInstPrinter::

1594getRegisterName(MI->getOperand(1).getReg()));

1595 EmitToStreamer(*OutStreamer,MCInstBuilder(NewOpcode)

1596 .addReg(MI->getOperand(0).getReg()));

1597return;

1598 }

1599break;

1600case PPC::MTOCRF:

1601case PPC::MTOCRF8:

1602if (!Subtarget->hasMFOCRF()) {

1603// Transform: %cr7 = MTOCRF %r3

1604// Into: MTCRF mask, %r3 ;; cr7

1605unsigned NewOpcode =

1606MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8;

1607unsignedMask = 0x80 >> OutContext.getRegisterInfo()

1608 ->getEncodingValue(MI->getOperand(0).getReg());

1609 OutStreamer->AddComment(PPCInstPrinter::

1610getRegisterName(MI->getOperand(0).getReg()));

1611 EmitToStreamer(*OutStreamer,MCInstBuilder(NewOpcode)

1612 .addImm(Mask)

1613 .addReg(MI->getOperand(1).getReg()));

1614return;

1615 }

1616break;

1617case PPC::LD:

1618case PPC::STD:

1619case PPC::LWA_32:

1620case PPC::LWA: {

1621// Verify alignment is legal, so we don't create relocations

1622// that can't be supported.

1623unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1;

1624// For non-TOC-based local-exec TLS accesses with non-zero offsets, the

1625// machine operand (which is a TargetGlobalTLSAddress) is expected to be

1626// the same operand for both loads and stores.

1627for (constMachineOperand &TempMO :MI->operands()) {

1628if (((TempMO.getTargetFlags() ==PPCII::MO_TPREL_FLAG ||

1629 TempMO.getTargetFlags() ==PPCII::MO_TLSLD_FLAG)) &&

1630 TempMO.getOperandNo() == 1)

1631 OpNum = 1;

1632 }

1633constMachineOperand &MO =MI->getOperand(OpNum);

1634if (MO.isGlobal()) {

1635constDataLayout &DL = MO.getGlobal()->getDataLayout();

1636if (MO.getGlobal()->getPointerAlignment(DL) < 4)

1637llvm_unreachable("Global must be word-aligned for LD, STD, LWA!");

1638 }

1639// As these load/stores share common code with the following load/stores,

1640// fall through to the subsequent cases in order to either process the

1641// non-TOC-based local-exec sequence or to process the instruction normally.

1642 [[fallthrough]];

1643 }

1644case PPC::LBZ:

1645case PPC::LBZ8:

1646case PPC::LHA:

1647case PPC::LHA8:

1648case PPC::LHZ:

1649case PPC::LHZ8:

1650case PPC::LWZ:

1651case PPC::LWZ8:

1652case PPC::STB:

1653case PPC::STB8:

1654case PPC::STH:

1655case PPC::STH8:

1656case PPC::STW:

1657case PPC::STW8:

1658case PPC::LFS:

1659case PPC::STFS:

1660case PPC::LFD:

1661case PPC::STFD:

1662case PPC::ADDI8: {

1663// A faster non-TOC-based local-[exec|dynamic] sequence is represented by

1664// `addi` or a load/store instruction (that directly loads or stores off of

1665// the thread pointer) with an immediate operand having the

1666// [MO_TPREL_FLAG|MO_TLSLD_FLAG]. Such instructions do not otherwise arise.

1667if (!HasAIXSmallLocalTLS)

1668break;

1669bool IsMIADDI8 =MI->getOpcode() == PPC::ADDI8;

1670unsigned OpNum = IsMIADDI8 ? 2 : 1;

1671constMachineOperand &MO =MI->getOperand(OpNum);

1672unsignedFlag = MO.getTargetFlags();

1673if (Flag ==PPCII::MO_TPREL_FLAG ||

1674 Flag ==PPCII::MO_GOT_TPREL_PCREL_FLAG ||

1675 Flag ==PPCII::MO_TPREL_PCREL_FLAG || Flag ==PPCII::MO_TLSLD_FLAG) {

1676LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);

1677

1678constMCExpr *Expr = getAdjustedFasterLocalExpr(MO, MO.getOffset());

1679if (Expr)

1680 TmpInst.getOperand(OpNum) =MCOperand::createExpr(Expr);

1681

1682// Change the opcode to load address if the original opcode is an `addi`.

1683if (IsMIADDI8)

1684 TmpInst.setOpcode(PPC::LA8);

1685

1686 EmitToStreamer(*OutStreamer, TmpInst);

1687return;

1688 }

1689// Now process the instruction normally.

1690break;

1691 }

1692case PPC::PseudoEIEIO: {

1693 EmitToStreamer(

1694 *OutStreamer,

1695MCInstBuilder(PPC::ORI).addReg(PPC::X2).addReg(PPC::X2).addImm(0));

1696 EmitToStreamer(

1697 *OutStreamer,

1698MCInstBuilder(PPC::ORI).addReg(PPC::X2).addReg(PPC::X2).addImm(0));

1699 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::EnforceIEIO));

1700return;

1701 }

1702 }

1703

1704LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);

1705 EmitToStreamer(*OutStreamer, TmpInst);

1706}

1707

1708// For non-TOC-based local-[exec|dynamic] variables that have a non-zero offset,

1709// we need to create a new MCExpr that adds the non-zero offset to the address

1710// of the local-[exec|dynamic] variable that will be used in either an addi,

1711// load or store. However, the final displacement for these instructions must be

1712// between [-32768, 32768), so if the TLS address + its non-zero offset is

1713// greater than 32KB, a new MCExpr is produced to accommodate this situation.

1714constMCExpr *

1715PPCAsmPrinter::getAdjustedFasterLocalExpr(constMachineOperand &MO,

1716 int64_tOffset) {

1717// Non-zero offsets (for loads, stores or `addi`) require additional handling.

1718// When the offset is zero, there is no need to create an adjusted MCExpr.

1719if (!Offset)

1720returnnullptr;

1721

1722assert(MO.isGlobal() &&"Only expecting a global MachineOperand here!");

1723constGlobalValue *GValue = MO.getGlobal();

1724TLSModel::Model Model =TM.getTLSModel(GValue);

1725assert((Model ==TLSModel::LocalExec || Model ==TLSModel::LocalDynamic) &&

1726"Only local-[exec|dynamic] accesses are handled!");

1727

1728bool IsGlobalADeclaration = GValue->isDeclarationForLinker();

1729// Find the GlobalVariable that corresponds to the particular TLS variable

1730// in the TLS variable-to-address mapping. All TLS variables should exist

1731// within this map, with the exception of TLS variables marked as extern.

1732constauto TLSVarsMapEntryIter = TLSVarsToAddressMapping.find(GValue);

1733if (TLSVarsMapEntryIter == TLSVarsToAddressMapping.end())

1734assert(IsGlobalADeclaration &&

1735"Only expecting to find extern TLS variables not present in the TLS "

1736"variable-to-address map!");

1737

1738unsigned TLSVarAddress =

1739 IsGlobalADeclaration ? 0 : TLSVarsMapEntryIter->second;

1740ptrdiff_t FinalAddress = (TLSVarAddress +Offset);

1741// If the address of the TLS variable + the offset is less than 32KB,

1742// or if the TLS variable is extern, we simply produce an MCExpr to add the

1743// non-zero offset to the TLS variable address.

1744// For when TLS variables are extern, this is safe to do because we can

1745// assume that the address of extern TLS variables are zero.

1746constMCExpr *Expr =MCSymbolRefExpr::create(

1747 getSymbol(GValue),

1748 Model ==TLSModel::LocalExec ?MCSymbolRefExpr::VK_PPC_AIX_TLSLE

1749 :MCSymbolRefExpr::VK_PPC_AIX_TLSLD,

1750 OutContext);

1751 Expr =MCBinaryExpr::createAdd(

1752 Expr,MCConstantExpr::create(Offset, OutContext), OutContext);

1753if (FinalAddress >= 32768) {

1754// Handle the written offset for cases where:

1755// TLS variable address + Offset > 32KB.

1756

1757// The assembly that is printed will look like:

1758// TLSVar@le + Offset - Delta

1759// where Delta is a multiple of 64KB: ((FinalAddress + 32768) & ~0xFFFF).

1760ptrdiff_t Delta = ((FinalAddress + 32768) & ~0xFFFF);

1761// Check that the total instruction displacement fits within [-32768,32768).

1762 [[maybe_unused]]ptrdiff_t InstDisp = TLSVarAddress +Offset - Delta;

1763assert(

1764 ((InstDisp < 32768) && (InstDisp >= -32768)) &&

1765"Expecting the instruction displacement for local-[exec|dynamic] TLS "

1766"variables to be between [-32768, 32768)!");

1767 Expr =MCBinaryExpr::createAdd(

1768 Expr,MCConstantExpr::create(-Delta, OutContext), OutContext);

1769 }

1770

1771return Expr;

1772}

1773

1774void PPCLinuxAsmPrinter::emitGNUAttributes(Module &M) {

1775// Emit float ABI into GNU attribute

1776Metadata *MD =M.getModuleFlag("float-abi");

1777MDString *FloatABI = dyn_cast_or_null<MDString>(MD);

1778if (!FloatABI)

1779return;

1780StringRef flt = FloatABI->getString();

1781// TODO: Support emitting soft-fp and hard double/single attributes.

1782if (flt =="doubledouble")

1783 OutStreamer->emitGNUAttribute(Tag_GNU_Power_ABI_FP,

1784 Val_GNU_Power_ABI_HardFloat_DP |

1785 Val_GNU_Power_ABI_LDBL_IBM128);

1786elseif (flt =="ieeequad")

1787 OutStreamer->emitGNUAttribute(Tag_GNU_Power_ABI_FP,

1788 Val_GNU_Power_ABI_HardFloat_DP |

1789 Val_GNU_Power_ABI_LDBL_IEEE128);

1790elseif (flt =="ieeedouble")

1791 OutStreamer->emitGNUAttribute(Tag_GNU_Power_ABI_FP,

1792 Val_GNU_Power_ABI_HardFloat_DP |

1793 Val_GNU_Power_ABI_LDBL_64);

1794}

1795

1796void PPCLinuxAsmPrinter::emitInstruction(constMachineInstr *MI) {

1797if (!Subtarget->isPPC64())

1798return PPCAsmPrinter::emitInstruction(MI);

1799

1800switch (MI->getOpcode()) {

1801default:

1802break;

1803case TargetOpcode::PATCHABLE_FUNCTION_ENTER: {

1804// .begin:

1805// b .end # lis 0, FuncId[16..32]

1806// nop # li 0, FuncId[0..15]

1807// std 0, -8(1)

1808// mflr 0

1809// bl __xray_FunctionEntry

1810// mtlr 0

1811// .end:

1812//

1813// Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number

1814// of instructions change.

1815// XRAY is only supported on PPC Linux little endian.

1816if (!MAI->isLittleEndian())

1817break;

1818MCSymbol *BeginOfSled = OutContext.createTempSymbol();

1819MCSymbol *EndOfSled = OutContext.createTempSymbol();

1820 OutStreamer->emitLabel(BeginOfSled);

1821 EmitToStreamer(*OutStreamer,

1822MCInstBuilder(PPC::B).addExpr(

1823MCSymbolRefExpr::create(EndOfSled, OutContext)));

1824 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::NOP));

1825 EmitToStreamer(

1826 *OutStreamer,

1827MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1));

1828 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::MFLR8).addReg(PPC::X0));

1829 EmitToStreamer(*OutStreamer,

1830MCInstBuilder(PPC::BL8_NOP)

1831 .addExpr(MCSymbolRefExpr::create(

1832 OutContext.getOrCreateSymbol("__xray_FunctionEntry"),

1833 OutContext)));

1834 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::MTLR8).addReg(PPC::X0));

1835 OutStreamer->emitLabel(EndOfSled);

1836 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER, 2);

1837break;

1838 }

1839case TargetOpcode::PATCHABLE_RET: {

1840unsigned RetOpcode =MI->getOperand(0).getImm();

1841MCInst RetInst;

1842 RetInst.setOpcode(RetOpcode);

1843for (constauto &MO :llvm::drop_begin(MI->operands())) {

1844MCOperand MCOp;

1845if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this))

1846 RetInst.addOperand(MCOp);

1847 }

1848

1849bool IsConditional;

1850if (RetOpcode == PPC::BCCLR) {

1851 IsConditional =true;

1852 }elseif (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 ||

1853 RetOpcode == PPC::TCRETURNai8) {

1854break;

1855 }elseif (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) {

1856 IsConditional =false;

1857 }else {

1858 EmitToStreamer(*OutStreamer, RetInst);

1859return;

1860 }

1861

1862MCSymbol *FallthroughLabel;

1863if (IsConditional) {

1864// Before:

1865// bgtlr cr0

1866//

1867// After:

1868// ble cr0, .end

1869// .p2align 3

1870// .begin:

1871// blr # lis 0, FuncId[16..32]

1872// nop # li 0, FuncId[0..15]

1873// std 0, -8(1)

1874// mflr 0

1875// bl __xray_FunctionExit

1876// mtlr 0

1877// blr

1878// .end:

1879//

1880// Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number

1881// of instructions change.

1882 FallthroughLabel = OutContext.createTempSymbol();

1883 EmitToStreamer(

1884 *OutStreamer,

1885MCInstBuilder(PPC::BCC)

1886 .addImm(PPC::InvertPredicate(

1887static_cast<PPC::Predicate>(MI->getOperand(1).getImm())))

1888 .addReg(MI->getOperand(2).getReg())

1889 .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext)));

1890 RetInst =MCInst();

1891 RetInst.setOpcode(PPC::BLR8);

1892 }

1893// .p2align 3

1894// .begin:

1895// b(lr)? # lis 0, FuncId[16..32]

1896// nop # li 0, FuncId[0..15]

1897// std 0, -8(1)

1898// mflr 0

1899// bl __xray_FunctionExit

1900// mtlr 0

1901// b(lr)?

1902//

1903// Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number

1904// of instructions change.

1905 OutStreamer->emitCodeAlignment(Align(8), &getSubtargetInfo());

1906MCSymbol *BeginOfSled = OutContext.createTempSymbol();

1907 OutStreamer->emitLabel(BeginOfSled);

1908 EmitToStreamer(*OutStreamer, RetInst);

1909 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::NOP));

1910 EmitToStreamer(

1911 *OutStreamer,

1912MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1));

1913 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::MFLR8).addReg(PPC::X0));

1914 EmitToStreamer(*OutStreamer,

1915MCInstBuilder(PPC::BL8_NOP)

1916 .addExpr(MCSymbolRefExpr::create(

1917 OutContext.getOrCreateSymbol("__xray_FunctionExit"),

1918 OutContext)));

1919 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::MTLR8).addReg(PPC::X0));

1920 EmitToStreamer(*OutStreamer, RetInst);

1921if (IsConditional)

1922 OutStreamer->emitLabel(FallthroughLabel);

1923 recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT, 2);

1924return;

1925 }

1926case TargetOpcode::PATCHABLE_FUNCTION_EXIT:

1927llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted");

1928case TargetOpcode::PATCHABLE_TAIL_CALL:

1929// TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a

1930// normal function exit from a tail exit.

1931llvm_unreachable("Tail call is handled in the normal case. See comments "

1932"around this assert.");

1933 }

1934return PPCAsmPrinter::emitInstruction(MI);

1935}

1936

1937void PPCLinuxAsmPrinter::emitStartOfAsmFile(Module &M) {

1938if (static_cast<constPPCTargetMachine &>(TM).isELFv2ABI()) {

1939PPCTargetStreamer *TS =

1940static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());

1941 TS->emitAbiVersion(2);

1942 }

1943

1944if (static_cast<constPPCTargetMachine &>(TM).isPPC64() ||

1945 !isPositionIndependent())

1946returnAsmPrinter::emitStartOfAsmFile(M);

1947

1948if (M.getPICLevel() ==PICLevel::SmallPIC)

1949returnAsmPrinter::emitStartOfAsmFile(M);

1950

1951 OutStreamer->switchSection(OutContext.getELFSection(

1952".got2",ELF::SHT_PROGBITS,ELF::SHF_WRITE |ELF::SHF_ALLOC));

1953

1954MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC"));

1955MCSymbol *CurrentPos = OutContext.createTempSymbol();

1956

1957 OutStreamer->emitLabel(CurrentPos);

1958

1959// The GOT pointer points to the middle of the GOT, in order to reference the

1960// entire 64kB range. 0x8000 is the midpoint.

1961constMCExpr *tocExpr =

1962MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext),

1963MCConstantExpr::create(0x8000, OutContext),

1964 OutContext);

1965

1966 OutStreamer->emitAssignment(TOCSym, tocExpr);

1967

1968 OutStreamer->switchSection(getObjFileLowering().getTextSection());

1969}

1970

1971void PPCLinuxAsmPrinter::emitFunctionEntryLabel() {

1972// linux/ppc32 - Normal entry label.

1973if (!Subtarget->isPPC64() &&

1974 (!isPositionIndependent() ||

1975 MF->getFunction().getParent()->getPICLevel() ==PICLevel::SmallPIC))

1976returnAsmPrinter::emitFunctionEntryLabel();

1977

1978if (!Subtarget->isPPC64()) {

1979constPPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();

1980if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) {

1981MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(*MF);

1982MCSymbol *PICBase = MF->getPICBaseSymbol();

1983 OutStreamer->emitLabel(RelocSymbol);

1984

1985constMCExpr *OffsExpr =

1986MCBinaryExpr::createSub(

1987MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")),

1988 OutContext),

1989MCSymbolRefExpr::create(PICBase, OutContext),

1990 OutContext);

1991 OutStreamer->emitValue(OffsExpr, 4);

1992 OutStreamer->emitLabel(CurrentFnSym);

1993return;

1994 }else

1995returnAsmPrinter::emitFunctionEntryLabel();

1996 }

1997

1998// ELFv2 ABI - Normal entry label.

1999if (Subtarget->isELFv2ABI()) {

2000// In the Large code model, we allow arbitrary displacements between

2001// the text section and its associated TOC section. We place the

2002// full 8-byte offset to the TOC in memory immediately preceding

2003// the function global entry point.

2004if (TM.getCodeModel() ==CodeModel::Large

2005 && !MF->getRegInfo().use_empty(PPC::X2)) {

2006constPPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();

2007

2008MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC."));

2009MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(*MF);

2010constMCExpr *TOCDeltaExpr =

2011MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext),

2012MCSymbolRefExpr::create(GlobalEPSymbol,

2013 OutContext),

2014 OutContext);

2015

2016 OutStreamer->emitLabel(PPCFI->getTOCOffsetSymbol(*MF));

2017 OutStreamer->emitValue(TOCDeltaExpr, 8);

2018 }

2019returnAsmPrinter::emitFunctionEntryLabel();

2020 }

2021

2022// Emit an official procedure descriptor.

2023MCSectionSubPair Current = OutStreamer->getCurrentSection();

2024MCSectionELF *Section = OutStreamer->getContext().getELFSection(

2025".opd",ELF::SHT_PROGBITS,ELF::SHF_WRITE |ELF::SHF_ALLOC);

2026 OutStreamer->switchSection(Section);

2027 OutStreamer->emitLabel(CurrentFnSym);

2028 OutStreamer->emitValueToAlignment(Align(8));

2029MCSymbol *Symbol1 = CurrentFnSymForSize;

2030// Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function

2031// entry point.

2032 OutStreamer->emitValue(MCSymbolRefExpr::create(Symbol1, OutContext),

2033 8/*size*/);

2034MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC."));

2035// Generates a R_PPC64_TOC relocation for TOC base insertion.

2036 OutStreamer->emitValue(

2037MCSymbolRefExpr::create(Symbol2,MCSymbolRefExpr::VK_PPC_TOCBASE, OutContext),

2038 8/*size*/);

2039// Emit a null environment pointer.

2040 OutStreamer->emitIntValue(0, 8/* size */);

2041 OutStreamer->switchSection(Current.first, Current.second);

2042}

2043

2044void PPCLinuxAsmPrinter::emitEndOfAsmFile(Module &M) {

2045constDataLayout &DL = getDataLayout();

2046

2047bool isPPC64 =DL.getPointerSizeInBits() == 64;

2048

2049PPCTargetStreamer *TS =

2050static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());

2051

2052// If we are using any values provided by Glibc at fixed addresses,

2053// we need to ensure that the Glibc used at link time actually provides

2054// those values. All versions of Glibc that do will define the symbol

2055// named "__parse_hwcap_and_convert_at_platform".

2056if (static_cast<constPPCTargetMachine &>(TM).hasGlibcHWCAPAccess())

2057 OutStreamer->emitSymbolValue(

2058 GetExternalSymbolSymbol("__parse_hwcap_and_convert_at_platform"),

2059 MAI->getCodePointerSize());

2060 emitGNUAttributes(M);

2061

2062if (!TOC.empty()) {

2063constchar *Name = isPPC64 ?".toc" :".got2";

2064MCSectionELF *Section = OutContext.getELFSection(

2065Name,ELF::SHT_PROGBITS,ELF::SHF_WRITE |ELF::SHF_ALLOC);

2066 OutStreamer->switchSection(Section);

2067if (!isPPC64)

2068 OutStreamer->emitValueToAlignment(Align(4));

2069

2070for (constauto &TOCMapPair : TOC) {

2071constMCSymbol *const TOCEntryTarget = TOCMapPair.first.first;

2072MCSymbol *const TOCEntryLabel = TOCMapPair.second;

2073

2074 OutStreamer->emitLabel(TOCEntryLabel);

2075if (isPPC64)

2076 TS->emitTCEntry(*TOCEntryTarget, TOCMapPair.first.second);

2077else

2078 OutStreamer->emitSymbolValue(TOCEntryTarget, 4);

2079 }

2080 }

2081

2082 PPCAsmPrinter::emitEndOfAsmFile(M);

2083}

2084

2085/// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2.

2086void PPCLinuxAsmPrinter::emitFunctionBodyStart() {

2087// In the ELFv2 ABI, in functions that use the TOC register, we need to

2088// provide two entry points. The ABI guarantees that when calling the

2089// local entry point, r2 is set up by the caller to contain the TOC base

2090// for this function, and when calling the global entry point, r12 is set

2091// up by the caller to hold the address of the global entry point. We

2092// thus emit a prefix sequence along the following lines:

2093//

2094// func:

2095// .Lfunc_gepNN:

2096// # global entry point

2097// addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha

2098// addi r2,r2,(.TOC.-.Lfunc_gepNN)@l

2099// .Lfunc_lepNN:

2100// .localentry func, .Lfunc_lepNN-.Lfunc_gepNN

2101// # local entry point, followed by function body

2102//

2103// For the Large code model, we create

2104//

2105// .Lfunc_tocNN:

2106// .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel

2107// func:

2108// .Lfunc_gepNN:

2109// # global entry point

2110// ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12)

2111// add r2,r2,r12

2112// .Lfunc_lepNN:

2113// .localentry func, .Lfunc_lepNN-.Lfunc_gepNN

2114// # local entry point, followed by function body

2115//

2116// This ensures we have r2 set up correctly while executing the function

2117// body, no matter which entry point is called.

2118constPPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();

2119constbool UsesX2OrR2 = !MF->getRegInfo().use_empty(PPC::X2) ||

2120 !MF->getRegInfo().use_empty(PPC::R2);

2121constbool PCrelGEPRequired = Subtarget->isUsingPCRelativeCalls() &&

2122 UsesX2OrR2 && PPCFI->usesTOCBasePtr();

2123constbool NonPCrelGEPRequired = !Subtarget->isUsingPCRelativeCalls() &&

2124 Subtarget->isELFv2ABI() && UsesX2OrR2;

2125

2126// Only do all that if the function uses R2 as the TOC pointer

2127// in the first place. We don't need the global entry point if the

2128// function uses R2 as an allocatable register.

2129if (NonPCrelGEPRequired || PCrelGEPRequired) {

2130// Note: The logic here must be synchronized with the code in the

2131// branch-selection pass which sets the offset of the first block in the

2132// function. This matters because it affects the alignment.

2133MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(*MF);

2134 OutStreamer->emitLabel(GlobalEntryLabel);

2135constMCSymbolRefExpr *GlobalEntryLabelExp =

2136MCSymbolRefExpr::create(GlobalEntryLabel, OutContext);

2137

2138if (TM.getCodeModel() !=CodeModel::Large) {

2139MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC."));

2140constMCExpr *TOCDeltaExpr =

2141MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext),

2142 GlobalEntryLabelExp, OutContext);

2143

2144constMCExpr *TOCDeltaHi =PPCMCExpr::createHa(TOCDeltaExpr, OutContext);

2145 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::ADDIS)

2146 .addReg(PPC::X2)

2147 .addReg(PPC::X12)

2148 .addExpr(TOCDeltaHi));

2149

2150constMCExpr *TOCDeltaLo =PPCMCExpr::createLo(TOCDeltaExpr, OutContext);

2151 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::ADDI)

2152 .addReg(PPC::X2)

2153 .addReg(PPC::X2)

2154 .addExpr(TOCDeltaLo));

2155 }else {

2156MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(*MF);

2157constMCExpr *TOCOffsetDeltaExpr =

2158MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext),

2159 GlobalEntryLabelExp, OutContext);

2160

2161 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::LD)

2162 .addReg(PPC::X2)

2163 .addExpr(TOCOffsetDeltaExpr)

2164 .addReg(PPC::X12));

2165 EmitToStreamer(*OutStreamer,MCInstBuilder(PPC::ADD8)

2166 .addReg(PPC::X2)

2167 .addReg(PPC::X2)

2168 .addReg(PPC::X12));

2169 }

2170

2171MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(*MF);

2172 OutStreamer->emitLabel(LocalEntryLabel);

2173constMCSymbolRefExpr *LocalEntryLabelExp =

2174MCSymbolRefExpr::create(LocalEntryLabel, OutContext);

2175constMCExpr *LocalOffsetExp =

2176MCBinaryExpr::createSub(LocalEntryLabelExp,

2177 GlobalEntryLabelExp, OutContext);

2178

2179PPCTargetStreamer *TS =

2180static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());

2181 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp);

2182 }elseif (Subtarget->isUsingPCRelativeCalls()) {

2183// When generating the entry point for a function we have a few scenarios

2184// based on whether or not that function uses R2 and whether or not that

2185// function makes calls (or is a leaf function).

2186// 1) A leaf function that does not use R2 (or treats it as callee-saved

2187// and preserves it). In this case st_other=0 and both

2188// the local and global entry points for the function are the same.

2189// No special entry point code is required.

2190// 2) A function uses the TOC pointer R2. This function may or may not have

2191// calls. In this case st_other=[2,6] and the global and local entry

2192// points are different. Code to correctly setup the TOC pointer in R2

2193// is put between the global and local entry points. This case is

2194// covered by the if statatement above.

2195// 3) A function does not use the TOC pointer R2 but does have calls.

2196// In this case st_other=1 since we do not know whether or not any

2197// of the callees clobber R2. This case is dealt with in this else if

2198// block. Tail calls are considered calls and the st_other should also

2199// be set to 1 in that case as well.

2200// 4) The function does not use the TOC pointer but R2 is used inside

2201// the function. In this case st_other=1 once again.

2202// 5) This function uses inline asm. We mark R2 as reserved if the function

2203// has inline asm as we have to assume that it may be used.

2204if (MF->getFrameInfo().hasCalls() || MF->getFrameInfo().hasTailCall() ||

2205 MF->hasInlineAsm() || (!PPCFI->usesTOCBasePtr() && UsesX2OrR2)) {

2206PPCTargetStreamer *TS =

2207static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());

2208 TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym),

2209MCConstantExpr::create(1, OutContext));

2210 }

2211 }

2212}

2213

2214/// EmitFunctionBodyEnd - Print the traceback table before the .size

2215/// directive.

2216///

2217void PPCLinuxAsmPrinter::emitFunctionBodyEnd() {

2218// Only the 64-bit target requires a traceback table. For now,

2219// we only emit the word of zeroes that GDB requires to find

2220// the end of the function, and zeroes for the eight-byte

2221// mandatory fields.

2222// FIXME: We should fill in the eight-byte mandatory fields as described in

2223// the PPC64 ELF ABI (this is a low-priority item because GDB does not

2224// currently make use of these fields).

2225if (Subtarget->isPPC64()) {

2226 OutStreamer->emitIntValue(0, 4/*size*/);

2227 OutStreamer->emitIntValue(0, 8/*size*/);

2228 }

2229}

2230

2231void PPCAIXAsmPrinter::emitLinkage(constGlobalValue *GV,

2232MCSymbol *GVSym) const{

2233MCSymbolAttr LinkageAttr =MCSA_Invalid;

2234switch (GV->getLinkage()) {

2235caseGlobalValue::ExternalLinkage:

2236 LinkageAttr = GV->isDeclaration() ?MCSA_Extern :MCSA_Global;

2237break;

2238caseGlobalValue::LinkOnceAnyLinkage:

2239caseGlobalValue::LinkOnceODRLinkage:

2240caseGlobalValue::WeakAnyLinkage:

2241caseGlobalValue::WeakODRLinkage:

2242caseGlobalValue::ExternalWeakLinkage:

2243 LinkageAttr =MCSA_Weak;

2244break;

2245caseGlobalValue::AvailableExternallyLinkage:

2246 LinkageAttr =MCSA_Extern;

2247break;

2248caseGlobalValue::PrivateLinkage:

2249return;

2250caseGlobalValue::InternalLinkage:

2251assert(GV->getVisibility() ==GlobalValue::DefaultVisibility &&

2252"InternalLinkage should not have other visibility setting.");

2253 LinkageAttr =MCSA_LGlobal;

2254break;

2255caseGlobalValue::AppendingLinkage:

2256llvm_unreachable("Should never emit this");

2257caseGlobalValue::CommonLinkage:

2258llvm_unreachable("CommonLinkage of XCOFF should not come to this path");

2259 }

2260

2261assert(LinkageAttr !=MCSA_Invalid &&"LinkageAttr should not MCSA_Invalid.");

2262

2263MCSymbolAttr VisibilityAttr =MCSA_Invalid;

2264if (!TM.getIgnoreXCOFFVisibility()) {

2265if (GV->hasDLLExportStorageClass() && !GV->hasDefaultVisibility())

2266report_fatal_error(

2267"Cannot not be both dllexport and non-default visibility");

2268switch (GV->getVisibility()) {

2269

2270// TODO: "internal" Visibility needs to go here.

2271caseGlobalValue::DefaultVisibility:

2272if (GV->hasDLLExportStorageClass())

2273 VisibilityAttr = MAI->getExportedVisibilityAttr();

2274break;

2275caseGlobalValue::HiddenVisibility:

2276 VisibilityAttr = MAI->getHiddenVisibilityAttr();

2277break;

2278caseGlobalValue::ProtectedVisibility:

2279 VisibilityAttr = MAI->getProtectedVisibilityAttr();

2280break;

2281 }

2282 }

2283

2284// Do not emit the _$TLSML symbol.

2285if (GV->getThreadLocalMode() == GlobalVariable::LocalDynamicTLSModel &&

2286 GV->hasName() && GV->getName() =="_$TLSML")

2287return;

2288

2289 OutStreamer->emitXCOFFSymbolLinkageWithVisibility(GVSym, LinkageAttr,

2290 VisibilityAttr);

2291}

2292

2293void PPCAIXAsmPrinter::SetupMachineFunction(MachineFunction &MF) {

2294// Setup CurrentFnDescSym and its containing csect.

2295MCSectionXCOFF *FnDescSec =

2296 cast<MCSectionXCOFF>(getObjFileLowering().getSectionForFunctionDescriptor(

2297 &MF.getFunction(), TM));

2298 FnDescSec->setAlignment(Align(Subtarget->isPPC64() ? 8 : 4));

2299

2300 CurrentFnDescSym = FnDescSec->getQualNameSymbol();

2301

2302returnAsmPrinter::SetupMachineFunction(MF);

2303}

2304

2305uint16_t PPCAIXAsmPrinter::getNumberOfVRSaved() {

2306// Calculate the number of VRs be saved.

2307// Vector registers 20 through 31 are marked as reserved and cannot be used

2308// in the default ABI.

2309constPPCSubtarget &Subtarget = MF->getSubtarget<PPCSubtarget>();

2310if (Subtarget.isAIXABI() && Subtarget.hasAltivec() &&

2311TM.getAIXExtendedAltivecABI()) {

2312constMachineRegisterInfo &MRI = MF->getRegInfo();

2313for (unsigned Reg = PPC::V20;Reg <= PPC::V31; ++Reg)

2314if (MRI.isPhysRegModified(Reg))

2315// Number of VRs saved.

2316return PPC::V31 - Reg + 1;

2317 }

2318return 0;

2319}

2320

2321void PPCAIXAsmPrinter::emitFunctionBodyEnd() {

2322

2323if (!TM.getXCOFFTracebackTable())

2324return;

2325

2326 emitTracebackTable();

2327

2328// If ShouldEmitEHBlock returns true, then the eh info table

2329// will be emitted via `AIXException::endFunction`. Otherwise, we

2330// need to emit a dumy eh info table when VRs are saved. We could not

2331// consolidate these two places into one because there is no easy way

2332// to access register information in `AIXException` class.

2333if (!TargetLoweringObjectFileXCOFF::ShouldEmitEHBlock(MF) &&

2334 (getNumberOfVRSaved() > 0)) {

2335// Emit dummy EH Info Table.

2336 OutStreamer->switchSection(getObjFileLowering().getCompactUnwindSection());

2337MCSymbol *EHInfoLabel =

2338TargetLoweringObjectFileXCOFF::getEHInfoTableSymbol(MF);

2339 OutStreamer->emitLabel(EHInfoLabel);

2340

2341// Version number.

2342 OutStreamer->emitInt32(0);

2343

2344constDataLayout &DL = MMI->getModule()->getDataLayout();

2345constunsignedPointerSize =DL.getPointerSize();

2346// Add necessary paddings in 64 bit mode.

2347 OutStreamer->emitValueToAlignment(Align(PointerSize));

2348

2349 OutStreamer->emitIntValue(0, PointerSize);

2350 OutStreamer->emitIntValue(0, PointerSize);

2351 OutStreamer->switchSection(MF->getSection());

2352 }

2353}

2354

2355void PPCAIXAsmPrinter::emitTracebackTable() {

2356

2357// Create a symbol for the end of function.

2358MCSymbol *FuncEnd = createTempSymbol(MF->getName());

2359 OutStreamer->emitLabel(FuncEnd);

2360

2361 OutStreamer->AddComment("Traceback table begin");

2362// Begin with a fullword of zero.

2363 OutStreamer->emitIntValueInHexWithPadding(0, 4/*size*/);

2364

2365SmallString<128> CommentString;

2366raw_svector_ostream CommentOS(CommentString);

2367

2368auto EmitComment = [&]() {

2369 OutStreamer->AddComment(CommentOS.str());

2370 CommentString.clear();

2371 };

2372

2373auto EmitCommentAndValue = [&](uint64_t Value,intSize) {

2374 EmitComment();

2375 OutStreamer->emitIntValueInHexWithPadding(Value,Size);

2376 };

2377

2378unsignedintVersion = 0;

2379 CommentOS <<"Version = " <<Version;

2380 EmitCommentAndValue(Version, 1);

2381

2382// There is a lack of information in the IR to assist with determining the

2383// source language. AIX exception handling mechanism would only search for

2384// personality routine and LSDA area when such language supports exception

2385// handling. So to be conservatively correct and allow runtime to do its job,

2386// we need to set it to C++ for now.

2387TracebackTable::LanguageID LanguageIdentifier =

2388TracebackTable::CPlusPlus;// C++

2389

2390 CommentOS <<"Language = "

2391 <<getNameForTracebackTableLanguageId(LanguageIdentifier);

2392 EmitCommentAndValue(LanguageIdentifier, 1);

2393

2394// This is only populated for the third and fourth bytes.

2395uint32_t FirstHalfOfMandatoryField = 0;

2396

2397// Emit the 3rd byte of the mandatory field.

2398

2399// We always set traceback offset bit to true.

2400 FirstHalfOfMandatoryField |=TracebackTable::HasTraceBackTableOffsetMask;

2401

2402constPPCFunctionInfo *FI = MF->getInfo<PPCFunctionInfo>();

2403constMachineRegisterInfo &MRI = MF->getRegInfo();

2404

2405// Check the function uses floating-point processor instructions or not

2406for (unsigned Reg = PPC::F0;Reg <= PPC::F31; ++Reg) {

2407if (MRI.isPhysRegUsed(Reg,/* SkipRegMaskTest */true)) {

2408 FirstHalfOfMandatoryField |=TracebackTable::IsFloatingPointPresentMask;

2409break;

2410 }

2411 }

2412

2413#define GENBOOLCOMMENT(Prefix, V, Field) \

2414 CommentOS << (Prefix) << ((V) & (TracebackTable::Field##Mask) ? "+" : "-") \

2415 << #Field

2416

2417#define GENVALUECOMMENT(PrefixAndName, V, Field) \

2418 CommentOS << (PrefixAndName) << " = " \

2419 << static_cast<unsigned>(((V) & (TracebackTable::Field##Mask)) >> \

2420 (TracebackTable::Field##Shift))

2421

2422GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsGlobaLinkage);

2423GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsOutOfLineEpilogOrPrologue);

2424 EmitComment();

2425

2426GENBOOLCOMMENT("", FirstHalfOfMandatoryField, HasTraceBackTableOffset);

2427GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsInternalProcedure);

2428 EmitComment();

2429

2430GENBOOLCOMMENT("", FirstHalfOfMandatoryField, HasControlledStorage);

2431GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsTOCless);

2432 EmitComment();

2433

2434GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsFloatingPointPresent);

2435 EmitComment();

2436GENBOOLCOMMENT("", FirstHalfOfMandatoryField,

2437 IsFloatingPointOperationLogOrAbortEnabled);

2438 EmitComment();

2439

2440 OutStreamer->emitIntValueInHexWithPadding(

2441 (FirstHalfOfMandatoryField & 0x0000ff00) >> 8, 1);

2442

2443// Set the 4th byte of the mandatory field.

2444 FirstHalfOfMandatoryField |=TracebackTable::IsFunctionNamePresentMask;

2445

2446constPPCRegisterInfo *RegInfo =

2447static_cast<constPPCRegisterInfo *>(Subtarget->getRegisterInfo());

2448Register FrameReg =RegInfo->getFrameRegister(*MF);

2449if (FrameReg == (Subtarget->isPPC64() ? PPC::X31 : PPC::R31))

2450 FirstHalfOfMandatoryField |=TracebackTable::IsAllocaUsedMask;

2451

2452constSmallVectorImpl<Register> &MustSaveCRs = FI->getMustSaveCRs();

2453if (!MustSaveCRs.empty())

2454 FirstHalfOfMandatoryField |=TracebackTable::IsCRSavedMask;

2455

2456if (FI->mustSaveLR())

2457 FirstHalfOfMandatoryField |=TracebackTable::IsLRSavedMask;

2458

2459GENBOOLCOMMENT("", FirstHalfOfMandatoryField, IsInterruptHandler);

2460GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsFunctionNamePresent);

2461GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsAllocaUsed);

2462 EmitComment();

2463GENVALUECOMMENT("OnConditionDirective", FirstHalfOfMandatoryField,

2464 OnConditionDirective);

2465GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsCRSaved);

2466GENBOOLCOMMENT(", ", FirstHalfOfMandatoryField, IsLRSaved);

2467 EmitComment();

2468 OutStreamer->emitIntValueInHexWithPadding((FirstHalfOfMandatoryField & 0xff),

2469 1);

2470

2471// Set the 5th byte of mandatory field.

2472uint32_t SecondHalfOfMandatoryField = 0;

2473

2474 SecondHalfOfMandatoryField |= MF->getFrameInfo().getStackSize()

2475 ?TracebackTable::IsBackChainStoredMask

2476 : 0;

2477

2478uint32_t FPRSaved = 0;

2479for (unsigned Reg = PPC::F14;Reg <= PPC::F31; ++Reg) {

2480if (MRI.isPhysRegModified(Reg)) {

2481 FPRSaved = PPC::F31 -Reg + 1;

2482break;

2483 }

2484 }

2485 SecondHalfOfMandatoryField |= (FPRSaved <<TracebackTable::FPRSavedShift) &

2486TracebackTable::FPRSavedMask;

2487GENBOOLCOMMENT("", SecondHalfOfMandatoryField, IsBackChainStored);

2488GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, IsFixup);

2489GENVALUECOMMENT(", NumOfFPRsSaved", SecondHalfOfMandatoryField, FPRSaved);

2490 EmitComment();

2491 OutStreamer->emitIntValueInHexWithPadding(

2492 (SecondHalfOfMandatoryField & 0xff000000) >> 24, 1);

2493

2494// Set the 6th byte of mandatory field.

2495

2496// Check whether has Vector Instruction,We only treat instructions uses vector

2497// register as vector instructions.

2498bool HasVectorInst =false;

2499for (unsigned Reg = PPC::V0;Reg <= PPC::V31; ++Reg)

2500if (MRI.isPhysRegUsed(Reg,/* SkipRegMaskTest */true)) {

2501// Has VMX instruction.

2502 HasVectorInst =true;

2503break;

2504 }

2505

2506if (FI->hasVectorParms() || HasVectorInst)

2507 SecondHalfOfMandatoryField |=TracebackTable::HasVectorInfoMask;

2508

2509uint16_t NumOfVRSaved = getNumberOfVRSaved();

2510bool ShouldEmitEHBlock =

2511TargetLoweringObjectFileXCOFF::ShouldEmitEHBlock(MF) || NumOfVRSaved > 0;

2512

2513if (ShouldEmitEHBlock)

2514 SecondHalfOfMandatoryField |=TracebackTable::HasExtensionTableMask;

2515

2516uint32_t GPRSaved = 0;

2517

2518// X13 is reserved under 64-bit environment.

2519unsigned GPRBegin = Subtarget->isPPC64() ? PPC::X14 : PPC::R13;

2520unsigned GPREnd = Subtarget->isPPC64() ? PPC::X31 : PPC::R31;

2521

2522for (unsigned Reg = GPRBegin;Reg <= GPREnd; ++Reg) {

2523if (MRI.isPhysRegModified(Reg)) {

2524 GPRSaved = GPREnd -Reg + 1;

2525break;

2526 }

2527 }

2528

2529 SecondHalfOfMandatoryField |= (GPRSaved <<TracebackTable::GPRSavedShift) &

2530TracebackTable::GPRSavedMask;

2531

2532GENBOOLCOMMENT("", SecondHalfOfMandatoryField, HasExtensionTable);

2533GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, HasVectorInfo);

2534GENVALUECOMMENT(", NumOfGPRsSaved", SecondHalfOfMandatoryField, GPRSaved);

2535 EmitComment();

2536 OutStreamer->emitIntValueInHexWithPadding(

2537 (SecondHalfOfMandatoryField & 0x00ff0000) >> 16, 1);

2538

2539// Set the 7th byte of mandatory field.

2540uint32_t NumberOfFixedParms = FI->getFixedParmsNum();

2541 SecondHalfOfMandatoryField |=

2542 (NumberOfFixedParms <<TracebackTable::NumberOfFixedParmsShift) &

2543TracebackTable::NumberOfFixedParmsMask;

2544GENVALUECOMMENT("NumberOfFixedParms", SecondHalfOfMandatoryField,

2545 NumberOfFixedParms);

2546 EmitComment();

2547 OutStreamer->emitIntValueInHexWithPadding(

2548 (SecondHalfOfMandatoryField & 0x0000ff00) >> 8, 1);

2549

2550// Set the 8th byte of mandatory field.

2551

2552// Always set parameter on stack.

2553 SecondHalfOfMandatoryField |=TracebackTable::HasParmsOnStackMask;

2554

2555uint32_t NumberOfFPParms = FI->getFloatingPointParmsNum();

2556 SecondHalfOfMandatoryField |=

2557 (NumberOfFPParms <<TracebackTable::NumberOfFloatingPointParmsShift) &

2558TracebackTable::NumberOfFloatingPointParmsMask;

2559

2560GENVALUECOMMENT("NumberOfFPParms", SecondHalfOfMandatoryField,

2561 NumberOfFloatingPointParms);

2562GENBOOLCOMMENT(", ", SecondHalfOfMandatoryField, HasParmsOnStack);

2563 EmitComment();

2564 OutStreamer->emitIntValueInHexWithPadding(SecondHalfOfMandatoryField & 0xff,

2565 1);

2566

2567// Generate the optional fields of traceback table.

2568

2569// Parameter type.

2570if (NumberOfFixedParms || NumberOfFPParms) {

2571uint32_t ParmsTypeValue = FI->getParmsType();

2572

2573Expected<SmallString<32>> ParmsType =

2574 FI->hasVectorParms()

2575 ?XCOFF::parseParmsTypeWithVecInfo(

2576 ParmsTypeValue, NumberOfFixedParms, NumberOfFPParms,

2577 FI->getVectorParmsNum())

2578 : XCOFF::parseParmsType(ParmsTypeValue, NumberOfFixedParms,

2579 NumberOfFPParms);

2580

2581assert(ParmsType &&toString(ParmsType.takeError()).c_str());

2582if (ParmsType) {

2583 CommentOS <<"Parameter type = " << ParmsType.get();

2584 EmitComment();

2585 }

2586 OutStreamer->emitIntValueInHexWithPadding(ParmsTypeValue,

2587sizeof(ParmsTypeValue));

2588 }

2589// Traceback table offset.

2590 OutStreamer->AddComment("Function size");

2591if (FirstHalfOfMandatoryField &TracebackTable::HasTraceBackTableOffsetMask) {

2592MCSymbol *FuncSectSym = getObjFileLowering().getFunctionEntryPointSymbol(

2593 &(MF->getFunction()), TM);

2594 OutStreamer->emitAbsoluteSymbolDiff(FuncEnd, FuncSectSym, 4);

2595 }

2596

2597// Since we unset the Int_Handler.

2598if (FirstHalfOfMandatoryField &TracebackTable::IsInterruptHandlerMask)

2599report_fatal_error("Hand_Mask not implement yet");

2600

2601if (FirstHalfOfMandatoryField &TracebackTable::HasControlledStorageMask)

2602report_fatal_error("Ctl_Info not implement yet");

2603

2604if (FirstHalfOfMandatoryField &TracebackTable::IsFunctionNamePresentMask) {

2605StringRef Name = MF->getName().substr(0, INT16_MAX);

2606 int16_t NameLength =Name.size();

2607 CommentOS <<"Function name len = "

2608 <<static_cast<unsignedint>(NameLength);

2609 EmitCommentAndValue(NameLength, 2);

2610 OutStreamer->AddComment("Function Name");

2611 OutStreamer->emitBytes(Name);

2612 }

2613

2614if (FirstHalfOfMandatoryField &TracebackTable::IsAllocaUsedMask) {

2615uint8_t AllocReg =XCOFF::AllocRegNo;

2616 OutStreamer->AddComment("AllocaUsed");

2617 OutStreamer->emitIntValueInHex(AllocReg,sizeof(AllocReg));

2618 }

2619

2620if (SecondHalfOfMandatoryField &TracebackTable::HasVectorInfoMask) {

2621uint16_t VRData = 0;

2622if (NumOfVRSaved) {

2623// Number of VRs saved.

2624 VRData |= (NumOfVRSaved <<TracebackTable::NumberOfVRSavedShift) &

2625TracebackTable::NumberOfVRSavedMask;

2626// This bit is supposed to set only when the special register

2627// VRSAVE is saved on stack.

2628// However, IBM XL compiler sets the bit when any vector registers

2629// are saved on the stack. We will follow XL's behavior on AIX

2630// so that we don't get surprise behavior change for C code.

2631 VRData |=TracebackTable::IsVRSavedOnStackMask;

2632 }

2633

2634// Set has_varargs.

2635if (FI->getVarArgsFrameIndex())

2636 VRData |=TracebackTable::HasVarArgsMask;

2637

2638// Vector parameters number.

2639unsigned VectorParmsNum = FI->getVectorParmsNum();

2640 VRData |= (VectorParmsNum <<TracebackTable::NumberOfVectorParmsShift) &

2641TracebackTable::NumberOfVectorParmsMask;

2642

2643if (HasVectorInst)

2644 VRData |=TracebackTable::HasVMXInstructionMask;

2645

2646GENVALUECOMMENT("NumOfVRsSaved", VRData, NumberOfVRSaved);

2647GENBOOLCOMMENT(", ", VRData, IsVRSavedOnStack);

2648GENBOOLCOMMENT(", ", VRData, HasVarArgs);

2649 EmitComment();

2650 OutStreamer->emitIntValueInHexWithPadding((VRData & 0xff00) >> 8, 1);

2651

2652GENVALUECOMMENT("NumOfVectorParams", VRData, NumberOfVectorParms);

2653GENBOOLCOMMENT(", ", VRData, HasVMXInstruction);

2654 EmitComment();

2655 OutStreamer->emitIntValueInHexWithPadding(VRData & 0x00ff, 1);

2656

2657uint32_t VecParmTypeValue = FI->getVecExtParmsType();

2658

2659Expected<SmallString<32>> VecParmsType =

2660XCOFF::parseVectorParmsType(VecParmTypeValue, VectorParmsNum);

2661assert(VecParmsType &&toString(VecParmsType.takeError()).c_str());

2662if (VecParmsType) {

2663 CommentOS <<"Vector Parameter type = " << VecParmsType.get();

2664 EmitComment();

2665 }

2666 OutStreamer->emitIntValueInHexWithPadding(VecParmTypeValue,

2667sizeof(VecParmTypeValue));

2668// Padding 2 bytes.

2669 CommentOS <<"Padding";

2670 EmitCommentAndValue(0, 2);

2671 }

2672

2673uint8_t ExtensionTableFlag = 0;

2674if (SecondHalfOfMandatoryField &TracebackTable::HasExtensionTableMask) {

2675if (ShouldEmitEHBlock)

2676 ExtensionTableFlag |= ExtendedTBTableFlag::TB_EH_INFO;

2677if (EnableSSPCanaryBitInTB &&

2678TargetLoweringObjectFileXCOFF::ShouldSetSSPCanaryBitInTB(MF))

2679 ExtensionTableFlag |= ExtendedTBTableFlag::TB_SSP_CANARY;

2680

2681 CommentOS <<"ExtensionTableFlag = "

2682 <<getExtendedTBTableFlagString(ExtensionTableFlag);

2683 EmitCommentAndValue(ExtensionTableFlag,sizeof(ExtensionTableFlag));

2684 }

2685

2686if (ExtensionTableFlag & ExtendedTBTableFlag::TB_EH_INFO) {

2687auto &Ctx = OutStreamer->getContext();

2688MCSymbol *EHInfoSym =

2689TargetLoweringObjectFileXCOFF::getEHInfoTableSymbol(MF);

2690MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(EHInfoSym, TOCType_EHBlock);

2691constMCSymbol *TOCBaseSym =

2692 cast<MCSectionXCOFF>(getObjFileLowering().getTOCBaseSection())

2693 ->getQualNameSymbol();

2694constMCExpr *Exp =

2695MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCEntry, Ctx),

2696MCSymbolRefExpr::create(TOCBaseSym, Ctx), Ctx);

2697

2698constDataLayout &DL = getDataLayout();

2699 OutStreamer->emitValueToAlignment(Align(4));

2700 OutStreamer->AddComment("EHInfo Table");

2701 OutStreamer->emitValue(Exp,DL.getPointerSize());

2702 }

2703#undef GENBOOLCOMMENT

2704#undef GENVALUECOMMENT

2705}

2706

2707staticboolisSpecialLLVMGlobalArrayToSkip(constGlobalVariable *GV) {

2708return GV->hasAppendingLinkage() &&

2709StringSwitch<bool>(GV->getName())

2710// TODO: Linker could still eliminate the GV if we just skip

2711// handling llvm.used array. Skipping them for now until we or the

2712// AIX OS team come up with a good solution.

2713 .Case("llvm.used",true)

2714// It's correct to just skip llvm.compiler.used array here.

2715 .Case("llvm.compiler.used",true)

2716 .Default(false);

2717}

2718

2719staticboolisSpecialLLVMGlobalArrayForStaticInit(constGlobalVariable *GV) {

2720returnStringSwitch<bool>(GV->getName())

2721 .Cases("llvm.global_ctors","llvm.global_dtors",true)

2722 .Default(false);

2723}

2724

2725uint64_t PPCAIXAsmPrinter::getAliasOffset(constConstant *C) {

2726if (auto *GA = dyn_cast<GlobalAlias>(C))

2727return getAliasOffset(GA->getAliasee());

2728if (auto *CE = dyn_cast<ConstantExpr>(C)) {

2729constMCExpr *LowC =lowerConstant(CE);

2730constMCBinaryExpr *CBE = dyn_cast<MCBinaryExpr>(LowC);

2731if (!CBE)

2732return 0;

2733if (CBE->getOpcode() !=MCBinaryExpr::Add)

2734report_fatal_error("Only adding an offset is supported now.");

2735auto *RHS = dyn_cast<MCConstantExpr>(CBE->getRHS());

2736if (!RHS)

2737report_fatal_error("Unable to get the offset of alias.");

2738returnRHS->getValue();

2739 }

2740return 0;

2741}

2742

2743staticvoidtocDataChecks(unsigned PointerSize,constGlobalVariable *GV) {

2744// TODO: These asserts should be updated as more support for the toc data

2745// transformation is added (struct support, etc.).

2746assert(

2747 PointerSize >= GV->getAlign().valueOrOne().value() &&

2748"GlobalVariables with an alignment requirement stricter than TOC entry "

2749"size not supported by the toc data transformation.");

2750

2751Type *GVType = GV->getValueType();

2752assert(GVType->isSized() &&"A GlobalVariable's size must be known to be "

2753"supported by the toc data transformation.");

2754if (GV->getDataLayout().getTypeSizeInBits(GVType) >

2755 PointerSize * 8)

2756report_fatal_error(

2757"A GlobalVariable with size larger than a TOC entry is not currently "

2758"supported by the toc data transformation.");

2759if (GV->hasPrivateLinkage())

2760report_fatal_error("A GlobalVariable with private linkage is not "

2761"currently supported by the toc data transformation.");

2762}

2763

2764void PPCAIXAsmPrinter::emitGlobalVariable(constGlobalVariable *GV) {

2765// Special LLVM global arrays have been handled at the initialization.

2766if (isSpecialLLVMGlobalArrayToSkip(GV) ||isSpecialLLVMGlobalArrayForStaticInit(GV))

2767return;

2768

2769// If the Global Variable has the toc-data attribute, it needs to be emitted

2770// when we emit the .toc section.

2771if (GV->hasAttribute("toc-data")) {

2772unsignedPointerSize = GV->getDataLayout().getPointerSize();

2773tocDataChecks(PointerSize, GV);

2774 TOCDataGlobalVars.push_back(GV);

2775return;

2776 }

2777

2778 emitGlobalVariableHelper(GV);

2779}

2780

2781void PPCAIXAsmPrinter::emitGlobalVariableHelper(constGlobalVariable *GV) {

2782assert(!GV->getName().starts_with("llvm.") &&

2783"Unhandled intrinsic global variable.");

2784

2785if (GV->hasComdat())

2786report_fatal_error("COMDAT not yet supported by AIX.");

2787

2788MCSymbolXCOFF *GVSym = cast<MCSymbolXCOFF>(getSymbol(GV));

2789

2790if (GV->isDeclarationForLinker()) {

2791 emitLinkage(GV, GVSym);

2792return;

2793 }

2794

2795SectionKind GVKind = getObjFileLowering().getKindForGlobal(GV, TM);

2796if (!GVKind.isGlobalWriteableData() && !GVKind.isReadOnly() &&

2797 !GVKind.isThreadLocal())// Checks for both ThreadData and ThreadBSS.

2798report_fatal_error("Encountered a global variable kind that is "

2799"not supported yet.");

2800

2801// Print GV in verbose mode

2802if (isVerbose()) {

2803if (GV->hasInitializer()) {

2804 GV->printAsOperand(OutStreamer->getCommentOS(),

2805/*PrintType=*/false, GV->getParent());

2806 OutStreamer->getCommentOS() <<'\n';

2807 }

2808 }

2809

2810MCSectionXCOFF *Csect = cast<MCSectionXCOFF>(

2811 getObjFileLowering().SectionForGlobal(GV, GVKind, TM));

2812

2813// Switch to the containing csect.

2814 OutStreamer->switchSection(Csect);

2815

2816constDataLayout &DL = GV->getDataLayout();

2817

2818// Handle common and zero-initialized local symbols.

2819if (GV->hasCommonLinkage() || GVKind.isBSSLocal() ||

2820 GVKind.isThreadBSSLocal()) {

2821Align Alignment = GV->getAlign().value_or(DL.getPreferredAlign(GV));

2822uint64_t Size =DL.getTypeAllocSize(GV->getValueType());

2823 GVSym->setStorageClass(

2824TargetLoweringObjectFileXCOFF::getStorageClassForGlobal(GV));

2825

2826if (GVKind.isBSSLocal() && Csect->getMappingClass() ==XCOFF::XMC_TD) {

2827 OutStreamer->emitZeros(Size);

2828 }elseif (GVKind.isBSSLocal() || GVKind.isThreadBSSLocal()) {

2829assert(Csect->getMappingClass() !=XCOFF::XMC_TD &&

2830"BSS local toc-data already handled and TLS variables "

2831"incompatible with XMC_TD");

2832 OutStreamer->emitXCOFFLocalCommonSymbol(

2833 OutContext.getOrCreateSymbol(GVSym->getSymbolTableName()),Size,

2834 GVSym, Alignment);

2835 }else {

2836 OutStreamer->emitCommonSymbol(GVSym,Size, Alignment);

2837 }

2838return;

2839 }

2840

2841MCSymbol *EmittedInitSym = GVSym;

2842

2843// Emit linkage for the global variable and its aliases.

2844 emitLinkage(GV, EmittedInitSym);

2845for (constGlobalAlias *GA : GOAliasMap[GV])

2846 emitLinkage(GA, getSymbol(GA));

2847

2848 emitAlignment(getGVAlignment(GV,DL), GV);

2849

2850// When -fdata-sections is enabled, every GlobalVariable will

2851// be put into its own csect; therefore, label is not necessary here.

2852if (!TM.getDataSections() || GV->hasSection()) {

2853if (Csect->getMappingClass() !=XCOFF::XMC_TD)

2854 OutStreamer->emitLabel(EmittedInitSym);

2855 }

2856

2857// No alias to emit.

2858if (!GOAliasMap[GV].size()) {

2859 emitGlobalConstant(GV->getDataLayout(), GV->getInitializer());

2860return;

2861 }

2862

2863// Aliases with the same offset should be aligned. Record the list of aliases

2864// associated with the offset.

2865 AliasMapTy AliasList;

2866for (constGlobalAlias *GA : GOAliasMap[GV])

2867 AliasList[getAliasOffset(GA->getAliasee())].push_back(GA);

2868

2869// Emit alias label and element value for global variable.

2870 emitGlobalConstant(GV->getDataLayout(), GV->getInitializer(),

2871 &AliasList);

2872}

2873

2874void PPCAIXAsmPrinter::emitFunctionDescriptor() {

2875constDataLayout &DL = getDataLayout();

2876constunsignedPointerSize =DL.getPointerSizeInBits() == 64 ? 8 : 4;

2877

2878MCSectionSubPair Current = OutStreamer->getCurrentSection();

2879// Emit function descriptor.

2880 OutStreamer->switchSection(

2881 cast<MCSymbolXCOFF>(CurrentFnDescSym)->getRepresentedCsect());

2882

2883// Emit aliasing label for function descriptor csect.

2884for (constGlobalAlias *Alias : GOAliasMap[&MF->getFunction()])

2885 OutStreamer->emitLabel(getSymbol(Alias));

2886

2887// Emit function entry point address.

2888 OutStreamer->emitValue(MCSymbolRefExpr::create(CurrentFnSym, OutContext),

2889 PointerSize);

2890// Emit TOC base address.

2891constMCSymbol *TOCBaseSym =

2892 cast<MCSectionXCOFF>(getObjFileLowering().getTOCBaseSection())

2893 ->getQualNameSymbol();

2894 OutStreamer->emitValue(MCSymbolRefExpr::create(TOCBaseSym, OutContext),

2895 PointerSize);

2896// Emit a null environment pointer.

2897 OutStreamer->emitIntValue(0, PointerSize);

2898

2899 OutStreamer->switchSection(Current.first, Current.second);

2900}

2901

2902void PPCAIXAsmPrinter::emitFunctionEntryLabel() {

2903// For functions without user defined section, it's not necessary to emit the

2904// label when we have individual function in its own csect.

2905if (!TM.getFunctionSections() || MF->getFunction().hasSection())

2906 PPCAsmPrinter::emitFunctionEntryLabel();

2907

2908// Emit aliasing label for function entry point label.

2909for (constGlobalAlias *Alias : GOAliasMap[&MF->getFunction()])

2910 OutStreamer->emitLabel(

2911 getObjFileLowering().getFunctionEntryPointSymbol(Alias, TM));

2912}

2913

2914void PPCAIXAsmPrinter::emitPGORefs(Module &M) {

2915if (!OutContext.hasXCOFFSection(

2916"__llvm_prf_cnts",

2917XCOFF::CsectProperties(XCOFF::XMC_RW,XCOFF::XTY_SD)))

2918return;

2919

2920// When inside a csect `foo`, a .ref directive referring to a csect `bar`

2921// translates into a relocation entry from `foo` to` bar`. The referring

2922// csect, `foo`, is identified by its address. If multiple csects have the

2923// same address (because one or more of them are zero-length), the referring

2924// csect cannot be determined. Hence, we don't generate the .ref directives

2925// if `__llvm_prf_cnts` is an empty section.

2926bool HasNonZeroLengthPrfCntsSection =false;

2927constDataLayout &DL =M.getDataLayout();

2928for (GlobalVariable &GV :M.globals())

2929if (GV.hasSection() && GV.getSection() =="__llvm_prf_cnts" &&

2930DL.getTypeAllocSize(GV.getValueType()) > 0) {

2931 HasNonZeroLengthPrfCntsSection =true;

2932break;

2933 }

2934

2935if (HasNonZeroLengthPrfCntsSection) {

2936MCSection *CntsSection = OutContext.getXCOFFSection(

2937"__llvm_prf_cnts",SectionKind::getData(),

2938XCOFF::CsectProperties(XCOFF::XMC_RW,XCOFF::XTY_SD),

2939/*MultiSymbolsAllowed*/true);

2940

2941 OutStreamer->switchSection(CntsSection);

2942if (OutContext.hasXCOFFSection(

2943"__llvm_prf_data",

2944XCOFF::CsectProperties(XCOFF::XMC_RW,XCOFF::XTY_SD))) {

2945MCSymbol *S = OutContext.getOrCreateSymbol("__llvm_prf_data[RW]");

2946 OutStreamer->emitXCOFFRefDirective(S);

2947 }

2948if (OutContext.hasXCOFFSection(

2949"__llvm_prf_names",

2950XCOFF::CsectProperties(XCOFF::XMC_RO,XCOFF::XTY_SD))) {

2951MCSymbol *S = OutContext.getOrCreateSymbol("__llvm_prf_names[RO]");

2952 OutStreamer->emitXCOFFRefDirective(S);

2953 }

2954if (OutContext.hasXCOFFSection(

2955"__llvm_prf_vnds",

2956XCOFF::CsectProperties(XCOFF::XMC_RW,XCOFF::XTY_SD))) {

2957MCSymbol *S = OutContext.getOrCreateSymbol("__llvm_prf_vnds[RW]");

2958 OutStreamer->emitXCOFFRefDirective(S);

2959 }

2960 }

2961}

2962

2963void PPCAIXAsmPrinter::emitGCOVRefs() {

2964if (!OutContext.hasXCOFFSection(

2965"__llvm_gcov_ctr_section",

2966XCOFF::CsectProperties(XCOFF::XMC_RW,XCOFF::XTY_SD)))

2967return;

2968

2969MCSection *CtrSection = OutContext.getXCOFFSection(

2970"__llvm_gcov_ctr_section",SectionKind::getData(),

2971XCOFF::CsectProperties(XCOFF::XMC_RW,XCOFF::XTY_SD),

2972/*MultiSymbolsAllowed*/true);

2973

2974 OutStreamer->switchSection(CtrSection);

2975constXCOFF::StorageMappingClass MappingClass =

2976TM.Options.XCOFFReadOnlyPointers ?XCOFF::XMC_RO :XCOFF::XMC_RW;

2977if (OutContext.hasXCOFFSection(

2978"__llvm_covinit",

2979XCOFF::CsectProperties(MappingClass,XCOFF::XTY_SD))) {

2980constchar *SymbolStr =TM.Options.XCOFFReadOnlyPointers

2981 ?"__llvm_covinit[RO]"

2982 :"__llvm_covinit[RW]";

2983MCSymbol *S = OutContext.getOrCreateSymbol(SymbolStr);

2984 OutStreamer->emitXCOFFRefDirective(S);

2985 }

2986}

2987

2988void PPCAIXAsmPrinter::emitEndOfAsmFile(Module &M) {

2989// If there are no functions and there are no toc-data definitions in this

2990// module, we will never need to reference the TOC base.

2991if (M.empty() && TOCDataGlobalVars.empty())

2992return;

2993

2994 emitPGORefs(M);

2995 emitGCOVRefs();

2996

2997// Switch to section to emit TOC base.

2998 OutStreamer->switchSection(getObjFileLowering().getTOCBaseSection());

2999

3000PPCTargetStreamer *TS =

3001static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());

3002

3003for (auto &I : TOC) {

3004MCSectionXCOFF *TCEntry;

3005// Setup the csect for the current TC entry. If the variant kind is

3006// VK_PPC_AIX_TLSGDM the entry represents the region handle, we create a

3007// new symbol to prefix the name with a dot.

3008// If TLS model opt is turned on, create a new symbol to prefix the name

3009// with a dot.

3010if (I.first.second == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM ||

3011 (Subtarget->hasAIXShLibTLSModelOpt() &&

3012I.first.second == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLD)) {

3013SmallString<128>Name;

3014StringRef Prefix =".";

3015Name +=Prefix;

3016Name += cast<MCSymbolXCOFF>(I.first.first)->getSymbolTableName();

3017MCSymbol *S = OutContext.getOrCreateSymbol(Name);

3018 TCEntry = cast<MCSectionXCOFF>(

3019 getObjFileLowering().getSectionForTOCEntry(S, TM));

3020 }else {

3021 TCEntry = cast<MCSectionXCOFF>(

3022 getObjFileLowering().getSectionForTOCEntry(I.first.first, TM));

3023 }

3024 OutStreamer->switchSection(TCEntry);

3025

3026 OutStreamer->emitLabel(I.second);

3027 TS->emitTCEntry(*I.first.first,I.first.second);

3028 }

3029

3030// Traverse the list of global variables twice, emitting all of the

3031// non-common global variables before the common ones, as emitting a

3032// .comm directive changes the scope from .toc to the common symbol.

3033for (constauto *GV : TOCDataGlobalVars) {

3034if (!GV->hasCommonLinkage())

3035 emitGlobalVariableHelper(GV);

3036 }

3037for (constauto *GV : TOCDataGlobalVars) {

3038if (GV->hasCommonLinkage())

3039 emitGlobalVariableHelper(GV);

3040 }

3041}

3042

3043bool PPCAIXAsmPrinter::doInitialization(Module &M) {

3044constboolResult = PPCAsmPrinter::doInitialization(M);

3045

3046// Emit the .machine directive on AIX.

3047constTriple &Target =TM.getTargetTriple();

3048XCOFF::CFileCpuId TargetCpuId =XCOFF::TCPU_INVALID;

3049// Walk through the "target-cpu" attribute of functions and use the newest

3050// level as the CPU of the module.

3051for (auto &F : M) {

3052XCOFF::CFileCpuId FunCpuId =

3053XCOFF::getCpuID(TM.getSubtargetImpl(F)->getCPU());

3054if (FunCpuId > TargetCpuId)

3055 TargetCpuId = FunCpuId;

3056 }

3057// If there is no "target-cpu" attribute within the functions, take the

3058// "-mcpu" value. If both are omitted, use getNormalizedPPCTargetCPU() to

3059// determine the default CPU.

3060if (!TargetCpuId) {

3061StringRef TargetCPU =TM.getTargetCPU();

3062 TargetCpuId =XCOFF::getCpuID(

3063 TargetCPU.empty() ?PPC::getNormalizedPPCTargetCPU(Target) : TargetCPU);

3064 }

3065

3066PPCTargetStreamer *TS =

3067static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());

3068 TS->emitMachine(XCOFF::getTCPUString(TargetCpuId));

3069

3070auto setCsectAlignment = [this](constGlobalObject *GO) {

3071// Declarations have 0 alignment which is set by default.

3072if (GO->isDeclarationForLinker())

3073return;

3074

3075SectionKind GOKind = getObjFileLowering().getKindForGlobal(GO, TM);

3076MCSectionXCOFF *Csect = cast<MCSectionXCOFF>(

3077 getObjFileLowering().SectionForGlobal(GO, GOKind, TM));

3078

3079Align GOAlign = getGVAlignment(GO, GO->getDataLayout());

3080 Csect->ensureMinAlignment(GOAlign);

3081 };

3082

3083// For all TLS variables, calculate their corresponding addresses and store

3084// them into TLSVarsToAddressMapping, which will be used to determine whether

3085// or not local-exec TLS variables require special assembly printing.

3086uint64_t TLSVarAddress = 0;

3087autoDL =M.getDataLayout();

3088for (constauto &G :M.globals()) {

3089if (G.isThreadLocal() && !G.isDeclaration()) {

3090 TLSVarAddress =alignTo(TLSVarAddress, getGVAlignment(&G,DL));

3091 TLSVarsToAddressMapping[&G] = TLSVarAddress;

3092 TLSVarAddress +=DL.getTypeAllocSize(G.getValueType());

3093 }

3094 }

3095

3096// We need to know, up front, the alignment of csects for the assembly path,

3097// because once a .csect directive gets emitted, we could not change the

3098// alignment value on it.

3099for (constauto &G :M.globals()) {

3100if (isSpecialLLVMGlobalArrayToSkip(&G))

3101continue;

3102

3103if (isSpecialLLVMGlobalArrayForStaticInit(&G)) {

3104// Generate a format indicator and a unique module id to be a part of

3105// the sinit and sterm function names.

3106if (FormatIndicatorAndUniqueModId.empty()) {

3107 std::string UniqueModuleId =getUniqueModuleId(&M);

3108if (UniqueModuleId !="")

3109// TODO: Use source file full path to generate the unique module id

3110// and add a format indicator as a part of function name in case we

3111// will support more than one format.

3112 FormatIndicatorAndUniqueModId ="clang_" + UniqueModuleId.substr(1);

3113else {

3114// Use threadId, Pid, and current time as the unique module id when we

3115// cannot generate one based on a module's strong external symbols.

3116auto CurTime =

3117 std::chrono::duration_cast<std::chrono::nanoseconds>(

3118 std::chrono::steady_clock::now().time_since_epoch())

3119 .count();

3120 FormatIndicatorAndUniqueModId =

3121"clangPidTidTime_" + llvm::itostr(sys::Process::getProcessId()) +

3122"_" + llvm::itostr(llvm::get_threadid()) +"_" +

3123 llvm::itostr(CurTime);

3124 }

3125 }

3126

3127 emitSpecialLLVMGlobal(&G);

3128continue;

3129 }

3130

3131 setCsectAlignment(&G);

3132 std::optional<CodeModel::Model> OptionalCodeModel =G.getCodeModel();

3133if (OptionalCodeModel)

3134setOptionalCodeModel(cast<MCSymbolXCOFF>(getSymbol(&G)),

3135 *OptionalCodeModel);

3136 }

3137

3138for (constauto &F : M)

3139 setCsectAlignment(&F);

3140

3141// Construct an aliasing list for each GlobalObject.

3142for (constauto &Alias :M.aliases()) {

3143constGlobalObject *Aliasee = Alias.getAliaseeObject();

3144if (!Aliasee)

3145report_fatal_error(

3146"alias without a base object is not yet supported on AIX");

3147

3148if (Aliasee->hasCommonLinkage()) {

3149report_fatal_error("Aliases to common variables are not allowed on AIX:"

3150"\n\tAlias attribute for " +

3151 Alias.getGlobalIdentifier() +

3152" is invalid because " + Aliasee->getName() +

3153" is common.",

3154false);

3155 }

3156

3157constGlobalVariable *GVar =

3158 dyn_cast_or_null<GlobalVariable>(Alias.getAliaseeObject());

3159if (GVar) {

3160 std::optional<CodeModel::Model> OptionalCodeModel = GVar->getCodeModel();

3161if (OptionalCodeModel)

3162setOptionalCodeModel(cast<MCSymbolXCOFF>(getSymbol(&Alias)),

3163 *OptionalCodeModel);

3164 }

3165

3166 GOAliasMap[Aliasee].push_back(&Alias);

3167 }

3168

3169returnResult;

3170}

3171

3172void PPCAIXAsmPrinter::emitInstruction(constMachineInstr *MI) {

3173switch (MI->getOpcode()) {

3174default:

3175break;

3176case PPC::TW:

3177case PPC::TWI:

3178case PPC::TD:

3179case PPC::TDI: {

3180if (MI->getNumOperands() < 5)

3181break;

3182constMachineOperand &LangMO =MI->getOperand(3);

3183constMachineOperand &ReasonMO =MI->getOperand(4);

3184if (!LangMO.isImm() || !ReasonMO.isImm())

3185break;

3186MCSymbol *TempSym = OutContext.createNamedTempSymbol();

3187 OutStreamer->emitLabel(TempSym);

3188 OutStreamer->emitXCOFFExceptDirective(

3189 CurrentFnSym, TempSym, LangMO.getImm(), ReasonMO.getImm(),

3190 Subtarget->isPPC64() ?MI->getMF()->getInstructionCount() * 8

3191 :MI->getMF()->getInstructionCount() * 4,

3192hasDebugInfo());

3193break;

3194 }

3195case PPC::GETtlsMOD32AIX:

3196case PPC::GETtlsMOD64AIX:

3197case PPC::GETtlsTpointer32AIX:

3198case PPC::GETtlsADDR64AIX:

3199case PPC::GETtlsADDR32AIX: {

3200// A reference to .__tls_get_mod/.__tls_get_addr/.__get_tpointer is unknown

3201// to the assembler so we need to emit an external symbol reference.

3202MCSymbol *TlsGetAddr =

3203createMCSymbolForTlsGetAddr(OutContext,MI->getOpcode());

3204 ExtSymSDNodeSymbols.insert(TlsGetAddr);

3205break;

3206 }

3207case PPC::BL8:

3208case PPC::BL:

3209case PPC::BL8_NOP:

3210case PPC::BL_NOP: {

3211constMachineOperand &MO =MI->getOperand(0);

3212if (MO.isSymbol()) {

3213MCSymbolXCOFF *S =

3214 cast<MCSymbolXCOFF>(OutContext.getOrCreateSymbol(MO.getSymbolName()));

3215 ExtSymSDNodeSymbols.insert(S);

3216 }

3217 }break;

3218case PPC::BL_TLS:

3219case PPC::BL8_TLS:

3220case PPC::BL8_TLS_:

3221case PPC::BL8_NOP_TLS:

3222report_fatal_error("TLS call not yet implemented");

3223case PPC::TAILB:

3224case PPC::TAILB8:

3225case PPC::TAILBA:

3226case PPC::TAILBA8:

3227case PPC::TAILBCTR:

3228case PPC::TAILBCTR8:

3229if (MI->getOperand(0).isSymbol())

3230report_fatal_error("Tail call for extern symbol not yet supported.");

3231break;

3232case PPC::DST:

3233case PPC::DST64:

3234case PPC::DSTT:

3235case PPC::DSTT64:

3236case PPC::DSTST:

3237case PPC::DSTST64:

3238case PPC::DSTSTT:

3239case PPC::DSTSTT64:

3240 EmitToStreamer(

3241 *OutStreamer,

3242MCInstBuilder(PPC::ORI).addReg(PPC::R0).addReg(PPC::R0).addImm(0));

3243return;

3244 }

3245return PPCAsmPrinter::emitInstruction(MI);

3246}

3247

3248bool PPCAIXAsmPrinter::doFinalization(Module &M) {

3249// Do streamer related finalization for DWARF.

3250if (hasDebugInfo()) {

3251// Emit section end. This is used to tell the debug line section where the

3252// end is for a text section if we don't use .loc to represent the debug

3253// line.

3254auto *Sec = OutContext.getObjectFileInfo()->getTextSection();

3255 OutStreamer->switchSectionNoPrint(Sec);

3256MCSymbol *Sym = Sec->getEndSymbol(OutContext);

3257 OutStreamer->emitLabel(Sym);

3258 }

3259

3260for (MCSymbol *Sym : ExtSymSDNodeSymbols)

3261 OutStreamer->emitSymbolAttribute(Sym,MCSA_Extern);

3262return PPCAsmPrinter::doFinalization(M);

3263}

3264

3265staticunsignedmapToSinitPriority(intP) {

3266if (P < 0 || P > 65535)

3267report_fatal_error("invalid init priority");

3268

3269if (P <= 20)

3270returnP;

3271

3272if (P < 81)

3273return 20 + (P - 20) * 16;

3274

3275if (P <= 1124)

3276return 1004 + (P - 81);

3277

3278if (P < 64512)

3279return 2047 + (P - 1124) * 33878;

3280

3281return 2147482625u + (P - 64512);

3282}

3283

3284static std::stringconvertToSinitPriority(int Priority) {

3285// This helper function converts clang init priority to values used in sinit

3286// and sterm functions.

3287//

3288// The conversion strategies are:

3289// We map the reserved clang/gnu priority range [0, 100] into the sinit/sterm

3290// reserved priority range [0, 1023] by

3291// - directly mapping the first 21 and the last 20 elements of the ranges

3292// - linear interpolating the intermediate values with a step size of 16.

3293//

3294// We map the non reserved clang/gnu priority range of [101, 65535] into the

3295// sinit/sterm priority range [1024, 2147483648] by:

3296// - directly mapping the first and the last 1024 elements of the ranges

3297// - linear interpolating the intermediate values with a step size of 33878.

3298unsignedintP =mapToSinitPriority(Priority);

3299

3300 std::string PrioritySuffix;

3301llvm::raw_string_ostream os(PrioritySuffix);

3302 os <<llvm::format_hex_no_prefix(P, 8);

3303return PrioritySuffix;

3304}

3305

3306void PPCAIXAsmPrinter::emitXXStructorList(constDataLayout &DL,

3307constConstant *List,bool IsCtor) {

3308SmallVector<Structor, 8> Structors;

3309 preprocessXXStructorList(DL, List, Structors);

3310if (Structors.empty())

3311return;

3312

3313unsignedIndex = 0;

3314for (Structor &S : Structors) {

3315if (constConstantExpr *CE = dyn_cast<ConstantExpr>(S.Func))

3316 S.Func =CE->getOperand(0);

3317

3318llvm::GlobalAlias::create(

3319GlobalValue::ExternalLinkage,

3320 (IsCtor ?llvm::Twine("__sinit") :llvm::Twine("__sterm")) +

3321llvm::Twine(convertToSinitPriority(S.Priority)) +

3322llvm::Twine("_", FormatIndicatorAndUniqueModId) +

3323llvm::Twine("_", llvm::utostr(Index++)),

3324 cast<Function>(S.Func));

3325 }

3326}

3327

3328void PPCAIXAsmPrinter::emitTTypeReference(constGlobalValue *GV,

3329unsigned Encoding) {

3330if (GV) {

3331 TOCEntryType GlobalType = TOCType_GlobalInternal;

3332GlobalValue::LinkageTypes Linkage = GV->getLinkage();

3333if (Linkage ==GlobalValue::ExternalLinkage ||

3334 Linkage ==GlobalValue::AvailableExternallyLinkage ||

3335 Linkage ==GlobalValue::ExternalWeakLinkage)

3336 GlobalType = TOCType_GlobalExternal;

3337MCSymbol *TypeInfoSym =TM.getSymbol(GV);

3338MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(TypeInfoSym, GlobalType);

3339constMCSymbol *TOCBaseSym =

3340 cast<MCSectionXCOFF>(getObjFileLowering().getTOCBaseSection())

3341 ->getQualNameSymbol();

3342auto &Ctx = OutStreamer->getContext();

3343constMCExpr *Exp =

3344MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCEntry, Ctx),

3345MCSymbolRefExpr::create(TOCBaseSym, Ctx), Ctx);

3346 OutStreamer->emitValue(Exp, GetSizeOfEncodedValue(Encoding));

3347 }else

3348 OutStreamer->emitIntValue(0, GetSizeOfEncodedValue(Encoding));

3349}

3350

3351// Return a pass that prints the PPC assembly code for a MachineFunction to the

3352// given output stream.

3353staticAsmPrinter *

3354createPPCAsmPrinterPass(TargetMachine &tm,

3355 std::unique_ptr<MCStreamer> &&Streamer) {

3356if (tm.getTargetTriple().isOSAIX())

3357returnnew PPCAIXAsmPrinter(tm, std::move(Streamer));

3358

3359returnnew PPCLinuxAsmPrinter(tm, std::move(Streamer));

3360}

3361

3362void PPCAIXAsmPrinter::emitModuleCommandLines(Module &M) {

3363constNamedMDNode *NMD =M.getNamedMetadata("llvm.commandline");

3364if (!NMD || !NMD->getNumOperands())

3365return;

3366

3367 std::string S;

3368raw_string_ostream RSOS(S);

3369for (unsigned i = 0, e = NMD->getNumOperands(); i != e; ++i) {

3370constMDNode *N = NMD->getOperand(i);

3371assert(N->getNumOperands() == 1 &&

3372"llvm.commandline metadata entry can have only one operand");

3373constMDString *MDS = cast<MDString>(N->getOperand(0));

3374// Add "@(#)" to support retrieving the command line information with the

3375// AIX "what" command

3376 RSOS <<"@(#)opt " << MDS->getString() <<"\n";

3377 RSOS.write('\0');

3378 }

3379 OutStreamer->emitXCOFFCInfoSym(".GCC.command.line", RSOS.str());

3380}

3381

3382// Force static initialization.

3383extern"C"LLVM_EXTERNAL_VISIBILITYvoidLLVMInitializePowerPCAsmPrinter() {

3384TargetRegistry::RegisterAsmPrinter(getThePPC32Target(),

3385createPPCAsmPrinterPass);

3386TargetRegistry::RegisterAsmPrinter(getThePPC32LETarget(),

3387createPPCAsmPrinterPass);

3388TargetRegistry::RegisterAsmPrinter(getThePPC64Target(),

3389createPPCAsmPrinterPass);

3390TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(),

3391createPPCAsmPrinterPass);

3392}

MRI

unsigned const MachineRegisterInfo * MRI

Definition:AArch64AdvSIMDScalarPass.cpp:105

MBB

MachineBasicBlock & MBB

Definition:ARMSLSHardening.cpp:71

MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL

Definition:ARMSLSHardening.cpp:73

AsmPrinter.h

ELF.h

static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")

static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")

Casting.h

CodeGen.h

LLVM_EXTERNAL_VISIBILITY

#define LLVM_EXTERNAL_VISIBILITY

Definition:Compiler.h:128

DataLayout.h

hasDebugInfo

static bool hasDebugInfo(const MachineFunction *MF)

Definition:DebugHandlerBase.cpp:244

Debug.h

LLVM_DEBUG

#define LLVM_DEBUG(...)

Definition:Debug.h:106

Name

std::string Name

Definition:ELFObjHandler.cpp:77

Size

uint64_t Size

Definition:ELFObjHandler.cpp:81

Sym

Symbol * Sym

Definition:ELF_riscv.cpp:479

GlobalValue.h

GlobalVariable.h

IRTranslator LLVM IR MI

Definition:IRTranslator.cpp:112

Module.h

Module.h This file contains the declarations for the Module class.

#define RegName(no)

#define F(x, y, z)

Definition:MD5.cpp:55

#define I(x, y, z)

Definition:MD5.cpp:58

#define G(x, y, z)

Definition:MD5.cpp:56

getRegisterName

static std::string getRegisterName(const TargetRegisterInfo *TRI, Register Reg)

Definition:MIParser.cpp:1417

MachineModuleInfoImpls.h

MachineOperand.h

MachineRegisterInfo.h

MapVector.h

This file implements a map that provides insertion order iteration.

MathExtras.h

ModuleUtils.h

#define P(N)

collectTOCStats

static void collectTOCStats(PPCAsmPrinter::TOCEntryType Type)

Definition:PPCAsmPrinter.cpp:452

isSpecialLLVMGlobalArrayForStaticInit

static bool isSpecialLLVMGlobalArrayForStaticInit(const GlobalVariable *GV)

Definition:PPCAsmPrinter.cpp:2719

isSpecialLLVMGlobalArrayToSkip

static bool isSpecialLLVMGlobalArrayToSkip(const GlobalVariable *GV)

Definition:PPCAsmPrinter.cpp:2707

LLVMInitializePowerPCAsmPrinter

LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCAsmPrinter()

Definition:PPCAsmPrinter.cpp:3383

GENBOOLCOMMENT

#define GENBOOLCOMMENT(Prefix, V, Field)

getMCSymbolForTOCPseudoMO

static MCSymbol * getMCSymbolForTOCPseudoMO(const MachineOperand &MO, AsmPrinter &AP)

Map a machine operand for a TOC pseudo-machine instruction to its corresponding MCSymbol.

Definition:PPCAsmPrinter.cpp:754

setOptionalCodeModel

static void setOptionalCodeModel(MCSymbolXCOFF *XSym, CodeModel::Model CM)

Definition:PPCAsmPrinter.cpp:495

createPPCAsmPrinterPass

static AsmPrinter * createPPCAsmPrinterPass(TargetMachine &tm, std::unique_ptr< MCStreamer > &&Streamer)

Definition:PPCAsmPrinter.cpp:3354

getTOCEntryTypeForMO

static PPCAsmPrinter::TOCEntryType getTOCEntryTypeForMO(const MachineOperand &MO)

Definition:PPCAsmPrinter.cpp:771

getCodeModel

static CodeModel::Model getCodeModel(const PPCSubtarget &S, const TargetMachine &TM, const MachineOperand &MO)

Definition:PPCAsmPrinter.cpp:479

convertToSinitPriority

static std::string convertToSinitPriority(int Priority)

Definition:PPCAsmPrinter.cpp:3284

createMCSymbolForTlsGetAddr

static MCSymbol * createMCSymbolForTlsGetAddr(MCContext &Ctx, unsigned MIOpc)

This helper function creates the TlsGetAddr/TlsGetMod MCSymbol for AIX.

Definition:PPCAsmPrinter.cpp:658

GENVALUECOMMENT

#define GENVALUECOMMENT(PrefixAndName, V, Field)

mapToSinitPriority

static unsigned mapToSinitPriority(int P)

Definition:PPCAsmPrinter.cpp:3265

tocDataChecks

static void tocDataChecks(unsigned PointerSize, const GlobalVariable *GV)

Definition:PPCAsmPrinter.cpp:2743

EnableSSPCanaryBitInTB

static cl::opt< bool > EnableSSPCanaryBitInTB("aix-ssp-tb-bit", cl::init(false), cl::desc("Enable Passing SSP Canary info in Trackback on AIX"), cl::Hidden)

PPCMachineFunctionInfo.h

if(PassOpts->AAPipeline)

Definition:PassBuilderBindings.cpp:64

PassBuilder PB(Machine, PassOpts->PTO, std::nullopt, &PIC)

PowerPCTargetInfo.h

Process.h

Provides a library for accessing information about this process and other processes on the operating ...

lowerConstant

static SDValue lowerConstant(SDValue Op, SelectionDAG &DAG, const RISCVSubtarget &Subtarget)

Definition:RISCVISelLowering.cpp:5988

assert

assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())

contains

static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)

Definition:Value.cpp:469

SectionKind.h

printOperand

static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)

Definition:SelectionDAGDumper.cpp:1071

SetVector.h

This file implements a set that has insertion order iteration characteristics.

StackMaps.h

Statistic.h

This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...

STATISTIC

#define STATISTIC(VARNAME, DESC)

Definition:Statistic.h:166

StringExtras.h

This file contains some functions that are useful when dealing with strings.

StringRef.h

TargetLoweringObjectFileImpl.h

Value * RHS

Definition:X86PartialReduction.cpp:74

llvm::AsmPrinter

This class is intended to be used as a driving class for all asm writers.

Definition:AsmPrinter.h:87

llvm::AsmPrinter::emitInstruction

virtual void emitInstruction(const MachineInstr *)

Targets should implement this to emit instructions.

Definition:AsmPrinter.h:562

llvm::AsmPrinter::getSymbol

MCSymbol * getSymbol(const GlobalValue *GV) const

Definition:AsmPrinter.cpp:697

llvm::AsmPrinter::emitXRayTable

void emitXRayTable()

Emit a table with all XRay instrumentation points.

Definition:AsmPrinter.cpp:4461

llvm::AsmPrinter::GetCPISymbol

virtual MCSymbol * GetCPISymbol(unsigned CPID) const

Return the symbol for the specified constant pool entry.

Definition:AsmPrinter.cpp:4093

llvm::AsmPrinter::PrintSymbolOperand

virtual void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &OS)

Print the MachineOperand as a symbol.

Definition:AsmPrinterInlineAsm.cpp:453

llvm::AsmPrinter::SetupMachineFunction

virtual void SetupMachineFunction(MachineFunction &MF)

This should be called when a new MachineFunction is being processed from runOnMachineFunction.

Definition:AsmPrinter.cpp:2710

llvm::AsmPrinter::emitStartOfAsmFile

virtual void emitStartOfAsmFile(Module &)

This virtual method can be overridden by targets that want to emit something at the start of their fi...

Definition:AsmPrinter.h:538

llvm::AsmPrinter::GetJTISymbol

MCSymbol * GetJTISymbol(unsigned JTID, bool isLinkerPrivate=false) const

Return the symbol for the specified jump table entry.

Definition:AsmPrinter.cpp:4121

llvm::AsmPrinter::doInitialization

bool doInitialization(Module &M) override

Set up the AsmPrinter when we are working on a new module.

Definition:AsmPrinter.cpp:459

llvm::AsmPrinter::runOnMachineFunction

bool runOnMachineFunction(MachineFunction &MF) override

Emit the specified function out to the OutStreamer.

Definition:AsmPrinter.h:390

llvm::AsmPrinter::PrintAsmMemoryOperand

virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS)

Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant as...

Definition:AsmPrinterInlineAsm.cpp:505

llvm::AsmPrinter::GetBlockAddressSymbol

MCSymbol * GetBlockAddressSymbol(const BlockAddress *BA) const

Return the MCSymbol used to satisfy BlockAddress uses of the specified basic block.

Definition:AsmPrinter.cpp:4079

llvm::AsmPrinter::emitFunctionEntryLabel

virtual void emitFunctionEntryLabel()

EmitFunctionEntryLabel - Emit the label that is the entrypoint for the function.

Definition:AsmPrinter.cpp:1073

llvm::AsmPrinter::PrintAsmOperand

virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS)

Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant.

Definition:AsmPrinterInlineAsm.cpp:463

llvm::ConstantExpr

A constant value that is initialized with an expression using other constant values.

Definition:Constants.h:1108

llvm::Constant

This is an important base class in LLVM.

Definition:Constant.h:42

llvm::DWARFExpression::Operation

This class represents an Operation in the Expression.

Definition:DWARFExpression.h:32

llvm::DataLayout

A parsed version of the target data layout string in and methods for querying it.

Definition:DataLayout.h:63

llvm::DataLayout::getPointerSize

unsigned getPointerSize(unsigned AS=0) const

Layout pointer size in bytes, rounded up to a whole number of bytes.

Definition:DataLayout.cpp:739

llvm::DataLayout::getTypeSizeInBits

TypeSize getTypeSizeInBits(Type *Ty) const

Size examples:

Definition:DataLayout.h:617

llvm::DenseMap

Definition:DenseMap.h:727

llvm::Expected

Tagged union holding either a T or a Error.

Definition:Error.h:481

llvm::Expected::takeError

Error takeError()

Take ownership of the stored error.

Definition:Error.h:608

llvm::Expected::get

reference get()

Returns a reference to the stored T value.

Definition:Error.h:578

llvm::Function

Definition:Function.h:63

llvm::GlobalAlias

Definition:GlobalAlias.h:28

llvm::GlobalAlias::create

static GlobalAlias * create(Type *Ty, unsigned AddressSpace, LinkageTypes Linkage, const Twine &Name, Constant *Aliasee, Module *Parent)

If a parent module is specified, the alias is automatically inserted into the end of the specified mo...

Definition:Globals.cpp:557

llvm::GlobalObject

Definition:GlobalObject.h:27

llvm::GlobalObject::getAlign

MaybeAlign getAlign() const

Returns the alignment of the given variable or function.

Definition:GlobalObject.h:79

llvm::GlobalObject::hasComdat

bool hasComdat() const

Definition:GlobalObject.h:127

llvm::GlobalObject::hasSection

bool hasSection() const

Check if this global has a custom object file section.

Definition:GlobalObject.h:109

llvm::GlobalValue

Definition:GlobalValue.h:48

llvm::GlobalValue::getVisibility

VisibilityTypes getVisibility() const

Definition:GlobalValue.h:249

llvm::GlobalValue::isDeclaration

bool isDeclaration() const

Return true if the primary definition of this global value is outside of the current translation unit...

Definition:Globals.cpp:296

llvm::GlobalValue::getLinkage

LinkageTypes getLinkage() const

Definition:GlobalValue.h:547

llvm::GlobalValue::hasDefaultVisibility

bool hasDefaultVisibility() const

Definition:GlobalValue.h:250

llvm::GlobalValue::hasPrivateLinkage

bool hasPrivateLinkage() const

Definition:GlobalValue.h:528

llvm::GlobalValue::getThreadLocalMode

ThreadLocalMode getThreadLocalMode() const

Definition:GlobalValue.h:272

llvm::GlobalValue::hasDLLExportStorageClass

bool hasDLLExportStorageClass() const

Definition:GlobalValue.h:282

llvm::GlobalValue::isDeclarationForLinker

bool isDeclarationForLinker() const

Definition:GlobalValue.h:619

llvm::GlobalValue::getParent

Module * getParent()

Get the module that this global value is contained inside of...

Definition:GlobalValue.h:657

llvm::GlobalValue::getAliaseeObject

const GlobalObject * getAliaseeObject() const

Definition:Globals.cpp:400

llvm::GlobalValue::DefaultVisibility

@ DefaultVisibility

The GV is visible.

Definition:GlobalValue.h:67

llvm::GlobalValue::HiddenVisibility

@ HiddenVisibility

The GV is hidden.

Definition:GlobalValue.h:68

llvm::GlobalValue::ProtectedVisibility

@ ProtectedVisibility

The GV is protected.

Definition:GlobalValue.h:69

llvm::GlobalValue::getDataLayout

const DataLayout & getDataLayout() const

Get the data layout of the module this global belongs to.

Definition:Globals.cpp:130

llvm::GlobalValue::hasCommonLinkage

bool hasCommonLinkage() const

Definition:GlobalValue.h:533

llvm::GlobalValue::hasAppendingLinkage

bool hasAppendingLinkage() const

Definition:GlobalValue.h:526

llvm::GlobalValue::LinkageTypes

LinkageTypes

An enumeration for the kinds of linkage for global values.

Definition:GlobalValue.h:51

llvm::GlobalValue::PrivateLinkage

@ PrivateLinkage

Like Internal, but omit from symbol table.

Definition:GlobalValue.h:60

llvm::GlobalValue::CommonLinkage

@ CommonLinkage

Tentative definitions.

Definition:GlobalValue.h:62

llvm::GlobalValue::InternalLinkage

@ InternalLinkage

Rename collisions when linking (static functions).

Definition:GlobalValue.h:59

llvm::GlobalValue::LinkOnceAnyLinkage

@ LinkOnceAnyLinkage

Keep one copy of function when linking (inline)

Definition:GlobalValue.h:54

llvm::GlobalValue::WeakODRLinkage

@ WeakODRLinkage

Same, but only replaced by something equivalent.

Definition:GlobalValue.h:57

llvm::GlobalValue::ExternalLinkage

@ ExternalLinkage

Externally visible function.

Definition:GlobalValue.h:52

llvm::GlobalValue::WeakAnyLinkage

@ WeakAnyLinkage

Keep one copy of named function when linking (weak)

Definition:GlobalValue.h:56

llvm::GlobalValue::AppendingLinkage

@ AppendingLinkage

Special purpose, only applies to global arrays.

Definition:GlobalValue.h:58

llvm::GlobalValue::AvailableExternallyLinkage

@ AvailableExternallyLinkage

Available for inspection, not emission.

Definition:GlobalValue.h:53

llvm::GlobalValue::ExternalWeakLinkage

@ ExternalWeakLinkage

ExternalWeak linkage description.

Definition:GlobalValue.h:61

llvm::GlobalValue::LinkOnceODRLinkage

@ LinkOnceODRLinkage

Same, but only replaced by something equivalent.

Definition:GlobalValue.h:55

llvm::GlobalValue::getValueType

Type * getValueType() const

Definition:GlobalValue.h:297

llvm::GlobalVariable

Definition:GlobalVariable.h:39

llvm::GlobalVariable::hasAttribute

bool hasAttribute(Attribute::AttrKind Kind) const

Return true if the attribute exists.

Definition:GlobalVariable.h:218

llvm::GlobalVariable::hasInitializer

bool hasInitializer() const

Definitions have initializers, declarations don't.

Definition:GlobalVariable.h:106

llvm::GlobalVariable::getCodeModel

std::optional< CodeModel::Model > getCodeModel() const

Get the custom code model of this global if it has one.

Definition:GlobalVariable.h:281

llvm::MCBinaryExpr

Binary assembler expressions.

Definition:MCExpr.h:493

llvm::MCBinaryExpr::getRHS

const MCExpr * getRHS() const

Get the right-hand side expression of the binary operator.

Definition:MCExpr.h:643

llvm::MCBinaryExpr::createAdd

static const MCBinaryExpr * createAdd(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)

Definition:MCExpr.h:537

llvm::MCBinaryExpr::getOpcode

Opcode getOpcode() const

Get the kind of this binary expression.

Definition:MCExpr.h:637

llvm::MCBinaryExpr::createSub

static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)

Definition:MCExpr.h:622

llvm::MCBinaryExpr::Add

@ Add

Addition.

Definition:MCExpr.h:496

llvm::MCConstantExpr::create

static const MCConstantExpr * create(int64_t Value, MCContext &Ctx, bool PrintInHex=false, unsigned SizeInBytes=0)

Definition:MCExpr.cpp:222

llvm::MCContext

Context object for machine code objects.

Definition:MCContext.h:83

llvm::MCContext::getXCOFFSection

MCSectionXCOFF * getXCOFFSection(StringRef Section, SectionKind K, std::optional< XCOFF::CsectProperties > CsectProp=std::nullopt, bool MultiSymbolsAllowed=false, std::optional< XCOFF::DwarfSectionSubtypeFlags > DwarfSubtypeFlags=std::nullopt)

Definition:MCContext.cpp:805

llvm::MCExpr

Base class for the full range of assembler expressions which are needed for parsing.

Definition:MCExpr.h:34

llvm::MCInstBuilder

Definition:MCInstBuilder.h:21

llvm::MCInstBuilder::addReg

MCInstBuilder & addReg(MCRegister Reg)

Add a new register operand.

Definition:MCInstBuilder.h:37

llvm::MCInstBuilder::addImm

MCInstBuilder & addImm(int64_t Val)

Add a new integer immediate operand.

Definition:MCInstBuilder.h:43

llvm::MCInstBuilder::addExpr

MCInstBuilder & addExpr(const MCExpr *Val)

Add a new MCExpr operand.

Definition:MCInstBuilder.h:61

llvm::MCInst

Instances of this class represent a single low-level machine instruction.

Definition:MCInst.h:185

llvm::MCInst::addOperand

void addOperand(const MCOperand Op)

Definition:MCInst.h:211

llvm::MCInst::setOpcode

void setOpcode(unsigned Op)

Definition:MCInst.h:198

llvm::MCInst::getOperand

const MCOperand & getOperand(unsigned i) const

Definition:MCInst.h:207

llvm::MCOperand

Instances of this class represent operands of the MCInst class.

Definition:MCInst.h:37

llvm::MCOperand::createExpr

static MCOperand createExpr(const MCExpr *Val)

Definition:MCInst.h:163

llvm::MCOperand::getReg

MCRegister getReg() const

Returns the register number.

Definition:MCInst.h:70

llvm::MCSectionELF

This represents a section on linux, lots of unix variants and some bare metal systems.

Definition:MCSectionELF.h:27

llvm::MCSectionXCOFF

Definition:MCSectionXCOFF.h:32

llvm::MCSectionXCOFF::getMappingClass

XCOFF::StorageMappingClass getMappingClass() const

Definition:MCSectionXCOFF.h:102

llvm::MCSectionXCOFF::getQualNameSymbol

MCSymbolXCOFF * getQualNameSymbol() const

Definition:MCSectionXCOFF.h:116

llvm::MCSection

Instances of this class represent a uniqued identifier for a section in the current translation unit.

Definition:MCSection.h:36

llvm::MCSection::setAlignment

void setAlignment(Align Value)

Definition:MCSection.h:147

llvm::MCSection::ensureMinAlignment

void ensureMinAlignment(Align MinAlignment)

Makes sure that Alignment is at least MinAlignment.

Definition:MCSection.h:150

llvm::MCSymbolRefExpr

Represent a reference to a symbol from inside an expression.

Definition:MCExpr.h:192

llvm::MCSymbolRefExpr::VariantKind

VariantKind

Definition:MCExpr.h:194

llvm::MCSymbolRefExpr::VK_None

@ VK_None

Definition:MCExpr.h:195

llvm::MCSymbolRefExpr::VK_PPC_GOT_TPREL_HA

@ VK_PPC_GOT_TPREL_HA

Definition:MCExpr.h:296

llvm::MCSymbolRefExpr::VK_PPC_GOT_TLSLD_HA

@ VK_PPC_GOT_TLSLD_HA

Definition:MCExpr.h:316

llvm::MCSymbolRefExpr::VK_PPC_LOCAL

@ VK_PPC_LOCAL

Definition:MCExpr.h:323

llvm::MCSymbolRefExpr::VK_DTPREL

@ VK_DTPREL

Definition:MCExpr.h:370

llvm::MCSymbolRefExpr::VK_PPC_LO

@ VK_PPC_LO

Definition:MCExpr.h:255

llvm::MCSymbolRefExpr::VK_PPC_L

@ VK_PPC_L

Definition:MCExpr.h:273

llvm::MCSymbolRefExpr::VK_PPC_U

@ VK_PPC_U

Definition:MCExpr.h:272

llvm::MCSymbolRefExpr::VK_PPC_GOT_TPREL

@ VK_PPC_GOT_TPREL

Definition:MCExpr.h:293

llvm::MCSymbolRefExpr::VK_Invalid

@ VK_Invalid

Definition:MCExpr.h:196

llvm::MCSymbolRefExpr::VK_PPC_DTPREL_HA

@ VK_PPC_DTPREL_HA

Definition:MCExpr.h:286

llvm::MCSymbolRefExpr::VK_PPC_TLSLD

@ VK_PPC_TLSLD

Definition:MCExpr.h:322

llvm::MCSymbolRefExpr::VK_PPC_TLSGD

@ VK_PPC_TLSGD

Definition:MCExpr.h:306

llvm::MCSymbolRefExpr::VK_PPC_TOCBASE

@ VK_PPC_TOCBASE

Definition:MCExpr.h:267

llvm::MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO

@ VK_PPC_GOT_TLSGD_LO

Definition:MCExpr.h:303

llvm::MCSymbolRefExpr::VK_PPC_TOC_HA

@ VK_PPC_TOC_HA

Definition:MCExpr.h:271

llvm::MCSymbolRefExpr::VK_PPC_HA

@ VK_PPC_HA

Definition:MCExpr.h:257

llvm::MCSymbolRefExpr::VK_PPC_GOT_TLSGD_HA

@ VK_PPC_GOT_TLSGD_HA

Definition:MCExpr.h:305

llvm::MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO

@ VK_PPC_GOT_TLSLD_LO

Definition:MCExpr.h:314

llvm::MCSymbolRefExpr::VK_PPC_TOC_LO

@ VK_PPC_TOC_LO

Definition:MCExpr.h:269

llvm::MCSymbolRefExpr::VK_PPC_TOC

@ VK_PPC_TOC

Definition:MCExpr.h:268

llvm::MCSymbolRefExpr::VK_GOT

@ VK_GOT

Definition:MCExpr.h:198

llvm::MCSymbolRefExpr::VK_PLT

@ VK_PLT

Definition:MCExpr.h:209

llvm::MCSymbolRefExpr::VK_PPC_GOT_TLSGD

@ VK_PPC_GOT_TLSGD

Definition:MCExpr.h:302

llvm::MCSymbolRefExpr::VK_PPC_DTPREL_LO

@ VK_PPC_DTPREL_LO

Definition:MCExpr.h:284

llvm::MCSymbolRefExpr::VK_PPC_GOT_TLSLD

@ VK_PPC_GOT_TLSLD

Definition:MCExpr.h:313

llvm::MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO

@ VK_PPC_GOT_TPREL_LO

Definition:MCExpr.h:294

llvm::MCSymbolRefExpr::VK_PPC_AIX_TLSLD

@ VK_PPC_AIX_TLSLD

Definition:MCExpr.h:311

llvm::MCSymbolRefExpr::VK_PPC_NOTOC

@ VK_PPC_NOTOC

Definition:MCExpr.h:324

llvm::MCSymbolRefExpr::VK_PPC_AIX_TLSLE

@ VK_PPC_AIX_TLSLE

Definition:MCExpr.h:310

llvm::MCSymbolRefExpr::create

static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)

Definition:MCExpr.h:398

llvm::MCSymbolXCOFF

Definition:MCSymbolXCOFF.h:20

llvm::MCSymbolXCOFF::getSymbolTableName

StringRef getSymbolTableName() const

Definition:MCSymbolXCOFF.h:68

llvm::MCSymbolXCOFF::CM_Small

@ CM_Small

Definition:MCSymbolXCOFF.h:30

llvm::MCSymbolXCOFF::CM_Large

@ CM_Large

Definition:MCSymbolXCOFF.h:30

llvm::MCSymbolXCOFF::setPerSymbolCodeModel

void setPerSymbolCodeModel(MCSymbolXCOFF::CodeModel Model)

Definition:MCSymbolXCOFF.h:86

llvm::MCSymbolXCOFF::setStorageClass

void setStorageClass(XCOFF::StorageClass SC)

Definition:MCSymbolXCOFF.h:42

llvm::MCSymbol

MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...

Definition:MCSymbol.h:41

llvm::MCSymbol::print

void print(raw_ostream &OS, const MCAsmInfo *MAI) const

print - Print the value to the stream OS.

Definition:MCSymbol.cpp:58

llvm::MDNode

Metadata node.

Definition:Metadata.h:1073

llvm::MDString

A single uniqued string.

Definition:Metadata.h:724

llvm::MDString::getString

StringRef getString() const

Definition:Metadata.cpp:616

llvm::MachineBasicBlock

Definition:MachineBasicBlock.h:125

llvm::MachineBasicBlock::getSymbol

MCSymbol * getSymbol() const

Return the MCSymbol for this basic block.

Definition:MachineBasicBlock.cpp:63

llvm::MachineBasicBlock::end

iterator end()

Definition:MachineBasicBlock.h:357

llvm::MachineFrameInfo::getStackSize

uint64_t getStackSize() const

Return the number of bytes that must be allocated to hold all of the fixed size frame objects.

Definition:MachineFrameInfo.h:587

llvm::MachineFunction

Definition:MachineFunction.h:267

llvm::MachineFunction::getSubtarget

const TargetSubtargetInfo & getSubtarget() const

getSubtarget - Return the subtarget for which this machine code is being compiled.

Definition:MachineFunction.h:733

llvm::MachineFunction::getName

StringRef getName() const

getName - Return the name of the corresponding LLVM function.

Definition:MachineFunction.cpp:645

llvm::MachineFunction::getFrameInfo

MachineFrameInfo & getFrameInfo()

getFrameInfo - Return the frame info object for the current function.

Definition:MachineFunction.h:749

llvm::MachineFunction::getRegInfo

MachineRegisterInfo & getRegInfo()

getRegInfo - Return information about the registers currently in use.

Definition:MachineFunction.h:743

llvm::MachineFunction::getFunction

Function & getFunction()

Return the LLVM function that this machine code represents.

Definition:MachineFunction.h:704

llvm::MachineFunction::getSection

MCSection * getSection() const

Returns the Section this function belongs to.

Definition:MachineFunction.h:693

llvm::MachineFunction::getInfo

Ty * getInfo()

getInfo - Keep track of various per-function pieces of information for backends that would like to do...

Definition:MachineFunction.h:831

llvm::MachineInstrBundleIterator< const MachineInstr >

llvm::MachineInstr

Representation of each machine instruction.

Definition:MachineInstr.h:71

llvm::MachineOperand

MachineOperand class - Representation of each machine instruction operand.

Definition:MachineOperand.h:48

llvm::MachineOperand::getGlobal

const GlobalValue * getGlobal() const

Definition:MachineOperand.h:582

llvm::MachineOperand::getImm

int64_t getImm() const

Definition:MachineOperand.h:556

llvm::MachineOperand::isReg

bool isReg() const

isReg - Tests if this is a MO_Register operand.

Definition:MachineOperand.h:329

llvm::MachineOperand::getMBB

MachineBasicBlock * getMBB() const

Definition:MachineOperand.h:571

llvm::MachineOperand::isCPI

bool isCPI() const

isCPI - Tests if this is a MO_ConstantPoolIndex operand.

Definition:MachineOperand.h:341

llvm::MachineOperand::isImm

bool isImm() const

isImm - Tests if this is a MO_Immediate operand.

Definition:MachineOperand.h:331

llvm::MachineOperand::isSymbol

bool isSymbol() const

isSymbol - Tests if this is a MO_ExternalSymbol operand.

Definition:MachineOperand.h:349

llvm::MachineOperand::isJTI

bool isJTI() const

isJTI - Tests if this is a MO_JumpTableIndex operand.

Definition:MachineOperand.h:345

llvm::MachineOperand::getBlockAddress

const BlockAddress * getBlockAddress() const

Definition:MachineOperand.h:587

llvm::MachineOperand::getIndex

int getIndex() const

Definition:MachineOperand.h:576

llvm::MachineOperand::getTargetFlags

unsigned getTargetFlags() const

Definition:MachineOperand.h:226

llvm::MachineOperand::isGlobal

bool isGlobal() const

isGlobal - Tests if this is a MO_GlobalAddress operand.

Definition:MachineOperand.h:347

llvm::MachineOperand::getType

MachineOperandType getType() const

getType - Returns the MachineOperandType for this operand.

Definition:MachineOperand.h:224

llvm::MachineOperand::getSymbolName

const char * getSymbolName() const

Definition:MachineOperand.h:637

llvm::MachineOperand::isBlockAddress

bool isBlockAddress() const

isBlockAddress - Tests if this is a MO_BlockAddress operand.

Definition:MachineOperand.h:351

llvm::MachineOperand::getReg

getReg - Returns the register number.

Definition:MachineOperand.h:369

llvm::MachineOperand::MO_Immediate

@ MO_Immediate

Immediate operand.

Definition:MachineOperand.h:52

llvm::MachineOperand::MO_ConstantPoolIndex

@ MO_ConstantPoolIndex

Address of indexed Constant in Constant Pool.

Definition:MachineOperand.h:57

llvm::MachineOperand::MO_GlobalAddress

@ MO_GlobalAddress

Address of a global value.

Definition:MachineOperand.h:61

llvm::MachineOperand::MO_BlockAddress

@ MO_BlockAddress

Address of a basic block.

Definition:MachineOperand.h:62

llvm::MachineOperand::MO_MachineBasicBlock

@ MO_MachineBasicBlock

MachineBasicBlock reference.

Definition:MachineOperand.h:55

llvm::MachineOperand::MO_Register

@ MO_Register

Definition:MachineOperand.h:51

llvm::MachineOperand::MO_JumpTableIndex

@ MO_JumpTableIndex

Address of indexed Jump Table for switch.

Definition:MachineOperand.h:59

llvm::MachineOperand::getOffset

int64_t getOffset() const

Return the offset from the symbol in this operand.

Definition:MachineOperand.h:629

llvm::MachineRegisterInfo

MachineRegisterInfo - Keep track of information for virtual and physical registers,...

Definition:MachineRegisterInfo.h:51

llvm::MapVector

This class implements a map that also provides access to all stored values in a deterministic order.

Definition:MapVector.h:36

llvm::MapVector::end

iterator end()

Definition:MapVector.h:71

llvm::MapVector::find

iterator find(const KeyT &Key)

Definition:MapVector.h:167

llvm::Metadata

Root of the metadata hierarchy.

Definition:Metadata.h:62

llvm::Module

A Module instance is used to store all the information related to an LLVM module.

Definition:Module.h:65

llvm::NamedMDNode

A tuple of MDNodes.

Definition:Metadata.h:1737

llvm::NamedMDNode::getOperand

MDNode * getOperand(unsigned i) const

Definition:Metadata.cpp:1425

llvm::NamedMDNode::getNumOperands

unsigned getNumOperands() const

Definition:Metadata.cpp:1421

llvm::PPCFrameLowering::getTOCSaveOffset

uint64_t getTOCSaveOffset() const

getTOCSaveOffset - Return the previous frame offset to save the TOC register – 64-bit SVR4 ABI only.

Definition:PPCFrameLowering.cpp:2725

llvm::PPCFunctionInfo

PPCFunctionInfo - This class is derived from MachineFunction private PowerPC target-specific informat...

Definition:PPCMachineFunctionInfo.h:24

llvm::PPCFunctionInfo::getParmsType

uint32_t getParmsType() const

Definition:PPCMachineFunctionInfo.cpp:143

llvm::PPCFunctionInfo::getPICOffsetSymbol

MCSymbol * getPICOffsetSymbol(MachineFunction &MF) const

Definition:PPCMachineFunctionInfo.cpp:34

llvm::PPCFunctionInfo::getMustSaveCRs

const SmallVectorImpl< Register > & getMustSaveCRs() const

Definition:PPCMachineFunctionInfo.h:276

llvm::PPCFunctionInfo::getFloatingPointParmsNum

unsigned getFloatingPointParmsNum() const

Definition:PPCMachineFunctionInfo.h:246

llvm::PPCFunctionInfo::isAIXFuncUseTLSIEForLD

bool isAIXFuncUseTLSIEForLD() const

Definition:PPCMachineFunctionInfo.h:234

llvm::PPCFunctionInfo::getGlobalEPSymbol

MCSymbol * getGlobalEPSymbol(MachineFunction &MF) const

Definition:PPCMachineFunctionInfo.cpp:41

llvm::PPCFunctionInfo::getLocalEPSymbol

MCSymbol * getLocalEPSymbol(MachineFunction &MF) const

Definition:PPCMachineFunctionInfo.cpp:48

llvm::PPCFunctionInfo::getVectorParmsNum

unsigned getVectorParmsNum() const

Definition:PPCMachineFunctionInfo.h:247

llvm::PPCFunctionInfo::usesPICBase

bool usesPICBase() const

Definition:PPCMachineFunctionInfo.h:280

llvm::PPCFunctionInfo::getVarArgsFrameIndex

int getVarArgsFrameIndex() const

Definition:PPCMachineFunctionInfo.h:236

llvm::PPCFunctionInfo::usesTOCBasePtr

bool usesTOCBasePtr() const

Definition:PPCMachineFunctionInfo.h:224

llvm::PPCFunctionInfo::hasVectorParms

bool hasVectorParms() const

Definition:PPCMachineFunctionInfo.h:248

llvm::PPCFunctionInfo::getVecExtParmsType

uint32_t getVecExtParmsType() const

Definition:PPCMachineFunctionInfo.cpp:97

llvm::PPCFunctionInfo::getTOCOffsetSymbol

MCSymbol * getTOCOffsetSymbol(MachineFunction &MF) const

Definition:PPCMachineFunctionInfo.cpp:55

llvm::PPCFunctionInfo::getFixedParmsNum

unsigned getFixedParmsNum() const

Definition:PPCMachineFunctionInfo.h:245

llvm::PPCFunctionInfo::mustSaveLR

bool mustSaveLR() const

Definition:PPCMachineFunctionInfo.h:197

llvm::PPCInstPrinter

Definition:PPCInstPrinter.h:21

llvm::PPCInstPrinter::getRegisterName

static const char * getRegisterName(MCRegister Reg)

llvm::PPCInstrInfo::hasTLSFlag

static bool hasTLSFlag(unsigned TF)

Definition:PPCInstrInfo.h:319

llvm::PPCMCExpr::createLo

static const PPCMCExpr * createLo(const MCExpr *Expr, MCContext &Ctx)

Definition:PPCMCExpr.h:48

llvm::PPCMCExpr::createHa

static const PPCMCExpr * createHa(const MCExpr *Expr, MCContext &Ctx)

Definition:PPCMCExpr.h:56

llvm::PPCRegisterInfo

Definition:PPCRegisterInfo.h:57

llvm::PPCSubtarget

Definition:PPCSubtarget.h:72

llvm::PPCSubtarget::is32BitELFABI

bool is32BitELFABI() const

Definition:PPCSubtarget.h:224

llvm::PPCSubtarget::isAIXABI

bool isAIXABI() const

Definition:PPCSubtarget.h:219

llvm::PPCSubtarget::getFrameLowering

const PPCFrameLowering * getFrameLowering() const override

Definition:PPCSubtarget.h:147

llvm::PPCSubtarget::isPPC64

bool isPPC64() const

isPPC64 - Return true if we are generating code for 64-bit pointer mode.

Definition:PPCSubtarget.cpp:251

llvm::PPCSubtarget::isUsingPCRelativeCalls

bool isUsingPCRelativeCalls() const

Definition:PPCSubtarget.cpp:253

llvm::PPCSubtarget::getCodeModel

CodeModel::Model getCodeModel(const TargetMachine &TM, const GlobalValue *GV) const

Calculates the effective code model for argument GV.

Definition:PPCSubtarget.cpp:210

llvm::PPCSubtarget::isELFv2ABI

bool isELFv2ABI() const

Definition:PPCSubtarget.cpp:250

llvm::PPCSubtarget::getRegisterInfo

const PPCRegisterInfo * getRegisterInfo() const override

Definition:PPCSubtarget.h:157

llvm::PPCSubtarget::isGVIndirectSymbol

bool isGVIndirectSymbol(const GlobalValue *GV) const

True if the GV will be accessed via an indirect symbol.

Definition:PPCSubtarget.cpp:192

llvm::PPCTargetMachine

Common code between 32-bit and 64-bit PowerPC targets.

Definition:PPCTargetMachine.h:26

llvm::PPCTargetMachine::hasGlibcHWCAPAccess

bool hasGlibcHWCAPAccess() const

Definition:PPCTargetMachine.h:68

llvm::PPCTargetMachine::isPPC64

bool isPPC64() const

Definition:PPCTargetMachine.h:70

llvm::PPCTargetStreamer

Definition:PPCTargetStreamer.h:22

llvm::PPCTargetStreamer::emitAbiVersion

virtual void emitAbiVersion(int AbiVersion)

Definition:PPCTargetStreamer.h:30

llvm::PPCTargetStreamer::emitTCEntry

virtual void emitTCEntry(const MCSymbol &S, MCSymbolRefExpr::VariantKind Kind)

Definition:PPCTargetStreamer.h:27

llvm::PPCTargetStreamer::emitLocalEntry

virtual void emitLocalEntry(MCSymbolELF *S, const MCExpr *LocalOffset)

Definition:PPCTargetStreamer.h:31

llvm::PPCTargetStreamer::emitMachine

virtual void emitMachine(StringRef CPU)

Definition:PPCTargetStreamer.h:29

llvm::Pass::getPassName

virtual StringRef getPassName() const

getPassName - Return a nice clean name for a pass.

Definition:Pass.cpp:81

llvm::PatchPointOpers

MI-level patchpoint operands.

Definition:StackMaps.h:76

llvm::Register

Wrapper class representing virtual and physical registers.

Definition:Register.h:19

llvm::SectionKind

SectionKind - This is a simple POD value that classifies the properties of a section.

Definition:SectionKind.h:22

llvm::SectionKind::isThreadBSSLocal

bool isThreadBSSLocal() const

Definition:SectionKind.h:163

llvm::SectionKind::getText

static SectionKind getText()

Definition:SectionKind.h:190

llvm::SectionKind::isBSSLocal

bool isBSSLocal() const

Definition:SectionKind.h:170

llvm::SectionKind::getData

static SectionKind getData()

Definition:SectionKind.h:213

llvm::SectionKind::isThreadLocal

bool isThreadLocal() const

Definition:SectionKind.h:157

llvm::SectionKind::isReadOnly

bool isReadOnly() const

Definition:SectionKind.h:131

llvm::SectionKind::isGlobalWriteableData

bool isGlobalWriteableData() const

Definition:SectionKind.h:165

llvm::SmallSetVector

A SetVector that performs no allocations if smaller than a certain size.

Definition:SetVector.h:370

llvm::SmallString

SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...

Definition:SmallString.h:26

llvm::SmallVectorBase::empty

bool empty() const

Definition:SmallVector.h:81

llvm::SmallVectorImpl

This class consists of common code factored out of the SmallVector class to reduce code duplication b...

Definition:SmallVector.h:573

llvm::SmallVectorImpl::clear

void clear()

Definition:SmallVector.h:610

llvm::SmallVector

This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.

Definition:SmallVector.h:1196

llvm::StackMaps

Definition:StackMaps.h:259

llvm::StackMaps::recordPatchPoint

void recordPatchPoint(const MCSymbol &L, const MachineInstr &MI)

Generate a stackmap record for a patchpoint instruction.

Definition:StackMaps.cpp:541

llvm::StackMaps::recordStackMap

void recordStackMap(const MCSymbol &L, const MachineInstr &MI)

Generate a stackmap record for a stackmap instruction.

Definition:StackMaps.cpp:531

llvm::StringRef

StringRef - Represent a constant reference to a string, i.e.

Definition:StringRef.h:51

llvm::StringRef::substr

constexpr StringRef substr(size_t Start, size_t N=npos) const

Return a reference to the substring from [Start, Start + N).

Definition:StringRef.h:571

llvm::StringRef::starts_with

bool starts_with(StringRef Prefix) const

Check if this string starts with the given Prefix.

Definition:StringRef.h:265

llvm::StringRef::empty

constexpr bool empty() const

empty - Check if the string is empty.

Definition:StringRef.h:147

llvm::StringSwitch

A switch()-like statement whose cases are string literals.

Definition:StringSwitch.h:44

llvm::StringSwitch::Case

StringSwitch & Case(StringLiteral S, T Value)

Definition:StringSwitch.h:69

llvm::StringSwitch::Default

R Default(T Value)

Definition:StringSwitch.h:182

llvm::StringSwitch::Cases

StringSwitch & Cases(StringLiteral S0, StringLiteral S1, T Value)

Definition:StringSwitch.h:90

llvm::TargetLoweringObjectFileXCOFF::ShouldSetSSPCanaryBitInTB

static bool ShouldSetSSPCanaryBitInTB(const MachineFunction *MF)

Definition:TargetLoweringObjectFileImpl.cpp:2327

llvm::TargetLoweringObjectFileXCOFF::getEHInfoTableSymbol

static MCSymbol * getEHInfoTableSymbol(const MachineFunction *MF)

Definition:TargetLoweringObjectFileImpl.cpp:2339

llvm::TargetLoweringObjectFileXCOFF::getStorageClassForGlobal

static XCOFF::StorageClass getStorageClassForGlobal(const GlobalValue *GV)

Definition:TargetLoweringObjectFileImpl.cpp:2619

llvm::TargetLoweringObjectFileXCOFF::ShouldEmitEHBlock

static bool ShouldEmitEHBlock(const MachineFunction *MF)

Definition:TargetLoweringObjectFileImpl.cpp:2309

llvm::TargetMachine

Primary interface to the complete machine description for the target machine.

Definition:TargetMachine.h:77

llvm::TargetMachine::getTargetTriple

const Triple & getTargetTriple() const

Definition:TargetMachine.h:126

llvm::Target

Target - Wrapper for Target specific information.

Definition:TargetRegistry.h:144

llvm::Triple

Triple - Helper class for working with autoconf configuration names.

Definition:Triple.h:44

llvm::Triple::isOSAIX

bool isOSAIX() const

Tests whether the OS is AIX.

Definition:Triple.h:741

llvm::Twine

Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...

Definition:Twine.h:81

llvm::Type

The instances of the Type class are immutable: once they are created, they are never changed.

Definition:Type.h:45

llvm::Type::isSized

bool isSized(SmallPtrSetImpl< Type * > *Visited=nullptr) const

Return true if it makes sense to take the size of this type.

Definition:Type.h:310

llvm::Value

LLVM Value Representation.

Definition:Value.h:74

llvm::Value::print

void print(raw_ostream &O, bool IsForDebug=false) const

Implement operator<< on Value.

Definition:AsmWriter.cpp:5061

llvm::Value::getPointerAlignment

Align getPointerAlignment(const DataLayout &DL) const

Returns an alignment of the pointer value.

Definition:Value.cpp:927

llvm::Value::printAsOperand

void printAsOperand(raw_ostream &O, bool PrintType=true, const Module *M=nullptr) const

Print the name of this Value out to the specified raw_ostream.

Definition:AsmWriter.cpp:5144

llvm::Value::hasName

bool hasName() const

Definition:Value.h:261

llvm::Value::getName

StringRef getName() const

Return a constant reference to the value's name.

Definition:Value.cpp:309

llvm::cl::opt

Definition:CommandLine.h:1423

llvm::raw_ostream

This class implements an extremely fast bulk output stream that can only output to a stream.

Definition:raw_ostream.h:52

llvm::raw_string_ostream

A raw_ostream that writes to an std::string.

Definition:raw_ostream.h:661

llvm::raw_svector_ostream

A raw_ostream that writes to an SmallVector or SmallString.

Definition:raw_ostream.h:691

llvm::sys::Process::getProcessId

static Pid getProcessId()

Get the process's identifier.

#define llvm_unreachable(msg)

Marks that the current location is not supposed to be reachable.

Definition:ErrorHandling.h:143

Error.h

TargetMachine.h

llvm::AArch64CC::PL

@ PL

Definition:AArch64BaseInfo.h:260

llvm::ARMBuildAttrs::Section

@ Section

Legacy Tags.

Definition:ARMBuildAttributes.h:82

llvm::ARM::ProfileKind::M

@ M

llvm::BitmaskEnumDetail::Mask

constexpr std::underlying_type_t< E > Mask()

Get a bitmask with 1s in all places up to the high-order bit of E's largest value.

Definition:BitmaskEnum.h:125

llvm::CallingConv::C

@ C

The default llvm calling convention, compatible with C.

Definition:CallingConv.h:34

llvm::CodeModel::Model

Model

Definition:CodeGen.h:31

llvm::CodeModel::Large

@ Large

Definition:CodeGen.h:31

llvm::CodeModel::Small

@ Small

Definition:CodeGen.h:31

llvm::ELF::SHT_PROGBITS

@ SHT_PROGBITS

Definition:ELF.h:1098

llvm::ELF::SHF_ALLOC

@ SHF_ALLOC

Definition:ELF.h:1198

llvm::ELF::SHF_WRITE

@ SHF_WRITE

Definition:ELF.h:1195

llvm::IndexedCGData::Version

const uint64_t Version

Definition:CodeGenData.h:286

llvm::MCID::Flag

Flag

These should be considered private to the implementation of the MCInstrDesc class.

Definition:MCInstrDesc.h:148

llvm::PICLevel::Level

Level

Definition:CodeGen.h:36

llvm::PICLevel::BigPIC

@ BigPIC

Definition:CodeGen.h:36

llvm::PICLevel::SmallPIC

@ SmallPIC

Definition:CodeGen.h:36

llvm::PPCII::MO_TLSLDM_FLAG

@ MO_TLSLDM_FLAG

MO_TLSLDM_FLAG - on AIX the ML relocation type is only valid for a reference to a TOC symbol from the...

Definition:PPC.h:144

llvm::PPCII::MO_TPREL_PCREL_FLAG

@ MO_TPREL_PCREL_FLAG

MO_TPREL_PCREL_FLAG = MO_PCREL_FLAG | MO_TPREL_FLAG.

Definition:PPC.h:195

llvm::PPCII::MO_GOT_TPREL_PCREL_FLAG

@ MO_GOT_TPREL_PCREL_FLAG

MO_GOT_TPREL_PCREL_FLAG - A combintaion of flags, if these bits are set they should produce the reloc...

Definition:PPC.h:170

llvm::PPCII::MO_TLSGDM_FLAG

@ MO_TLSGDM_FLAG

MO_TLSGDM_FLAG - If this bit is set the symbol reference is relative to the region handle of TLS Gene...

Definition:PPC.h:152

llvm::PPCII::MO_TLSLD_FLAG

@ MO_TLSLD_FLAG

MO_TLSLD_FLAG - If this bit is set the symbol reference is relative to TLS Local Dynamic model.

Definition:PPC.h:148

llvm::PPCII::MO_TPREL_FLAG

@ MO_TPREL_FLAG

MO_TPREL_FLAG - If this bit is set, the symbol reference is relative to the thread pointer and the sy...

Definition:PPC.h:138

llvm::PPCII::MO_GOT_TLSLD_PCREL_FLAG

@ MO_GOT_TLSLD_PCREL_FLAG

MO_GOT_TLSLD_PCREL_FLAG - A combintaion of flags, if these bits are set they should produce the reloc...

Definition:PPC.h:164

llvm::PPCII::MO_TLSGD_FLAG

@ MO_TLSGD_FLAG

MO_TLSGD_FLAG - If this bit is set the symbol reference is relative to TLS General Dynamic model for ...

Definition:PPC.h:133

llvm::PPCII::MO_GOT_TLSGD_PCREL_FLAG

@ MO_GOT_TLSGD_PCREL_FLAG

MO_GOT_TLSGD_PCREL_FLAG - A combintaion of flags, if these bits are set they should produce the reloc...

Definition:PPC.h:158

llvm::PPC::getNormalizedPPCTargetCPU

StringRef getNormalizedPPCTargetCPU(const Triple &T, StringRef CPUName="")

Definition:PPCTargetParser.cpp:91

llvm::PPC::Predicate

Predicate

Predicate - These are "(BI << 5) | BO" for various predicates.

Definition:PPCPredicates.h:26

llvm::PPC::stripRegisterPrefix

const char * stripRegisterPrefix(const char *RegName)

stripRegisterPrefix - This method strips the character prefix from a register name so that only the n...

Definition:PPCMCTargetDesc.cpp:62

llvm::PPC::isVRRegister

static bool isVRRegister(unsigned Reg)

Definition:PPCMCTargetDesc.h:294

llvm::PPC::InvertPredicate

Predicate InvertPredicate(Predicate Opcode)

Invert the specified predicate. != -> ==, < -> >=.

llvm::PPC::isVFRegister

static bool isVFRegister(unsigned Reg)

Definition:PPCMCTargetDesc.h:290

llvm::RISCVFenceField::O

@ O

Definition:RISCVBaseInfo.h:372

llvm::Reloc::Model

Model

Definition:CodeGen.h:25

llvm::SystemZISD::TM

@ TM

Definition:SystemZISelLowering.h:66

llvm::TLSModel::Model

Model

Definition:CodeGen.h:45

llvm::TLSModel::LocalDynamic

@ LocalDynamic

Definition:CodeGen.h:47

llvm::TLSModel::InitialExec

@ InitialExec

Definition:CodeGen.h:48

llvm::TLSModel::LocalExec

@ LocalExec

Definition:CodeGen.h:49

llvm::WinEH::EncodingType::CE

@ CE

Windows NT (Windows on ARM)

llvm::X86Disassembler::Reg

Reg

All possible values of the reg field in the ModR/M byte.

Definition:X86DisassemblerDecoder.h:621

llvm::X86_MC::emitInstruction

void emitInstruction(MCObjectStreamer &, const MCInst &Inst, const MCSubtargetInfo &STI)

Definition:X86AsmBackend.cpp:1553

llvm::XCOFF

Definition:XCOFF.h:24

llvm::XCOFF::getExtendedTBTableFlagString

SmallString< 32 > getExtendedTBTableFlagString(uint8_t Flag)

Definition:XCOFF.cpp:221

llvm::XCOFF::getCpuID

XCOFF::CFileCpuId getCpuID(StringRef CPU)

Definition:XCOFF.cpp:112

llvm::XCOFF::parseParmsTypeWithVecInfo

Expected< SmallString< 32 > > parseParmsTypeWithVecInfo(uint32_t Value, unsigned FixedParmsNum, unsigned FloatingParmsNum, unsigned VectorParmsNum)

Definition:XCOFF.cpp:247

llvm::XCOFF::parseParmsType

Expected< SmallString< 32 > > parseParmsType(uint32_t Value, unsigned FixedParmsNum, unsigned FloatingParmsNum)

Definition:XCOFF.cpp:169

llvm::XCOFF::parseVectorParmsType

Expected< SmallString< 32 > > parseVectorParmsType(uint32_t Value, unsigned ParmsNum)

Definition:XCOFF.cpp:299

llvm::XCOFF::CFileCpuId

CFileCpuId

Definition:XCOFF.h:337

llvm::XCOFF::TCPU_INVALID

@ TCPU_INVALID

Invalid id - assumes POWER for old objects.

Definition:XCOFF.h:338

llvm::XCOFF::StorageMappingClass

StorageMappingClass

Storage Mapping Class definitions.

Definition:XCOFF.h:103

llvm::XCOFF::XMC_RW

@ XMC_RW

Read Write Data.

Definition:XCOFF.h:117

llvm::XCOFF::XMC_RO

@ XMC_RO

Read Only Constant.

Definition:XCOFF.h:106

llvm::XCOFF::XMC_TD

@ XMC_TD

Scalar data item in the TOC.

Definition:XCOFF.h:120

llvm::XCOFF::XMC_PR

@ XMC_PR

Program Code.

Definition:XCOFF.h:105

llvm::XCOFF::getTCPUString

StringRef getTCPUString(XCOFF::CFileCpuId TCPU)

Definition:XCOFF.cpp:141

llvm::XCOFF::getNameForTracebackTableLanguageId

StringRef getNameForTracebackTableLanguageId(TracebackTable::LanguageID LangId)

Definition:XCOFF.cpp:89

llvm::XCOFF::AllocRegNo

constexpr uint8_t AllocRegNo

Definition:XCOFF.h:44

llvm::XCOFF::XTY_SD

@ XTY_SD

Csect definition for initialized storage.

Definition:XCOFF.h:242

llvm::XCOFF::XTY_ER

@ XTY_ER

External reference.

Definition:XCOFF.h:241

llvm::cl::Hidden

@ Hidden

Definition:CommandLine.h:137

llvm::cl::init

initializer< Ty > init(const Ty &Val)

Definition:CommandLine.h:443

llvm::cl::Prefix

@ Prefix

Definition:CommandLine.h:158

llvm::codeview::CompileSym3Flags::Exp

@ Exp

llvm::detail::combineHashValue

unsigned combineHashValue(unsigned a, unsigned b)

Simplistic combination of 32-bit hash values into 32-bit hash values.

Definition:DenseMapInfo.h:39

llvm::dwarf::Index

Index

Definition:Dwarf.h:882

llvm::jitlink::aarch64::PointerSize

constexpr uint64_t PointerSize

aarch64 pointer size.

Definition:aarch64.h:697

llvm::jitlink::ppc64::TOC

@ TOC

Definition:ppc64.h:47

llvm::jitlink::Linkage

Linkage

Describes symbol linkage. This can be used to resolve definition clashes.

Definition:JITLink.h:395

llvm::lltok::Kind

Kind

Definition:LLToken.h:18

llvm::ms_demangle::QualifierMangleMode::Result

@ Result

llvm

This is an optimization pass for GlobalISel generic memory operations.

Definition:AddressRanges.h:18

llvm::drop_begin

auto drop_begin(T &&RangeOrContainer, size_t N=1)

Return a range covering RangeOrContainer with the first N elements excluded.

Definition:STLExtras.h:329

llvm::Offset

@ Offset

Definition:DWP.cpp:480

llvm::getThePPC64LETarget

Target & getThePPC64LETarget()

Definition:PowerPCTargetInfo.cpp:25

llvm::size

auto size(R &&Range, std::enable_if_t< std::is_base_of< std::random_access_iterator_tag, typename std::iterator_traits< decltype(Range.begin())>::iterator_category >::value, void > *=nullptr)

Get the size of a range.

Definition:STLExtras.h:1697

llvm::LowerPPCMachineOperandToMCOperand

bool LowerPPCMachineOperandToMCOperand(const MachineOperand &MO, MCOperand &OutMO, AsmPrinter &AP)

Definition:PPCMCInstLower.cpp:188

llvm::getThePPC32Target

Target & getThePPC32Target()

Definition:PowerPCTargetInfo.cpp:13

llvm::getUniqueModuleId

std::string getUniqueModuleId(Module *M)

Produce a unique identifier for this module by taking the MD5 sum of the names of the module's strong...

Definition:ModuleUtils.cpp:346

llvm::MCSectionSubPair

std::pair< MCSection *, uint32_t > MCSectionSubPair

Definition:MCStreamer.h:67

llvm::LowerPPCMachineInstrToMCInst

void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, AsmPrinter &AP)

Definition:PPCMCInstLower.cpp:177

llvm::dbgs

raw_ostream & dbgs()

dbgs() - This returns a reference to a raw_ostream for debugging messages.

Definition:Debug.cpp:163

llvm::report_fatal_error

void report_fatal_error(Error Err, bool gen_crash_diag=true)

Report a serious error, calling any installed error handler.

Definition:Error.cpp:167

llvm::format_hex_no_prefix

FormattedNumber format_hex_no_prefix(uint64_t N, unsigned Width, bool Upper=false)

format_hex_no_prefix - Output N as a fixed width hexadecimal.

Definition:Format.h:200

llvm::getThePPC64Target

Target & getThePPC64Target()

Definition:PowerPCTargetInfo.cpp:21

llvm::get_threadid

uint64_t get_threadid()

Return the current thread id, as used in various OS system calls.

Definition:Threading.cpp:31

llvm::alignTo

uint64_t alignTo(uint64_t Size, Align A)

Returns a multiple of A needed to store Size bytes.

Definition:Alignment.h:155

llvm::getThePPC32LETarget

Target & getThePPC32LETarget()

Definition:PowerPCTargetInfo.cpp:17

llvm::move

OutputIt move(R &&Range, OutputIt Out)

Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.

Definition:STLExtras.h:1873

llvm::toString

const char * toString(DWARFSectionKind Kind)

Definition:DWARFUnitIndex.h:67

llvm::MCSymbolAttr

MCSymbolAttr

Definition:MCDirectives.h:18

llvm::MCSA_Weak

@ MCSA_Weak

.weak

Definition:MCDirectives.h:45

llvm::MCSA_Global

@ MCSA_Global

.type _foo, @gnu_unique_object

Definition:MCDirectives.h:30

llvm::MCSA_Extern

@ MCSA_Extern

.extern (XCOFF)

Definition:MCDirectives.h:32

llvm::MCSA_LGlobal

@ MCSA_LGlobal

.lglobl (XCOFF)

Definition:MCDirectives.h:31

llvm::MCSA_Invalid

@ MCSA_Invalid

Not a valid directive.

Definition:MCDirectives.h:19

std

Implement std::hash so that hash_code can be used in STL containers.

Definition:BitVector.h:858

raw_ostream.h

#define N

RegInfo

Definition:AMDGPUAsmParser.cpp:2770

llvm::Align

This struct is a compact representation of a valid (non-zero power of two) alignment.

Definition:Alignment.h:39

llvm::Align::value

uint64_t value() const

This is a hole in the type system and should not be abused.

Definition:Alignment.h:85

llvm::DenseMapInfo< std::pair< const MCSymbol *, MCSymbolRefExpr::VariantKind > >::getHashValue

static unsigned getHashValue(const TOCKey &PairVal)

Definition:PPCAsmPrinter.cpp:117

llvm::DenseMapInfo< std::pair< const MCSymbol *, MCSymbolRefExpr::VariantKind > >::isEqual

static bool isEqual(const TOCKey &A, const TOCKey &B)

Definition:PPCAsmPrinter.cpp:122

llvm::DenseMapInfo< std::pair< const MCSymbol *, MCSymbolRefExpr::VariantKind > >::TOCKey

std::pair< const MCSymbol *, MCSymbolRefExpr::VariantKind > TOCKey

Definition:PPCAsmPrinter.cpp:109

llvm::DenseMapInfo< std::pair< const MCSymbol *, MCSymbolRefExpr::VariantKind > >::getTombstoneKey

static TOCKey getTombstoneKey()

Definition:PPCAsmPrinter.cpp:114

llvm::DenseMapInfo< std::pair< const MCSymbol *, MCSymbolRefExpr::VariantKind > >::getEmptyKey

static TOCKey getEmptyKey()

Definition:PPCAsmPrinter.cpp:111

llvm::DenseMapInfo

An information struct used to provide DenseMap with the various necessary components for a given valu...

Definition:DenseMapInfo.h:52

llvm::MaybeAlign::valueOrOne

Align valueOrOne() const

For convenience, returns a valid alignment or 1 if undefined.

Definition:Alignment.h:141

llvm::TargetRegistry::RegisterAsmPrinter

static void RegisterAsmPrinter(Target &T, Target::AsmPrinterCtorTy Fn)

RegisterAsmPrinter - Register an AsmPrinter implementation for the given target.

Definition:TargetRegistry.h:865

llvm::XCOFF::CsectProperties

Definition:XCOFF.h:497

llvm::XCOFF::TracebackTable::FPRSavedMask

static constexpr uint32_t FPRSavedMask

Definition:XCOFF.h:436

llvm::XCOFF::TracebackTable::NumberOfVRSavedMask

static constexpr uint16_t NumberOfVRSavedMask

Definition:XCOFF.h:466

llvm::XCOFF::TracebackTable::NumberOfFloatingPointParmsShift

static constexpr uint8_t NumberOfFloatingPointParmsShift

Definition:XCOFF.h:452

llvm::XCOFF::TracebackTable::NumberOfFixedParmsMask

static constexpr uint32_t NumberOfFixedParmsMask

Definition:XCOFF.h:446

llvm::XCOFF::TracebackTable::HasVMXInstructionMask

static constexpr uint16_t HasVMXInstructionMask

Definition:XCOFF.h:472

llvm::XCOFF::TracebackTable::IsLRSavedMask

static constexpr uint32_t IsLRSavedMask

Definition:XCOFF.h:430

llvm::XCOFF::TracebackTable::HasVarArgsMask

static constexpr uint16_t HasVarArgsMask

Definition:XCOFF.h:468

llvm::XCOFF::TracebackTable::IsAllocaUsedMask

static constexpr uint32_t IsAllocaUsedMask

Definition:XCOFF.h:427

llvm::XCOFF::TracebackTable::IsVRSavedOnStackMask

static constexpr uint16_t IsVRSavedOnStackMask

Definition:XCOFF.h:467

llvm::XCOFF::TracebackTable::NumberOfVectorParmsMask

static constexpr uint16_t NumberOfVectorParmsMask

Definition:XCOFF.h:471

llvm::XCOFF::TracebackTable::IsFloatingPointPresentMask

static constexpr uint32_t IsFloatingPointPresentMask

Definition:XCOFF.h:420

llvm::XCOFF::TracebackTable::FPRSavedShift

static constexpr uint32_t FPRSavedShift

Definition:XCOFF.h:437

llvm::XCOFF::TracebackTable::NumberOfFloatingPointParmsMask

static constexpr uint32_t NumberOfFloatingPointParmsMask

Definition:XCOFF.h:450

llvm::XCOFF::TracebackTable::HasControlledStorageMask

static constexpr uint32_t HasControlledStorageMask

Definition:XCOFF.h:418

llvm::XCOFF::TracebackTable::HasExtensionTableMask

static constexpr uint32_t HasExtensionTableMask

Definition:XCOFF.h:440

llvm::XCOFF::TracebackTable::LanguageID

LanguageID

Definition:XCOFF.h:387

llvm::XCOFF::TracebackTable::CPlusPlus

@ CPlusPlus

Definition:XCOFF.h:397

llvm::XCOFF::TracebackTable::HasTraceBackTableOffsetMask

static constexpr uint32_t HasTraceBackTableOffsetMask

Definition:XCOFF.h:416

llvm::XCOFF::TracebackTable::IsCRSavedMask

static constexpr uint32_t IsCRSavedMask

Definition:XCOFF.h:429

llvm::XCOFF::TracebackTable::NumberOfFixedParmsShift

static constexpr uint8_t NumberOfFixedParmsShift

Definition:XCOFF.h:447

llvm::XCOFF::TracebackTable::GPRSavedMask

static constexpr uint32_t GPRSavedMask

Definition:XCOFF.h:442

llvm::XCOFF::TracebackTable::NumberOfVectorParmsShift

static constexpr uint8_t NumberOfVectorParmsShift

Definition:XCOFF.h:473

llvm::XCOFF::TracebackTable::HasParmsOnStackMask

static constexpr uint32_t HasParmsOnStackMask

Definition:XCOFF.h:451

llvm::XCOFF::TracebackTable::IsFunctionNamePresentMask

static constexpr uint32_t IsFunctionNamePresentMask

Definition:XCOFF.h:426

llvm::XCOFF::TracebackTable::IsBackChainStoredMask

static constexpr uint32_t IsBackChainStoredMask

Definition:XCOFF.h:434

llvm::XCOFF::TracebackTable::IsInterruptHandlerMask

static constexpr uint32_t IsInterruptHandlerMask

Definition:XCOFF.h:425

llvm::XCOFF::TracebackTable::HasVectorInfoMask

static constexpr uint32_t HasVectorInfoMask

Definition:XCOFF.h:441

llvm::XCOFF::TracebackTable::NumberOfVRSavedShift

static constexpr uint8_t NumberOfVRSavedShift

Definition:XCOFF.h:469

llvm::XCOFF::TracebackTable::GPRSavedShift

static constexpr uint32_t GPRSavedShift

Definition:XCOFF.h:443

llvm::cl::desc

Definition:CommandLine.h:409